Unlike on R-Car Gen3 SoCs, setting a bit to zero in a GPIO / Peripheral
Function Select Register (GPSRn) on R-Car S4-8 is not always sufficient
to configure a pin for GPIO. For I2C-capable pins, the I2C function
must also be explicitly disabled in the corresponding Module Select
Register (MODSELn).
Add the missing FN_SEL_I2Ci_0 function enums to the pinmux_data[] array
by temporarily overriding the GP_1_j_FN function enum to expand to two
enums: the original GP_1_j_FN enum to configure the GPSR register bits,
and the missing FN_SEL_I2Ci_0 enum to configure the MODSEL register
bits.
Fixes: 030ac6d7ee ("pinctrl: renesas: Initial R8A779F0 PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c12c60ec1058140a37f03650043ab73f730f104f.1650610471.git.geert+renesas@glider.be
Add pins, groups, and function for the Clock-Synchronized Serial
Interfaces with FIFO (MSIOF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/c625769714b1027a756dd2ed4a017eb24708a041.1645457792.git.geert+renesas@glider.be
Add pins, groups, and functions for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/2b85b8857c1189fa6ee33e2f57fe746d740481d1.1645457792.git.geert+renesas@glider.be
Add pins, groups, and functions for the Serial Communication Interfaces
with FIFO (SCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/6369359a53483291ee536787c8a232462ff1b3a9.1645457792.git.geert+renesas@glider.be
Add initial Pin Function Controller (PFC) support for the Renesas R-Car
S4-8 (R8A779F0) SoC, including bias, drive strength and voltage control.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/fd8201da404b7b0897130b254380ffc97f437266.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven