This patch (as1623) removes the ehci_port_power() routine and all the
places that call it. There's no reason for ehci-hcd to change the
port power settings; the hub driver takes care of all that stuff.
There is one exception: When the controller is resumed from
hibernation or following a loss of power, the ports that are supposed
to be handed over to a companion controller must be powered on first.
Otherwise the handover won't work. This process is not visible to the
hub driver, so it has to be handled in ehci-hcd.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch (as1564c) converts the EHCI platform drivers to use the
central ehci_setup() routine for generic controller initialization
rather than each having its own idiosyncratic approach.
The major point of difficulty lies in ehci-pci's many vendor- and
device-specific workarounds. Some of them have to be applied before
calling ehci_setup() and some after, which necessitates a fair amount
of code motion. The other platform drivers require much smaller
changes.
One point not addressed by the patch is whether ports should be
powered on or off following initialization. The different drivers
appear to handle this pretty much at random. In fact it shouldn't
matter, because the hub driver turns on power to all ports when it
binds to the root hub. Straightening that out will be left for
another day.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Several fixes as well where the +1 was missing.
Done via coccinelle scripts like:
@@
struct resource *ptr;
@@
- ptr->end - ptr->start + 1
+ resource_size(ptr)
and some grep and typing.
Mostly uncompiled, no cross-compilers.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.
This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: Jan Andersson <jan@gaisler.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch add bus glue for USB controller commonly found in PMC-Sierra MSP71xx family of SoC's.
Signed-off-by: Anoop P A <anoop.pa@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Alan Stern