Commit Graph

5 Commits

Author SHA1 Message Date
Mika Westerberg 42460c31ae mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash
Intel Ice Lake exposes the SPI serial flash controller as a PCI device
in the same way than Intel Denverton. Add Ice Lake SPI serial flash PCI
ID to the driver list of supported devices.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-10-12 11:47:07 +02:00
Kuppuswamy Sathyanarayanan ec0a9f62b3 mtd: intel-spi: Add Intel Lewisburg PCH SPI super SKU PCI ID
This patch adds Intel Lewisburg PCH SPI serial flash controller super
SKU PCI ID.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
2017-10-30 11:51:18 +01:00
Mika Westerberg 824af37ef2 mtd: spi-nor: intel-spi: Add support for Intel Cedar Fork SPI serial flash
Intel Cedar Fork has the same SPI serial flash controller than Intel
Denverton. Add the Intel Cedar Fork PCI ID to the driver list of
supported devices.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
2017-10-10 18:56:40 +02:00
Mika Westerberg d92b0f18a2 mtd: spi-nor: intel-spi: Add support for Intel Lewisburg SPI serial flash
Intel Lewisburg chipset exposes the SPI serial flash controller as a PCI
device in the same way than Intel Denverton. Add Intel Lewisburg SPI
serial flash PCI ID to the driver list of supported devices.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
2017-10-10 18:55:54 +02:00
Mika Westerberg fe602838a6 mtd: spi-nor: intel-spi: Add support for Intel Denverton SPI serial flash controller
Intel Denverton exposes the SPI serial flash controller as a PCI device
instead of being part of the LPC chip as previous generations did.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
2017-08-01 19:19:28 +02:00