Commit Graph

13 Commits

Author SHA1 Message Date
Dinh Nguyen 9ab4650f71 ARM: imx: Get the silicon version from the IIM module
Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-28 19:51:47 +01:00
Dinh Nguyen c0abefd30b ARM: imx: Add core definitions for MX53
Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 10:09:04 +01:00
Yong Shen 64f102b67f cpufreq for freescale mx51
Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0

Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-22 08:24:14 +02:00
Amit Kucheria 438caa3f6c mxc: changes to common plat-mxc code to add support for i.MX5
Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
2010-02-09 18:32:10 +02:00
Uwe Kleine-König a8dfb6462a imx: define functions to configure chip selects in the WEIM
This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A
are not used anymore in mach-pcm038.c and mach-qong.c.  These still use
the deprecated IO_ADDRESS macro and shouldn't be used in new code.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
2010-01-08 16:45:24 +01:00
Uwe Kleine-König a9b7a2dd21 imx: mangle addresses after adding the offset
don't use

	IO_ADDRESS($base) + $offset

but

	IO_ADDRESS($base + $offset)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: "Agustín Ferrín Pozuelo" <gatoguan-os@yahoo.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
2010-01-08 16:45:20 +01:00
Dmitriy Taychenachev fd6ac7bb9d MXC: add basic MXC91231 support
Signed-off-by: Dmitriy Taychenachev <dimichxp@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-14 12:40:46 +02:00
Sascha Hauer 8c25c36f33 Add i.MX25 support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-14 12:40:42 +02:00
Sascha Hauer 198016e1b1 [ARM] MXC: add cpu_is_ macros
We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-03-13 10:34:26 +01:00
Holger Schurig 260a1fd26c arm/imx2x: split i.MX21/i.MX27 register definitions
* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
  CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
  DMA channels are split into common part, i.MX27 specific and i.MX21
  specific.
* guard access to UART5/UART6, which don't exist on i.MX21

Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-03-13 10:33:53 +01:00
Holger Schurig 5512e88f3a arm/imx21: add kbuild support for the Freescale i.MX21
* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
  different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
  (the i.MX21 doesn't have those modules)

Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>

Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-03-13 10:33:45 +01:00
Luotao Fu 2cf842b896 mxc: add cscr register defintions
This adds macros to get CSCR upper, lower and additional registers.
These registers are needed to configure a chip select line. The offset
layouts of these Registers are identical on mx27 and mx31, hence we can
use the macros in generic way

Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-09-09 12:13:52 +02:00
Russell King a09e64fbc0 [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07 09:55:48 +01:00