Commit Graph

23 Commits

Author SHA1 Message Date
Linus Torvalds 54c72d5987 == Changes to existing drivers ==
- Checkpatch fixes throughout the subsystem
   - Use Regmap to handle IRQs in max77686, extcon-max77693 and mc13xxx-core
   - Use DMA in rtsx_pcr
   - Restrict building on unsupported architectures on timberdale, cs5535
   - SPI hardening in cros_ec_spi
   - More robust error handing in asic3, cros_ec, ab8500-debugfs,
         max77686 and pcf50633-core
   - Reorder PM runtime and regulator handing during shutdown in arizona
   - Enable wakeup in cros_ec_spi
   - Unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
         tps65912-spi, wm5110-tables and ab8500-debugfs
   - Add regulator handing into suspend() in sec-core
   - Remove pointless wrapper functions in extcon-max77693 and i2c-cros-ec-tunnel
   - Use cross-architecture friendly data sizes in stmpe-i2c, arizona,
         max77686 and tps65910
   - Device Tree documentation updates throughout
   - Provide power management support in max77686
   - Few OF clean-ups in max77686
   - Use manged resources in tps6105x
 
  == New drivers/supported devices ==
   - Add support for s2mpu02 to sec-core
   - Add support for Allwinner A32 to sun6i-prcm
   - Add support for Maxim 77802 in max77686
   - Add support for DA9063 AD in da9063
   - Add new driver for Intel PMICs (generic) and specifically Crystal Cove
 
  == (Re-)moved drivers ==
   - Move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJT40p7AAoJEFGvii+H/HdhTo0P/1GuZyvCAJCeqt2oN1gcloIe
 Hgf5rEo/PVPh3T9vHA7GCbWhgtdxfJI8FxrQYvU7Dw5cEMlmvl5p/ZHNPIProv97
 uI59JO67roLpXZP+aYX8BzXcplYkaR/ah16o/ePtaOCwGrXDz+TtJiHEVVN/8bAG
 PWsdcDNBC8byP7BZ/8zFdu6pX4800eRZ0KgeBH+u4k6UDor7M6LkQrxF1hJhU1Bv
 z14Q2wKQufhbcyEtQWcYc6M8hignD1Ioyd4I8mnEJs0EUiABfGUEk/K/G4Z5Q7Sv
 eRIEPZCd1CEBKD5JQcPXyE1QGdG9GiD15PLmctPA4VY1V+9c5/Hoq0TLoxlAQNWA
 gUr7WSqJ+KT2Nch0WVr/MdP8l0jPYfboWbsd/apj4GK0/9quwJNkGUxx0mCdCXyg
 9ylitwUrmlrd4CEKjybfEuTQB52Jvcdq24fnNYHHn1TGppZH6w7LVvdwSW7UcjF0
 Y48hTImYYnVAlWl5lE5xVQTWD/3hseAcoWTsdSORSWJbkCfAhJUg/Gn5bH/Fkwhs
 /aWYPvkF+m47PoudZ9Z8qB5OTO4uz/Q9uEBBf2/k4Yy95vl2IZdy9VqS5tYG67e7
 LLdAZvG5hjEwDi3OwcwGSdZ/kRB5Hgq/YvpqjItle86CKj0ECdAqL/PfqLISgJq9
 x3zSuWMRLcNoyhc2HnBj
 =2cNI
 -----END PGP SIGNATURE-----

Merge tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD update from Lee Jones:
 "Changes to existing drivers:
   - checkpatch fixes throughout the subsystem
   - use Regmap to handle IRQs in max77686, extcon-max77693 and
     mc13xxx-core
   - use DMA in rtsx_pcr
   - restrict building on unsupported architectures on timberdale,
     cs5535
   - SPI hardening in cros_ec_spi
   - more robust error handing in asic3, cros_ec, ab8500-debugfs,
     max77686 and pcf50633-core
   - reorder PM runtime and regulator handing during shutdown in arizona
   - enable wakeup in cros_ec_spi
   - unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld,
     tps65912-spi, wm5110-tables and ab8500-debugfs
   - add regulator handing into suspend() in sec-core
   - remove pointless wrapper functions in extcon-max77693 and
     i2c-cros-ec-tunnel
   - use cross-architecture friendly data sizes in stmpe-i2c, arizona,
     max77686 and tps65910
   - devicetree documentation updates throughout
   - provide power management support in max77686
   - few OF clean-ups in max77686
   - use manged resources in tps6105x

  New drivers/supported devices:
   - add support for s2mpu02 to sec-core
   - add support for Allwinner A32 to sun6i-prcm
   - add support for Maxim 77802 in max77686
   - add support for DA9063 AD in da9063
   - new driver for Intel PMICs (generic) and specifically Crystal Cove

  (Re-)moved drivers ==
   - move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb"

* tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (101 commits)
  MAINTAINERS: Update MFD repo location
  mfd: omap-usb-host: Fix improper mask use.
  mfd: arizona: Only free the CTRLIF_ERR IRQ if we requested it
  mfd: arizona: Add missing handling for ISRC3 under/overclocked
  mfd: wm5110: Add new interrupt register definitions
  mfd: arizona: Rename thermal shutdown interrupt
  mfd: wm5110: Add in the output done interrupts
  mfd: wm5110: Remove non-existant interrupts
  mfd: tps65912-spi: Remove unused variable
  mfd: htc-i2cpld: Remove unused code
  mfd: da9063: Add support for AD silicon variant
  mfd: arizona: Map MICVDD from extcon device to the Arizona core
  mfd: arizona: Add MICVDD to mapped regulators for wm8997
  mfd: max77686: Ensure device type IDs are architecture agnostic
  mfd: max77686: Add Maxim 77802 PMIC support
  mfd: tps6105x: Use managed resources when allocating memory
  mfd: wm8997-tables: Suppress 'line over 80 chars' warnings
  mfd: kempld-core: Correct a variety of checkpatch warnings
  mfd: ipaq-micro: Fix coding style errors/warnings reported by checkpatch
  mfd: si476x-cmd: Remedy checkpatch style complains
  ...
2014-08-07 17:17:39 -07:00
Thomas Gleixner 154adc14b1 mfd: cros_ec_spi: Use ktime_get_ns()
Replace the ever recurring:
	ts = ktime_get_ts();
	ns = timespec_to_ns(&ts);
with
	ns = ktime_get_ns();

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
2014-07-23 15:01:38 -07:00
Bill Richardson 12ebc8a50b mfd: cros_ec: ec_dev->cmd_xfer() returns number of bytes received from EC
When communicating with the EC, the cmd_xfer() function should return the
number of bytes it received from the EC, or negative on error.

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:20 +01:00
Bill Richardson 6db07b6336 mfd: cros_ec: Check result code from EC messages
Just because the host was able to talk to the EC doesn't mean that the EC
was happy with what it was told. Errors in communincation are not the same
as error messages from the EC itself.

This change lets the EC report its errors separately.

[dianders: Added common function to cros_ec.c]

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:19 +01:00
Bill Richardson 533cec8f34 mfd: cros_ec: cleanup: remove unused fields from struct cros_ec_device
struct cros_ec_device has a superfluous "name" field. We can get all the
debugging info we need from the existing ec_name and phys_name fields, so
let's take out the extra field.

The printout also has sufficient info in it without explicitly adding
the transport.  Before this change:
  cros-ec-spi spi2.0: Chrome EC (SPI)

After this change:
  cros-ec-spi spi2.0: Chrome EC device registered

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:18 +01:00
Bill Richardson 5d4773e27e mfd: cros_ec: Use struct cros_ec_command to communicate with the EC
This is some internal structure reorganization / renaming to prepare
for future patches that will add a userspace API to cros_ec.  There
should be no visible changes.

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:17 +01:00
Simon Glass 9c5edb6c45 mfd: cros_ec: Detect in-progress commands
Some commands take a while to execute. Use -EAGAIN to signal this to the
caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:16 +01:00
Bill Richardson 7e6cb5b4db mfd: cros_ec: Tweak struct cros_ec_device for clarity
The members of struct cros_ec_device were improperly commented, and
intermixed the private and public sections. This is just cleanup to make it
more obvious what goes with what.

[dianders: left lock in the structure but gave it the name that will
eventually be used.]

Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:16 +01:00
Prathyush K fb50497ce2 mfd: cros_ec_spi: Set wakeup capability
Set the device as wakeup capable and register the wakeup source.

Note: Though it makes more sense to have the SPI framework do this,
(either via device tree or by board_info)
this change is as per an existing mail chain:
https://lkml.org/lkml/2009/8/27/291

Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:06 +01:00
Doug Anderson 967580598f mfd: cros_ec: spi: Fix end of transfer on devices with no spi-msg-delay
cros_ec_spi makes the assumption that a 0-length message will put the
spi chip select back to normal (non cs_toggle mode).  This used to be
the case back on kernel-3.8 on the spi-s3c64xx driver but doesn't
appear to be true anymore.  It seems like it was a pretty questionable
assumption to begin with, so let's fix the code to be more robust.  We
know that a message with a single 0-length segment _will_ put things
back in order.  Change cros_ec_spi to handle this.

This wasn't a problem on the main user of cros_ec_spi upstream (tegra)
because it specified 'google,cros-ec-spi-msg-delay'.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-07-09 14:58:00 +01:00
Doug Anderson 9c0b54a120 mfd: cros_ec: spi: Increase cros_ec_spi deadline from 5ms to 100ms
We're adding i2c tunneling to the list of things that goes over
cros_ec.  i2c tunneling can be slooooooow, so increase our deadline to
100ms to account for that.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03 08:11:48 +01:00
Doug Anderson c9a81d67ce mfd: cros_ec: spi: Make the cros_ec_spi timeout more reliable
The cros_ec_spi transfer had two problems with its timeout code:

1. It looked at the timeout even in the case that it found valid data.
2. If the cros_ec_spi code got switched out for a while, it's possible
   it could get a timeout after a single loop.  Let's be paranoid and
   make sure we do one last transfer after the timeout expires.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03 08:11:47 +01:00
Doug Anderson 362196e5d0 mfd: cros_ec: spi: Add mutex to cros_ec_spi
The main transfer function for cros_ec_spi can be called by more than
one client at a time.  Make sure that those clients don't stomp on
each other by locking the bus for the duration of the transfer
function.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03 08:11:46 +01:00
David Hendricks 1fe368665b mfd: cros_ec: spi: Calculate delay between transfers correctly
To avoid spamming the EC we calculate the time between the previous
transfer and the current transfer and force a delay if the time delta
is too small.

However, a small miscalculation causes the delay period to be
far too short. Most noticably this impacts commands with a long
turnaround time such as EC firmware reads and writes.

Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-06-03 08:11:46 +01:00
Rhyland Klein 01e73c89cf mfd: cros ec: spi: Add delay for raising CS
The EC has specific timing it requires. Add support for an optional delay
after raising CS to fix timing issues. This is configurable based on
a DT property "google,cros-ec-spi-msg-delay".

If this property isn't set, then no delay will be added. However, if set
it will cause a delay equal to the value passed to it to be inserted at
the end of a transaction.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:28:06 +00:00
Thierry Reding daf93d2287 mfd: cros ec: spi: Use 0 instead of '\0' consistently
memset() was being called with the second parameter set to '\0', which
is equivalent but longer than the more canonical 0. Update the code to
use the latter variant consistently across the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:28:05 +00:00
Thierry Reding ea0f8b0b67 mfd: cros ec: spi: Use correct module license
According to the header comment in the source file the driver is
licensed under GPL v2, so update MODULE_LICENSE() to match that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:28:04 +00:00
Thierry Reding 9922b4129c mfd: cros ec: spi: Use consistent function names
Rename cros_ec_{probe,remove}_spi() to cros_ec_spi_{probe,remove}() for
consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-21 08:13:34 +00:00
Thierry Reding 9e146f4330 mfd: cros ec: spi: Fix debug output
The dev_cont() symbol doesn't exist, so replace it with pr_cont(). While
at it, also append a newline to the debug output to make it look nicer.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-06 09:13:23 +00:00
Derek Basehore 49f91ac331 mfd: cros ec: spi: Increase EC transaction delay
50 us is not a long enough delay between EC transactions. At least 70 us
are needed for the 16 MHz STM32L part. Increase the delay to 200 us for
an extra safety margin.

Reviewed-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-01-06 09:13:23 +00:00
Geert Uytterhoeven c34924b950 mfd: cros_ec_spi: Use %z to format pointer differences
Before commit 5c29e47e6a ("mfd: cros_ec_spi:
Warnings fix"), 64-bit compiles gave the following warnings:

drivers/mfd/cros_ec_spi.c: In function 'cros_ec_spi_receive_response':
drivers/mfd/cros_ec_spi.c:123:5: warning: format '%d' expects argument of type 'int', but argument 4 has type 'long int' [-Wformat]
drivers/mfd/cros_ec_spi.c:157:3: warning: format '%d' expects argument of type 'int', but argument 6 has type 'long int' [-Wformat]
drivers/mfd/cros_ec_spi.c:181:2: warning: format '%d' expects argument of type 'int', but argument 4 has type 'long int' [-Wformat]

After that commit, 32-bit compiles give:

drivers/mfd/cros_ec_spi.c: In function ‘cros_ec_spi_receive_response’:
drivers/mfd/cros_ec_spi.c:123: warning: format ‘%ld’ expects type ‘long int’, but argument 4 has type ‘int’
drivers/mfd/cros_ec_spi.c:157: warning: format ‘%ld’ expects type ‘long int’, but argument 6 has type ‘int’
drivers/mfd/cros_ec_spi.c:181: warning: format ‘%ld’ expects type ‘long int’, but argument 4 has type ‘int’

Use %z to format pointer differences to kill the warnings on both 32-bit
and 64-bit.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-05-16 19:14:06 +02:00
Samuel Ortiz 5c29e47e6a mfd: cros_ec_spi: Warnings fix
To silent those:

 CC [M]  drivers/mfd/cros_ec_spi.o
drivers/mfd/cros_ec_spi.c: In function ‘cros_ec_spi_receive_response’:
drivers/mfd/cros_ec_spi.c:123:5: warning: format ‘%d’ expects argument of type
‘int’, but argument 4 has type ‘long int’ [-Wformat]
drivers/mfd/cros_ec_spi.c:157:3: warning: format ‘%d’ expects argument of type
‘int’, but argument 6 has type ‘long int’ [-Wformat]
drivers/mfd/cros_ec_spi.c:181:2: warning: format ‘%d’ expects argument of type
‘int’, but argument 4 has type ‘long int’ [-Wformat]

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-04-05 11:20:13 +02:00
Simon Glass a17d94f0b6 mfd: Add ChromeOS EC SPI driver
This uses a SPI bus to talk to the ChromeOS EC. The protocol
is defined by the EC and is fairly simple, with a length byte,
checksum, command byte and version byte (to permit easy creation
of new commands).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2013-04-05 11:20:13 +02:00