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Linus Torvalds 815d469d8c One more patch to remove io.h from clk-provider.h. We used to need this 
include when we had clk_readl() and clk_writel(), but those are gone now
 so this patch pushes the dependency out to the users of clk-provider.h.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlzdx/ERHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUeJw/+NfQU+GwmfM1mXUnClTuJthKZRlXQTt4o
 KzD4VtdqWOPSPWF2QNUM3oG5+FxbmzxZBMMyAfWKO4MS/hYvD3wZOdbP56KvoUe6
 I75FHSGYlXFMvohm6vjPvfx30IcBn0QZcP9bhP5B5h0UbIG9annbVWWNR2qBg+/O
 4p3o33CPSIO5W3IblSWrFzuEOBXNlkJKTIZW2BcV33aUCbAD3wrvqoP5l7xBbDJN
 U+QC+4LoZtA1RSM03qOzHleXrXNhBjWNtxRqXCIu0hkmyVdPAHDg0tb745HdLUc+
 PTRCCguU21ANJMf2hD0dYiRi5fSPSLzIqQ2uZW8O6/ChSIMsOrZ43tW1TsQ7E7ZD
 gGEu2aj5euPyTVh0HmWKXyqEEUF/fqywJtwNQSyNTzDvQd807Pabb1YoIzZz9w2S
 V+/PoDVYF90IN1DsuOnbTCQ/BK0bqUb+7BtkrCzJ1ip3FpdB3017zT1b5wIzLjfI
 1NO3ub5iHGAiS1qzChGa3Va56CDjspx66atMomDaeOQsBC983GdWOerBunKxL3UM
 US7rhr9DgPz8p9DEFPeXQXABgZUV4ToBb8nD8b2U1eFiOZthg7CO5mKSuwPGXcBQ
 RsWwmxc87DZJJJno2abacK/h0ii/r8f+3+C9x98vtYewJEC5RHbJygYHcr3YNjo1
 LOdCMassRT4=
 =JjQo
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk framework updates from Stephen Boyd:
 "One more patch to remove io.h from clk-provider.h.

  We used to need this include when we had clk_readl() and clk_writel(),
  but those are gone now so this patch pushes the dependency out to the
  users of clk-provider.h"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: Remove io.h from clk-provider.h
 2019-05-16 19:05:35 -07:00
Stephen Boyd 62e59c4e69 clk: Remove io.h from clk-provider.h 
Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.

Found with this grep:

  git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
  	xargs git grep -l \
	-e '\<__iowrite32_copy\>' --or \
	-e '\<__ioread32_copy\>' --or \
	-e '\<__iowrite64_copy\>' --or \
	-e '\<ioremap_page_range\>' --or \
	-e '\<ioremap_huge_init\>' --or \
	-e '\<arch_ioremap_pud_supported\>' --or \
	-e '\<arch_ioremap_pmd_supported\>' --or \
	-e '\<devm_ioport_map\>' --or \
	-e '\<devm_ioport_unmap\>' --or \
	-e '\<IOMEM_ERR_PTR\>' --or \
	-e '\<devm_ioremap\>' --or \
	-e '\<devm_ioremap_nocache\>' --or \
	-e '\<devm_ioremap_wc\>' --or \
	-e '\<devm_iounmap\>' --or \
	-e '\<devm_ioremap_release\>' --or \
	-e '\<devm_memremap\>' --or \
	-e '\<devm_memunmap\>' --or \
	-e '\<__devm_memremap_pages\>' --or \
	-e '\<pci_remap_cfgspace\>' --or \
	-e '\<arch_has_dev_port\>' --or \
	-e '\<arch_phys_wc_add\>' --or \
	-e '\<arch_phys_wc_del\>' --or \
	-e '\<memremap\>' --or \
	-e '\<memunmap\>' --or \
	-e '\<arch_io_reserve_memtype_wc\>' --or \
	-e '\<arch_io_free_memtype_wc\>' --or \
	-e '\<__io_aw\>' --or \
	-e '\<__io_pbw\>' --or \
	-e '\<__io_paw\>' --or \
	-e '\<__io_pbr\>' --or \
	-e '\<__io_par\>' --or \
	-e '\<__raw_readb\>' --or \
	-e '\<__raw_readw\>' --or \
	-e '\<__raw_readl\>' --or \
	-e '\<__raw_readq\>' --or \
	-e '\<__raw_writeb\>' --or \
	-e '\<__raw_writew\>' --or \
	-e '\<__raw_writel\>' --or \
	-e '\<__raw_writeq\>' --or \
	-e '\<readb\>' --or \
	-e '\<readw\>' --or \
	-e '\<readl\>' --or \
	-e '\<readq\>' --or \
	-e '\<writeb\>' --or \
	-e '\<writew\>' --or \
	-e '\<writel\>' --or \
	-e '\<writeq\>' --or \
	-e '\<readb_relaxed\>' --or \
	-e '\<readw_relaxed\>' --or \
	-e '\<readl_relaxed\>' --or \
	-e '\<readq_relaxed\>' --or \
	-e '\<writeb_relaxed\>' --or \
	-e '\<writew_relaxed\>' --or \
	-e '\<writel_relaxed\>' --or \
	-e '\<writeq_relaxed\>' --or \
	-e '\<readsb\>' --or \
	-e '\<readsw\>' --or \
	-e '\<readsl\>' --or \
	-e '\<readsq\>' --or \
	-e '\<writesb\>' --or \
	-e '\<writesw\>' --or \
	-e '\<writesl\>' --or \
	-e '\<writesq\>' --or \
	-e '\<inb\>' --or \
	-e '\<inw\>' --or \
	-e '\<inl\>' --or \
	-e '\<outb\>' --or \
	-e '\<outw\>' --or \
	-e '\<outl\>' --or \
	-e '\<inb_p\>' --or \
	-e '\<inw_p\>' --or \
	-e '\<inl_p\>' --or \
	-e '\<outb_p\>' --or \
	-e '\<outw_p\>' --or \
	-e '\<outl_p\>' --or \
	-e '\<insb\>' --or \
	-e '\<insw\>' --or \
	-e '\<insl\>' --or \
	-e '\<outsb\>' --or \
	-e '\<outsw\>' --or \
	-e '\<outsl\>' --or \
	-e '\<insb_p\>' --or \
	-e '\<insw_p\>' --or \
	-e '\<insl_p\>' --or \
	-e '\<outsb_p\>' --or \
	-e '\<outsw_p\>' --or \
	-e '\<outsl_p\>' --or \
	-e '\<ioread8\>' --or \
	-e '\<ioread16\>' --or \
	-e '\<ioread32\>' --or \
	-e '\<ioread64\>' --or \
	-e '\<iowrite8\>' --or \
	-e '\<iowrite16\>' --or \
	-e '\<iowrite32\>' --or \
	-e '\<iowrite64\>' --or \
	-e '\<ioread16be\>' --or \
	-e '\<ioread32be\>' --or \
	-e '\<ioread64be\>' --or \
	-e '\<iowrite16be\>' --or \
	-e '\<iowrite32be\>' --or \
	-e '\<iowrite64be\>' --or \
	-e '\<ioread8_rep\>' --or \
	-e '\<ioread16_rep\>' --or \
	-e '\<ioread32_rep\>' --or \
	-e '\<ioread64_rep\>' --or \
	-e '\<iowrite8_rep\>' --or \
	-e '\<iowrite16_rep\>' --or \
	-e '\<iowrite32_rep\>' --or \
	-e '\<iowrite64_rep\>' --or \
	-e '\<__io_virt\>' --or \
	-e '\<pci_iounmap\>' --or \
	-e '\<virt_to_phys\>' --or \
	-e '\<phys_to_virt\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<__ioremap\>' --or \
	-e '\<iounmap\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<ioremap_nocache\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wt\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<xlate_dev_kmem_ptr\>' --or \
	-e '\<xlate_dev_mem_ptr\>' --or \
	-e '\<unxlate_dev_mem_ptr\>' --or \
	-e '\<virt_to_bus\>' --or \
	-e '\<bus_to_virt\>' --or \
	-e '\<memset_io\>' --or \
	-e '\<memcpy_fromio\>' --or \
	-e '\<memcpy_toio\>'

I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-05-15 13:21:37 -07:00
Linus Torvalds 15500c0a50 - New driver: Armada 37xx mailbox controller 
- Misc: Use devm_ api for imx and platform_get_irq for stm32
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAlzTv38ACgkQf9lkf8eY
 P5VOQQ//d2rKhGB1GjVZQlezRa+AOLWr69cbN4mcxUvXp+PJmrcnqn1Ld7QzPXCl
 /Xc/2+KxtZ5WX7vtmGu45eSFiCqf2apXfDaQf89ZrtCbUKT1GBJRUvvBeCmFv4pZ
 bnA0PTCsHkpdvttmM2W++ZHFmgVxKOTQmtTZFsmwohJNfALkoQaw9NgKUuBKzPdI
 DutmXNBLXm+EkEjuIjvsKdgE63g49BTio9BRzX85+PKYmRohOa5xb05pW4KLOvOW
 WJ4KeUDHdWinIoedBg+FGlgWjACP3at6h3sKVqDsv76NmsCZHWjh3OV2pqQSp1ta
 n7HD/xPoGKNRDb+8r1CL3YLgwY4Hdvkq73koX8BGJ1jkB7LmikofGz0tnigcjrY/
 D4QIPu+nIsi7hZs4S2nSMvvLWcdhUkDFa1F0hf3shYV+tPqUAFMYeG5MwMEQ4zqW
 KMUieCPRA4n5jiwQ3CBZgfcB+tCNJnsEkDtLoJydKNvgawpTanff7IJO2vALN64K
 PnIcPkHzFlbQj8lOLffCTFqqnOabkwaxeyV5r9oiT0OAg0paRBXrAo3VyVONzwqK
 vMAhNSygqeKudQ8EQcQS+0ymyjfSCJXa1M93lVG679VKcyVVrs0uEhjvub1abv3v
 Co08qKk18lsqYc55E8BzZ4T+F/mifzmEIPblM6EA9DnooSSrE/o=
 =rUxA
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - New driver: Armada 37xx mailbox controller

 - Misc: Use devm_ api for imx and platform_get_irq for stm32

* tag 'mailbox-v5.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Add support for Armada 37xx rWTM mailbox
  dt-bindings: mailbox: Document armada-3700-rwtm-mailbox binding
  mailbox: stm32-ipcc: check invalid irq
  mailbox: imx: use devm_platform_ioremap_resource() to simplify code
 2019-05-10 12:55:16 -04:00
Marek Behun 8fbbfd966e mailbox: Add support for Armada 37xx rWTM mailbox 
This adds support for the mailbox via which the kernel can communicate
with the firmware running on the secure processor of the Armada 37xx
SOC.

The rWTM secure processor has access to internal eFuses and
cryptographic circuits, such as the Entropy Bit Generator to generate
true random numbers.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-05-09 00:41:00 -05:00
Fabien Dessenne 68a1c8485c mailbox: stm32-ipcc: check invalid irq 
On failure of_irq_get() returns a negative value or zero, which is
not handled as an error in the existing implementation.
Instead of using this API, use platform_get_irq() that returns
exclusively a negative value on failure.
Also, do not output an error log in case of defer probe error.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-05-09 00:41:00 -05:00
Anson Huang 0c40e631cd mailbox: imx: use devm_platform_ioremap_resource() to simplify code 
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-05-09 00:40:49 -05:00
Keith Busch 60574d1e05 acpi: Create subtable parsing infrastructure 
Parsing entries in an ACPI table had assumed a generic header
structure. There is no standard ACPI header, though, so less common
layouts with different field sizes required custom parsers to go through
their subtable entry list.

Create the infrastructure for adding different table types so parsing
the entries array may be more reused for all ACPI system tables and
the common code doesn't need to be duplicated.

Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Keith Busch <keith.busch@intel.com>
Tested-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2019-04-04 18:41:12 +02:00
Anson Huang 17b860bbfc mailbox: imx: keep MU irq working during suspend/resume 
During noirq suspend phase, mailbox MU irq will be masked
but many drivers still need to communicate with system
controller firmware via mailbox, if MU irq is masked, it
will cause RPC timeout as below:

[   23.372103] imx-scu scu: RPC send msg timeout

Setting MU irq to be wakeup source is NOT working as GIC
driver does NOT have .irq_set_wake implemented, so to
support suspend/resume, just make imx mailbox driver NOT
suspend, since MU is always a wakeup source on i.MX platforms
with system controller inside, and its power/clock is
maintained by system controller, mailbox driver no need
to manage them.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-11 02:51:43 -05:00
Wendy Liang 4981b82ba2 mailbox: ZynqMP IPI mailbox controller 
This patch is to introduce ZynqMP IPI mailbox controller driver
to use the ZynqMP IPI block as mailboxes.

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:34:20 -06:00
Fabien Dessenne 419d67f3ec mailbox: stm32-ipcc: remove useless device_init_wakeup call 
If the "wakeup-source" property does not exist there is no need to call
device_init_wakeup("false") at probe.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:33:59 -06:00
Fabien Dessenne eac36c8651 mailbox: stm32-ipcc: do not enable wakeup source by default 
By default do not enable the wakeup source.
This lets the userspace application decide whether the wakeup source
shall be enabled or not.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:33:52 -06:00
Fabien Dessenne 6899b4f7c9 mailbox: mailbox-test: fix null pointer if no mmio 
Fix null pointer issue if resource_size is called with no ioresource.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:33:14 -06:00
Fabien Dessenne 10cfc5a92e mailbox: mailbox-test: fix debugfs in multi-instances 
Create one debug entry directory per instance to support the multi
instantiation.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:32:59 -06:00
Arnd Bergmann a904327e98 mailbox: tegra-hsp: mark suspend function as __maybe_unused 
We get a warning about this being unused when CONFIG_PM is disabled:

drivers/mailbox/tegra-hsp.c:782:12: error: 'tegra_hsp_resume' defined but not used [-Werror=unused-function]

Fixes: 9a63f0f405 ("mailbox: tegra-hsp: Add suspend/resume support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-03-06 20:31:03 -06:00
Rayagonda Kokatanur d7bf31a0f8 mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush timeout issue 
RING_CONTROL reg was not written due to wrong address, hence all
the subsequent ring flush was timing out.

Fixes: a371c10ea4 ("mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence")

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-02-18 10:40:58 -06:00
Thierry Reding 4f0557795e mailbox: Export mbox_flush() 
The mbox_flush() function can be used by drivers that are built as
modules, so the function needs to be exported.

Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2019-02-18 10:39:17 -06:00
Thierry Reding d69e11648e mailbox: tegra-hsp: Use device-managed registration API 
In order to get rid of a lot of cleanup boilerplate code, use the
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Bartosz Golaszewski a54d03ed01 mailbox: tegra-hsp: use devm_kstrdup_const() 
Use devm_kstrdup_const() in the tegra-hsp driver. This mostly serves as
an example of how to use this new routine to shrink driver code.

Also use devm_kzalloc() instead of regular kzalloc() to shrink the
driver even more.

Doorbell objects are only removed in the driver's remove callback so
it's safe to convert all memory allocations to devres.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Thierry Reding 9a63f0f405 mailbox: tegra-hsp: Add suspend/resume support 
Upon resuming from a system sleep state, the interrupts for all active
shared mailboxes need to be reenabled, otherwise they will not work.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Thierry Reding 91b1b1c3da mailbox: tegra-hsp: Add support for shared mailboxes 
The Tegra HSP block supports 'shared mailboxes' that are simple 32-bit
registers consisting of a FULL bit in MSB position and 31 bits of data.
The hardware can be configured to trigger interrupts when a mailbox
is empty or full. Add support for these shared mailboxes to the HSP
driver.

The initial use for the mailboxes is the Tegra Combined UART. For this
purpose, we use interrupts to receive data, and spinning to wait for
the transmit mailbox to be emptied to minimize unnecessary overhead.

Based on work by Mikko Perttunen <mperttunen@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Mikko Perttunen 8ed82e2387 mailbox: Allow multiple controllers per device 
Look through the whole controller list when mapping device tree
phandles to controllers instead of stopping at the first one.

Each controller is intended to only contain one kind of mailbox,
but some devices (like Tegra HSP) implement multiple kinds and use
the same device tree node for all of them. As such, we need to allow
multiple mbox_controllers per device tree node.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Thierry Reding a8803d7421 mailbox: Support blocking transfers in atomic context 
The mailbox framework supports blocking transfers via completions for
clients that can sleep. In order to support blocking transfers in cases
where the transmission is not permitted to sleep, add a new ->flush()
callback that controller drivers can implement to busy loop until the
transmission has been completed. A new mbox_flush() function can be
called by mailbox consumers in atomic context to make sure a transfer
has completed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 22:31:26 -06:00
Thierry Reding 2298a6f09f mailbox: ti-msgmgr: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:26 -06:00
Thierry Reding 368d7767b5 mailbox: stm32-ipcc: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:26 -06:00
Thierry Reding 08f2f88a3b mailbox: rockchip: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 83dd44a17d mailbox: qcom-apcs: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 85a555246e mailbox: platform-mhu: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding a3abf4363c mailbox: omap: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding ec1c674f0a mailbox: mtk-cmdq: Remove needless devm_kfree() calls 
Memory allocated through device-managed functions doesn't need to be
explicitly freed, so these calls can be removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 8aed571955 mailbox: mtk-cmdq: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 0b7f5fe837 mailbox: xgene-slimpro: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding d0c196dbee mailbox: sti: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 87f63f578b mailbox: altera: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 4013286c72 mailbox: imx: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding ad3e7f9651 mailbox: hi6220: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding e73cb83c80 mailbox: hi3660: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Tested-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 6267ee6afa mailbox: bcm-pdc: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 0cafc12ab9 mailbox: bcm-flexrm: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 709cbeea1b mailbox: bcm2835: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding 6aba2f4aac mailbox: arm-mhu: Use device-managed registration API 
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Thierry Reding e898d9cdd3 mailbox: Add device-managed registration functions 
Add device-managed equivalents of the mbox_controller_register() and
mbox_controller_unregister() functions that can be used to have the
devres infrastructure automatically unregister mailbox controllers on
driver probe failure or driver removal. This can help remove a lot of
boiler plate code from drivers.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-21 16:49:25 -06:00
Stefan Wahren e2affdbef2 mailbox: bcm2835: Switch to SPDX identifier 
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-12 08:22:54 +05:30
Dan Carpenter 78f3ff524f mailbox: ti-msgmgr: Off by one in ti_msgmgr_of_xlate() 
The > comparison should be >= or we access one element beyond the end
of the array.

(The inst->qinsts[] array is allocated in the ti_msgmgr_probe() function
and it has ->num_valid_queues elements.)

Fixes: a2b79838b8 ("mailbox: ti-msgmgr: Add support for Secure Proxy")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-12 08:02:45 +05:30
Kevin Wangtao 2e4ac7cc49 mailbox: Hi3660: Fixup mailbox state machine malfunction issue 
Current mailbox driver of Hi3660 release the mailbox directly
before sending a new message which may cause last message lost
and next message sending doesn't take effect actually.

This patch fixs this issue by following the right progress below,
each time before sending a message, mailbox driver will check
whether the mailbox is in ready state, if last message has been
acknowledged, the mailbox driver will clear the ack state to turn
the mailbox to ready state again.

Signed-off-by: Kevin Wangtao <kevin.wangtao@hisilicon.com>
Reviewed-and-tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-12 08:01:10 +05:30
Julia Lawall b5452838c6 mailbox: hi3660: constify mbox_chan_ops structure 
The mbox_chan_ops structure can be const as it is only stored in the
ops field of an mbox_controller structure and this field is const.

Done with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-12-12 07:59:40 +05:30
Linus Torvalds fe675d4d3c - Convert print users to use the %pOFn format specifier 
- Enable ti-msgmr driver for the K3 platform as well
 - Add QCS404 to compatible list of QCOM's APCS IPC driver
 - Minor spelling fixes toogle -> toggle
 - kzalloc failure catch in Mediatek driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAlvWoPwACgkQf9lkf8eY
 P5WTow//SixXy6IrXP+8c9tpuXjTdWbyk1mho2ea6QUsxvnezMp9Qos9/hsaV6ly
 wE14CVHGrWXbQ7OJigAVf1gG8a/Wp/GH47gHRljkqOCpdAP5Azx806MQYJQF5nTt
 0kioseREhGFL24MUlvfo7KQH/GDi/WHrCksXxyXNNIVQPaII7TcE+mEul9e1QXZm
 ZhaPjeMJfY6wfnCFS7gwfSyNsofL3rkuuKavtlF2SKcqMfnI4K3XOq4wDdYwt9lN
 N8fIHqrf7AuBQiLSvXc5Ec5qOo8BcfyY9u+igzontKWC01MBWBobzRzvex6moQzW
 7pTY+7eBERplRKQVAvV9ft+XhXpVV4+YUNlqmczYdnx+6xKjxisMR+hBbBO0rNcp
 msXEpBPPWm/T25qERcUgiwXhBma2K1SOUytdHLcrWxLsfXsNf0NMVMwSS+ZBV6mg
 JB5zwHtHcJ/Yw+FlZxsHbCySCYQvc9rjxudZbOY4DS9V8Of67263Ca0EEndUoQdR
 vwnwraDgt9VC33Kn6c8EVxFycZnQ9LlbR9GAAu+fAfN55M/bpMILPKPNhgpMOMW5
 km2pelku0vBbPFIMgSMmjrYa1khHaZcTtFBIyenvaDU5h6FIJ7iC6D+OwidIAi+d
 gQqSHoInfRcaSxhxqWLuZVk5VeTFlkWSAXCH6aF5MoY8kon/nBc=
 =KH5m
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v4.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - convert print users to use the %pOFn format specifier

 - enable ti-msgmr driver for the K3 platform as well

 - add QCS404 to compatible list of QCOM's APCS IPC driver

 - minor spelling fixes toogle -> toggle

 - kzalloc failure catch in Mediatek driver

* tag 'mailbox-v4.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: mediatek: Add check for possible failure of kzalloc
  mailbox: bcm-flexrm-mailbox: fix spelling mistake "toogle" -> "toggle"
  mailbox: qcom: Add QCS404 APPS Global compatible
  drivers: mailbox: Make ti-msgmr driver depend on ARCH_K3
  mailbox: Convert to using %pOFn instead of device_node.name
 2018-10-29 10:30:44 -07:00
Houlong Wei 9f0a0a381c mailbox: mediatek: Add check for possible failure of kzalloc 
The patch 623a6143a845("mailbox: mediatek: Add Mediatek CMDQ driver")
introduce the following static checker warning:
  drivers/mailbox/mtk-cmdq-mailbox.c:366 cmdq_mbox_send_data()
  error: potential null dereference 'task'.  (kzalloc returns null)

Fixes: 623a6143a8 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Houlong Wei <houlong.wei@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-09-29 12:42:39 +05:30
Colin Ian King 462f668e5c mailbox: bcm-flexrm-mailbox: fix spelling mistake "toogle" -> "toggle" 
Trivial fix to spelling mistake in function name flexrm_flip_header_toogle,
rename it to flexrm_flip_header_toggle.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-09-29 12:42:39 +05:30
Bjorn Andersson 0a01fa940e mailbox: qcom: Add QCS404 APPS Global compatible 
Add support for the QCS404 APPS Global block with IPC register at offset
8.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-09-29 12:42:39 +05:30
Nishanth Menon cfc0f7a8ea drivers: mailbox: Make ti-msgmr driver depend on ARCH_K3 
ti-msgmr driver can support K3 platforms as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
 2018-09-29 12:42:39 +05:30