Impact: change calling convention of existing clock_event APIs
struct clock_event_timer's cpumask field gets changed to take pointer,
as does the ->broadcast function.
Another single-patch change. For safety, we BUG_ON() in
clockevents_register_device() if it's not set.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@elte.hu>
Impact: cleanup
Each SMP arch defines these themselves. Move them to a central
location.
Twists:
1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
Those archs simply have phys_cpu_present_map replaced everywhere.
3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
so I just manipulate them both in sync.
4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
declarations.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Tested-by: Tony Luck <tony.luck@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Mike Travis <travis@sgi.com>
Cc: ink@jurassic.park.msu.ru
Cc: rmk@arm.linux.org.uk
Cc: starvik@axis.com
Cc: tony.luck@intel.com
Cc: takata@linux-m32r.org
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: paulus@samba.org
Cc: schwidefsky@de.ibm.com
Cc: lethal@linux-sh.org
Cc: wli@holomorphy.com
Cc: davem@davemloft.net
Cc: jdike@addtoit.com
Cc: mingo@redhat.com
Mathieu Desnoyers reported this build failure on powerpc:
kernel/sched.c: In function 'sd_init_NODE':
kernel/sched.c:7319: error: non-static initialization of a flexible array member
kernel/sched.c:7319: error: (near initialization for '(anonymous)')
this happens because .span changed to cpumask_var_t, hence
the static CPU_MASK_NONE initializers in the SD_*_INIT
templates are not type-correct anymore.
Remove them, as they default to empty anyway.
Also remove them from IA64, MIPS and SH.
Reported-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Under qemu there is a race between the TDxE read-and-clear and the SCxTDR
write. While on hardware it can be gauranteed that the read-and-clear
will happen prior to the character being written out, no such assumption
can be made under emulation. As this path happens with IRQs off and the
hardware itself doesn't care about the ordering, move the SCxTDR write
until after the read-and-clear.
Signed-off-by: Vladimir Prus <vladimir@codesourcery.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The __copy_user function can corrupt the stack in the case of a
non-trivial length of data, and either of the first two move instructions
cause an exception. This is because the fixup for these two instructions
is mapped to the no_pop case, but these instructions execute after the
stack is pushed.
This change creates an explicit NO_POP exception mapping macro, and uses
it for the two instructions executed in the trivial case where no stack
pushes occur.
More information at ST Linux bugzilla:
https://bugzilla.stlinux.com/show_bug.cgi?id=4824
Signed-off-by: Dylan Reid <dylan_reid@bose.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch fixes the TMU0 interrupt frequency on suspend/resume.
During the resume the kernel reprograms the TMU0.ClockEvent mode
but if the mode is periodic than the TMU0.TCOR is updated with
a random wrong value without taking care latest valid saved value.
There was no problem with No_HZ system where TMU0.TCOR isn't used.
Signed-off-by: Francesco M. Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the PMB enabled, only P1SEG and up are covered by the PMB mappings,
meaning that situations where out-of-bounds physical addresses are read
from will lead to TLB reset after the PMB miss, allowing for use cases
like dd if=/dev/mem to reset the TLB.
Fix this up to make sure the reference is between __MEMORY_START (phys)
and __pa(high_memory). This is coherent across all variants of sh/sh64
with and without MMU, though the PMB bug itself is only applicable to
SH-4A parts.
Reported-by: Hideo Saito <saito@densan.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch changes sci type of SH7723 from PORT_SCI to PORT_SCIFA.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was a race in the kmap_coherent() implementation. While we
guarded against preemption, there was nothing preventing eviction of
the pre-faulted fixmap entry from the UTLB. Under certain workloads
this would result in the fixmap entries used for cache colouring being
evicted from the UTLB in the midst of a copy_page().
In addition to pre-faulting, we also make sure to preserve the PTEs
in the kernel page table and introduce a cached PTE for kmap_coherent()
usage. This follows a similar change on MIPS ("[MIPS] Fix aliasing bug
in copy_to_user_page / copy_from_user_page").
Reported-by: Hideo Saito <saito@densan.co.jp>
Reported-by: CHIKAMA Masaki <masaki.chikama@gmail.com>
Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch add usb setting for sh 7366
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-5 doesn't support any elaborate ISA inheritance schemes (-dsp, -up,
etc.), so only bother with that if we are building an sh32 kernel.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This code has been dead for many years. The last update it received
was in 2003 in order to update it for the driver model changes, though
it had already been in disarray and unused before that point. The only
boards that ever used this chip have not had users in many years either,
so it is finally safe to just kill it off and move on with life.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The ISA tuning as it is today can not cope with all of the different
variations that are possible, so all we can do is a best attempt based on
the CPU family. The DSP and FPU generation are already at odds with each
other, and the nommu tuning we weren't handling at all. Additionally,
for platforms that never had an FPU, the -nofpu variant never existed,
meaning that we would lose out on family granular tuning completely in
certain cases.
With tat out of the way, we were also using -up versions, allowing for
later instructions that branched off of a particular subset of the ISA,
but are not actually reflected on the hardware being targetted. This
leads to some confusion, and the possibility of bogus instructions on
older parts. Kill that off and lock it down to the family being built
for specifically.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently there is very little standing in the way of using an SH-4
toolchain for building an SH-2 kernel, and vice versa. Binutils itself
has no limitations whatsoever and supports explicit ISA hinting, which
we already use with varying degrees of success today.
This leaves GCC as the odd one out, due to a rather dubious policy
decision by the GCC folks to not include all of the CPU family variants
in the default list of multilib targets in GCC4. Despite best efforts to
the contrary, libgcc itself already contains awareness of the various CPU
types and remains generally usable, allowing it to safely be referenced
even on a mismatched target (and indeed, explicit ISA tuning by binutils
keeps us honest in terms of ensuring that we do not link incompatible
objects in).
In order to support this, a couple of changes had to be made. Firstly,
the introduction of MAYBE_DECLARE_EXPORT(), which provides a __weak
extern reference for libgcc resident routines when finer-grained
-m<cpu-family> based tuning is not supported by the toolchain. This
fixes up the __sdivsi3_i4i and __udivsi3_i4i references when dealing
with SH-2 kernels linked with an SH-4 libgcc. Secondly, in case where we
are unable to find a suitable match for CPU family tuning but still
have a toolchain that defaults to FP instruction generation, a suitable
nofpu target must be selected. This is accomplished by selecting the
first nofpu multilib target supported by the toolchain, which is
also necessary for selecting the proper libgcc to link against.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rather than varying this on a subtype level, we use the counter type as a
generic identifier. This simplifies logic in the userspace tools where no
fundamental difference exists across the various subtypes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch implements pinmux tables for the sh7785 processor.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch improves the support for gpio pins that are hard wired
to either input or output and lack control register association.
A special force enum id is used to allow use without control
register but still mark the gpio pin as input or output.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use a slower VIO_CKO clock frequency for the ov772x on Migo-R.
This improves the camera picture quality on Panel Board V2.1.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch updates the pinmux code to use the boolean value for
the function gpio_set_value(). Without this patch values other
than 0 and 1 will result in incorrect GPIO settings.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the ov772x byte sequence to enable byte swap. This to reflect
the recent CEU driver change to follow incoming byte order.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Commit 3f5a54e371 ("ftrace: dump out ftrace
buffers to console on panic") added an ftrace buffer dumper that hooks
in to the die notifier chain and dumps out data in the oops path.
Unfortunately SH supported ftrace but didn't support DIE_OOPS, so add
that in and get it building again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use the generic remove_memory() provided by mm/memory_hotplug.c instead.
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The sh7203.h include paths were missed in the previous update, so switch
the include path to cpu/ as with the rest.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (112 commits)
sh: Move SH-4 CPU headers down one more level.
sh: Only build in gpio.o when CONFIG_GENERIC_GPIO is selected.
sh: Migrate common board headers to mach-common/.
sh: Move the CPU definition headers from asm/ to cpu/.
serial: sh-sci: Add support SCIF of SH7723
video: add sh_mobile_lcdc platform flags
video: remove unused sh_mobile_lcdc platform data
sh: remove consistent alloc cruft
sh: add dynamic crash base address support
sh: reduce Migo-R smc91x overruns
sh: Fix up some merge damage.
Fix debugfs_create_file's error checking method for arch/sh/mm/
Fix debugfs_create_dir's error checking method for arch/sh/kernel/
sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board
sh: Use sh7720 GPIO on magicpanelr2 board
sh: Add sh7720 pinmux code
sh: Use sh7203 GPIO on rsk7203 board
sh: Add sh7203 pinmux code
sh: Use sh7723 GPIO on AP325RXA board
sh: Add sh7723 pinmux code
...
o elfcorehdr_addr is used by not only the code under CONFIG_PROC_VMCORE
but also by the code which is not inside CONFIG_PROC_VMCORE. For
example, is_kdump_kernel() is used by powerpc code to determine if
kernel is booting after a panic then use previous kernel's TCE table.
So even if CONFIG_PROC_VMCORE is not set in second kernel, one should be
able to correctly determine that we are booting after a panic and setup
calgary iommu accordingly.
o So remove the assumption that elfcorehdr_addr is under
CONFIG_PROC_VMCORE.
o Move definition of elfcorehdr_addr to arch dependent crash files.
(Unfortunately crash dump does not have an arch independent file
otherwise that would have been the best place).
o kexec.c is not the right place as one can Have CRASH_DUMP enabled in
second kernel without KEXEC being enabled.
o I don't see sh setup code parsing the command line for
elfcorehdr_addr. I am wondering how does vmcore interface work on sh.
Anyway, I am atleast defining elfcoredhr_addr so that compilation is not
broken on sh.
Signed-off-by: Vivek Goyal <vgoyal@redhat.com>
Acked-by: "Eric W. Biederman" <ebiederm@xmission.com>
Acked-by: Simon Horman <horms@verge.net.au>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Rusty Russell