Commit Graph

168 Commits

Author SHA1 Message Date
Ben Skeggs 7356859a29 drm/nouveau/gpio: split g92 class from nv50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11 16:09:14 +10:00
Alexandre Courbot a4d4bbf130 drm/nouveau/graph: add GK20A support
Add a GR device for GK20A based on NVE4, with the correct classes
definitions (GK20A's 3D class is 0xa297).

Most of the NVE4 code can be used on GK20A, so make relevant bits of
NVE4 available to other chips as well.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10 16:05:50 +10:00
Alexandre Courbot 86ebef722d drm/nouveau/fifo: add GK20A support
GK20A's FIFO is compatible with NVE0, but only features 128 channels and
1 runlist.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10 16:05:49 +10:00
Alexandre Courbot fef94f6272 drm/nouveau/fb: add GK20A support
Add a simple FB device for GK20A, as well as a RAM implementation
suitable for chips that use system memory as video RAM.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10 16:05:49 +10:00
Alexandre Courbot 90a5500c2b drm/nouveau/ibus: add GK20A support
Add support for initializing the priv ring of GK20A. This is done by the
BIOS on desktop GPUs, but needs to be done by hand on Tegra.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10 16:05:49 +10:00
Ben Skeggs 6f1e9b99b3 drm/gm107/gr: initial support
Our ucode only partially works at this point, so requiring binary fw
image for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:08:15 +10:00
Ben Skeggs bd3cac7bb0 drm/nouveau/bios: parsing of some random table needed to bring up gr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:08:14 +10:00
Ben Skeggs eeb0558e07 drm/gf104/gr: rename gf104 (nvc4), it came before gf106 (nvc3)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:08:06 +10:00
Ben Skeggs 3f204647cd drm/gm100/device: recognise GM107
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:01:00 +10:00
Ben Skeggs c68c29c04c drm/gm107/disp: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:00:59 +10:00
Ben Skeggs f6bad8abc6 drm/gm107/ltcg: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:00:58 +10:00
Ben Skeggs 267dcb6643 drm/gm107/fb: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:00:57 +10:00
Ben Skeggs 57f7422016 drm/gk20a/timer: initial implementation
A bit different from NVIDIA's RFC patch, but I want this now for GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:00:56 +10:00
Ben Skeggs 4bf23ead3a drm/gm107/devinit: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-03-26 14:00:55 +10:00
Ilia Mirkin fa8c9ac72f drm/nv4c/mc: nv4x igp's have a different msi rearm register
See https://bugs.freedesktop.org/show_bug.cgi?id=74492

Reported-by: Ronald <ronald645@gmail.com>
Suggested-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-02-18 10:36:45 +10:00
Ilia Mirkin 4019aaa2b3 drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23 13:39:13 +10:00
Ben Skeggs 0a0dc8f564 drm/nouveau/bios: make common code to handle ramcfg strap etc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23 13:38:48 +10:00
Ben Skeggs 96616b4caf drm/nv108/gr: initial support (need external fuc)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23 13:38:36 +10:00
Ben Skeggs a763951a86 drm/nv108/fifo: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23 13:38:35 +10:00
Roy Spliet a7e4201f0f drm/nouveau/clk: Add support for NVAA/NVAC
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-12-03 23:28:56 +10:00
Ben Skeggs aae95ca708 drm/nouveau/fb: implement various bits of work towards memory reclocking
Not even remotely ready for the vast majority of the world.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:19 +10:00
Ben Skeggs 26fdd78cce drm/nouveau: implement a simple sysfs interface to new pm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:18 +10:00
Ben Skeggs 9838366c15 drm/nouveau/device: initial control object class, with pstate control methods
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:18 +10:00
Ben Skeggs 7c85652206 drm/nouveau/clk: implement power state and engine clock control in core
User control of this has been hard-coded as disabled for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:17 +10:00
Ben Skeggs c9c0ccae48 drm/nouveau/volt: implement voltage control in core
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:17 +10:00
Ben Skeggs 0833428e7d drm/nouveau/bios: parsing for various tables required for power management
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:16 +10:00
Ben Skeggs aa4d7a4d55 drm/nouveau/perfmon: initial infrastructure to expose performance counters
Internal use only at this point.  Userspace later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:05 +10:00
Ben Skeggs 2984506fb6 drm/nouveau/bus: add interfaces/helpers for sequencer
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:05 +10:00
Ben Skeggs ff4b42c753 drm/nouveau/pwr: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:04 +10:00
Ben Skeggs b9ed919f1c drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERM
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:40:00 +10:00
Ben Skeggs 75faef78c9 drm/nv50-nvaf/fb: split fbram oclass in preparation for reclocking
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:52 +10:00
Ben Skeggs 9ca3037e60 drm/nv50-nvaf/fb: split the class definitions up a bit
These will diverge further in the future.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:51 +10:00
Ben Skeggs 9a9d5c64ef drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirror
This is what NVIDIA do on these chipsets, let's hope it works around
the reported MSI failures for us on NV86.

v2: updated to include G92, as per information provided by NVIDIA.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:38 +10:00
Ben Skeggs 1b4fea0f6a drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearm
v2. updated to cover GF104, as per information provided by NVIDIA.

Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:39:38 +10:00
Ilia Mirkin 5fa7543041 drm/nv44/mpeg: create a copy of the nv31/nv40 impls
The nv31/nv40 impls are actually fairly nv44-specific, since they assume
the presence of the instance register/context switching. Create a copy
before nv31/nv40 get fixed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08 15:37:41 +10:00
Maarten Lankhorst 26410c6798 drm/nvd7/gr: initial support
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:43:16 +10:00
Ben Skeggs 30f4e0870d drm/nvc0-/gr: make register lists from initvals functions
Generated context verified to be the same for all supported chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:42:32 +10:00
Ilia Mirkin 44b1e3bd6a drm/nouveau/core: xtensa engine base class implementation
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:48 +10:00
Ilia Mirkin 0d4a1450c9 drm/nouveau/vdec: fork vp3 implementations from vp2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:48 +10:00
Ben Skeggs a0fd4ec8f1 drm/nouveau/core: move falcon class to engine/
Not really "core" per-se.  About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:47 +10:00
Ben Skeggs dceef5d87c drm/nouveau/fb: initialise vram controller as pfb sub-object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:04 +10:00
Ben Skeggs 88524bc069 drm/nouveau/devinit: move simple pll setting routines to devinit
These are pretty much useless for reclocking purposes.  Lets make it
clearer what they're for and move them to DEVINIT to signify they're
for the very simple PLL setting requirements of running the init
tables.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:54 +10:00
Ben Skeggs e5398b23a5 drm/nvf0/disp: expose display class 2.2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-05-02 16:23:13 +10:00
Ben Skeggs dded35dee3 drm/nouveau/device: convert to engine, rather than subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26 15:38:10 +10:00
Ben Skeggs 0fa9061ae8 drm/nouveau/mc: handle irq-related setup ourselves
We need to be able to process interrupts before the DRM code is able to
actually enable them, set it up ourselves.  Also, it's less convoluted
to *not* use the DRM wrappers it appears...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26 15:37:52 +10:00
Ben Skeggs 1a64634255 drm/nv04/disp: hide all the cruft away in its own little hole
It'd be pretty awesome if someone would care enough to port this all
properly to a class interface, perhaps submitting a command stream to
the core via a sw object on PFIFO (emulating how EVO works basically,
and also what nvidia have done forever..)..

But, this seems unlikely given how old this hardware is now, so, lets
just hide it away.

There's a heap of other bits and pieces laying around that are still
tangled.  I'll (re)move them in pieces.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26 15:37:51 +10:00
Martin Peres 2f4573679a drm/nouveau/therm: split the nv50 and nv84 code
This is needed because temperature management on nv50 can be enabled and it
looks about the same as nv40.

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26 15:37:35 +10:00
Marcin Slusarz 33b903e828 drm/nouveau: restore debugfs/vbios.rom support
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
2013-02-20 20:46:34 +10:00
Ben Hutchings a91ed42de2 nouveau: ACPI support depends on X86 and X86_PLATFORM_DEVICES
If I build nouveau on ia64, Kconfig warns:

warning: (DRM_NOUVEAU) selects ACPI_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI)
warning: (DRM_NOUVEAU) selects MXM_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI_WMI)

Make all the ACPI support depend on X86 and select
X86_PLATFORM_DEVICES.

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20 16:05:16 +10:00
Ben Skeggs 5effecd4f8 drm/nouveau/i2c: add support for ddc/aux, and dp link training on anx9805
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20 16:01:05 +10:00