Commit Graph

27 Commits

Author SHA1 Message Date
Andy Shevchenko 7e73aa90a3 gpio: merrifield: Better show how GPIO and IRQ bases are derived from hardware
It's a bit hard to realize what the BAR1 is for and what is the layout
of the data in it. Be slightly more verbose to better show how GPIO and
IRQ bases are derived from the hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 20:41:06 +03:00
Andy Shevchenko 6b1c7837af gpio: merrifield: Switch over to MSI interrupts
Some devices may support MSI interrupts. Let's at least try to use them
in platforms that provide MSI capability.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 20:41:06 +03:00
Andy Shevchenko 4a5e0f9e73 gpio: merrifield: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward conversion.

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2019-11-13 15:30:53 +02:00
Andy Shevchenko cd242b333b gpio: merrifield: Add GPIO <-> pin mapping ranges via callback
When IRQ chip is instantiated via GPIO library flow, the few functions,
in particular the ACPI event registration mechanism, on some of ACPI based
platforms expect that the pin ranges are initialized to that point.

Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-13 15:30:53 +02:00
Linus Walleij 6b240aeb12 Merge branch 'devel' into for-next 2019-11-08 14:10:38 +01:00
Matti Vaittinen e42615ec23 gpio: Use new GPIO_LINE_DIRECTION
It's hard for occasional GPIO code reader/writer to know if values 0/1
equal to IN or OUT. Use defined GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT to help them out.

NOTE - for gpio-amd-fch and gpio-bd9571mwv:
This commit also changes the return value for direction get to equal 1
for direction INPUT. Prior this commit these drivers might have
returned some other positive value but 1 for INPUT.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Acked-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-07 09:27:48 +01:00
Linus Walleij 1173c3c28a Revert "gpio: merrifield: Pass irqchip when adding gpiochip"
This reverts commit 8f86a5b4ad.

It has been established that this causes a boot regression on
both Baytrail and Cherrytrail SoCs, and we can't have that in
the final kernel release, so we need to revert it.

Reported-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-03 23:41:11 +01:00
Linus Walleij 52c75f5670 Revert "gpio: merrifield: Restore use of irq_base"
This reverts commit 6658f87f21.

This revert is a prerequisite for the later revert of commit
8f86a5b4ad.

Reported-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-03 23:40:48 +01:00
Linus Walleij 806766af39 Revert "gpio: merrifield: Move hardware initialization to callback"
This reverts commit 4c87540940.

This revert is a prerequisite for the later revert of commit
8f86a5b4ad.

Reported-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-03 23:38:39 +01:00
Andy Shevchenko 4c87540940 gpio: merrifield: Move hardware initialization to callback
The driver wants to initialize related registers before IRQ chip will be added.
That's why move it to a corresponding callback. It also fixes the NULL pointer
dereference.

Fixes: 8f86a5b4ad ("gpio: merrifield: Pass irqchip when adding gpiochip")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-15 01:19:01 +02:00
Andy Shevchenko 6658f87f21 gpio: merrifield: Restore use of irq_base
During conversion to internal IRQ chip initialization the commit
  8f86a5b4ad ("gpio: merrifield: Pass irqchip when adding gpiochip")
lost the irq_base assignment.

drivers/gpio/gpio-merrifield.c: In function ‘mrfld_gpio_probe’:
drivers/gpio/gpio-merrifield.c:405:17: warning: variable ‘irq_base’ set but not used [-Wunused-but-set-variable]

Assign the girq->first to it.

Fixes: 8f86a5b4ad ("gpio: merrifield: Pass irqchip when adding gpiochip")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-10-15 01:18:15 +02:00
Linus Walleij 8f86a5b4ad gpio: merrifield: Pass irqchip when adding gpiochip
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-08-12 20:39:27 +03:00
YueHaibing fe066621c7 gpio: merrifield: Fix build err without CONFIG_ACPI
When building CONFIG_ACPI is not set
gcc warn this:

drivers/gpio/gpio-merrifield.c: In function mrfld_gpio_get_pinctrl_dev_name:
drivers/gpio/gpio-merrifield.c:388:19: error: dereferencing pointer to incomplete type struct acpi_device
   put_device(&adev->dev);
                   ^~

Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: d00d2109c3 ("gpio: merrifield: Convert to use acpi_dev_get_first_match_dev()")
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-04-23 11:30:59 +02:00
Andy Shevchenko d00d2109c3 gpio: merrifield: Convert to use acpi_dev_get_first_match_dev()
acpi_dev_get_first_match_name() is deprecated and going to be removed
because it leaks a reference.

Convert the driver to use acpi_dev_get_first_match_dev() instead.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-04-01 11:00:16 +02:00
Andy Shevchenko 93374b76a9 gpio: merrifield: Convert to use SPDX identifier
Reduce size of duplicated comments by switching to use SPDX identifier.

No functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-12-07 17:34:08 +02:00
Andy Shevchenko 7629771f5e gpio: merrifield: Remove linux/init.h
There is no need to include linux/init.h when at the same time
we include linux/module.h.

Remove redundant inclusion.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-12-07 17:34:06 +02:00
Markus Elfring 4b7edaef79 gpio: merrifield: Delete an error message
Omit an extra message for a memory allocation failure in this function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-22 15:25:40 +01:00
Andy Shevchenko dd1dbf94d2 gpio: merrifield: Add support of ACPI enabled platforms
The driver needs the pin control device name for ACPI.

We are looking through ACPI namespace and return first found device
based on ACPI HID for Intel Merrifield FLIS (pin control device).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-01-10 00:43:42 +01:00
Thierry Reding f0fbe7bce7 gpio: Move irqdomain into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 14:06:21 +01:00
Andy Shevchenko ff8c474d15 gpio: merrifield: Remove unused header
I don't remember how linux/gpio.h made the source, now it seems unused.
Remove it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-16 11:13:11 +02:00
Andy Shevchenko 7477e137dc gpio: merrifield: Don't use GPIOF_DIR_IN / GPIOF_DIR_OUT
The mentioned flags are dedicated solely for consumer API.
Replace them by explicit values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
[Made a !bang clamp to (0,1) instead of infix ? operator]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-03-23 14:06:46 +01:00
Mika Westerberg 2956b5d94a pinctrl / gpio: Introduce .set_config() callback for GPIO chips
Currently we already have two pin configuration related callbacks
available for GPIO chips .set_single_ended() and .set_debounce(). In
future we expect to have even more, which does not scale well if we need
to add yet another callback to the GPIO chip structure for each possible
configuration parameter.

Better solution is to reuse what we already have available in the
generic pinconf.

To support this, we introduce a new .set_config() callback for GPIO
chips. The callback takes a single packed pin configuration value as
parameter. This can then be extended easily beyond what is currently
supported by just adding new types to the generic pinconf enum.

If the GPIO driver is backed up by a pinctrl driver the GPIO driver can
just assign gpiochip_generic_config() (introduced in this patch) to
.set_config and that will take care configuration requests are directed
to the pinctrl driver.

We then convert the existing drivers over .set_config() and finally
remove the .set_single_ended() and .set_debounce() callbacks.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-26 15:27:37 +01:00
Andy Shevchenko 46a5c112a4 gpio: merrifield: Implement gpio_get_direction callback
Implement gpio_get_direction() callback for Intel Merrifield GPIO.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-07 15:23:40 +01:00
Andy Shevchenko e7a718f9b1 gpio: merrifield: Add support for hardware debouncer
By default all pins are configured to use a glitch filter. Writing 1 to the
certain bit of the specific register might be useful in case someone needs to
bypass the glitch filter completely for a given GPIO pin.

This patch adds support for that in the Intel Merrifield GPIO driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-07 15:23:39 +01:00
Andy Shevchenko e78ade0a2f gpio: merrifield: set default handler to be handle_bad_irq()
We switch the default handler to be handle_bad_irq() instead of
handle_simple_irq() (which was not correct anyway).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-10-24 16:33:11 +02:00
Andy Shevchenko fcce9f14f0 gpio: merrifield: Protect irq_ack() and gpio_set() by lock
There is a potential race when two threads do the writes to the same register
in parallel.

Prevent out of order in such case by protecting I/O access by spin lock.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-22 15:30:42 +02:00
Andy Shevchenko ccf6fd6dcc gpio: merrifield: Introduce GPIO driver to support Merrifield
Intel Merrifield platform has a special GPIO controller to
drive pads when they are muxed in corresponding mode.

Intel Merrifield GPIO IP is slightly different here and there
in comparison to the older Intel MID platforms. These differences
include in particular the shaked register offsets, specific
support of level triggered interrupts and wake capable sources,
as well as a pinctrl which is a separate IP.

Instead of uglifying existing driver I decide to provide a new
one slightly based on gpio-intel-mid.c. So, anyone can easily
compare what changes are happened to be here.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Brian J Wood <brian.j.wood@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-22 15:30:41 +02:00