omap5-uevm has a single HDMI output. Add the necessary display
information, including pinmuxing.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
omap5-uevm has a tca6424a I/O expander. Add it to the .dts file.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for am437x-gp-evm's LCD panel.
Signed-off-by: Sathya Prakash M R <sathyap@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for the display subsystem for AM4372. The DSS on AM4372 is
basically OMAP3's DSS, without DSI and VENC blocks.
Signed-off-by: Sathya Prakash M R <sathyap@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
SoC-near driver changes that we're merging through our tree. Mostly
because they depend on other changes we have staged, but in some cases
because the driver maintainers preferred that we did it this way.
This contains a largeish cleanup series of the omap_l3_noc bus driver,
cpuidle rework for Exynos, some reset driver conversions and a long
branch of TI EDMA fixes and cleanups, with more to come next release.
The TI EDMA cleanups is a shared branch with the dmaengine tree, with
a handful of Davinci-specific fixes on top.
After discussion at last year's KS (and some more on the mailing lists),
we are here adding a drivers/soc directory. The purpose of this is
to keep per-vendor shared code that's needed by different drivers but
that doesn't fit into the MFD (nor drivers/platform) model. We expect
to keep merging contents for this hierarchy through arm-soc so we can
keep an eye on what the vendors keep adding here and not making it a
free-for-all to shove in crazy stuff.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjOFiAAoJEIwa5zzehBx30RYP/0UE+R8ccdsodunmIDrmQ7QP
qFWe1YTWlyXtGBDaPCNfdcU09UYatPKuCv5dJ2ToQCyyFI26PIIhFtnCNXmMuYz+
XPCuqAlJ9hZWx7+j2hXRlyhoZMAaJ5EVVxaK5tnVYXDIfy1Y3xG7i069HD/qGrQp
xrV+XofFmpU2VAds6S+SpecFFfYD7n/pJ1bTSgzPfaUsEUyV882dJ3skgs1VpTzQ
PnL/0Z2t4ePoP3+6p+F7EnJxemLF5IXrlL0c7hODxQKuMqlzoUluywh6SwOHfCQL
u2cc5SFUbbKhExwlGOVibdQMiC0HUOXyRvyYFOIdbv+xNH+Zc/tcoQQ22PWm4Yy1
08qOm3Fr6yw5nH5IT+1wCIFCzJEC/ZHM5B2t+RISFybAMk6Bg1TDYJLmd570zkEL
aTLtS5hdmy4h8Ad5FBtwKNyL//6FJJxhbHUu/m0qaE0phq94+78B2M6vbx6757xC
kCFlpJsHoN0Tn5c9Q1hpTqI/BHxb4UR7Nf+b8Ox8Veuc9JrS35lzi/rWnGxB5WB0
+1KCA8eih9KXTtksxAte1TmSbMciqW559RUR7dNAPXAMPksY2mJV1I+rg0cRsY3i
F90Lnc6LWUM5PYpc4VwiC0sUCLKzTFnpZUELqMOiws3PUblbb0StXuoNo6owbtsK
mp1Juxi1n7VhoN9AFVpL
=SC+e
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC driver changes from Olof Johansson:
"SoC-near driver changes that we're merging through our tree. Mostly
because they depend on other changes we have staged, but in some cases
because the driver maintainers preferred that we did it this way.
This contains a largeish cleanup series of the omap_l3_noc bus driver,
cpuidle rework for Exynos, some reset driver conversions and a long
branch of TI EDMA fixes and cleanups, with more to come next release.
The TI EDMA cleanups is a shared branch with the dmaengine tree, with
a handful of Davinci-specific fixes on top.
After discussion at last year's KS (and some more on the mailing
lists), we are here adding a drivers/soc directory. The purpose of
this is to keep per-vendor shared code that's needed by different
drivers but that doesn't fit into the MFD (nor drivers/platform)
model. We expect to keep merging contents for this hierarchy through
arm-soc so we can keep an eye on what the vendors keep adding here and
not making it a free-for-all to shove in crazy stuff"
* tag 'drivers-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (101 commits)
cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
tty: serial: msm: Remove direct access to GSBI
power: reset: keystone-reset: introduce keystone reset driver
Documentation: dt: add bindings for keystone pll control controller
Documentation: dt: add bindings for keystone reset driver
soc: qcom: fix of_device_id table
ARM: EXYNOS: Fix kernel panic when unplugging CPU1 on exynos
ARM: EXYNOS: Move the driver to drivers/cpuidle directory
ARM: EXYNOS: Cleanup all unneeded headers from cpuidle.c
ARM: EXYNOS: Pass the AFTR callback to the platform_data
ARM: EXYNOS: Move S5P_CHECK_SLEEP into pm.c
ARM: EXYNOS: Move the power sequence call in the cpu_pm notifier
ARM: EXYNOS: Move the AFTR state function into pm.c
ARM: EXYNOS: Encapsulate the AFTR code into a function
ARM: EXYNOS: Disable cpuidle for exynos5440
ARM: EXYNOS: Encapsulate boot vector code into a function for cpuidle
ARM: EXYNOS: Pass wakeup mask parameter to function for cpuidle
ARM: EXYNOS: Remove ifdef for scu_enable in pm
ARM: EXYNOS: Move scu_enable in the cpu_pm notifier
ARM: EXYNOS: Use the cpu_pm notifier for pm
...
As with previous release, this continues to be among the largest branches
we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy
cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5
/jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die
IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5
rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi
ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo
b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF
3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB
y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF
z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL
dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW
PUPlrVfYXzIKsh+OU1HO
=OvOG
-----END PGP SIGNATURE-----
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson:
"As with previous release, this continues to be among the largest
branches we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q"
* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
ARM: dts: add secure firmware support for exynos5420-arndale-octa
ARM: dts: add pmu sysreg node to exynos3250
ARM: dts: correct the usb phy node in exynos5800-peach-pi
ARM: dts: correct the usb phy node in exynos5420-peach-pit
ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
ARM: dts: add dts files for exynos3250 SoC
ARM: dts: add mfc node for exynos5800
ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
ARM: dts: enable fimd for exynos5800-peach-pi
ARM: dts: enable display controller for exynos5800-peach-pi
ARM: dts: enable hdmi for exynos5800-peach-pi
ARM: dts: add dts file for exynos5800-peach-pi board
ARM: dts: add dts file for exynos5800 SoC
ARM: dts: add dts file for exynos5260-xyref5260 board
ARM: dts: add dts files for exynos5260 SoC
ARM: dts: update watchdog node name in exynos5440
ARM: dts: use key code macros on Origen and Arndale boards
ARM: dts: enable RTC and WDT nodes on Origen boards
ARM: dts: qcom: Add APQ8084-MTP board support
ARM: dts: qcom: Add APQ8084 SoC support
...
A number of defconfig updates for 3.16. We have quite a few of these as
new SoCs and drivers get supported, and we've started collecting them
in one shared branch.
We started halfway through the merge window so there'll be some small
conflicts with other branches on nearby changes, but nothing major. Next
cycle should be smoother.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjM8WAAoJEIwa5zzehBx3PxcP/jgE0hEWStmISk6DUtz65DVF
MY6PChEK6q1UHz+1lyvM6+4cA5z4BbkolhPLgPsiamv8HaOHXm6xHukBFBsQbY7j
gk5Ri95dikQTrHyQGGTTL1JH4JsvfCmKsSke7ZKu9Ux1CAH4DGzfT0HynTIruJBu
qK+xx3YvdpOL21tuL9tnaF80S5NLQB9NiwjyWtCtTOeOJsWKprW2a6MESaU4cJR+
IFGVrwraGkKIpvycjEaZxAMFwcenRbGXjO9cJJ6Vhmr8elxGMT3V7AqWfQwy/GV2
WkpE5PfoEjv9AGA3M6MFGy3RvQXVmoov+phK1soQnNoPhTaFPRoIvXfL8rcsBa6s
9ZJq0D1uLTRKb5Pl30FSBTXyKxlDt4P5/It5ZFs3WhG80QeE6SyEuoeK3IQMQMe0
U3831UUznLr4NyEXgVvrF43265K57lFUxL13xMcRdNLIXeeUY/eHU7MZBm5Qqljh
Rp1qLMBeEC6DZA45WJIoq0nDyQpK8ErBebDd4KJfQUtaKB1JoS9FkRi5n+xiTrv3
v4pCf33GR2dCYll/dLQlolma3YoyJP8EluxLRoXO6QxzCqHZ/0ky/YRHkQubviwz
I5mlHOYbhnFRVvz5prCnEqXBSz8DIvcMZSvZ447VRF6nJJ/EvF69Ipd3UK6PeHan
gOIl3osEb7+qZTWlbLgi
=3ZVY
-----END PGP SIGNATURE-----
Merge tag 'defconfig-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC defconfig updates from Olof Johansson:
"A number of defconfig updates for 3.16. We have quite a few of these
as new SoCs and drivers get supported, and we've started collecting
them in one shared branch.
We started halfway through the merge window so there'll be some small
conflicts with other branches on nearby changes, but nothing major.
Next cycle should be smoother"
* tag 'defconfig-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: multi_v7_defconfig: Enable Exynos platform
ARM: configs: update Allwinner options
ARM: qcom: Enable GSBI driver in defconfig
ARM: multi_v7_defconfig: Enable Zynq peripheral drivers
ARM: at91/defconfig: sama5_defconfig: updated
ARM: add drivers for Colibri T30 to multi_v7_defconfig
ARM: configs: add CONFIG_MMC_SDHCI_PXAV3 to the multi_v7_defconfig
ARM: configs: enable XHCI mvebu support in multi_v7_defconfig
ARM: multi_v7: Add Allwinner reset drivers to multi_v7_defconfig
ARM: sunxi: Add A31 reset driver to sunxi_defconfig
ARM: config: Update msm_defconfig
ARM: mvebu: enable MSI support in mvebu_v7_defconfig
ARM: config: Add qcom_defconfig
ARM: configs: enable XHCI mvebu support in mvebu_v7_defconfig
The bulk of this branch is updates for Renesas Shmobile. They are still
doing some enablement for classic boards first, and then come up with DT
bindings when they've had a chance to learn more about the hardware. Not
necessarily a bad way to go about it, and they're looking at moving some
of the temporary board code resulting from it to drivers/staging instead
to avoid the churn here.
As a result of the shmobile clock cleanups, we end up merging quite a
bit of SH code here as well. We ended up merging it here instead of in
the cleanup branch due to the other board changes depending on it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjNClAAoJEIwa5zzehBx3Q7wP+wYzWTAU0+3BnnjJpQM79hsX
1hP89RaM6DEyTf6PiL/AKOHsnDponUhNzZu1W5FvNG6cFVenh/nxbmO65FKX9CrY
Ap2pkQW+/IcpmIKZ+Hln2bkCc54a6yPouK+5pd9W14X5TtqNmLbdh1qhoq9UjFTo
zgLfhch5tyNqfpNOj0vFsmvTw0ZGJ0Neq6olRqQbXmyAaRaWzDa64lmEKVupMdk7
2Fh/8jeXlVlryi7p7CvNoAmZEMm7+We5ZMVsQXLk8b9zcwuCWK0DZzNW4DnRCB1d
lsNM/Sygi3Y5zRj2XogNANVhNDIih0f50FX7uuKtmevWNJE9n4To7uFUMTk/3zBt
1hvJLL8w4WHhzkg5v5nFsiCTx65pFaTD/LocPj8lhQ1AYzUvWN5sKPxW0uC1lvJ9
Unlwdc0C4EWs3yq6hAPUZS2eB7owmzNUWdjdkgKfdc74u5RnRay0pUmbRMJm2l20
OKoDSwaluQZUeHrxPnTSLdgpkBbPRn9M5DbswEQsuPyI6yROgCRxaRQ4XcpM93dV
4obCF+fOvX6dtsdIUBCtdhvmJ/iHqhQlPLc2avpt2gyti7eWjQkt5it12hjjOF6A
DVBdNHv215EEgvB0MbPJvFVKBLw4boxdeBx+FqMQCqvAbqefHo4gcQZcsUGAv/pX
zJ8jgkYhlt7XTd+6GlJu
=lWof
-----END PGP SIGNATURE-----
Merge tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC board support updates from Olof Johansson:
"The bulk of this branch is updates for Renesas Shmobile. They are
still doing some enablement for classic boards first, and then come up
with DT bindings when they've had a chance to learn more about the
hardware. Not necessarily a bad way to go about it, and they're
looking at moving some of the temporary board code resulting from it
to drivers/staging instead to avoid the churn here.
As a result of the shmobile clock cleanups, we end up merging quite a
bit of SH code here as well. We ended up merging it here instead of
in the cleanup branch due to the other board changes depending on it"
* tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (130 commits)
ARM: davinci: remove checks for CONFIG_USB_MUSB_PERIPHERAL
ARM: add drivers for Colibri T30 to multi_v7_defconfig
ARM: shmobile: Remove Genmai reference DTS
ARM: shmobile: Let Genmai multiplatform boot with Genmai DTB
ARM: shmobile: Sync Genmai DTS with Genmai reference DTS
ARM: shmobile: genmai-reference: Remove legacy clock support
ARM: shmobile: Remove non-multiplatform Genmai reference support
ARM: configs: enable XHCI mvebu support in multi_v7_defconfig
ARM: OMAP: replace checks for CONFIG_USB_GADGET_OMAP
ARM: OMAP: AM3517EVM: remove check for CONFIG_PANEL_SHARP_LQ043T1DG01
ARM: OMAP: SX1: remove check for CONFIG_SX1_OLD_FLASH
ARM: OMAP: remove some dead code
ARM: OMAP: omap3stalker: remove two Kconfig macros
ARM: tegra: tegra_defconfig updates
ARM: shmobile: r7s72100: use workaround for non DT-clocks
ARM: shmobile: Add forward declaration of struct clk to silence warning
ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support
ARM: shmobile: r7s72100: add spi clocks to dtsi
ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support
ARM: shmobile: r7s72100: add i2c clocks to dtsi
...
A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support for
big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation and
moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as most
of the other v7 platforms in the tree. \o/ The work isn't quite complete,
there's some driver fixes still needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
Plus a large set of various smaller updates for different platforms. I'm
probably missing some important one here.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjOKWAAoJEIwa5zzehBx36aEP/2vTD7x9FC59FACNHJ8iO7aw
0ebTgBBjI1Np6X18O+M7URbxV5TaBgwpUm/NDN86p03MpQ2eOXr8r47qVxe/HhZs
AdlTvzgE6QwxcVL/HeCKKUEN3BPH74+TZgFl9I5aSzNjpR39xETeK1aWP/ZiAl/q
/lGRZAQ59+c7Ung00Hg0g2YDxH9WFpK50Nj90ROnyjKSFkhIYngXYVpZB3maOypq
Pgib/U8IraKZ52oGJw3yinSoORr7FdcUdAGWGTz/lQdNL/jYDfQ6GkRW2oblWXdt
3Xvj9UW6NmkbMICucMvFuuW1nXAgutZuTp9w7mBxsiUlYepxPv/DXM6yiI1WGlEb
BeVOmOreNeN2nT6avv/uUhk3Osq63Jn9x8cz5y+7/lgWQwllh3/c+G01RotvgJEQ
vpQq5ps9fMxIAMaNP6N/YqMJI1IOrBj0iXxaZEDw3VYM/k4lSvtb3VXP9c/rqApu
U4i6hpSIGzrraU4NrjndYPndcLeNOVZbByETQKosZXuCo6G1sb7FstNSkzI9vSo8
O/pujIVUfYyBW82GzZGDw+aa7DWA29FPeUQ3p+sj5MSCg051xXT8h6QwqMo2K/zY
5ATs/qo6w7zH/Ou9rtHTRynCIb0GQJThDSlWtuXFedUF9quEltS+TDz/2o+dWtGJ
yBFGKDRuBB20D36w9xqg
=6LYI
-----END PGP SIGNATURE-----
Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull part one of ARM SoC updates from Olof Johansson:
"A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support
for big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation
and moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as
most of the other v7 platforms in the tree. \o/
The work isn't quite complete, there's some driver fixes still
needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
plus a large set of various smaller updates for different platforms.
I'm probably missing some important one here"
* tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits)
ARM: exynos: don't run exynos4 l2x0 setup on other platforms
ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug
ARM: EXYNOS: mcpm rename the power_down_finish
ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC
ARM: EXYNOS: Enable multi-platform build support
ARM: EXYNOS: Consolidate Kconfig entries
ARM: EXYNOS: Add support for EXYNOS5410 SoC
ARM: EXYNOS: Support secondary CPU boot of Exynos3250
ARM: EXYNOS: Add Exynos3250 SoC ID
ARM: EXYNOS: Add 5800 SoC support
ARM: EXYNOS: initial board support for exynos5260 SoC
clk: exynos5410: register clocks using common clock framework
ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
ARM: sunxi: allow building without reset controller
Documentation: devicetree: arm: sort enable-method entries
ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks
ARM: dts: axxia: Add reset controller
power: reset: Add Axxia system reset driver
ARM: axxia: Adding defconfig for AXM55xx
...
Cleanups for 3.16. Among these are:
- A bunch of misc cleanups for Broadcom platforms, mostly housekeeping
- Enabling Common Clock Framework on the older s3c24xx Samsung chipsets
- Cleanup of the Versatile Express system controller code, moving it to syscon
- Power management cleanups for OMAP platforms
+ a handful of other cleanups across the place
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjMwHAAoJEIwa5zzehBx3MjMP/iELgDsqbNE2wxF9Fb5EEnoe
S11q1QIvVrMVdMcKFN5HfW7f+xNso6+4SwXW0cRrJokGvaqRE758WZWuZq0QBUeS
RYMhfpqmI6pTTJUyy6i6OyXhuRqu8rQ1NPEAatYrKzmtwFX1H4t25f1YtZWhBcK8
ONi45FHeH1OKGGpjpT63uhWEzLk+LZI2MtgxmWoFcemf7guX6vEPJVuVRi8eqLoS
9vl1cAkweYgGhjvQFcSXENaguV50dZlLc9C41dJk9KVvJfRt7o+/cRbG5YpGvnp5
Liu+OWM72w0BkgNk6wDN4kaPX5UGLF8QX11JlvDRCJ2FcPtM4NBG/C9TqLMfkKDR
Ze+ITiXh6NjefdTZWJaM4vzsd6vFws8EYAP24IWFlZ451bNLVN1lzlgqluPNoKmj
CAsFPZhY/x5X9a8VLZ72ohx3N17T/iMsOlbiWtnlfqDcL6N0IoLG1YkFFeQIKEAH
mpobWus8Myq1miWqSaeXh5wOqUVQmYR0I8jNoTfte1nBYSaIGhtMixoQhM6Zw50C
dgSh4p7qhrZUOnYmkPqFXr7NCJ9n3RD10Xu8d/3IIp0u9RJ5Kx6NCEg9adq22jZQ
XGrr/vH0sM8MzpKmfTMi5t2Cx5kP2G+O3enq0hQi4x3Cb4o8vwWQlMgydTd+xBjj
aLo3WTTw0h6nTuKkZL2p
=wuX4
-----END PGP SIGNATURE-----
Merge tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC cleanups from Olof Johansson:
"Cleanups for 3.16. Among these are:
- a bunch of misc cleanups for Broadcom platforms, mostly
housekeeping
- enabling Common Clock Framework on the older s3c24xx Samsung
chipsets
- cleanup of the Versatile Express system controller code, moving it
to syscon
- power management cleanups for OMAP platforms
plus a handful of other cleanups across the place"
* tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORM
clk: samsung: fix build error
ARM: vexpress: refine dependencies for new code
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
...
A small selection of fixes coming in late during the release cycle and
not being critical enough for 3.15 inclusion.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjN31AAoJEIwa5zzehBx3dQoQAKv1UdMTgwf4/O7YmQzc2CMR
guguyAec/FKDl1977Riy4DbLot9QZsA1mxzTjBHYmI9LbTRE/cOkkOip9UUkyRFA
B0qlIGgcWv7t4vRHCg0shxNDuBxxjVMrShqPNQuiH0idNpyUVjC5cPlwn5gjTSAr
3p0HDJYwKT3fq9iWYoAIC1I1TdlLxIvKRGjqbWCLxExxRyCs6gblN0Ge1hSMUF8B
0wujPL3c6HHtfGrhFRQSeYXXHj2brIdjr79YyR3w47bNyaY3EVaEOLlrEqEvus9D
QFfQqkUCGWBN+MEPhLlO8lxMtqxqkRk3LTsLwsdy92kO/xeCfJBnpWYjjEVUyrzS
tOjyVy0r8BKxjLs3Bj+/kNnIRZRPTlSRgGf7j2hO3IQOs9vuujO0MssCZw3c7Lv6
RPFA8+cG1svDNEsipmUcPtPuFugkCv27SUZ+i8SbTPOt9+SzDBkYqLeJro7nCKQm
gFaFXuEoHLR3kPICGRZkicrOn5fInPzjLLqs80urunysYZ4fOoKkROnGg78rBIzI
YPpLiNjC5rGcQYPgPurPhsMvTKZyzu9amWj36n9h9UcOuOMKy7z0x42J8+t1vbdv
tW/5LFEhts4mMaFCbXJib0BtC850meBidhVN2FNquSjVacRaKJfZtXLf97Uogqc5
2UKKX/CVrjD/s8iUysV7
=aWLB
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC low-priority fixes from Olof Johansson:
"A small selection of fixes coming in late during the release cycle and
not being critical enough for 3.15 inclusion"
* tag 'fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: shmobile: armadillo800eva: fixup HDMI sound flags setting
ARM: msm: Silence readb/writeb warnings due to missing IOMEM()
ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
ARM: dts: am335x-boneblack: remove use of ti,vcc-aux-disable-is-sleep
ARM: OMAP2+: free use_gptimer_clksrc variable after boot
ARM: OMAP5: Redo THUMB mode switch on secondary CPU
ARM: dts: AM4372: add l3-noc information
ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-noc
reset: Add of_reset_control_get to reset.h
- Put the device into low power state at system suspend.
- Convert to the common mmc DT parser.
- Add missing DT bindings needed for ux500.
Updates for ARM ux500|u300:
- Convert to the common mmc DT bindings.
- Remove redundant board file for mmci platform data.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTjF3hAAoJEP4mhCVzWIwpXh0QAIbK0n+m4GKOo+MoMeuMzCkr
3Go1mh75/JpkLQiKyWthfKInkVJ5VFMBY9ZgqcP5nfzy/NY8BYk3UTvWFQkANp5Y
telmC6uhkzw1b2wxdgytZFdJ9e7LJovJRERhzx3N5xDxuqM8gm/IZECvn8MbaFp8
3lpPgjh42yS28XDdr3zF2e9nAUH/PUDmOwoxa5jrqxZF63KVfe4dhXlhFHZsrpBq
y96IOH2te3TyfJ3+RuE53uf4qMSSlNaoG+8LO40k8LG5hHs391sh05s03xoiZVNB
LvFbr8icF8jvu6Kbag/v1i3Lrcl1/xLxFr0KNbDoY3n0UvizViHs1v6hKl1ZV0kR
J0z4+6tP41oKSnXz70HE4hJK10gtI4h5KZiBnrPXdTmNet5pSpclJ9UtB69ZPmZS
pmm90p89gDgTzKhjvdnAM1qBeRjWm4BBI6KPwVxqNfL3U5gt5p6RR01JAqn6r48I
AUoDPLJJxOP/YoPQja2VmyHA+dJ1/ax0xB5hQ8K2MEoegi52eYAFk2nl+PgvFdMv
3kcoxqwBtnoUwEuZqpD3Wk9WTBbErexpUxUw3Wd+x3t38sv5FKLdelCt++I3qEZb
5XaUIdppslez/i05BMWPKBdkn3fhWEhlJ7w3aZboczy8c+VbOOjIBIvNROuAIRee
R+i5hz/AxYz+wT4PBMnv
=09ec
-----END PGP SIGNATURE-----
Merge tag 'mmc-v3.16-1' of git://git.linaro.org/people/ulf.hansson/mmc into next
Pull MMC update from Ulf Hansson:
"These patches are mainly updates for the mmci driver and have been
tested in linux-next.
Some ARM SoC related patches are also included and those have been
acked from the corresponding maintainers to go through my mmc tree.
Updates for mmci driver:
- Put the device into low power state at system suspend.
- Convert to the common mmc DT parser.
- Add missing DT bindings needed for ux500.
Updates for ARM ux500|u300:
- Convert to the common mmc DT bindings.
- Remove redundant board file for mmci platform data"
* tag 'mmc-v3.16-1' of git://git.linaro.org/people/ulf.hansson/mmc: (22 commits)
mmc: mmci: Enforce DMA configuration through DT
mmc: mmci: Enforce max frequency configuration through DT
mmc: mmci: Enforce mmc capabilities through DT
mmc: mmci: Enforce DT for signal direction and feedback clock
ARM: ux500: Remove redundant board file for mmci platform data
ARM: ux500: Add a vmmc regulator through DT for the poped eMMC for href
ARM: ux500: Add the mmc capabilities flags to DT
mmc: mmci: Enable MMC_CAP_CMD23
mmc: mmci: Mark the DT bindings for highspeed mode as deprecated
ARM: u300: Convert to the common mmc DT bindings for highspeed mode
ARM: nomadik: Convert to the common mmc DT bindings for highspeed mode
ARM: ux500: Convert to the common mmc DT bindings for highspeed mode
ARM: ux500: Add mmci signal directions and feeback clock in DT for href
mmc: mmci: Use the common mmc DT parser
mmc: mmci: Add DT bindings for feedback clock pin
mmc: mmci: Add DT bindings for signal direction
mmc: mmci: Update DT documentation
mmc: mmci: Convert to devm functions
mmc: mmci: Convert to the mmc gpio API
mmc: mmci: Put the device into low power state at system suspend
...
- Support foreign mappings in PVH domains (needed when dom0 is PVH)
- Fix mapping high MMIO regions in x86 PV guests (this is also the
first half of removing the PAGE_IOMAP PTE flag).
- ARM suspend/resume support.
- ARM multicall support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQEcBAABAgAGBQJTjE5MAAoJEFxbo/MsZsTRtl8H/2lfS9w05e60vRxjolPV0vRc
5k9DcYFeJ+k2cz/2T3mNlIvKdfBTesSfgVquH+28GhQz+uKFQ1OrJpYNDTougSw5
Wv0Ae8e+7eLABvJ9XMiZdDsPzsICw2wqWOvqrnQi2qR3SIimBc5tBigR4+Rccv+e
btuBLlYT4WPQ8qgNyCBPgxzuyxteu5wK/0XryX6NcbrxeEbAzQAeDKkmvCD4fSvx
KxrwTO3mwV4Lefmf/WS4Z9fDcPujQOUqKEtUWanw/2JalO1BzDPo+1wvYs0LduLC
QI/YJN4SL3UeGOmbX2tyIaRgMsAcQVVrYkTm1cp8eD7vcRuvXaqy6dxuX05+V4g=
=cxfG
-----END PGP SIGNATURE-----
Merge tag 'stable/for-linus-3.16-rc0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip into next
Pull Xen updates from David Vrabel:
"xen: features and fixes for 3.16-rc0
- support foreign mappings in PVH domains (needed when dom0 is PVH)
- fix mapping high MMIO regions in x86 PV guests (this is also the
first half of removing the PAGE_IOMAP PTE flag).
- ARM suspend/resume support.
- ARM multicall support"
* tag 'stable/for-linus-3.16-rc0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
x86/xen: map foreign pfns for autotranslated guests
xen-acpi-processor: Don't display errors when we get -ENOSYS
xen/pciback: Document the entry points for 'pcistub_put_pci_dev'
xen/pciback: Document when the 'unbind' and 'bind' functions are called.
xen-pciback: Document when we FLR an PCI device.
xen-pciback: First reset, then free.
xen-pciback: Cleanup up pcistub_put_pci_dev
x86/xen: do not use _PAGE_IOMAP in xen_remap_domain_mfn_range()
x86/xen: set regions above the end of RAM as 1:1
x86/xen: only warn once if bad MFNs are found during setup
x86/xen: compactly store large identity ranges in the p2m
x86/xen: fix set_phys_range_identity() if pfn_e > MAX_P2M_PFN
x86/xen: rename early_p2m_alloc() and early_p2m_alloc_middle()
xen/x86: set panic notifier priority to minimum
arm,arm64/xen: introduce HYPERVISOR_suspend()
xen: refactor suspend pre/post hooks
arm: xen: export HYPERVISOR_multicall to modules.
arm64: introduce virt_to_pfn
arm/xen: Remove definiition of virt_to_pfn in asm/xen/page.h
arm: xen: implement multicall hypercall support.
This does the same as the previous commit, but for the S bit, which also
needs to match the initial value which the assembly code used for the
same reasons. Again, we add a check for SMP to ensure that the page
tables are correctly setup for SMP.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the option to provide DMA configuration as platform data,
enforce it through DT.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Fix a long standing bug where, for ARMv6+, we don't fully ensure that
the C code sets the same cache policy as the assembly code. This was
introduced partially by commit 11179d8ca2 ([ARM] 4497/1: Only allow
safe cache configurations on ARMv6 and later) and also by adding SMP
support.
This patch sets the default cache policy based on the flags used by the
assembly code, and then ensures that when a cache policy command line
argument is used, we verify that on ARMv6, it matches the initial setup.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
cr_no_alignment is really only used by the alignment code. Since we no
longer change the setting of cr_alignment after boot, we can localise
this to alignment.c
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
alignment.c will not be built unless CPU_CP15 is set:
config CPU_CP15
bool
config CPU_CP15_MMU
bool
select CPU_CP15
config ALIGNMENT_TRAP
bool
depends on CPU_CP15_MMU
So there's no point having conditionals on CPU_CP15 within this code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch finally allows us to get rid of the BPF_S_* enum.
Currently, the code performs unnecessary encode and decode
workarounds in seccomp and filter migration itself when a filter
is being attached in order to overcome BPF_S_* encoding which
is not used anymore by the new interpreter resp. JIT compilers.
Keeping it around would mean that also in future we would need
to extend and maintain this enum and related encoders/decoders.
We can get rid of all that and save us these operations during
filter attaching. Naturally, also JIT compilers need to be updated
by this.
Before JIT conversion is being done, each compiler checks if A
is being loaded at startup to obtain information if it needs to
emit instructions to clear A first. Since BPF extensions are a
subset of BPF_LD | BPF_{W,H,B} | BPF_ABS variants, case statements
for extensions can be removed at that point. To ease and minimalize
code changes in the classic JITs, we have introduced bpf_anc_helper().
Tested with test_bpf on x86_64 (JIT, int), s390x (JIT, int),
arm (JIT, int), i368 (int), ppc64 (JIT, int); for sparc we
unfortunately didn't have access, but changes are analogous to
the rest.
Joint work with Alexei Starovoitov.
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Signed-off-by: Alexei Starovoitov <ast@plumgrid.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Mircea Gherzan <mgherzan@gmail.com>
Cc: Kees Cook <keescook@chromium.org>
Acked-by: Chema Gonzalez <chemag@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
memblock is now fully integrated into the kernel and is the prefered
method for tracking memory. Rather than reinvent the wheel with
meminfo, migrate to using memblock directly instead of meminfo as
an intermediate.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Due to a design incompatibility between the PCIe Marvell controller
and the Cortex-A9, stressing PCIe devices with a lot of traffic
quickly causes a deadlock.
One part of the workaround for this is to have all PCIe regions mapped
as strongly-ordered (MT_UNCACHED) instead of the default
MT_DEVICE. While the arch_ioremap_caller() mechanism allows
sub-architecture code to override ioremap(), used to map PCIe memory
regions, there isn't such a mechanism to override the behavior of
pci_ioremap_io().
This commit adds the arch_pci_ioremap_mem_type variable, initialized
to MT_DEVICE by default, and that sub-architecture code can
override. We have chosen to expose a single variable rather than
offering the possibility of overriding the entire pci_ioremap_io(),
because implementing pci_ioremap_io() requires calling functions
(get_mem_type()) that are private to the arch/arm/mm/ code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This was caught by a panic on Broadcom mobile platforms.
Note that this code is all going away with the pending l2x0 cleanup
series from Russell, but we need this here until that's landed so we
can enable exynos multiplatform.
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes the following build errors:
/tmp/ccRbZlaA.s: Assembler messages:
/tmp/ccRbZlaA.s:69: Error: selected processor does not support ARM mode `isb '
/tmp/ccRbZlaA.s:75: Error: selected processor does not support ARM mode `isb '
/tmp/ccRbZlaA.s:76: Error: selected processor does not support ARM mode `dsb '
make[1]: *** [arch/arm/mach-exynos/hotplug.o] Error 1
/tmp/ccJEg4jw.s: Assembler messages:
/tmp/ccJEg4jw.s:454: Error: selected processor does not support ARM mode `isb'
/tmp/ccJEg4jw.s:455: Error: selected processor does not support ARM mode `dsb'
/tmp/ccJEg4jw.s:465: Error: selected processor does not support ARM mode `isb'
/tmp/ccJEg4jw.s:474: Error: selected processor does not support ARM mode `isb'
/tmp/ccJEg4jw.s:475: Error: selected processor does not support ARM mode `dsb'
/tmp/ccJEg4jw.s:516: Error: selected processor does not support ARM mode `isb'
/tmp/ccJEg4jw.s:525: Error: selected processor does not support ARM mode `isb'
/tmp/ccJEg4jw.s:526: Error: selected processor does not support ARM mode `dsb'
make[1]: *** [arch/arm/mach-exynos/mcpm-exynos.o] Error 1
Reported-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Tested-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable Exynos platform and its related IPs for multi_v7_defconfig.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is including fix exynos cpufreq driver compilation with
ARCH_MULTIPLATFORM. Even though this is a work around, this
is required for support exynos multiplatform for a while and
will be updated in near future.
This is based on tags/samsung-exynos.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTiN4aAAoJEA0Cl+kVi2xqh14P/2Alq0Q4KgPmlsIIOsofADLw
BEig7xQAh9iREkfKLm6Wy1K/OP99jNWdbtZnMF1UK3pTxNVPKluz3ZADdJXJWlmb
UsZcu60l9ZuZ+B4vTUG7jQx2oq6sxo7aLVMyTvT+kWmzZsNWEdqMDzDATgqjPOW8
yGfWg6KwdTkpGbesID6w1h2D611RDIhJU+LpXE+AmyKWX3x/jkOxOU49CY8bKEhw
ZwYw41vjTk8e2U/cBYCjqPhEuUzpFq+mmVQcVDGch/p/TFUA1/SbzuqbVDHVe+yZ
qQHNZREsAWJPFJ22IjUleq/oNLiSVkJVVSkVrfXCwowzzPsw+cLFDuSRaJMROm1a
baR77C0TJREqoXu4FexBSoWLPYbn7aUOlZ3wGmr/7MnPK/bK3e9BGiOsJ8GPIQuF
e2ytESFl15ABduY0lV0H/TtOxjx8JZJf+xxh0Ip0qoE8XNkNxt5cIsMW7LD/NcaE
zUuPoO+w97pUxyVDrTPXakLRdn643PmYRX+rMG8gXP82m/CiCKe+x8znc7BkXIq2
h8rvSLqnWQFYUdEj/0/T8scRT5DyZPjSTDguUj+lhDU2rE0gWNCHEO+2a7Qwm8Js
YfeQ4dd71ZNqzw8Ui62do2HzNGIA/FWPwQBzHeu2tPxVrWOwSQz/zSA4TLwjeB3J
n1Tzm9JOJNwH3FTAcH9k
=SQbr
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung 2nd drivers for 3.16" from Kukjin Kim:
This is including fix exynos cpufreq driver compilation with
ARCH_MULTIPLATFORM. Even though this is a work around, this
is required for support exynos multiplatform for a while and
will be updated in near future.
This is based on tags/samsung-exynos.
* tag 'samsung-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (24 commits)
cpufreq: exynos: Fix driver compilation with ARCH_MULTIPLATFORM
ARM: EXYNOS: Enable multi-platform build support
ARM: EXYNOS: Consolidate Kconfig entries
ARM: EXYNOS: Add support for EXYNOS5410 SoC
ARM: EXYNOS: Support secondary CPU boot of Exynos3250
ARM: EXYNOS: Add Exynos3250 SoC ID
ARM: EXYNOS: Add 5800 SoC support
ARM: EXYNOS: initial board support for exynos5260 SoC
clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: dts: Remove g2d_pd node for exynos5420
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- enable mcpm for dual-cluster exynos5800
- since commit 166aaf39 ("ARM: 8029/1: mcpm: Rename the
power_down_finish() functions to be less confusing"),
use new member name wait_for_cpu_powerdown.
This is based on tags/exynos-mcpm.
Note that since the commit 166aaf39 is in rmk tree so this
should be sent to upstream after that in 3.16 merge window.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTiNzxAAoJEA0Cl+kVi2xqEoQQALNi4AGqI9Gu15tRff3a9gmA
cu7VsnkYWnazUg6bYpYjy1miNbGmXsEErg0lZORkW+RY76UI3kDtvwFCxV1/EnOl
Ue3igxJGg7kWfCHekp2jpWPG4a9eLgCxN1EiF/z3lFJoTT9pksAftR/4DHmJWKwf
HFKq1ogOSz0d0EwCe9keysAIXjK69gfSnoSw6Y9uIGXrpyDiMEUbhhllu+qwYGZy
KQcC+jN4fdDUAKGE/k50EbFEd9DCFd1XxcVYW763prTJXcIP8sFWUfqJdi2kGi8b
hRG8pYlXh2MGI6rzUzWBsxk9nIwzkd5zUkgCAgAoSzmLSolV49Fk6AMdBQPuNKWf
yNhpXwawRaTduVGzdEUl6BAX3E7dnb9MQfwdcvcsos8GuZtoxwzXsTFxu4AtC8kg
izv99RJJ952kj8kjEZjuFx37LgaYWv8+dc0O3Lo5WiW4ibgtkZ2Ek9FvIXYSdnho
5+2l6qsXIV7J/1gJE0WJpBaGN5t4mPh6zokuXREq8RfTICFJqY8JmWrYEVIV/rpB
X3e4sqMtuMB02u+VdJOzoc4krwLF8xokxgo5PJ/3im9i5plzSi9NTJ2r/lOCLmos
aYQn4HIB5h8vYs/ozVncLs7gVNuir4BR8mNREUZTVXbNAPFnd6hXLAA4W6OYpzSG
uXthZ8lup1pH9pGqkvBr
=95LQ
-----END PGP SIGNATURE-----
Merge tag 'exynos-mcpm-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Exynos 2nd MCPM updates for v3.16" from Kukjin Kim:
- enable mcpm for dual-cluster exynos5800
- since commit 166aaf39 ("ARM: 8029/1: mcpm: Rename the
power_down_finish() functions to be less confusing"),
use new member name wait_for_cpu_powerdown.
This is based on tags/exynos-mcpm.
Note that since the commit 166aaf39 is in rmk tree so this
should be sent to upstream after that in 3.16 merge window.
* tag 'exynos-mcpm-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: mcpm rename the power_down_finish
ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- add new SoCs support
: exynos3250, 5260, 5410 and 5800
- enable multi-platform on exynos
: consolidate exynos related Kconfig entries
Note that this requires tags/samsung-cleanup and tags/samsung-clk-2
because of mostly migration exynos specific macros into mach-exynos
and exynos related Kconfig entries.
One more merge conflict happens in arch/arm/Kconfig for ARCH_EXYNOS
due to SRAM stuff, even though tried to sort them out. Since just
resolving it would be better I think, please remove ARCH_EXYNOS in
arch/arm/Kconfig when merge conflict happens.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTiNnJAAoJEA0Cl+kVi2xqw4AP/1h2Rtg5/VXTwspQNicVqmjy
xh1R5HNkCK9J+Vs+hrajFog4lneTuKDimgJqwM4JcMR9Y6KFCVivMZ+rPpaVpa2o
Ly50EgEUAx7iir/PswttUVsSAoP/LXwwP44tWgV6qwV4N2qZ4BPKSAkc+l4icrqv
Zzx4h1sxMKF2oTarDsrBIj7UszZtIB6Dt00ogyEJ2BNgWcWzU51YtWOz6MdC+Eha
Wz2cfnrl2GiSIUC+Y0jRxeNfJyIgVMvrWpC23d5QSO0qx5xDNhSq/+eNXpd4gTGc
aMoBnTgzvymOgLYFkcDCDYxsehXqX1b3hHzu1BfRTWjcA9wmxFhC8eOiMAgDso79
V8L/k5/XVAP34TFzZR1ZD5rCqgBIuDgmeOqyzMAxMLVKTQZrJ/6smKq94FCCD89G
lOtiLmAPems8g7DE2wpWsYiml7TyUHNqgHP4FWJThnERjBa+rDKsyozzgFLJLqD7
/qL+qn6C0COtfDN0SBiIiLyV/0j+DI+tS5uGWgKWxGkRLQev1GyWGsGJZBx1tlJB
v0/aAEAFkTWg9b+dO9OdUXzbGvc3VAQbaiwfCb73vsEibuO3IGpsXsl0d+ChXUkK
XbQW5nNHOCKJj1auAg+4AqWm+evSzjZa/gViUlxE0vpK1Bc8uXZy0sYhQwC0lBaB
KBqHE3ImvgIgPhXa3t5R
=/Vpg
-----END PGP SIGNATURE-----
Merge tag 'samsung-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Samsung Exynos updates for 3.16
- add new SoCs support
: exynos3250, 5260, 5410 and 5800
- enable multi-platform on exynos
: consolidate exynos related Kconfig entries
* tag 'samsung-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (22 commits)
ARM: EXYNOS: Enable multi-platform build support
ARM: EXYNOS: Consolidate Kconfig entries
ARM: EXYNOS: Add support for EXYNOS5410 SoC
ARM: EXYNOS: Support secondary CPU boot of Exynos3250
ARM: EXYNOS: Add Exynos3250 SoC ID
ARM: EXYNOS: Add 5800 SoC support
ARM: EXYNOS: initial board support for exynos5260 SoC
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: dts: Remove g2d_pd node for exynos5420
ARM: dts: Remove mau_pd node for exynos5420
ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount
...
Signed-off-by: Olof Johansson <olof@lixom.net>
* Updated Kconfig DEBUG_QCOM_UARTDM help to include APQ8084 info
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: GPGTools - https://gpgtools.org
iQIcBAABCgAGBQJTiLLlAAoJEF9hYXeAcXzB+WMP/R2hkfj5fMtMmerpAaGt9KXW
qa8qPM+PC0vEhiZSWHTjUsB+FBx6H4AWVu8FfOYaZQAthYPO/gd5fh7Zd8pzqFs4
sJVFyXjFDaEHxbj1aDw0b5R08CLN2nG15K5x8MS8QQDRW3CzE49Nm3rCXQliEtla
V6ID31EOAqXLz9JX0QauSMC2YMkrO0COfR2ERUROg/3cuwFnZPCGmbEnn8UAqtUc
ks7JC4toCbxyoA2KOE420pkQOZYHlNvnZgrCI/ZJsjiOlDq3X8vFCNqTgSzjNdwE
doH5CGsnC+plZ/BDKm9M71htnbCBZe/LzbPrfK15LB6fwpjHZyIfPFfMRUbEA+j9
UIQFlWp0q+1m4YJ3dfmTOpUzq7j+PQLFjDEiXpxVdNKtVKdYAqrh71gzSsZLz0ay
dMYbvuIjGiq9cjQwm4sqT6q4hI3xfNnsUiNFMabhyv1cu5icf+5ysJHWaOHVu1rg
j6+HvZCxDet2/zM4ipty94zxF+8/0NFd2AVEfhYqcM3ZObkHdM48hcyIkGQNOqpR
xnE2YKQAT7wQQq+cwvRqwEk/aK00fVqqU5AWv14gH8ZKLX3+VBN3Q/8YGktyt92L
ML4HziqD10ck+VqWmnKFVNkvh6RBTuZI2Lnz+p56AW9sp3ZceY2a+nbw+5dXsvly
q3ft6A0hQ46Hyi5L7D0q
=xIWF
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc
Merge "Qualcomm ARM Based SoC Updates for v3.16-2" from Kumar Gala:
* Updated Kconfig DEBUG_QCOM_UARTDM help to include APQ8084 info
* tag 'qcom-soc-for-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
Signed-off-by: Olof Johansson <olof@lixom.net>
* Updated MSM8660/MSM8960/MSM8974 dts for various updates or conformitity
to binding specs
* Added APQ8064 SoC and IFC6410 board device tree support
* Added APQ8084 SoC and APQ8084-MTP board device tree support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: GPGTools - https://gpgtools.org
iQIcBAABCgAGBQJTiLIDAAoJEF9hYXeAcXzBTZkQALpph9EDQz583BLIHabv5lCY
mhRSCBS5j5CscM8o0euaqFcKIyNmFOuPCis2jArMmX9Z8RjRJod6zNzdQW92Kddq
TXMtRo+BX1Jel9Ri5ysXGvDOkUeViUf56PuYy4pqFOEfbeKpH/yfWTAJDt2usIEi
9bfDodwAbbsB9t8IBgTNhyhAmMUqkfvBvtBnG8qAyXBxUkvC5iAjPnWT8LOisrTC
hTIvh8H3acImN4TLlvElvhRDPC7a4rcmF7XdoCjm3F9t9b/7U2mwGCGqZGGal/p7
H7SvAwTfQcNToZeo9RMz+xxq0fT00qLQqnHtx7s0NXXA2XPVQ2RxNH2YUqBUGAEq
EEfXjTh+pBUUfzLmxbBzuD9pNx5JD0rhIKV5sA/pCXabmEFQzXcIeGmKpSapbuOi
7zoqSqaqDlR21qdBuh545E6zIlSE7VPeeG0oqI2bzaG4OHksoRuMJhUzkKikHxQ8
uN+P5lPQudBT6FbncVvpGNuAkTVB6T7Qtl7jzCplLCgZ2T3X1gb0sg5+1R9vqOEz
1n9er/cAiaklv+ca4jsfCuQAkgrxAfqtPGPxyVo8fuaIE+Q97y38yWfCquxl1oGp
vkE9s2TaREWbRCIvOf2Oxm0dFrTWWVjQI1kAq4iSJCDIBS7f1/qXtS0NvrE1E2+e
B+9veuw7/7xIcSZZvb52
=u8HT
-----END PGP SIGNATURE-----
Merge tag 'qcom-dt-for-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "Qualcomm ARM Based Device Tree Updates for v3.16-2" from Kumar Gala:
* Updated MSM8660/MSM8960/MSM8974 dts for various updates or conformitity
to binding specs
* Added APQ8064 SoC and IFC6410 board device tree support
* Added APQ8084 SoC and APQ8084-MTP board device tree support
* tag 'qcom-dt-for-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: dts: qcom: Add APQ8084-MTP board support
ARM: dts: qcom: Add APQ8084 SoC support
ARM: dts: qcom: Add initial APQ8064 SoC and IFC6410 board device trees
ARM: dts: qcom: Update msm8660 device trees
ARM: dts: qcom: Update msm8960 device trees
ARM: dts: qcom: Update msm8974/apq8074 device trees
Signed-off-by: Olof Johansson <olof@lixom.net>
Arndale-Octa board is always configured to work with trustzone
firmware binary. Added DTS node entry to enable this support.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since commit 166aaf39 ("ARM: 8029/1: mcpm: Rename the power_down_finish()
functions to be less confusing") changed the name of power_down_finish to
wait_for_cpu_powerdown, so use new member name wait_for_cpu_powerdown.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The exynos5800 is very similar to exynos5420. We can re-use
the existing MCPM support for exynos5800 for secondary boot
-up and switching.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This makes it possible to enable the Exynos platform as part of a
multiplatform kernel.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Instead of repeating the Kconfig entries for every SoC,
move them under ARCH_EXYNOS3, 4 and 5 and move the entries
common to 3, 4 and 5 under ARCH_EXYNOS.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
EXYNOS5410 is SoC in Samsung's Exynos5 SoC series.
Add initial support for this SoC.
Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch fix the offset of CPU boot address and don't
need to send smc call of SMC_CMD_CPU1BOOT command for
secondary CPU boot because Exynos3250 removes WFE in
secure mode.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add Exynos3250's SoC ID. Exynos 3250 is SoC that
is based on the 32-bit RISC processor for Smartphone.
Exynos3250 uses Cortex-A7 dual cores and has a target speed
of 1.0GHz.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos5800 is an octa core SoC which is based on the 5420
platform. This patch adds the basic support for it in the
mach-exynos.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add basic arch side support for exynos5260 SoC.
Note that this is required to enable build for clock driver.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add pmusysreg node for Exynos3250 to access PMU
(Power Management Unit) register in a centralized way using
syscon driver.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The vbus-supply property is wrongly updated in the
usbdrd node instead of the usbdrd_phy node. This patch
fixes the same.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The vbus-supply property is wrongly updated in the
usbdrd node instead of the usbdrd_phy node. This patch
fixes the same.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new exynos3250.dtsi to support Exynos3250 SoC
based on Cortex-A7 dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
- sysram node for SYSRAM memory mapping
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Hyunhee Kim <hyunhee.kim@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add required fixed-regulator for VBUS supply for USB 3.0
controller phy.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Enable display controller with timing information for 1080p
panel in Exynos5800 peach-pi board.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adds support for google peach-pi board having the
Exynos5800 SoC.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Most of the nodes of exynos5420 remains same for exynos5800.
So the exynos5420.dtsi is included in exynos5800 and the changed
node properties will be overriden.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch adds the dts file for xyref5260 board which
is based on exynos5260 SoC.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Made it as per DT node naming convention <name@reg_addr>.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Key code macros improve readability on exnos4210-origen,
exynos4412-origen and exynos5250-arndale boards.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[kgene.kim@samsung.com: squashed similar two patches]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Enabled RTC and WDT nodes on exynos4210-origen and
exynos4412-origen boards.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[kgene.kim@samsung.com: squashed similar two patches]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Call pcie_bus_configure_settings() on ARM, like for other platforms.
pcie_bus_configure_settings() makes sure the MPS across the bus is uniform
and provides the ability to tune the MRSS and MPS to higher performance
values. This is particularly important for embedded where there is no
firmware to program these PCIe settings for the OS.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
CC: Santosh Shilimkar <santosh.shilimkar@ti.com>
This corrects a bug that will be introduced in v3.15.
The bug causes audio playback to fail on the Armadillo800 EVA board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTh8LKAAoJENfPZGlqN0++qVEP/3dzAzOCnEzjw1zHgnl8OdZI
VWaAPd9mfyhNPk364wt09hy4G4mk99Oz3XwfQJ7mifR9BgT8msIm/oPjVFvZSrdO
ShZvn3o7Rdd43ZTz0QHyKoFbB9/kxQxGasvNDe5Bm5ckIAyqCqA8leWLzRNJ1Rdh
sb7jUgYrgJjQlTy/y88L/vq9GaJzVy1fsVo9VUWwSxoxqiyLKPRvlMxTqucaW1gM
NIUaa1bPzXiC00pQNSMytgSVSCUTbret8yifqTa4VGZH2E7iK5eGjqwe75JqFXzs
Ovrm7lfs8C1/FvMWNYP4qliZku/J2zacAUTKnuEv0g0s0NsJGk4WYTKh2vzr6N+N
XjLblrZ3yz8R3jorPVXBNYCZd7KoZi/9/byhduPyXtZkg4+QSws8vrtRdyX/8GXJ
JM9LsQLTBIXS8nBuxe175BttCZUS8S199CbPaFyZl1KcV+GKIYn9KgcTZEJnZkqq
ZMXeuSlHxYk17zmClO2V/PDqTs9bF7jiK14NpjYczGSvcAaPoGXMHLzem1ob0YUK
sFS4IqCM/Xrw3XDs3mD5pF7SgwdopJEOnQNW1Aqw4P1ixiZWJVb+y48OKHw4SVzn
35cCl/A22VydwwbggU0iEfBoME740jiWXv7G8t4GrxYZ08O/v8pAokLo63jAYhbi
k0pp/Ubl3up/TKw3Vp4E
=aVCn
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/fixes-non-critical
Merge "Renesas ARM Based SoC Fixes for v3.16" from Simon Horman:
This corrects a bug that will be introduced in v3.15.
The bug causes audio playback to fail on the Armadillo800 EVA board.
* tag 'renesas-fixes-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: armadillo800eva: fixup HDMI sound flags setting
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"The usual random collection of relatively small ARM fixes"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8063/1: bL_switcher: fix individual online status reporting of removed CPUs
ARM: 8064/1: fix v7-M signal return
ARM: 8057/1: amba: Add Qualcomm vendor ID.
ARM: 8052/1: unwind: Fix handling of "Pop r4-r[4+nnn],r14" opcode
ARM: 8051/1: put_user: fix possible data corruption in put_user
ARM: 8048/1: fix v7-M setup stack location
When configure kprobe events of ftrace with "stacktrace" option enabled
in arm, there is no stacktrace was recorded after the kprobe event was
triggered. The root cause is no save_stack_trace_regs() function implemented.
Implement the save_stack_trace_regs() function in arm, then ftrace will
call this architecture-related function to record the stacktrace into
ring buffer.
After this fix, stacktrace can be recorded, for example:
# mount -t debugfs nodev /sys/kernel/debug
# echo "p:netrx net_rx_action" >> /sys/kernel/debug/tracing/kprobe_events
# echo 1 > /sys/kernel/debug/tracing/events/kprobes/netrx/enable
# echo 1 > /sys/kernel/debug/tracing/options/stacktrace
# echo 1 > /sys/kernel/debug/tracing/tracing_on
# ping 127.0.0.1 -c 1
# echo 0 > /sys/kernel/debug/tracing/tracing_on
# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 12/12 #P:1
#
# _-----=> irqs-off
# / _----=> need-resched
# | / _---=> hardirq/softirq
# || / _--=> preempt-depth
# ||| / delay
# TASK-PID CPU# |||| TIMESTAMP FUNCTION
# | | | |||| | |
<------ missing some entries ---------------->
ping-1200 [000] dNs1 667.603250: netrx: (net_rx_action+0x0/0x1f8)
ping-1200 [000] dNs1 667.604738: <stack trace>
=> net_rx_action
=> do_softirq
=> local_bh_enable
=> ip_finish_output
=> ip_output
=> ip_local_out
=> ip_send_skb
=> ip_push_pending_frames
=> raw_sendmsg
=> inet_sendmsg
=> sock_sendmsg
=> SyS_sendto
=> ret_fast_syscall
Signed-off-by: Lin Yongting <linyongting@gmail.com>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Support for ARM710 CPUs was removed in v3.5. Now remove the last code
depending on its Kconfig macro.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We will reach fixup handler when one thread(say cpu0) caused an undefined exception, while another thread(say cpu1) is unmmaping the page.
Fixup handler returns to the next userspace instruction which has caused the undef execption, rather than going to the same instruction.
ARM ARM says that after undefined exception, the PC will be pointing
to the next instruction. ie +4 offset in case of ARM and +2 in case of Thumb
And there is no correction offset passed to vector_stub in case of
undef exception.
File: arch/arm/kernel/entry-armv.S +1085
vector_stub und, UND_MODE
During an undefined exception, in normal scenario(ie when ldrt
instruction does not cause an abort) after resorting the context in
VFP hardware, the PC is modified as show below before jumping to
ret_from_exception which is in r9.
File: arch/arm/vfp/vfphw.S +169
@ The context stored in the VFP hardware is up to date with this thread
vfp_hw_state_valid:
tst r1, #FPEXC_EX
bne process_exception @ might as well handle the pending
@ exception before retrying branch
@ out before setting an FPEXC that
@ stops us reading stuff
VFPFMXR FPEXC, r1 @ Restore FPEXC last
sub r2, r2, #4 @ Retry current instruction - if Thumb
str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
@ else it's one 32-bit instruction, so
@ always subtract 4 from the following
@ instruction address.
But if ldrt results in an abort, we reach the fixup handler and return
to ret_from_execption without correcting the pc.
This patch modifes the fixup handler to re-execute the same instruction which caused undefined execption.
Signed-off-by: Vinayak Menon <vinayakm.list@gmail.com>
Signed-off-by: Arun KS <getarunks@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
asm-generic offers an atomic-add based rwsem implementation, which
can avoid the need for heavier, spinlock-based synchronisation on the
fast path.
This patch makes use of the optimised implementation for ARM CPUs.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As we have now removed all instances of the L2C-310 having its cache
size "modified" via platform/SoC code, discourage new cases showing
up by printing a warning.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We no longer need or require the .set_debug method; we handle everything
it used to do via the .write_sec method instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
L2X0_AUX_CTRL_MASK is not useful for PL310s. It would be better if
people thought about their value for this rather than cargo-cult
programming.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It is beneficial to have the L2 cache up and running earlier in the
system boot. Not only will this allow for simpler code when we come to
enable some features, but it also means that we get a more accurate
bogomips value for the udelay() loop. Calibrating the loop with the
L2 cache off, and then running with the L2 cache on is not the best
idea.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ux500 can't change the auxiliary control register, so there's no point
passing values to try and modify it to the l2x0 init functions.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ux500 can't write to any of the secure registers on the L2C controllers,
so provide a dummy handler which ignores all writes.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. We can remove the .init_machine as it becomes
the same as the generic version.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. This also allows us to eliminate the
.init_machine function as this becomes the same as the generic version.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add better commentry about the L2 cache requirements on these platforms.
Unfortunately, the auxiliary control register is not pre-set to indicate
the correct cache parameters, so we have to manually program these.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. Along with this change, we can delete l2x0.c
from prima2.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for L2 cache controller (PL310) on AM437x SoC.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Get rid of init call to initialize L2 cache. Instead use the init_early
machine hook. This helps in using the initialization routine across
SoCs without the need of ugly cpu_is_*() checks.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
L2 cache initialization for OMAP4 redundantly sets the cache policy to
Round-Robin. This is not needed since thats the PL310 default anyway.
Removing this reduces the number of platform specific aux control
settings.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid reading directly from the L2 registers in platform code. The L2
code will have already saved the register values itself into the
l2x0_saved_regs structure, so platform code should just move these
values to where they're required.
This is safe because the L2x0 will have been initialised by an early
initcall, whereas the OMAP4 PM code is initialised late.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we now always enable NS access to the unlock registers, this can
be removed from OMAP4. Remove the NS access bit for the interrupt
registers from OMAP4 as well - nothing in the kernel accesses that yet,
and we can add it in core code when we have the need.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that OMAP2 uses the write_sec method, we don't need to enable the L2
cache in OMAP2 specific code; this can be done via the normal mechanisms
in the L2C code. Remove the OMAP2 specific code.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the write_sec method, we no longer need to override the default
L2C disable method, and we no longer need the L2C set_debug method.
Both of these can be handled via the write_sec method.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. This also allows us to eliminate the
.init_machine function as it is identical to the generic version.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. Since the .init_irq method only calls
irqchip_init(), we can remove that too as the generic code will take
care of that.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that we handle this in core code, we don't need platforms enabling
the low power modes directly.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that highbank uses the write_sec method, we don't need to enable
the L2 cache in SoC specific code; this can be done via the normal
mechanisms in the L2C code.
Checking with Rob Herring:
> > Can we kill the "highbank_smc1(0x102, 0x1);" here? That means
> > l2x0_of_init() will see the L2 cache disabled, and will try to enable
> > it via the write_sec hook, so it should do the right thing.
>
> Yes, that should work. You should be able to just call l2x0_of_init
> unconditionally. The condition was really to just avoid the smc on
> Midway which does get handled on h/w, but not if running virtualized.
So also drop the DT check too. I'm leaving the config check in place
so that if L2 is disabled, the write_sec hook can be optimised away.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the write_sec method, we no longer need to override the default L2C
disable method. This can be handled via the write_sec method instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
exynos was unconditionally calling the L2 cache initialisation from an
early_initcall. This breaks multiplatform kernels. Thankfully,
converting to generic l2c initialisation fixes this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. We can remove the explicit machine init too
as this becomes identical to the generic version.
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. We can remove the explicit machine init too
as this becomes identical to the generic version.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a common assembly implementation for PL310 resume code. Certain
platforms need to re-initialise the L2C cache early as it may preserve
data across a S2RAM cycle, and therefore must be enabled along with the
L1 cache and MMU.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a hook into the core ARM code to perform L2 cache initialisation
in a platform independent manner. Platforms still get to indicate
their auxiliary control register values and mask, but the
initialisation call will now be made from generic code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we always write to these during the cache initialisation, it is
a good idea to always have the non-secure access bit set. Set it in
core code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AXI bus protocol requires that a write response should only be
sent back to the master when the last write has been accepted. Early
BRESP allows the L2C-310 to send the write response as soon as the
store buffer accepts the write address.
Cortex-A9 processors can signal to the L2C-310 that they wish to be
notified early, and if this optimisation is enabled, the L2C-310 can
signal an early write response.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the L2 cache register saving to a more sensible location - after
the cache has been enabled, and fixups have been run. We move the
saving of the auxiliary control register into the ->save function as
well which makes everything operate in a sane and maintainable way.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full auxiliary control register definitions.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having SoCs work around L2C erratum themselves, move them
into core code. This erratum affects the double linefill feature which
needs to be disabled for r3p0 to r3p1-50rel0.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When Linux is running in the non-secure world, any write to a secure
L2C register will generate an abort. Platforms normally have to call
firmware to work around this. Provide a hook for them to intercept
any L2C secure register write.
l2c_write_sec() avoids writes to secure registers which are already set
to the appropriate value, thus avoiding the overhead of needlessly
calling into the secure monitor.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the L2C-310 errata configuration options to arch/arm/mm/Kconfig
along side the option which enables support for this device.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the way size calculation data (base of way size) out of the
switch statement into the provided initialisation data.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than decoding this from the ID register, store it in the
l2c_init_data structure. This simplifies things some more, and
allows us to better provide further details as to how we're
driving the cache. We print the cache ID value anyway should we
need to precisely identify the cache hardware.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
non-OF initialisation has never been used with any cache controller
which isn't an ARM cache controller, so we can safely get rid of the
old (and buggy) l2x0_*-based operations structure.
This is also the last reference to:
- l2x0_clean_line()
- l2x0_inv_line()
- l2x0_flush_line()
- l2x0_flush_all()
- l2x0_clean_all()
- l2x0_inv_all()
- l2x0_inv_range()
- l2x0_clean_range()
- l2x0_flush_range()
- l2x0_enable()
- l2x0_resume()
so kill those functions too.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Broadcom L2C-310 devices use ARMs L2C-310 R2P3 or later. These
require no errata workarounds, and so we can directly call the l2c210
functions from their methods.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The L2C-220 is different from the L2C-210 and L2C-310 in that every
operation is a background operation: this means we have to use
spinlocks to protect all operations, and we have to wait for every
operation to complete.
Should a second operation be attempted while a previous operation
is in progress, the response will be an imprecise abort.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Where no errata affect the L2C-310 handlers, they are functionally
equivalent to L2C-210. Re-use the L2C-210 handlers for the L2C-310
part.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Implement L2C-310 erratum 588369 by overriding the invalidate range
and flush range methods in the outer_cache operations structure.
This allows us to sensibly contain the erratum code in one place
without affecting other locations/implemetations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Implement L2C-310 erratum 727915 by overriding the flush_all method
in the outer_cache operations structure. This allows us to sensibly
contain the erratum code in one place without affecting other
locations or implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add L2C-210 specific cache operation handlers. These are tailored to
the requirements of the L2C-210 cache controller, which doesn't
require any workarounds. We avoid using the way operations during
normal operation, which means we can avoid locking: the only time
we use the way operations are during initialisation, and when
disabling the cache.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the pl310_set_debug() into the l2c-310 code area, and don't hide
it with ifdefs. Rename it to l2c310_set_debug().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The l2x0 unlocking code is only called from l2x0_enable() now, so move
the logic entirely into that function and simplify it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rename the pl310 save/resume functions to have a l2c310 prefix - this
is it's official name. Use a local cached copy of the l2x0_base
virtual address, and also realise that many of the resume function
tails are the same as the enable functions, so make a call to the
enable function instead of duplicating that code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the save/resume code hooks to the non-OF implementations as well.
There's no reason for the non-OF implementations to be any different
from the OF implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than putting quirk handling in __l2c_init(), move it out to a
separate function which individual implementations can specify. This
helps to localise the quirks to those implementations which require
them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having this hacked into the OF initialiation function, we
can handle this via the enable function instead. While here, clean
up that code and comments a little.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessary writes to the auxiliary control register if the
register already contains the required value. This allows us to
avoid invoking the platforms secure monitor code unnecessarily.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We should write the auxillary control register before unlocking: the
write may be necessary to enable non-secure access to the lock
registers.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Providing an enable method gives L2 cache controllers a chance to do
special handling at enable time. This allows us to remove a hack in
l2x0_unlock() for Marvell Aurora L2 caches.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Back in the mists of time, someone decided that it would be a good idea
to group like functions together - so all the save functions in one
place, all the resume functions in another, all the OF parsing functions
some place else.
This makes it difficult to get an overview on what a particular
implementation is doing - grouping an implementations specific functions
together makes more sense, because you can see what it's doing without
the clutter of other implementations.
Organise it according to implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There's no reason this functionality should be specific to DT, so move
it into the common initialisation function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pass the iomem address into this function so we don't have to keep
accessing it from a global.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having a boolean and other tricks to disable some bits of
l2x0_init(), split this function into two parts: a common part shared
between OF and non-OF, and the non-OF part.
The common part can take a block of function pointers, and the cache
ID (to cope with Aurora's DT specified ID.) Eliminate the redundant
setting of l2x0_base in the OF case, moving it to the non-OF init
function.
This allows us to localise the OF-specific initialisation handling
from the non-OF handling.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The revision namespace is specific to the L2 cache part, so don't name
these with generic identifiers, use a part specific identifier.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
cache_wait_way() is actually used to wait for a particular mask to
report clear; it's not really got much to do with cache ways at all.
Indeed, it gets used to wait for the C bit to clear on older caches.
Rename this with a more generic function name which better reflects
its purpose: l2c_wait_mask().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a generic helper function for way based operations. These are
always background operations, and thus have to be waited for before a
new operation is commenced. This helper extracts that requirement from
several locations in the code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split the cache unlock code out of l2x0_unlock(). We want to be able
to re-use this functionality later.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a generic function which always calls the set_debug method.
This will be used later in the series as some work-arounds require
that the debug register be written.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rename a few things to help distinguish their function(s):
l2x0_of_data -> l2c_init_data
setup -> of_parse
add of_ prefix to OF specific data
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove NULL initialisers, make these all __initconst structures, and
order their members in the same order as the structure declaration.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Update sunxi_defconfig and multi_v7 with all the latest Allwinner
additions.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
v3.16 that's dts fixes for clocks and enabling few features
that were still being discussed earlier:
- A bunch of omap clock related dts fixes queued by Tero Kristo.
- Enable parallel nand on am437x that was not merged earlier as
I requested more information about the muxing for it. And
we need to also enable ecc hardware support for am43xx.
- Enable the modem support for n900 that was dropped earlier
because we had to fix the related hwmod entry first with patch
ARM: OMAP2+: Fix ssi hwmod entry to allow idling.
- And finally, add the omap2 clock dts files. These will allow
us to enable the dt clocks and drop the legacy clocks for omap2
with a follow-up patch once the related clock driver binding
changes are merged.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJThiGbAAoJEBvUPslcq6VzM2MQAItHkURx2sINDYkB/ghkajFV
h8fvmOlFRQjiQ4V+J1MZXIEhU6Tx6xiOTCydhpCRPuDpnXiEAWXcJv42oqbkKeiB
fdlsMbfifnKax2HGPCqAbKNpdpjl65YiKTfpQvAhQ/iFGOHhczWbCKZ+xktk6K7X
mJFI68itHNZsp10NRwWXspzZaCAM2+LEGrXFIz6rryvbZDD07bFRi7bWsLT8MfzU
laTWQAwEjyjayQoBYJZem3c6I3wIiSL2MvB7fg0JOo7Xr6vkAXeaL3OqbKnMrK8D
4cd/Fh2BGPTmKC2bVugkIgkASmDOx3fHdJJ+NmwApcBUgGq1MOtEJ7CDsw36Qu/Y
Wl/5/8zoxvRr5PBM9/D4QPV2qDJ1iSqYx9hVt5DFIBCyJjy33bJpv9+j1017K6OE
RXFb+386yjPGfzwoCXaku9ijyfoBFe+7Ys8iZ10qJbK945klaWU5GA/6oL+dIBtZ
1XA3fiG1znGrks35+944dCuD9EUphrJ5ZJ0eZTc/PpE0QG8m4Kbp1Qr6KB7c07uL
4NgDG2iveWArGG0EtEJelacFb1EjsvLQ4qNNs+0ch5KBB3UB3NQoDRLL7arURyqo
nI8qRRKFgYMWlx7J7kckgNP35wJvLVQYVlExsAFE1YZBU+ABuDoAyta2ZTdE3A9H
5dxeTOYH83NcTV8c0Owq
=X+qx
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/dt-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dt fixes and and clocks for v3.16 merge window" from Tony Lindgren:
Most likely the last pull request from me for omap changes for
v3.16 that's dts fixes for clocks and enabling few features
that were still being discussed earlier:
- A bunch of omap clock related dts fixes queued by Tero Kristo.
- Enable parallel nand on am437x that was not merged earlier as
I requested more information about the muxing for it. And
we need to also enable ecc hardware support for am43xx.
- Enable the modem support for n900 that was dropped earlier
because we had to fix the related hwmod entry first with patch
ARM: OMAP2+: Fix ssi hwmod entry to allow idling.
- And finally, add the omap2 clock dts files. These will allow
us to enable the dt clocks and drop the legacy clocks for omap2
with a follow-up patch once the related clock driver binding
changes are merged.
* tag 'omap-for-v3.16/dt-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap2 clock data
ARM: dts: am437x-gp-evm: add support for parallel NAND flash
ARM: OMAP2+: gpmc: enable BCH_HW ecc-scheme for AM43xx platforms
ARM: dts: omap3 a83x: fix duplicate usb pin config
ARM: dts: omap3: set mcbsp2 status
ARM: dts: omap3-n900: Add modem support
ARM: dts: omap3-n900: Add SSI support
ARM: OMAP2+: Fix ssi hwmod entry to allow idling
ARM: dts: AM4372: clk: efuse based crystal frequency detect
ARM: dts: am43xx-clocks.dtsi: add ti, set-rate-parent to display clock path
ARM: dts: omap5-clocks.dtsi: add ti, set-rate-parent to dss_dss_clk
ARM: dts: omap4: add twd clock to DT
ARM: dts: omap54xx-clocks: Correct abe_iclk clock node
ARM: dts: omap54xx-clocks: remove the autoidle properties for clock nodes
ARM: dts: am43x-clock: add tbclk data for ehrpwm
ARM: dts: am33xx-clock: Fix ehrpwm tbclk data
ARM: dts: set 'ti,set-rate-parent' for dpll4_m5 path
ARM: dts: use ti,fixed-factor-clock for dpll4_m5x2_mul_ck
ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldo
Signed-off-by: Olof Johansson <olof@lixom.net>
When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with
PCI-capable devices (e.g. mach-virt with virtio-pci).
This patch allows PCI support to be selected for these SoCs by selecting
CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the
individual selections from multi-platform enabled SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- From Daniel Lezcano:
This patchset relies on the cpm_pm notifier to initiate the
powerdown sequence operations from pm.c instead cpuidle.c.
Thus the cpuidle driver is no longer dependent from arch
specific code as everything is called from the pm.c file.
Note, this is based on tags/exnos-mcpm and tags/samsung-clk
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTgm6MAAoJEA0Cl+kVi2xqXP0QAJm+Hu8vuwDd5XYzDwsbmzm0
lm173M2H22ZGT3jDcI77lAwBjoKnJE0Y/+h3Do8hOHtrX08TG9ziUf29dRfV2Vk/
svrf4i0W9MmB1v23WWomH1qgKWE8OAg7dJO3Snwr4ZvhgzFLirNiCzA2P03TmqWV
7fRc+Yauv+6+WkZGAhEqxC5sza+gAdyQarhoBVOB/cK3CVDfh1b31SMvWonnKwAW
676mGU5AdjETiUZZ9eA0Dhh3r1lSyyXmWUtdtDYulhyMt0uHdiJSir5tt9Elt1n3
i7jjNxyVe78WWe9sFd1xZBCuDH3gdVlYGHpmV35NXA8yOGs6XQju5bKh8LHOejoH
LaK9kzITdFo4GIJZpmmk/lx+c8EwL/bF1w6+FKrDWoKidv4bpYaRPIBMUqebSZb+
jGrC5ox5TzURGRUZ27iszePgcTcOEMWhPyUjr5yarL9r8Czhdmyl7S01jyrRAyNm
6FLl7yL1BXdk2qPk56ke9Ce7md0Db/nJ5l0fqWOy0TrOYAfGM0H4EMeP6GrfOXXi
wVIPOoUtH23kjCoazE2hgULCinwUPQ1SLnvNANnL0uFO1AJBqeAT2/n26ssXGA1I
0qg+6ULMZe8v1byxwmvAZxixTERZHxbrIBUgpkukf2mqSFRJURgm0aNDQJORkysQ
QnFRo+kmDXqJbPpBbUkw
=RacH
-----END PGP SIGNATURE-----
Merge tag 'exynos-cpuidle' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung exynos-cpuidle updates for v3.16" from Kukjin Kim:
- From Daniel Lezcano:
This patchset relies on the cpm_pm notifier to initiate the
powerdown sequence operations from pm.c instead cpuidle.c.
Thus the cpuidle driver is no longer dependent from arch
specific code as everything is called from the pm.c file.
* tag 'exynos-cpuidle' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (94 commits)
ARM: EXYNOS: Fix kernel panic when unplugging CPU1 on exynos
ARM: EXYNOS: Move the driver to drivers/cpuidle directory
ARM: EXYNOS: Cleanup all unneeded headers from cpuidle.c
ARM: EXYNOS: Pass the AFTR callback to the platform_data
ARM: EXYNOS: Move S5P_CHECK_SLEEP into pm.c
ARM: EXYNOS: Move the power sequence call in the cpu_pm notifier
ARM: EXYNOS: Move the AFTR state function into pm.c
ARM: EXYNOS: Encapsulate the AFTR code into a function
ARM: EXYNOS: Disable cpuidle for exynos5440
ARM: EXYNOS: Encapsulate boot vector code into a function for cpuidle
ARM: EXYNOS: Pass wakeup mask parameter to function for cpuidle
ARM: EXYNOS: Remove ifdef for scu_enable in pm
ARM: EXYNOS: Move scu_enable in the cpu_pm notifier
ARM: EXYNOS: Use the cpu_pm notifier for pm
ARM: EXYNOS: Fix S5P_WAKEUP_STAT call for cpuidle
ARM: EXYNOS: Move some code inside the idle_finisher for cpuidle
ARM: EXYNOS: Encapsulate register access inside a function for pm
ARM: EXYNOS: Change function name prefix for cpuidle
ARM: EXYNOS: Use cpuidle_register
ARM: EXYNOS: Prevent forward declaration for cpuidle
...
Signed-off-by: Olof Johansson <olof@lixom.net>
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTeoa3AAoJEA0Cl+kVi2xqSEgP/0FBT5Hz6aYmTs32Rs4fnPz/
232dV6GEWXLPWnxZNlRo4YlaLT0ZOU+BW17iWln5AnoqEEIwQjezMcDoQm0W7Di9
6gcocX58i7O319Bi6zgCeO1cN+0eo9GuIOX1gD7YghblKNcvx1JnEZ+lriFMSDZw
hM2nTk2JWTLniD6qlU/yf/sdJJI3O37QOgMnccXkzU/PFvNc2/8JYIZJ4FrfalMC
dYmy52QtvKl3vkxvCliVGhyZBm736G3rxkh4hgdI2pczBs6EkH7X7EuqngIaDGZ0
P+5SVcNEbUSWvtvHWRKK1DXv5IaSotfRciEX7OYqssJtQQa0P/MhtvhXCURHzxc4
WxpcPdHha6bHTMAAWtGEuRQ6ReuBGl88gvKWIMfYEK1+8vt1z0c3W3RzJ1hQ0mJ6
oRJA4CAhD9OW/vQaF0LwRPVEZGnPgkohN7Skp/25cKx0wkEQ9zDrSC0sm6jyJy9Y
d0lzsHJY+QRED2luvfSMcwC1xRX1W7w8Qs10rAgExU6zE3Um37nq1MWhx1Ep6GMp
F90mWsNzCfSv4w34i8U8Gy4BZCSpMo8U7z/ivQokAzM1c+mCbL5+teAt1WDbsTL2
Ythah64USFdtU56zzaVr6nLis1ASyfhkQSHDc/r9C3CxGMrdji6Tx41Sp8Z1+Mt9
Y+7h4J//YO+lHPEfi8OR
=PqTJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung clock updates for 3.16" from Kukjin Kim:
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
* tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (59 commits)
clk: exynos5420: Add 5800 specific clocks
dt-bindings: add documentation for Exynos3250 clock controller
ARM: S3C24XX: fix merge conflict
clk: samsung: exynos3250: Add clocks using common clock framework
drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support
ARM: S3C24XX: move S3C24XX clock Kconfig options to Samsung clock Kconfig file
ARM: select COMMON_CLK_SAMSUNG for ARCH_EXYNOS and ARCH_S3C64XX
clk: samsung: add new Kconfig for Samsung common clock option
ARM: S3C24XX: Remove omitted Kconfig selects and conditionals
clk: samsung: exynos5420: add more registers to restore list
clk: samsung: exynos5420: add misc clocks
clk: samsung: exynos5420: update clocks for MAU Block
clk: samsung: exynos5420: fix register offset for sclk_bpll
clk: samsung: exynos5420: correct sysmmu-mfc parent clocks
clk: samsung: exynos5420: update clocks for FSYS and FSYS2 blocks
clk: samsung: exynos5420: update clocks for WCORE block
clk: samsung: exynos5420: update clocks for PERIS and GEN blocks
clk: samsung: exynos5420: update clocks for PERIC block
clk: samsung: exynos5420: update clocks for DISP1 block
clk: samsung: exynos5420: update clocks for G2D and G3D blocks
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- adding MCPM backend support for SMP secondary boot and core switching
on Samsung's Exynos5420.
Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit)
using the "/dev/b.L_switcher" user interface. Secondary core boot-up has
also been tested on both the boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTeo2RAAoJEA0Cl+kVi2xqynAQAInNHE2zWbOj/h9VcOV4+Upt
VTobcgMiwEKZ530vkW3dq0acs24M6BU/OEBDP9qCPKG5q9qdjQcmiIlwjmzWiPJM
VBi05exFXAxcaOmj4SBl0rkFCHrpKu64B0YJrjKZz/zK9A1QN03kkYe8EYRnuwsH
w3FN61JX/S+4MBvdgDL1KAvciHoZvNjhrsOFfY24+0vAMaQzWVhps49Tkg675MHO
rZw9VV8nv0uJmOgFc8XnmlUe1DVTUHjBbCPC6Sy0H3H5DXzuMQOW1Y+qL0DLR9NJ
bZDPYVaqpYK2cWvXqjqSNJz3sNpZhrWZi4BrVdnmWSlzuLSF8/DZom4gv+SNnd8+
DrvP/4wqGTzuhWq/gr+9T+/Lz2qzlyr8dGy86ohtBLwMocYwpufaEqU7iKIOxCrb
IlpkM5EcstHKnSr8QinehVPGp8N1PqJDympYOgFb3hPDIDbKktNU2Wwgr4CDBN30
Qypd3+fHwU2SJtK34L5/+hDmxwQwB5gnpPbc//7Ir1Ld3ZTEXv9sn5Rtv0EXFK1E
Xx/C4B+2COi3IGbELqyS1ax4twJr/t1EwxjZgQZO1LT2B9CtQeKKdrG/IpI+J6wL
9qjIRv4i0tICkGXyu/wwwhLAHqpDQ+FebWAqM3llpIcoTjBy3BOdjZ+C2R0mkS94
X2dRzKw0dswv8GpBTAYm
=d5ZP
-----END PGP SIGNATURE-----
Merge tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Exynos MCPM support for v3.16" from Kukjin Kim:
- adding MCPM backend support for SMP secondary boot and core switching
on Samsung's Exynos5420.
Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit)
using the "/dev/b.L_switcher" user interface. Secondary core boot-up has
also been tested on both the boards.
* tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add MCPM call-back functions
ARM: dts: add CCI node for exynos5420
ARM: EXYNOS: Add generic cluster power control functions
ARM: EXYNOS: use generic exynos cpu power control functions
ARM: EXYNOS: Add generic cpu power control functions for exynos SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
- exynos4
: add hsotg device, exynos_usbphy nodes
: add PMU syscon and audio subsystem nodes
: replace number by macro in clock binding
- exynos4210-universal_c210
: add external sd card node and multimedia nodes
: enable USB functionality
- exynos4412-trats2
: enable usb nodes and usb gagdet functionality
: add cm36651 light/proximity sensor node
: fixed gpio key node
- exynos5250 and exynos5420
: add pmu syscon handle and sysreg system controller nodes
: add support for usb2phy
: replace number by macro in clock binding
: add USB 2.0 support on exynos5420
- exynos5420-peach-pit
: move dp hpd gpio pin to pinctrl_0
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTgm1wAAoJEA0Cl+kVi2xqfvoP/jTHjQhyccDTHA6B3UJ6fi3Q
NvVP67P1QrLHmzq66ZA08Db13pWHl+7jsS/nFJiX2/5tfMP1ISoZXcAZ3hDORqiS
0R3V3UBLFblHAu4SZMiCLHV//gpMTHDG1FrA/p9s7m89w+3P5AVNlG+f/mfGzkb3
vm5g5YMiAzyy5Mw2daMPtzbuEHt9htZpkh2DaT17dc+ej0bjBmEqEk/fmCHYPSYd
d5u7zf69vV4MaE4duYNmOqnzI3YBOIWHYUjpCZVKX1qU7+dfXB20mb+HcbF8LMbS
MyzwGNgpcvPx94K2OZU8rg5frErjucD5XRITGkEv0C7Z80uQLUDz7T3Mzmpc1duN
F0rEOSBKOiIuDcEMgUYjnQPTw1RwqcR4TcXSFyntt3bD0EWI5ZcKrrOuupHc1Q/J
+q4MUJrHuOhFZh/nzP/UrHQqbwBkkHYO9CUoUWtDYotbZH3b9aX+ZP3pD0naDMIl
iCj+CU8o+sKZFnBICyAfGzJg7t7MSJ9ZhQ3a/2T8xWTiN06jmVNj2FxsVCpaK4oH
sP1StBtwPq6d6c4GyU+w7EAnXiZ17ZdIIFYOgGj0yhsuIgJ14vacOSw0lIAaoKsT
Eo6NgFIcnHbbKyXZQlwBDKsiQ89fC2RO8A3LSOoH+XutGMk7gxcXdpAYe1YaWdeE
v/f+i6QATirHZeLW6Ue/
=QihP
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 2nd DT updates for v3.16" from Kukjin Kim:
exynos4
- add hsotg device, exynos_usbphy nodes
- add PMU syscon and audio subsystem nodes
- replace number by macro in clock binding
exynos4210-universal_c210
- add external sd card node and multimedia nodes
- enable USB functionality
exynos4412-trats2
- enable usb nodes and usb gagdet functionality
- add cm36651 light/proximity sensor node
- fixed gpio key node
exynos5250 and exynos5420
- add pmu syscon handle and sysreg system controller nodes
- add support for usb2phy
- replace number by macro in clock binding
- add USB 2.0 support on exynos5420
exynos5420-peach-pit
- move dp hpd gpio pin to pinctrl_0
* tag 'samsung-dt-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (21 commits)
ARM: dts: enable usb nodes for exynos4412-trats2
ARM: dts: add hsotg device node for exynos4
ARM: dts: add exynos_usbphy node for exynos4
ARM: dts: add PMU syscon node for exynos4
ARM: dts: add pmu syscon handle to exynos5420 hdmi
ARM: dts: add pmu syscon handle to exynos5250 hdmi
ARM: dts: replace number by macro in clock binding for exynos5420
ARM: dts: replace number by macro in clock binding for exynos5250
ARM: dts: replace number by macro in clock binding for exynos4
ARM: dts: add external sd card node for exynos4210-universal_c210
ARM: dts: add multimedia nodes for exynos4210-universal_c210
ARM: dts: enable USB functionality for exynos4210-universal_c210
ARM: dts: Enable USB gadget functionality for exynos4210-trats
ARM: dts: Add audio subsystem nodes to exynos4.dtsi
ARM: dts: fixed gpio key node for exynos4412-trats2
ARM: dts: add cm36651 light/proximity sensor node for exynos4412-trats2
ARM: dts: Add USB 2.0 support on exynos5420
ARM: dts: Add usb2phy support on exynos5420
ARM: dts: Add usb2phy to exynos5250
ARM: dts: Add sysreg sytem controller node to exynos5250 and exynos5420
...
- use a common macro v7_exit_coherency_flush macro instead of local function
- cleanup mach-exynos/Makefile and remove inclusion plat/cpu.h in mach-exynos
- migrate exynos macros from plat-samsung to mach-exynos
- cleanup s3c24xx debug macro/earlyprintk to remove arch dependency
- fixed compilation error for cpufreq due to moving header in this branch
: use of_machine_is_compatible() instead of soc_is_exynos...()
Note that based on tags/samsung-clk and tags/samsung-fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTgmooAAoJEA0Cl+kVi2xqvssQAIABfrljDPGkWlKMK0LClBMW
8Pq6n8wwbIhOJMvJjY1zvUA/6gvyWMmvPwlF23LWSKRsfGlH8xWNP9rLAamqsKyo
G/rPfSDDyL2iqH7CMdFaDPb8hgmvCNuW6pgBQ06OZRqTNbgNa/FABw5+ZdOiT/kD
Tf5OzVyD1KKcHxkOU8GoggLQsUHPGbsK9L9NmxWpKfpkuLzbMYHwgVhVsAfMqF4x
dqls9+/+npvP5V4PFbavIH1/XW7rXxj7QVAvT8Cr+0UrLlkfrJc7/F+7GA6n9+AD
7tOMf9Vm2Z39dvfdTHqmxAj04X8Ps6wr7N4y1ZPSTOe9AaqZb7MA/yspwTU9UxuT
0ASavDA/pPwZnw+IhBlhkv4pYVbggn38VrzkaTTRCJ61jQfyf15tNSW/S0DmE0bx
jGILG2p0JwxIRsymdZ9hdCKlr878nFB7F3zfrvrIk/4BShySVNh6bv4rd7KSteE2
9PPr1cDW73R0bthoklh437jC/EVa5dlQBhZBV3lC0AXxSkU3LM4IUjIy1VPLredk
3vcBMOgjU71tJQFakpGiclSlKTT3qZirO26+t9WIMryI5OhY0RGjG5GHFn9v8IFU
rOJ7cyzQYYH3XH0wqCdmZ8vs0UPdMHB5EN5V/sVeb7p4FwJK/9Xi5it/O5BPoL0p
+omq+5B3ZDDqz1kC8Twm
=zkqB
-----END PGP SIGNATURE-----
Merge tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.16" from Kukjin Kim:
- use a common macro v7_exit_coherency_flush macro instead of local function
- cleanup mach-exynos/Makefile and remove inclusion plat/cpu.h in mach-exynos
- migrate exynos macros from plat-samsung to mach-exynos
- cleanup s3c24xx debug macro/earlyprintk to remove arch dependency
- fixed compilation error for cpufreq due to moving header in this branch
: use of_machine_is_compatible() instead of soc_is_exynos...()
Note that based on tags/samsung-clk and tags/samsung-fixes.
* tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: dts: Remove g2d_pd node for exynos5420
ARM: dts: Remove mau_pd node for exynos5420
ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount
ARM: dts: disable MDMA1 node for exynos5420
ARM: EXYNOS: fix the secondary CPU boot of exynos4212
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device-tree file for APQ8084-MTP board, which belongs
to the Snapdragon 805 family.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add support for the Qualcomm Snapdragon 805 APQ8084 SoC. It is
used on APQ8084-MTP and other boards.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add information about the APQ8084 debug UART physical and virtual
addresses in the DEBUG_QCOM_UARTDM Kconfig help section.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board. Also, keep dtb build list and qcom_dt_match in sorted
order.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8660-surf.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Add GSBI node and configuration of GSBI controller
Signed-off-by: Kumar Gala <galak@codeaurora.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8960-cdp.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the
binding spec
* Add GSBI node and configuration of GSBI controller
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This has been unused since omap4 board files went away.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This adds support for the tsc2005 touchscreen
to the Nokia N900 DTS file.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Put architecture-specific assembly code where it belongs,
allowing for support of additional architectures such as arm64 in
the future.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
On sam9x5, dedicated CTS (and RTS) pins are unusable together with the
LCDC, the EMAC, or the MMC because they share the same line.
Moreover, the USART controller doesn't handle DTR/DSR/DCD/RI signals,
so we have to control them via GPIO.
This patch permits to use GPIOs to control the CTS/RTS/DTR/DSR/DCD/RI
signals.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This is needed for gpiod_get_direction().
Otherwise, it returns -EINVAL.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-apq8074-dragonboard.dts)
* Move spi pinctrl into board file
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the
binding spec
* Move timer node out of SoC container
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Now that CONFIG_USB_DEBUG is gone, remove it from a number of defconfig
files that were enabling it.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The content of /sys/devices/system/cpu/cpu*/online is still 1 for those
CPUs that the switcher has removed even though the global state in
/sys/devices/system/cpu/online is updated correctly.
It turns out that commit 0902a9044f ("Driver core: Use generic
offline/online for CPU offline/online") has changed the way those files
retrieve their content by relying on on the generic attribute handling
code. The switcher, by calling cpu_down() directly, bypasses this
handling and the attribute value doesn't get updated.
Fix this by calling device_offline()/device_online() instead.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
To allign the name with the other atl clock names:
atlclkin3_ck -> atl_clkin3_ck
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
OMAP2430 I2CHS modules require specific hardware ops to be used, so added
a new compatible string for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
OMAP2 has slightly different DPLL compared to later OMAP generations.
This patch adds support for the ti,omap2-dpll-core-clock and also adds
the bindings documentation.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Move the panel/encoder driver compatible-string converter from
arch/arm/mach-omap2/display.c to omapdss driver. That is a more logical
place for it, as it's really an omapdss internal hack.
The code is rewritten to follow the video node graph, starting from
omapdss. This removes the need to have the device compatible-string
database.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
c7a507eea1
(ASoC: fsi: fixup SND_SOC_DAIFMT_CBx_CFx flags)
fixuped FSI driver's behavior
which didn't match to ALSA flags.
But, it didn't care about armadillo800eva HDMI sound flags.
This patch fixed it.
Reported-by: Bui Duc Phuc(Fukuda) <bd-phuc@jinso.co.jp>
Reported-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
pcibios_penalize_isa_irq() is only implemented by x86 now, and legacy ISA
is not used by some architectures. Make pcibios_penalize_isa_irq() a
__weak function to simplify the code. This removes the need for new
platforms to add stub implementations of pcibios_penalize_isa_irq().
[bhelgaas: changelog, comments]
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on
am437x-gp-evm board.
(1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either
eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled:
(a) By dynamically driving following GPIO pin from software
SPI2_CS0(GPIO) == 0 NAND is selected (default)
SPI2_CS0(GPIO) == 1 eMMC is selected
(b) By statically using Jumper (J89) on the board
(2) As NAND device connnected to this board has page-size=4K and oob-size=224,
So ROM code expects boot-loaders to be flashed in BCH16 ECC scheme for
NAND boot.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tomi Valkeinen