Commit Graph

283 Commits

Author SHA1 Message Date
Arnd Bergmann ce8ccf21c0 Qualcomm driver updates for 5.12
The socinfo driver gains support for dumping information about the platform's
 PMICs, as well as new definitions for a number of platforms. The LLCC driver
 gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
 support for MSM8994 power domains. In addition to this it contains a few minor
 fixes in the ocmem, rpmh and llcc drivers.
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Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 5.12

The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.

* tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  soc: qcom: socinfo: Remove unwanted le32_to_cpu()
  soc: qcom: aoss: Add SM8350 compatible
  drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
  soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
  soc: qcom: socinfo: Fix off-by-one array index bounds check
  soc: qcom: socinfo: Add MDM9607 IDs
  soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
  soc: qcom: socinfo: Add SoC IDs for 630 family
  soc: qcom: socinfo: Open read access to all for debugfs
  soc: qcom: socinfo: add info from PMIC models array
  soc: qcom: socinfo: add several PMIC IDs
  soc: qcom: socinfo: add qrb5165 SoC ID
  soc: qcom: rpmh: Remove serialization of TCS commands
  soc: qcom: smem: use %*ph to print small buffer
  dt-bindings: soc: qcom: convert qcom,smem bindings to yaml
  drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
  soc: qcom: llcc-qcom: Add support for SM8250 SoC
  soc: qcom: llcc-qcom: Extract major hardware version
  dt-bindings: msm: Add LLCC for SM8250

Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:14:14 +01:00
CK Hu e1e4f7fea3 soc / drm: mediatek: Move mtk mutex driver to soc folder
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-02-04 22:55:46 +08:00
Arnd Bergmann d6d58c350f pm-domains:
- add support for MT8167
 - add support for regulator needed by a PM domain
 - make error message in deferred probe case better
 
 cmdq-helper:
 - remove arch specific flush function, use mailbox rx_callback instead
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Merge tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

pm-domains:
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better

cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead

* tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  dt-bindings: power: Add MT8167 power domains

Link: https://lore.kernel.org/r/5faa52c2-0ddb-b809-7444-ce6f6ff6d8ad@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:53:58 +01:00
Chun-Kuang Hu 1570db1da9 soc: mediatek: cmdq: Remove cmdq_pkt_flush()
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 12:35:46 +01:00
Fabien Parent 207f13b419 soc: mediatek: pm-domains: Add support for mt8167
Add the needed board data to support mt8167 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 11:19:30 +01:00
Rafał Miłecki 149ae80b1d soc: bcm: brcmstb: add stubs for getting platform IDs
Some brcmstb drivers may be shared with other SoC families. E.g. the
same USB PHY block is shared by brcmstb and BCM4908.

To avoid building brcmstb common code on non-brcmstb platforms we need
stubs for:
1. brcmstb_get_family_id()
2. brcmstb_get_product_id()
(to avoid "undefined reference to" errors).

With this change PHY_BRCM_USB will not have to unconditionally select
SOC_BRCMSTB anymore.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-20 12:07:23 -08:00
Alex Elder ce2ceb9b1c soc: qcom: mdt_loader: define stubs for COMPILE_TEST
Define stub functions for the exposed MDT functions in case
QCOM_MDT_LOADER is not configured.  This allows users of these
functions to link correctly for COMPILE_TEST builds without
QCOM_SCM enabled.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-09 13:51:36 -08:00
Manivannan Sadhasivam c4df37fe18 soc: qcom: llcc-qcom: Add support for SM8250 SoC
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:14 -06:00
Sai Prakash Ranjan 916c0c0552 soc: qcom: llcc-qcom: Extract major hardware version
The major hardware version of the LLCC IP is encoded in its
LLCC_COMMON_HW_INFO register. Extract the version and cache it in the
driver data so that it can be used to implement version specific
functionality like enabling Write sub cache for given SCID.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
[mani: splitted the version extract as a single patch and few cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:13 -06:00
Linus Torvalds 6daa90439e dmaengine updates for v5.11-rc1
New drivers/devices
   - Qualcomm ADM driver
   - Qualcomm GPI driver
   - Allwinner A100 DMA support
   - Microchip Sama7g5 support
   - Mediatek MT8516 apdma
 
 - Updates:
   - more updates to idxd driver and support for IAX config
   - runtime PM support for dw driver
 
 - TI keystone drivers for 5.11 included here due to dependency for TI
   drivers
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Merge tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "The last dmaengine updates for this year :)

  This contains couple of new drivers, new device support and updates to
  bunch of drivers.

  New drivers/devices:
   - Qualcomm ADM driver
   - Qualcomm GPI driver
   - Allwinner A100 DMA support
   - Microchip Sama7g5 support
   - Mediatek MT8516 apdma

  Updates:
   - more updates to idxd driver and support for IAX config
   - runtime PM support for dw driver
   - TI drivers"

* tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (75 commits)
  soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init
  dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
  dmaengine: ti: k3-udma: Initial support for K3 PKTDMA
  dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
  dmaengine: ti: k3-udma: Initial support for K3 BCDMA
  soc: ti: k3-ringacc: add AM64 DMA rings support.
  dmaengine: ti: Add support for k3 event routers
  dmaengine: ti: k3-psil: Add initial map for AM64
  dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 BCDMA
  dmaengine: dmatest: Use dmaengine_get_dma_device
  dmaengine: doc: client: Update for dmaengine_get_dma_device() usage
  dmaengine: Add support for per channel coherency handling
  dmaengine: of-dma: Add support for optional router configuration callback
  dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings
  dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev
  dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API
  dmaengine: ti: k3-udma: Add support for second resource range from sysfw
  dmaengine: ti: k3-udma: Wait for peer teardown completion if supported
  ...
2020-12-17 12:52:23 -08:00
Linus Torvalds 48c1c40ab4 ARM: SoC drivers for v5.11
There are a couple of subsystems maintained by other people that
 merge their drivers through the SoC tree, those changes include:
 
  - The SCMI firmware framework gains support for sensor notifications
    and for controlling voltage domains.
 
  - A large update for the Tegra memory controller driver, integrating
    it better with the interconnect framework
 
  - The memory controller subsystem gains support for Mediatek MT8192
 
  - The reset controller framework gains support for sharing pulsed
    resets
 
 For Soc specific drivers in drivers/soc, the main changes are
 
  - The Allwinner/sunxi MBUS gets a rework for the way it handles
    dma_map_ops and offsets between physical and dma address spaces.
 
  - An errata fix plus some cleanups for Freescale Layerscape SoCs
 
  - A cleanup for renesas drivers regarding MMIO accesses.
 
  - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains
 
  - New SoC specific drivers for Aspeed AST2600 LPC bus control
    and SoC identification.
 
  - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660
    and SDX55.
 
  - A rework of the TI AM33xx 'genpd' power domain support to use
    information from DT instead of platform data
 
  - Support for TI AM64x SoCs
 
  - Allow building some Amlogic drivers as modules instead of built-in
 
 Finally, there are numerous cleanups and smaller bug fixes for
 Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
 Renesas, and Xilinx SoCs.
 
 There is a trivial conflict in the cedrus driver, with two branches
 adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial
 remove/remove conflict in linux/dma-mapping.h.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are a couple of subsystems maintained by other people that merge
  their drivers through the SoC tree, those changes include:

   - The SCMI firmware framework gains support for sensor notifications
     and for controlling voltage domains.

   - A large update for the Tegra memory controller driver, integrating
     it better with the interconnect framework

   - The memory controller subsystem gains support for Mediatek MT8192

   - The reset controller framework gains support for sharing pulsed
     resets

  For Soc specific drivers in drivers/soc, the main changes are

   - The Allwinner/sunxi MBUS gets a rework for the way it handles
     dma_map_ops and offsets between physical and dma address spaces.

   - An errata fix plus some cleanups for Freescale Layerscape SoCs

   - A cleanup for renesas drivers regarding MMIO accesses.

   - New SoC specific drivers for Mediatek MT8192 and MT8183 power
     domains

   - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
     identification.

   - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
     SDX55.

   - A rework of the TI AM33xx 'genpd' power domain support to use
     information from DT instead of platform data

   - Support for TI AM64x SoCs

   - Allow building some Amlogic drivers as modules instead of built-in

  Finally, there are numerous cleanups and smaller bug fixes for
  Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
  Renesas, and Xilinx SoCs"

* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
  soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name
  memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
  memory: ti-emif-sram: only build for ARMv7
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  reset-controller: ti: force the write operation when assert or deassert
  ...
2020-12-16 16:38:41 -08:00
Grygorii Strashko d782298c6f soc: ti: k3-ringacc: add AM64 DMA rings support.
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.

The ring SW interface is similar to ringacc with some major architectural
differences, like

They are part of the DMA (BCDMA or PKTDMA).

They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).

The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201208090440.31792-17-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-11 21:20:09 +05:30
Arnd Bergmann 8dc0aac1cc Merge tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
drivers: soc: TI SOC changes for 5.11

- ti_sci changes towards DMSS support
- Static warning fixes
- Kconfig update for Keystone ARM64 socs
- AM64X SOC family support

* tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits)
  drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe
  soc: ti: Fix reference imbalance in knav_dma_probe
  soc: ti: pruss: Remove wrong check against *get_match_data return value
  soc: ti: Kconfig: Drop ARM64 SoC specific configs
  soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state'
  soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
  soc: ti: pm33xx: Remove set but unused variable 'ret'
  soc: ti: knav_dma: Fix a kernel function doc formatting issue
  soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
  soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
  soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
  soc: ti: knav_qmss: fix reference leak in knav_queue_probe
  soc: ti: k3-socinfo: Add entry for AM64X SoC family
  soc: ti: k3-ringacc: Use correct device for allocation in RING mode
  firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
  soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
  firmware: ti_sci: rm: Add new ops for ring configuration
  firmware: ti_sci: rm: Remove ring_get_config support
  firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
  soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
  ...

Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:54 +01:00
Arnd Bergmann a97d8ffac8 Merge tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.11

This adds support for the core power domains on MSM8916, MSM8939, SDM660
and SDX55. It adds SM8150 support to the last-level cache controller
driver and it makes it possible to build the Command DB and RPMh drivers
as modules.

It also contains a slew of smaller cleanups, style and bug fixes
throughout the various drivers.

* tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
  soc: qcom: rpmhpd: Add SDX55 power domains
  dt-bindings: power: Add rpm power domain bindings for sdx55
  soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
  samples: qmi: Constify static qmi ops
  soc: qcom: pdr: Constify static qmi structs
  soc: qcom: initialize local variable
  soc: qcom: socinfo: add soc ids for msm8953 variants
  soc: qcom: geni: Remove "iova" check
  soc: qcom: llcc: Add configuration data for SM8150
  dt-bindings: msm: Add LLCC for SM8150
  soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header
  soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'
  soc: qcom: rpmhpd: Provide some missing struct member descriptions
  soc: qcom: llcc-qcom: Fix expected kernel-doc formatting
  soc: qcom: smp2p: Remove unused struct attribute provide another
  soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers
  soc: qcom: smsm: Fix some kernel-doc formatting and naming problems
  soc: qcom: smem: Fix formatting and missing documentation issues
  soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'
  soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'
  ...

Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:52 +01:00
Yongqiang Niu 51c0e618b2 soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
MMSYS is the driver which controls the routing of these DDP components,
so the definition of the mtk_ddp_comp_id enum should be placed in mtk-mmsys.h

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201006193320.405529-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-28 00:34:23 +01:00
Chun-Kuang Hu a69dcdfc2d soc / drm: mediatek: cmdq: Remove timeout handler in helper function
For each client driver, its timeout handler need to dump hardware register
or its state machine information, and their way to detect timeout are
also different, so remove timeout handler in helper function and
let client driver implement its own timeout handler.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20201102000438.29225-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 23:35:34 +01:00
Weiyi Lu a49d5e7a89 soc: mediatek: pm-domains: Add support for mt8192
Add the needed board data to support mt8192 SoC.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Weiyi Lu <weiyi.lu@mediatek.com>
Link: https://lore.kernel.org/r/20201030113622.201188-17-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger eb9fa767fb soc: mediatek: pm-domains: Add support for mt8183
Add the needed board data to support mt8183 SoC.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-12-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger 928296ea5d soc: mediatek: pm_domains: Make bus protection generic
Bus protection is not exclusively done by calling the infracfg misc driver.
Make the calls for setting and clearing the bus protection generic so
that we can use other blocks for it as well.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Srujana Challa 956fb85218 octeontx2-pf: move lmt flush to include/linux/soc
On OcteonTX2 platform CPT instruction enqueue and NIX
packet send are only possible via LMTST operations which
uses LDEOR instruction. This patch moves lmt flush
function from OcteonTX2 nic driver to include/linux/soc
since it will be used by OcteonTX2 CPT and NIC driver for
LMTST.

Signed-off-by: Suheil Chandran <schandran@marvell.com>
Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-20 11:01:13 -08:00
Souradeep Chowdhury ded5ed04d8 soc: qcom: llcc: Add configuration data for SM8150
Add LLCC configuration data for SM8150 SoC which controls
LLCC behaviour.

Signed-off-by: Souradeep Chowdhury <schowdhu@codeaurora.org>
Link: https://lore.kernel.org/r/957e3ae50c75720ef6227529d5ce3d4b457802e9.1601452132.git.schowdhu@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-19 22:22:25 -06:00
Peter Ujfalusi 8c42379e40 soc: ti: k3-ringacc: Use correct device for allocation in RING mode
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.

If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Extend the ring configuration parameters with a device pointer to be used
for DMA API when the ring is configured in RING mode.

Extending the ring configuration struct will allow per ring selection of
device to be used for allocation, thus allowing per ring coherency.

To avoid regression, fall back to use the ringacc dev in case the alloc_dev
is not provided.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:05 -08:00
Peter Ujfalusi fed7552f1e firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
The ringacc driver has been converted to use the new set_cfg function to
configure the ring, the old config ops can be removed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:04 -08:00
Peter Ujfalusi 3c2017536f firmware: ti_sci: rm: Add new ops for ring configuration
The sysfw ring configuration message has been extended to include virtid
and asel value for the ring.
Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required
for DMA rings.

Instead of extending the current .config() ops - which would need same
patch change in the ringacc driver - add ti_sci_msg_rm_ring_cfg struct and
a new ops using it to configure the ring.

This will allow easy update path in case new members are added for the ring
configuration.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:02 -08:00
Peter Ujfalusi 4d8ddf673a firmware: ti_sci: rm: Remove ring_get_config support
The ring_get_cfg (0x1111 message) is not used and it is not supported by
sysfw for a long time.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:02 -08:00
Peter Ujfalusi ce1feed585 firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
Sysfw added 'extended_ch_type' to the tx_ch_cfg_req message which should be
used when BCDMA block copy channels are configured:
extended_ch_type = 0 : the channel is split tx channel (tchan)
extended_ch_type = 1 : the channel is block copy channel (bchan)

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:38:01 -08:00
Peter Ujfalusi 519c5c0c55 firmware: ti_sci: rm: Add support for second resource range
Sysfw added support for a second range in the resource range API to be able
to describe complex allocations mainly for DMA channels.

Update the ti_sci part to consider the second range as well.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:37:59 -08:00
Peter Ujfalusi 967a020bd3 firmware: ti_sci: Use struct ti_sci_resource_desc in get_range ops
Use the ti_sci_resource_desc directly and update it's start and num members
directly instead of requiring individual parameters for them.

This will allow easy extension of the RM parameters without changing API.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:37:59 -08:00
Peter Ujfalusi 1c552e08b2 firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel
The system controller's resource manager have support for configuring the
TDTYPE of TCHAN_CFG register on j721e.
With this parameter the teardown completion can be controlled:
TDTYPE == 0: Return without waiting for peer to complete the teardown
TDTYPE == 1: Wait for peer to complete the teardown

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-11-01 19:37:58 -08:00
Linus Torvalds 2e368dd2bb ARM: SoC-related driver updates
Various driver updates for platforms. A bulk of this is smaller fixes or
 cleanups, but some of the new material this time around is:
 
  - Support for Nvidia Tegra234 SoC
  - Ring accelerator support for TI AM65x
  - PRUSS driver for TI platforms
  - Renesas support for R-Car V3U SoC
  - Reset support for Cortex-M4 processor on i.MX8MQ
 
 There are also new socinfo entries for a handful of different SoCs
 and platforms.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms. A bulk of this is smaller fixes
  or cleanups, but some of the new material this time around is:

   - Support for Nvidia Tegra234 SoC

   - Ring accelerator support for TI AM65x

   - PRUSS driver for TI platforms

   - Renesas support for R-Car V3U SoC

   - Reset support for Cortex-M4 processor on i.MX8MQ

  There are also new socinfo entries for a handful of different SoCs and
  platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc
  soc: amlogic: pm-domains: use always-on flag
  reset: sti: reset-syscfg: fix struct description warnings
  reset: imx7: add the cm4 reset for i.MX8MQ
  dt-bindings: reset: imx8mq: add m4 reset
  reset: Fix and extend kerneldoc
  reset: reset-zynqmp: Added support for Versal platform
  dt-bindings: reset: Updated binding for Versal reset driver
  reset: imx7: Support module build
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  ...
2020-10-24 10:39:22 -07:00
Linus Torvalds e731f3146f ARM: SoC platform updates
SoC changes, a substantial part of this is cleanup of some of the older
 platforms that used to have a bunch of board files. In particular:
 
  - Removal of non-DT i.MX platforms that haven't seen activity in years,
    it's time to remove them.
  - A bunch of cleanup and removal of platform data for TI/OMAP platforms,
    moving over to genpd for power/reset control (yay!)
  - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
    closer to multiplatform support (not quite there yet, but getting
    close).
 
 THere are a few other changes too, smaller fixlets, etc. For new
 platform support, the primary ones re:
 
  - New SoC: Hisilicon SD5203, ARM926EJ-S platform.
  - Cpufreq support for i.MX7ULP
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "SoC changes, a substantial part of this is cleanup of some of the
  older platforms that used to have a bunch of board files.

  In particular:

   - Remove non-DT i.MX platforms that haven't seen activity in years,
     it's time to remove them.

   - A bunch of cleanup and removal of platform data for TI/OMAP
     platforms, moving over to genpd for power/reset control (yay!)

   - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
     closer to multiplatform support (not quite there yet, but getting
     close).

  There are a few other changes too, smaller fixlets, etc. For new
  platform support, the primary ones are:

   - New SoC: Hisilicon SD5203, ARM926EJ-S platform.

   - Cpufreq support for i.MX7ULP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
  ARM: mstar: Select MStar intc
  ARM: stm32: Replace HTTP links with HTTPS ones
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC
  ARM: omap3: enable off mode automatically
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: imx: Remove remnant board file support pieces
  ...
2020-10-24 10:33:08 -07:00
Linus Torvalds 531d29b0b6 IOMMU Updates for Linux v5.10
Including:
 
 	- ARM-SMMU Updates from Will:
 
 	  - Continued SVM enablement, where page-table is shared with
 	    CPU
 
 	  - Groundwork to support integrated SMMU with Adreno GPU
 
 	  - Allow disabling of MSI-based polling on the kernel
 	    command-line
 
 	  - Minor driver fixes and cleanups (octal permissions, error
 	    messages, ...)
 
 	- Secure Nested Paging Support for AMD IOMMU. The IOMMU will
 	  fault when a device tries DMA on memory owned by a guest. This
 	  needs new fault-types as well as a rewrite of the IOMMU memory
 	  semaphore for command completions.
 
 	- Allow broken Intel IOMMUs (wrong address widths reported) to
 	  still be used for interrupt remapping.
 
 	- IOMMU UAPI updates for supporting vSVA, where the IOMMU can
 	  access address spaces of processes running in a VM.
 
 	- Support for the MT8167 IOMMU in the Mediatek IOMMU driver.
 
 	- Device-tree updates for the Renesas driver to support r8a7742.
 
 	- Several smaller fixes and cleanups all over the place.
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Merge tag 'iommu-updates-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - ARM-SMMU Updates from Will:

      - Continued SVM enablement, where page-table is shared with CPU

      - Groundwork to support integrated SMMU with Adreno GPU

      - Allow disabling of MSI-based polling on the kernel command-line

      - Minor driver fixes and cleanups (octal permissions, error
        messages, ...)

 - Secure Nested Paging Support for AMD IOMMU. The IOMMU will fault when
   a device tries DMA on memory owned by a guest. This needs new
   fault-types as well as a rewrite of the IOMMU memory semaphore for
   command completions.

 - Allow broken Intel IOMMUs (wrong address widths reported) to still be
   used for interrupt remapping.

 - IOMMU UAPI updates for supporting vSVA, where the IOMMU can access
   address spaces of processes running in a VM.

 - Support for the MT8167 IOMMU in the Mediatek IOMMU driver.

 - Device-tree updates for the Renesas driver to support r8a7742.

 - Several smaller fixes and cleanups all over the place.

* tag 'iommu-updates-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (57 commits)
  iommu/vt-d: Gracefully handle DMAR units with no supported address widths
  iommu/vt-d: Check UAPI data processed by IOMMU core
  iommu/uapi: Handle data and argsz filled by users
  iommu/uapi: Rename uapi functions
  iommu/uapi: Use named union for user data
  iommu/uapi: Add argsz for user filled data
  docs: IOMMU user API
  iommu/qcom: add missing put_device() call in qcom_iommu_of_xlate()
  iommu/arm-smmu-v3: Add SVA device feature
  iommu/arm-smmu-v3: Check for SVA features
  iommu/arm-smmu-v3: Seize private ASID
  iommu/arm-smmu-v3: Share process page tables
  iommu/arm-smmu-v3: Move definitions to a header
  iommu/io-pgtable-arm: Move some definitions to a header
  iommu/arm-smmu-v3: Ensure queue is read after updating prod pointer
  iommu/amd: Re-purpose Exclusion range registers to support SNP CWWB
  iommu/amd: Add support for RMP_PAGE_FAULT and RMP_HW_ERR
  iommu/amd: Use 4K page for completion wait write-back semaphore
  iommu/tegra-smmu: Allow to group clients in same swgroup
  iommu/tegra-smmu: Fix iova->phys translation
  ...
2020-10-14 12:08:34 -07:00
AngeloGioacchino Del Regno 6d849653b0
regulator: qcom_smd: Add PM660/PM660L regulator support
The PM660 and PM660L are a very very common PMIC combo, found on
boards using the SDM630, SDM636, SDM660 (and SDA variants) SoC.

PM660 provides 6 SMPS and 19 LDOs (of which one is unaccesible),
while PM660L provides 5 SMPS (of which S3 and S4 are combined),
10 LDOs and a Buck-or-Boost (BoB) regulator.

The PM660L IC also provides other regulators that are very
specialized (for example, for the display) and will be managed
in the other appropriate drivers (for example, labibb).

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Link: https://lore.kernel.org/r/20200926125549.13191-6-kholk11@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-10-01 21:25:25 +01:00
Dennis YC Hsieh 23c22299cd soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
Add clear parameter to let client decide if
event should be clear to 0 after GCE receive it.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/1594136714-11650-9-git-send-email-dennis-yc.hsieh@mediatek.com
[mb: fix commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:39 +02:00
Dennis YC Hsieh 946f1792d3 soc: mediatek: cmdq: add jump function
Add jump function so that client can jump to any address which
contains instruction.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-8-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:38 +02:00
Dennis YC Hsieh 88a2ffc48d soc: mediatek: cmdq: add write_s_mask value function
add write_s_mask_value function in cmdq helper functions which
writes a constant value to address with mask and large dma
access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-7-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:36 +02:00
Dennis YC Hsieh 1af43fce81 soc: mediatek: cmdq: add write_s value function
add write_s function in cmdq helper functions which
writes a constant value to address with large dma
access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-6-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:35 +02:00
Dennis YC Hsieh d3b04aab06 soc: mediatek: cmdq: add read_s function
Add read_s function in cmdq helper functions which support read value from
register or dma physical address into gce internal register.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-5-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:34 +02:00
Dennis YC Hsieh 11c7842d41 soc: mediatek: cmdq: add write_s_mask function
add write_s_mask function in cmdq helper functions which
writes value contains in internal register to address
with mask and large dma access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-4-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:32 +02:00
Dennis YC Hsieh 5f6e560c2d soc: mediatek: cmdq: add write_s function
add write_s function in cmdq helper functions which
writes value contains in internal register to address
with large dma access support.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1594136714-11650-3-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-25 17:27:31 +02:00
Olof Johansson 465c335bb5 Samsung S3C24xx and S3C64xx machine code cleanup for v5.10
Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
 also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
 Bergmann work which Krzysztof Kozlowski took over, rebased and polished.
 
 The goal is to cleanup, merge and finally make the Samsung S3C24xx and
 S3C64xx architectures multiplatform.  The multiplatform did not happen
 yet here - just cleaning up and merging into one arch/arm/mach-s3c
 directory.  However this is step forward for multiplatform or at least
 to keep this code still maintainable.
 
 This pulls also branch with changes for Samsung SoC sound drivers from
 broonie/sound because the cleanups there were part of this series and
 all further patches depend on them.
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Merge tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung S3C24xx and S3C64xx machine code cleanup for v5.10

Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
also touches files shared with S5Pv210 and Exynos.  This is mostly Arnd
Bergmann work which Krzysztof Kozlowski took over, rebased and polished.

The goal is to cleanup, merge and finally make the Samsung S3C24xx and
S3C64xx architectures multiplatform.  The multiplatform did not happen
yet here - just cleaning up and merging into one arch/arm/mach-s3c
directory.  However this is step forward for multiplatform or at least
to keep this code still maintainable.

This pulls also branch with changes for Samsung SoC sound drivers from
broonie/sound because the cleanups there were part of this series and
all further patches depend on them.

* tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (62 commits)
  ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setup
  ARM: s3c: Cleanup from old plat-samsung include
  ARM: s3c: make headers local if possible
  ARM: s3c: move into a common directory
  ARM: s3c24xx: stop including mach/hardware.h from mach/io.h
  cpufreq: s3c24xx: move low-level clk reg access into platform code
  cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
  ARM: s3c: remove cpufreq header dependencies
  cpufreq: s3c24xx: split out registers
  fbdev: s3c2410fb: remove mach header dependency
  ARM: s3c24xx: bast: avoid irq_desc array usage
  ARM: s3c24xx: spi: avoid hardcoding fiq number in driver
  ARM: s3c24xx: include mach/irqs.h where needed
  ARM: s3c24xx: move s3cmci pinctrl handling into board files
  ARM: s3c24xx: move iis pinctrl config into boards
  ARM: s3c24xx: move spi fiq handler into platform
  ARM: s3c: adc: move header to linux/soc/samsung
  ARM: s3c24xx: move irqchip driver back into platform
  ARM: s3c24xx: move regs-spi.h into spi driver
  ARM: s3c64xx: remove mach/hardware.h
  ...

Link: https://lore.kernel.org/r/20200831154751.7551-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13 11:15:01 -07:00
Miles Chen c2c59456e1 iommu/mediatek: Check 4GB mode by reading infracfg
In previous discussion [1] and [2], we found that it is risky to
use max_pfn or totalram_pages to tell if 4GB mode is enabled.

Check 4GB mode by reading infracfg register, remove the usage
of the un-exported symbol max_pfn.

This is a step towards building mtk_iommu as a kernel module.

[1] https://lore.kernel.org/lkml/20200603161132.2441-1-miles.chen@mediatek.com/
[2] https://lore.kernel.org/lkml/20200604080120.2628-1-miles.chen@mediatek.com/
[3] https://lore.kernel.org/lkml/20200715205120.GA778876@bogus/

Cc: Mike Rapoport <rppt@linux.ibm.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Yong Wu <yong.wu@mediatek.com>
Cc: Yingjoe Chen <yingjoe.chen@mediatek.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Joerg Roedel <joro@8bytes.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20200904104038.4979-1-miles.chen@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2020-09-04 13:20:36 +02:00
Arnd Bergmann c38758e3d5 cpufreq: s3c24xx: move low-level clk reg access into platform code
Rather than have the cpufreq drivers touch include the
common headers to get the constants, add a small indirection.
This is still not the proper way that would do this through
the common clk API, but it lets us kill off the header file
usage.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-37-krzk@kernel.org
[krzk: Rebase and fix -Wold-style-definition]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-20 17:53:22 +02:00
Arnd Bergmann 44c01f5ce1 cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
There are two identical copies of the s3c2412_cpufreq_setrefresh
function: a static one in the cpufreq driver and a global
version in iotiming-s3c2412.c.

As the function requires the use of a hardcoded register address
from a header that we want to not be visible to drivers, just
move the existing global function and add a declaration in
one of the cpufreq header files.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-36-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-20 17:52:54 +02:00
Arnd Bergmann 81b11a6a09 ARM: s3c: remove cpufreq header dependencies
The cpufreq drivers are split between the machine directory
and the drivers/cpufreq directory. In order to share header
files after we convert s3c to multiplatform, those headers
have to live in a different global location.

Move them to linux/soc/samsung/ in lack of a better place.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-35-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-20 17:52:05 +02:00
Arnd Bergmann 7dbad03ebc ARM: s3c: adc: move header to linux/soc/samsung
There are multiple drivers using the private adc interface.
It seems unlikely that they would ever get converted to iio,
so make the current state official by making the header file
global.

The s3c2410_ts driver needs a couple of register definitions
as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Sebastian Reichel <sre@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-22-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19 21:44:11 +02:00
Arnd Bergmann 17132da70e ARM: samsung: move pm check code to drivers/soc
This is the only part of plat-samsung that is really
shared between the s3c and s5p ports. Moving it to
drivers/soc/ lets us make them completely independent.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200806182059.2431-16-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19 21:23:46 +02:00
Lokesh Vutla 53bf2b0e4e firmware: ti_sci: Add support for getting resource with subtype
With SYSFW ABI 3.0 changes, interrupts coming out of an interrupt
controller is identified by a type and it is consistent across SoCs.
Similarly global events for Interrupt aggregator. So add an API to get
resource range using a resource type.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20200806074826.24607-4-lokeshvutla@ti.com
2020-08-16 22:00:22 +01:00
Alexander A. Klimov 7f317d3490 include/: replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: http://lkml.kernel.org/r/20200726110117.16346-1-grandmaster@al2klimov.de
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-08-12 10:57:59 -07:00
Arnd Bergmann 9c52a2647a SOC: TI Keystone driver update for v5.9
- TI K3 Ring Accelerator updates
  - Few non critical warining fixes
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Merge tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI Keystone driver update for v5.9

 - TI K3 Ring Accelerator updates
 - Few non critical warining fixes

* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
  soc: ti: k3: fix semicolon.cocci warnings
  soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
  dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
  soc: ti: k3-ringacc: separate soc specific initialization
  soc: ti: k3-ringacc: add request pair of rings api.
  soc: ti: k3-ringacc: add ring's flags to dump
  soc: ti: k3-ringacc: Move state tracking variables under a struct
  dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema

Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27 14:24:51 +02:00
Alexander A. Klimov a6df49f422 firmware: ti_sci: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:44:52 -07:00
Randy Dunlap 2ea17d504a soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
Drop the repeated word "an" in a comment.
Insert "and" between "source" and "destination" as is done a few
lines earlier.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:42:03 -07:00
Grygorii Strashko 43148b1cab soc: ti: k3-ringacc: add request pair of rings api.
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most cases Rings are used with DMA channels, which need to
request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-07-24 14:19:12 -07:00
Dennis YC Hsieh 7de796cac4 soc: mediatek: cmdq: add set event function
Add set event function in cmdq helper functions to set specific event.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1592749115-24158-12-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:21:00 +02:00
Dennis YC Hsieh 995818588b soc: mediatek: cmdq: export finalize function
Export finalize function to client which helps append eoc and jump
command to pkt. Let client decide call finalize or not.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/1592749115-24158-9-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:12:46 +02:00
Dennis YC Hsieh 613c2e2c7e soc: mediatek: cmdq: add assign function
Add assign function in cmdq helper which assign constant value into
internal register by index.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1592749115-24158-3-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-06-22 13:03:05 +02:00
Enric Balletbo i Serra 2c758e301e soc / drm: mediatek: Move routing control to mmsys device
Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
Those functions will allow DRM driver and others to control the data
path routing.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-04-13 13:01:16 +02:00
Linus Torvalds d18292dc07 ARM: driver updates
These are the usual updates for SoC specific device drivers and related
 subsystems that don't have their own top-level maintainers:
 
 - ARM SCMI/SCPI updates to allow pluggable transport layers
 
 - TEE subsystem cleanups
 
 - A new driver for the Amlogic secure power domain controller
 
 - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and
   TI OMAP2+ sysc drivers.
 
 - Qualcomm SoC driver updates, including a new library module for
   "protection domain" notifications
 
 - Lots of smaller bugfixes and cleanups in other drivers
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "These are the usual updates for SoC specific device drivers and
  related subsystems that don't have their own top-level maintainers:

   - ARM SCMI/SCPI updates to allow pluggable transport layers

   - TEE subsystem cleanups

   - A new driver for the Amlogic secure power domain controller

   - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU
     and TI OMAP2+ sysc drivers.

   - Qualcomm SoC driver updates, including a new library module for
     "protection domain" notifications

   - Lots of smaller bugfixes and cleanups in other drivers"

* tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits)
  soc: fsl: qe: fix sparse warnings for ucc_slow.c
  soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
  soc: fsl: qe: fix sparse warnings for ucc_fast.c
  soc: fsl: qe: fix sparse warnings for qe_ic.c
  soc: fsl: qe: fix sparse warnings for ucc.c
  soc: fsl: qe: fix sparse warning for qe_common.c
  soc: fsl: qe: fix sparse warnings for qe.c
  soc: qcom: Fix QCOM_APR dependencies
  soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
  soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
  firmware: imx: add COMPILE_TEST for IMX_SCU driver
  soc: imx: gpc: fix power up sequencing
  soc: imx: increase build coverage for imx8m soc driver
  soc: qcom: apr: Add avs/audio tracking functionality
  dt-bindings: soc: qcom: apr: Add protection domain bindings
  soc: qcom: Introduce Protection Domain Restart helpers
  devicetree: bindings: firmware: add ipq806x to qcom_scm
  memory: tegra: Correct debugfs clk rate-range on Tegra124
  memory: tegra: Correct debugfs clk rate-range on Tegra30
  memory: tegra: Correct debugfs clk rate-range on Tegra20
  ...
2020-04-03 15:05:35 -07:00
Bjorn Andersson 86332c3434
regulator: qcom_smd: Add pmi8994 regulator support
The pmi8994 is commonly found on MSM8996 based devices, such as the
Dragonboard 820c, where it supplies power to a number of LDOs on the
primary PMIC.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200324041424.518160-1-bjorn.andersson@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-24 17:32:33 +00:00
Sibi Sankar 8347356626 soc: qcom: apr: Add avs/audio tracking functionality
Use PDR helper functions to track the protection domains that the apr
services are dependent upon on SDM845 SoC, specifically the "avs/audio"
service running on ADSP Q6.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-4-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:38:50 -07:00
Sibi Sankar fbe639b44a soc: qcom: Introduce Protection Domain Restart helpers
Qualcomm SoCs (starting with MSM8998) allow for multiple protection domains
to run on the same Q6 sub-system. This allows for services like ATH10K WLAN
FW to have their own separate address space and crash/recover without
disrupting the modem and other PDs running on the same sub-system. The PDR
helpers introduces an abstraction that allows for tracking/controlling the
life cycle of protection domains running on various Q6 sub-systems.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-14 22:38:42 -07:00
Linus Torvalds eab3540562 ARM: SoC-related driver updates
Various driver updates for platforms:
 
  - Nvidia: Fuse support for Tegra194, continued memory controller pieces
    for Tegra30
 
  - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC
 
  - NXP/FSL: i.MX8MP SoC driver pieces
 
  - TI Keystone: ring accelerator driver
 
  - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
 
  - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
    communication for power management
 
  - Overall support patch set for cpuidle on more complex hierarchies
    (PSCI-based)
 
 + Misc cleanups, refactorings of Marvell, TI, other platforms.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - Nvidia: Fuse support for Tegra194, continued memory controller
     pieces for Tegra30

   - NXP/FSL: Refactorings of QuickEngine drivers to support
     ARM/ARM64/PPC

   - NXP/FSL: i.MX8MP SoC driver pieces

   - TI Keystone: ring accelerator driver

   - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

   - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
     communication for power management

   - Overall support patch set for cpuidle on more complex hierarchies
     (PSCI-based)

  and misc cleanups, refactorings of Marvell, TI, other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
  drivers: soc: xilinx: Use mailbox IPI callback
  dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
  drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
  MAINTAINERS: Add brcmstb PCIe controller entry
  soc/tegra: fuse: Unmap registers once they are not needed anymore
  soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
  soc/tegra: fuse: Warn if straps are not ready
  soc/tegra: fuse: Cache values of straps and Chip ID registers
  memory: tegra30-emc: Correct error message for timed out auto calibration
  memory: tegra30-emc: Firm up hardware programming sequence
  memory: tegra30-emc: Firm up suspend/resume sequence
  soc/tegra: regulators: Do nothing if voltage is unchanged
  memory: tegra: Correct reset value of xusb_hostr
  soc/tegra: fuse: Add APB DMA dependency for Tegra20
  bus: tegra-aconnect: Remove PM_CLK dependency
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  memory: tegra: Add support for the Tegra194 memory controller
  memory: tegra: Only include support for enabled SoCs
  memory: tegra: Support DVFS on Tegra186 and later
  ...
2020-02-08 14:04:19 -08:00
Linus Torvalds 9f68e3655a drm pull for 5.6-rc1
uapi:
 - dma-buf heaps added (and fixed)
 - command line add support for panel oreientation
 - command line allow overriding penguin count
 
 drm:
 - mipi dsi definition updates
 - lockdep annotations for dma_resv
 - remove dma-buf kmap/kunmap support
 - constify fb_ops in all fbdev drivers
 - MST fix for daisy chained hotplug-
 - CTA-861-G modes with VIC >= 193 added
 - fix drm_panel_of_backlight export
 - LVDS decoder support
 - more device based logging support
 - scanline alighment for dumb buffers
 - MST DSC helpers
 
 scheduler:
 - documentation fixes
 - job distribution improvements
 
 panel:
 - Logic PD type 28 panel support
 - Jimax8729d MIPI-DSI
 - igenic JZ4770
 - generic DSI devicetree bindings
 - sony acx424AKP panel
 - Leadtek LTK500HD1829
 - xinpeng XPP055C272
 - AUO B116XAK01
 - GiantPlus GPM940B0
 - BOE NV140FHM-N49
 - Satoz SAT050AT40H12R2
 - Sharp LS020B1DD01D panels.
 
 ttm:
 - use blocking WW lock
 
 i915:
 - hw/uapi state separation
 - Lock annotation improvements
 - selftest improvements
 - ICL/TGL DSI VDSC support
 - VBT parsing improvments
 - Display refactoring
 - DSI updates + fixes
 - HDCP 2.2 for CFL
 - CML PCI ID fixes
 - GLK+ fbc fix
 - PSR fixes
 - GEN/GT refactor improvments
 - DP MST fixes
 - switch context id alloc to xarray
 - workaround updates
 - LMEM debugfs support
 - tiled monitor fixes
 - ICL+ clock gating programming removed
 - DP MST disable sequence fixed
 - LMEM discontiguous object maps
 - prefaulting for discontiguous objects
 - use LMEM for dumb buffers if possible
 - add LMEM mmap support
 
 amdgpu:
 - enable sync object timelines for vulkan
 - MST atomic routines
 - enable MST DSC support
 - add DMCUB display microengine support
 - DC OEM i2c support
 - Renoir DC fixes
 - Initial HDCP 2.x support
 - BACO support for Arcturus
 - Use BACO for runtime PM power save
 - gfxoff on navi10
 - gfx10 golden updates and fixes
 - DCN support on POWER
 - GFXOFF for raven1 refresh
 - MM engine idle handlers cleanup
 - 10bpc EDP panel fixes
 - renoir watermark fixes
 - SR-IOV fixes
 - Arcturus VCN fixes
 - GDDR6 training fixes
 - freesync fixes
 - Pollock support
 
 amdkfd:
 - unify more codepath with amdgpu
 - use KIQ to setup HIQ rather than MMIO
 
 radeon:
 - fix vma fault handler race
 - PPC DMA fix
 - register check fixes for r100/r200
 
 nouveau:
 - mmap_sem vs dma_resv fix
 - rewrite the ACR secure boot code for Turing
 - TU10x graphics engine support (TU11x pending)
 - Page kind mapping for turing
 - 10-bit LUT support
 - GP10B Tegra fixes
 - HD audio regression fix
 
 hisilicon/hibmc:
 - use generic fbdev code and helpers
 
 rockchip:
 - dsi/px30 support
 
 virtio:
 - fb damage support
 - static some functions
 
 vc4:
 - use dma_resv lock wrappers
 
 msm:
 - use dma_resv lock wrappers
 - sc7180 display + DSI support
 - a618 support
 - UBWC support improvements
 
 vmwgfx:
 - updates + new logging uapi
 
 exynos:
 - enable/disable callback cleanups
 
 etnaviv:
 - use dma_resv lock wrappers
 
 atmel-hlcdc:
 - clock fixes
 
 mediatek:
 - cmdq support
 - non-smooth cursor fixes
 - ctm property support
 
 sun4i:
 - suspend support
 - A64 mipi dsi support
 
 rcar-du:
 - Color management module support
 - LVDS encoder dual-link support
 - R8A77980 support
 
 analogic:
 - add support for an6345
 
 ast:
 - atomic modeset support
 - primary plane garbage fix
 
 arcgpu:
 - fixes for fourcc handling
 
 tegra:
 - minor fixes and improvments
 
 mcde:
 - vblank support
 
 meson:
 - OSD1 plane AFBC commit
 
 gma500:
 - add pageflip support
 - reomve global drm_dev
 
 komeda:
 - tweak debugfs output
 - d32 support
 - runtime PM suppotr
 
 udl:
 - use generic shmem helpers
 - cleanup and fixes
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Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Davbe Airlie:
 "This is the main pull request for graphics for 5.6. Usual selection of
  changes all over.

  I've got one outstanding vmwgfx pull that touches mm so kept it
  separate until after all of this lands. I'll try and get it to you
  soon after this, but it might be early next week (nothing wrong with
  code, just my schedule is messy)

  This also hits a lot of fbdev drivers with some cleanups.

  Other notables:
   - vulkan timeline semaphore support added to syncobjs
   - nouveau turing secureboot/graphics support
   - Displayport MST display stream compression support

  Detailed summary:

  uapi:
   - dma-buf heaps added (and fixed)
   - command line add support for panel oreientation
   - command line allow overriding penguin count

  drm:
   - mipi dsi definition updates
   - lockdep annotations for dma_resv
   - remove dma-buf kmap/kunmap support
   - constify fb_ops in all fbdev drivers
   - MST fix for daisy chained hotplug-
   - CTA-861-G modes with VIC >= 193 added
   - fix drm_panel_of_backlight export
   - LVDS decoder support
   - more device based logging support
   - scanline alighment for dumb buffers
   - MST DSC helpers

  scheduler:
   - documentation fixes
   - job distribution improvements

  panel:
   - Logic PD type 28 panel support
   - Jimax8729d MIPI-DSI
   - igenic JZ4770
   - generic DSI devicetree bindings
   - sony acx424AKP panel
   - Leadtek LTK500HD1829
   - xinpeng XPP055C272
   - AUO B116XAK01
   - GiantPlus GPM940B0
   - BOE NV140FHM-N49
   - Satoz SAT050AT40H12R2
   - Sharp LS020B1DD01D panels.

  ttm:
   - use blocking WW lock

  i915:
   - hw/uapi state separation
   - Lock annotation improvements
   - selftest improvements
   - ICL/TGL DSI VDSC support
   - VBT parsing improvments
   - Display refactoring
   - DSI updates + fixes
   - HDCP 2.2 for CFL
   - CML PCI ID fixes
   - GLK+ fbc fix
   - PSR fixes
   - GEN/GT refactor improvments
   - DP MST fixes
   - switch context id alloc to xarray
   - workaround updates
   - LMEM debugfs support
   - tiled monitor fixes
   - ICL+ clock gating programming removed
   - DP MST disable sequence fixed
   - LMEM discontiguous object maps
   - prefaulting for discontiguous objects
   - use LMEM for dumb buffers if possible
   - add LMEM mmap support

  amdgpu:
   - enable sync object timelines for vulkan
   - MST atomic routines
   - enable MST DSC support
   - add DMCUB display microengine support
   - DC OEM i2c support
   - Renoir DC fixes
   - Initial HDCP 2.x support
   - BACO support for Arcturus
   - Use BACO for runtime PM power save
   - gfxoff on navi10
   - gfx10 golden updates and fixes
   - DCN support on POWER
   - GFXOFF for raven1 refresh
   - MM engine idle handlers cleanup
   - 10bpc EDP panel fixes
   - renoir watermark fixes
   - SR-IOV fixes
   - Arcturus VCN fixes
   - GDDR6 training fixes
   - freesync fixes
   - Pollock support

  amdkfd:
   - unify more codepath with amdgpu
   - use KIQ to setup HIQ rather than MMIO

  radeon:
   - fix vma fault handler race
   - PPC DMA fix
   - register check fixes for r100/r200

  nouveau:
   - mmap_sem vs dma_resv fix
   - rewrite the ACR secure boot code for Turing
   - TU10x graphics engine support (TU11x pending)
   - Page kind mapping for turing
   - 10-bit LUT support
   - GP10B Tegra fixes
   - HD audio regression fix

  hisilicon/hibmc:
   - use generic fbdev code and helpers

  rockchip:
   - dsi/px30 support

  virtio:
   - fb damage support
   - static some functions

  vc4:
   - use dma_resv lock wrappers

  msm:
   - use dma_resv lock wrappers
   - sc7180 display + DSI support
   - a618 support
   - UBWC support improvements

  vmwgfx:
   - updates + new logging uapi

  exynos:
   - enable/disable callback cleanups

  etnaviv:
   - use dma_resv lock wrappers

  atmel-hlcdc:
   - clock fixes

  mediatek:
   - cmdq support
   - non-smooth cursor fixes
   - ctm property support

  sun4i:
   - suspend support
   - A64 mipi dsi support

  rcar-du:
   - Color management module support
   - LVDS encoder dual-link support
   - R8A77980 support

  analogic:
   - add support for an6345

  ast:
   - atomic modeset support
   - primary plane garbage fix

  arcgpu:
   - fixes for fourcc handling

  tegra:
   - minor fixes and improvments

  mcde:
   - vblank support

  meson:
   - OSD1 plane AFBC commit

  gma500:
   - add pageflip support
   - reomve global drm_dev

  komeda:
   - tweak debugfs output
   - d32 support
   - runtime PM suppotr

  udl:
   - use generic shmem helpers
   - cleanup and fixes"

* tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits)
  drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing
  drm/nouveau/acr: return error when registering LSF if ACR not supported
  drm/nouveau/disp/gv100-: not all channel types support reporting error codes
  drm/nouveau/disp/nv50-: prevent oops when no channel method map provided
  drm/nouveau: support synchronous pushbuf submission
  drm/nouveau: signal pending fences when channel has been killed
  drm/nouveau: reject attempts to submit to dead channels
  drm/nouveau: zero vma pointer even if we only unreference it rather than free
  drm/nouveau: Add HD-audio component notifier support
  drm/nouveau: fix build error without CONFIG_IOMMU_API
  drm/nouveau/kms/nv04: remove set but not used variable 'width'
  drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector'
  drm/nouveau/mmu: fix comptag memory leak
  drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc
  drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping
  drm/exynos: Rename Exynos to lowercase
  drm/exynos: change callback names
  drm/mst: Don't do atomic checks over disabled managers
  drm/amdgpu: add the lost mutex_init back
  drm/amd/display: skip opp blank or unblank if test pattern enabled
  ...
2020-01-30 08:04:01 -08:00
Linus Torvalds 33c84e89ab SCSI misc on 20200129
This series is slightly unusual because it includes Arnd's compat
 ioctl tree here:
 
 1c46a2cf2d Merge tag 'block-ioctl-cleanup-5.6' into 5.6/scsi-queue
 
 Excluding Arnd's changes, this is mostly an update of the usual
 drivers: megaraid_sas, mpt3sas, qla2xxx, ufs, lpfc, hisi_sas.  There
 are a couple of core and base updates around error propagation and
 atomicity in the attribute container base we use for the SCSI
 transport classes.  The rest is minor changes and updates.
 
 Signed-off-by: James E.J. Bottomley <jejb@linux.ibm.com>
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Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI updates from James Bottomley:
 "This series is slightly unusual because it includes Arnd's compat
  ioctl tree here:

    1c46a2cf2d Merge tag 'block-ioctl-cleanup-5.6' into 5.6/scsi-queue

  Excluding Arnd's changes, this is mostly an update of the usual
  drivers: megaraid_sas, mpt3sas, qla2xxx, ufs, lpfc, hisi_sas.

  There are a couple of core and base updates around error propagation
  and atomicity in the attribute container base we use for the SCSI
  transport classes.

  The rest is minor changes and updates"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (149 commits)
  scsi: hisi_sas: Rename hisi_sas_cq.pci_irq_mask
  scsi: hisi_sas: Add prints for v3 hw interrupt converge and automatic affinity
  scsi: hisi_sas: Modify the file permissions of trigger_dump to write only
  scsi: hisi_sas: Replace magic number when handle channel interrupt
  scsi: hisi_sas: replace spin_lock_irqsave/spin_unlock_restore with spin_lock/spin_unlock
  scsi: hisi_sas: use threaded irq to process CQ interrupts
  scsi: ufs: Use UFS device indicated maximum LU number
  scsi: ufs: Add max_lu_supported in struct ufs_dev_info
  scsi: ufs: Delete is_init_prefetch from struct ufs_hba
  scsi: ufs: Inline two functions into their callers
  scsi: ufs: Move ufshcd_get_max_pwr_mode() to ufshcd_device_params_init()
  scsi: ufs: Split ufshcd_probe_hba() based on its called flow
  scsi: ufs: Delete struct ufs_dev_desc
  scsi: ufs: Fix ufshcd_probe_hba() reture value in case ufshcd_scsi_add_wlus() fails
  scsi: ufs-mediatek: enable low-power mode for hibern8 state
  scsi: ufs: export some functions for vendor usage
  scsi: ufs-mediatek: add dbg_register_dump implementation
  scsi: qla2xxx: Fix a NULL pointer dereference in an error path
  scsi: qla1280: Make checking for 64bit support consistent
  scsi: megaraid_sas: Update driver version to 07.713.01.00-rc1
  ...
2020-01-29 18:16:16 -08:00
Olof Johansson 684415d0de cmdq:
- clean ups of unused code and debuggability
 - add cmdq_instruction to make the function call interface more readable
 - add functions for polling and providing info for the user of cmdq
 
 scpsys:
 - add bindings for MT6765
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Merge tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

cmdq:
- clean ups of unused code and debuggability
- add cmdq_instruction to make the function call interface more readable
- add functions for polling and providing info for the user of cmdq

scpsys:
- add bindings for MT6765

* tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: mediatek: add MT6765 power dt-bindings
  soc: mediatek: cmdq: delete not used define
  soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
  soc: mediatek: cmdq: add polling function
  soc: mediatek: cmdq: define the instruction struct
  soc: mediatek: cmdq: remove OR opertaion from err return

Link: https://lore.kernel.org/r/9b365e76-e346-f813-d750-d7cfd0d16e4e@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-20 11:26:10 -08:00
Olof Johansson 2ced5a3449 SOC: TI Keystone Ring Accelerator driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
 enable straightforward passing of work between a producer and a consumer.
 There is one RINGACC module per NAVSS on TI AM65x SoCs.
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Merge tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI Keystone Ring Accelerator driver

The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.

* tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: k3: add navss ringacc driver
  bindings: soc: ti: add documentation for k3 ringacc

Link: https://lore.kernel.org/r/1579205259-4845-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17 11:29:49 -08:00
Grygorii Strashko 3277e8aa25 soc: ti: k3: add navss ringacc driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.

The RINGACC converts constant-address read and write accesses to equivalent
read or write accesses to a circular data structure in memory. The RINGACC
eliminates the need for each DMA controller which needs to access ring
elements from having to know the current state of the ring (base address,
current offset). The DMA controller performs a read or write access to a
specific address range (which maps to the source interface on the RINGACC)
and the RINGACC replaces the address for the transaction with a new address
which corresponds to the head or tail element of the ring (head for reads,
tail for writes). Since the RINGACC maintains the state, multiple DMA
controllers or channels are allowed to coherently share the same rings as
applicable. The RINGACC is able to place data which is destined towards
software into cached memory directly.

Supported ring modes:
- Ring Mode
- Messaging Mode
- Credentials Mode
- Queue Manager Mode

TI-SCI integration:

Texas Instrument's System Control Interface (TI-SCI) Message Protocol now
has control over Ringacc module resources management (RM) and Rings
configuration.

The corresponding support of TI-SCI Ringacc module RM protocol
introduced as option through DT parameters:
- ti,sci: phandle on TI-SCI firmware controller DT node
- ti,sci-dev-id: TI-SCI device identifier as per TI-SCI firmware spec

if both parameters present - Ringacc driver will configure/free/reset Rings
using TI-SCI Message Ringacc RM Protocol.

The Ringacc driver manages Rings allocation by itself now and requests
TI-SCI firmware to allocate and configure specific Rings only. It's done
this way because, Linux driver implements two stage Rings allocation and
configuration (allocate ring and configure ring) while TI-SCI Message
Protocol supports only one combined operation (allocate+configure).

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2020-01-15 10:07:27 -08:00
Bibby Hsieh d412f18c9b soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
GCE cannot know the register base address, this function
can help cmdq client to get the cmdq_client_reg structure.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Houlong Wei <houlong.wei@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-01-08 12:59:57 +01:00
Bibby Hsieh b2ff2356bf soc: mediatek: cmdq: add polling function
add polling function in cmdq helper functions

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-01-08 12:59:53 +01:00
Krzysztof Kozlowski 945005409b soc: samsung: Rename Samsung and Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Samsung"
and "Exynos" names.

"SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked
names.  Therefore they should be written with lowercase letters starting
with capital letter.

The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.

Although advertisement materials usually use uppercase "SAMSUNG", the
lowercase version is used in all legal aspects (e.g. on Wikipedia and in
privacy/legal statements on
https://www.samsung.com/semiconductor/privacy-global/).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-07 20:46:31 +01:00
Stanley Chu fef093ff7e scsi: soc: mediatek: add header for SiP service interface
Add a common header for the SiP service interface in MediaTek Chipsets.

Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Avri Altman <avri.altman@wdc.com>
Cc: Bart Van Assche <bvanassche@acm.org>
Cc: Bean Huo <beanhuo@micron.com>
Cc: Can Guo <cang@codeaurora.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/1577683950-1702-2-git-send-email-stanley.chu@mediatek.com
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2020-01-02 21:57:44 -05:00
Linus Torvalds ec939e4c94 ARM: SoC-related driver updates
Various driver updates for platforms:
 
  - A larger set of work on Tegra 2/3 around memory controller and
  regulator features, some fuse cleanups, etc..
 
  - MMP platform drivers, in particular for USB PHY, and other smaller
  additions.
 
  - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
  and ASV (adaptive voltage), allowing the platform to run at more
  optimal operating points.
 
  - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
 
  - Clock/reset control driver for TI/OMAP
 
  - Meson-A1 reset controller support
 
  - Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Olof Johansson:
 "Various driver updates for platforms:

   - A larger set of work on Tegra 2/3 around memory controller and
     regulator features, some fuse cleanups, etc..

   - MMP platform drivers, in particular for USB PHY, and other smaller
     additions.

   - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
     and ASV (adaptive voltage), allowing the platform to run at more
     optimal operating points.

   - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas

   - Clock/reset control driver for TI/OMAP

   - Meson-A1 reset controller support

   - Qualcomm sdm845 and sda845 SoC IDs for socinfo"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
  firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
  soc: fsl: add RCPM driver
  dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
  memory: tegra: Consolidate registers definition into common header
  memory: tegra: Ensure timing control debug features are disabled
  memory: tegra: Introduce Tegra30 EMC driver
  memory: tegra: Do not handle error from wait_for_completion_timeout()
  memory: tegra: Increase handshake timeout on Tegra20
  memory: tegra: Print a brief info message about EMC timings
  memory: tegra: Pre-configure debug register on Tegra20
  memory: tegra: Include io.h instead of iopoll.h
  memory: tegra: Adapt for Tegra20 clock driver changes
  memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
  memory: tegra: Add gr2d and gr3d to DRM IOMMU group
  memory: tegra: Set DMA mask based on supported address bits
  soc: at91: Add Atmel SFR SN (Serial Number) support
  memory: atmel-ebi: switch to SPDX license identifiers
  memory: atmel-ebi: move NUM_CS definition inside EBI driver
  soc: mediatek: Refactor bus protection control
  soc: mediatek: Refactor sram control
  ...
2019-12-05 11:43:31 -08:00
Linus Torvalds 38206c24ab ARM: SoC platform updates
Most of these are for MMP (seeing a bunch of cleanups and refactorings
 for the first time in a while), and for OMAP (a bunch of cleanups and
 added support for voltage controller on OMAP4430).
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Olof Johansson:
 "Most of these are for MMP (seeing a bunch of cleanups and refactorings
  for the first time in a while), and for OMAP (a bunch of cleanups and
  added support for voltage controller on OMAP4430)"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: OMAP2+: Add missing put_device() call in omapdss_init_of()
  OMAP2: fixup doc comments in omap_device
  ARM: OMAP1: drop duplicated dependency on ARCH_OMAP1
  ARM: ASPEED: update default ARCH_NR_GPIO for ARCH_ASPEED
  ARM: imx: use generic function to exit coherency
  ARM: tegra: Use WFE for power-gating on Tegra30
  ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
  ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOS
  ARM: s3c: Rename s5p_usb_phy functions
  ARM: s3c: Rename s3c64xx_spi_setname() function
  ARM: imx: Add serial number support for i.MX6/7 SoCs
  ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
  arm64: Introduce config for S32
  ARM: hisi: drop useless depend on ARCH_MULTI_V7
  arm64: realtek: Select reset controller
  ARM: shmobile: rcar-gen2: Drop legacy DT clock support
  ARM: OMAP2+: Remove duplicated include from pmic-cpcap.c
  ARM: OMAP1: ams-delta FIQ: Fix a typo ("Initiaize")
  MAINTAINERS: Add logicpd-som-lv and logicpd-torpedo to OMAP TREE
  ARM: OMAP2+: pdata-quirks: drop TI_ST/KIM support
  ...
2019-12-05 11:38:40 -08:00
Lina Iyer e35a6ae0eb pinctrl/msm: Setup GPIO chip in hierarchy
Some GPIOs are marked as wakeup capable and are routed to another
interrupt controller that is an always-domain and can detect interrupts
even when most of the SoC is powered off. The wakeup interrupt
controller wakes up the GIC and replays the interrupt at the GIC.

Setup the TLMM irqchip in hierarchy with the wakeup interrupt controller
and ensure the wakeup GPIOs are handled correctly.

Co-developed-by: Maulik Shah <mkshah@codeaurora.org>

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-9-git-send-email-ilina@codeaurora.org

----
Changes in v2:
	- Address review comments
	- Fix Co-developed-by tag
Changes in v1:
	- Address minor review comments
	- Remove redundant call to set irq handler
	- Move irq_domain_qcom_handle_wakeup() to this patch
Changes in RFC v2:
	- Rebase on top of GPIO hierarchy support in linux-next
	- Set the chained irq handler for summary line
2019-11-16 10:23:15 +00:00
Lina Iyer 81ef8bf880 irqchip/qcom-pdc: Add irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be
requested using the bus token DOMAIN_BUS_WAKEUP. In the following
patches, we will specify PDC as the wakeup-parent for the TLMM GPIO
irqchip. Requesting a wakeup GPIO will setup the GPIO and the
corresponding PDC interrupt as its parent.

Co-developed-by: Stephen Boyd <swboyd@chromium.org>

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-5-git-send-email-ilina@codeaurora.org
2019-11-16 10:21:15 +00:00
Olof Johansson d4b0c97a80 Qualcomm ARM Based Driver Updates for v5.5
* Add Bjorn as QCOM co-maintainer
 * Add LLLC yaml bindings and SC7180 support
 * Fixups/Cleanup for LLLC
 * Add SMD-RPM MSM8976 compatible and interconnect device
 * Add missing RPMD SMD perf level
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Merge tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm ARM Based Driver Updates for v5.5

* Add Bjorn as QCOM co-maintainer
* Add LLLC yaml bindings and SC7180 support
* Fixups/Cleanup for LLLC
* Add SMD-RPM MSM8976 compatible and interconnect device
* Add missing RPMD SMD perf level

* tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  MAINTAINERS: Add myself as co-maintainer for QCOM
  dt-bindings: msm: Add LLCC for SC7180
  dt-bindings: msm: Convert LLCC bindings to YAML
  soc: qcom: llcc: Add configuration data for SC7180
  soc: qcom: llcc: Move regmap config to local variable
  soc: qcom: llcc: Name regmaps to avoid collisions
  soc: qcom: Fix llcc-qcom definitions to include
  soc: qcom: rpmpd: Add rpm power domains for msm8976
  dt-bindings: power: Add missing rpmpd smd performance level
  soc: qcom: smd-rpm: Add MSM8976 compatible
  soc: qcom: socinfo: add sdm845 and sda845 soc ids
  soc: qcom: smd-rpm: Create RPM interconnect proxy child device
  soc: qcom: Make llcc-qcom a generic driver
  soc: qcom: Rename llcc-slice to llcc-qcom
  soc: qcom: llcc cleanup to get rid of sdm845 specific driver file

Link: https://lore.kernel.org/r/1573068840-13098-4-git-send-email-agross@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 14:05:53 -08:00
Olof Johansson a362687404 soc: mmp: guard include of asm/cputype.h with CONFIG_ARM{,64}
Since this driver is enabled for COMPILE_TEST, it avoids build error
on x86 allmodconfig:

In file included from /build/drivers/phy/marvell/phy-mmp3-usb.c:12:
/build/include/linux/soc/mmp/cputype.h:5:10: fatal error: asm/cputype.h: No such file or directory

Link: https://lore.kernel.org/r/20191022015658.14624-1-olof@lixom.net
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-21 19:13:56 -07:00
Lubomir Rintel 32adcaa010 ARM: mmp: move cputype.h to include/linux/soc/
Let's move cputype.h away from mach-mmp/ so that the drivers outside that
directory are able to tell the precise silicon revision. The MMP3 USB OTG
PHY driver needs this.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
2019-10-17 16:36:12 +02:00
YueHaibing 89da2ba947 soc: qcom: Fix llcc-qcom definitions to include
commit 99356b03b4 ("soc: qcom: Make llcc-qcom a generic driver") move
these out of llcc-qcom.h, make the building fails:

drivers/edac/qcom_edac.c:86:40: error: array type has incomplete element type struct llcc_edac_reg_data
 static const struct llcc_edac_reg_data edac_reg_data[] = {
                                        ^~~~~~~~~~~~~
drivers/edac/qcom_edac.c:87:3: error: array index in non-array initializer
  [LLCC_DRAM_CE] = {
   ^~~~~~~~~~~~
drivers/edac/qcom_edac.c:87:3: note: (near initialization for edac_reg_data)
drivers/edac/qcom_edac.c:88:3: error: field name not in record or union initializer
   .name = "DRAM Single-bit",
...
drivers/edac/qcom_edac.c:169:51: warning: struct llcc_drv_data declared inside parameter
 list will not be visible outside of this definition or declaration
 qcom_llcc_clear_error_status(int err_type, struct llcc_drv_data *drv)
                                                   ^~~~~~~~~~~~~

This patch move the needed definitions back to include.

Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 99356b03b4 ("soc: qcom: Make llcc-qcom a generic driver")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-08 17:32:10 -07:00
Vivek Gautam 99356b03b4 soc: qcom: Make llcc-qcom a generic driver
This makes way for adding future llcc versions.
Also pull out the llcc-qcom specific definitions from includes.
Includes path now contains the only definitions that are
to be exposed to other subsystems.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-01 21:40:01 -07:00
Vivek Gautam a14b820316 soc: qcom: llcc cleanup to get rid of sdm845 specific driver file
A single file should suffice the need to program the llcc for
various platforms. Get rid of sdm845 specific driver file to
make way for a more generic driver.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-01 21:40:01 -07:00
Linus Torvalds 574cc45397 drm main pull for 5.4-rc1
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Merge tag 'drm-next-2019-09-18' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This is the main pull request for 5.4-rc1 merge window. I don't think
  there is anything outstanding so next week should just be fixes, but
  we'll see if I missed anything. I landed some fixes earlier in the
  week but got delayed writing summary and sending it out, due to a mix
  of sick kid and jetlag!

  There are some fixes pending, but I'd rather get the main merge out of
  the way instead of delaying it longer.

  It's also pretty large in commit count and new amd header file size.
  The largest thing is four new amdgpu products (navi12/14, arcturus and
  renoir APU support).

  Otherwise it's pretty much lots of work across the board, i915 has
  started landing tigerlake support, lots of icelake fixes and lots of
  locking reworking for future gpu support, lots of header file rework
  (drmP.h is nearly gone), some old legacy hacks (DRM_WAIT_ON) have been
  put into the places they are needed.

  uapi:
   - content protection type property for HDCP

  core:
   - rework include dependencies
   - lots of drmP.h removals
   - link rate calculation robustness fix
   - make fb helper map only when required
   - add connector->DDC adapter link
   - DRM_WAIT_ON removed
   - drop DRM_AUTH usage from drivers

  dma-buf:
   - reservation object fence helper

  dma-fence:
   - shrink dma_fence struct
   - merge signal functions
   - store timestamps in dma_fence
   - selftests

  ttm:
   - embed drm_get_object struct into ttm_buffer_object
   - release_notify callback

  bridges:
   - sii902x - audio graph card support
   - tc358767 - aux data handling rework
   - ti-snd64dsi86 - debugfs support, DSI mode flags support

  panels:
   - Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech
     COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191, Boe
     Himax8279d, Sharp LD-D5116Z01B
   - TI nspire, NEC NL8048HL11, LG Philips LB035Q02, Sharp LS037V7DW01,
     Sony ACX565AKM, Toppoly TD028TTEC1 Toppoly TD043MTEA1

  i915:
   - Initial tigerlake platform support
   - Locking simplification work, general all over refactoring.
   - Selftests
   - HDCP debug info improvements
   - DSI properties
   - Icelake display PLL fixes, colorspace fixes, bandwidth fixes, DSI
     suspend/resume
   - GuC fixes
   - Perf fixes
   - ElkhartLake enablement
   - DP MST fixes
   - GVT - command parser enhancements

  amdgpu:
   - add wipe memory on release flag for buffer creation
   - Navi12/14 support (may be marked experimental)
   - Arcturus support
   - Renoir APU support
   - mclk DPM for Navi
   - DC display fixes
   - Raven scatter/gather support
   - RAS support for GFX
   - Navi12 + Arcturus power features
   - GPU reset for Picasso
   - smu11 i2c controller support

  amdkfd:
   - navi12/14 support
   - Arcturus support

  radeon:
   - kexec fix

  nouveau:
   - improved display color management
   - detect lack of GPU power cables

  vmwgfx:
   - evicition priority support
   - remove unused security feature

  msm:
   - msm8998 display support
   - better async commit support for cursor updates

  etnaviv:
   - per-process address space support
   - performance counter fixes
   - softpin support

  mcde:
   - DCS transfers fix

  exynos:
   - drmP.h cleanup

  lima:
   - reduce logging

  kirin:
   - misc clenaups

  komeda:
   - dual-link support
   - DT memory regions

  hisilicon:
   - misc fixes

  imx:
   - IPUv3 image converter fixes
   - 32-bit RGB V4L2 pixel format support

  ingenic:
   - more support for panel related cases

  mgag200:
   - cursor support fix

  panfrost:
   - export GPU features register to userspace
   - gpu heap allocations
   - per-fd address space support

  pl111:
   - CLD pads wiring support removed from DT

  rockchip:
   - rework to use DRM PSR helpers
   - fix bug in VOP_WIN_GET macro
   - DSI DT binding rework

  sun4i:
   - improve support for color encoding and range
   - DDC enabled GPIO

  tinydrm:
   - rework SPI support
   - improve MIPI-DBI support
   - moved to drm/tiny

  vkms:
   - rework CRC tracking

  dw-hdmi:
   - get_eld and i2s improvements

  gm12u320:
   - misc fixes

  meson:
   - global code cleanup
   - vpu feature detect

  omap:
   - alpha/pixel blend mode properties

  rcar-du:
   - misc fixes"

* tag 'drm-next-2019-09-18' of git://anongit.freedesktop.org/drm/drm: (2112 commits)
  drm/nouveau/bar/gm20b: Avoid BAR1 teardown during init
  drm/nouveau: Fix ordering between TTM and GEM release
  drm/nouveau/prime: Extend DMA reservation object lock
  drm/nouveau: Fix fallout from reservation object rework
  drm/nouveau/kms/nv50-: Don't create MSTMs for eDP connectors
  drm/i915: Use NOEVICT for first pass on attemping to pin a GGTT mmap
  drm/i915: to make vgpu ppgtt notificaiton as atomic operation
  drm/i915: Flush the existing fence before GGTT read/write
  drm/i915: Hold irq-off for the entire fake lock period
  drm/i915/gvt: update RING_START reg of vGPU when the context is submitted to i915
  drm/i915/gvt: update vgpu workload head pointer correctly
  drm/mcde: Fix DSI transfers
  drm/msm: Use the correct dma_sync calls harder
  drm/msm: remove unlikely() from WARN_ON() conditions
  drm/msm/dsi: Fix return value check for clk_get_parent
  drm/msm: add atomic traces
  drm/msm/dpu: async commit support
  drm/msm: async commit support
  drm/msm: split power control from prepare/complete_commit
  drm/msm: add kms->flush_commit()
  ...
2019-09-19 16:24:24 -07:00
Linus Torvalds b682242f60 - qcom : enable support for ipq8074, sm1850 and sm7180.
add child device node for qcs404.
          misc fixes.
 
 - mediatek : enable support for mt8183.
           misc rejig of cmdq driver.
           new client-reg dt property.
 
 - armada: use device-managed registration api
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Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom:
     - enable support for ipq8074, sm1850 and sm7180
     - add child device node for qcs404
     - misc fixes

 - mediatek:
     - enable support for mt8183
     - misc rejig of cmdq driver
     - new client-reg dt property

 - armada:
     - use device-managed registration api

* tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-apcs: fix max_register value
  mailbox: qcom: Add support for IPQ8074 APCS
  dt-bindings: mailbox: qom: Add ipq8074 APPS compatible
  mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
  dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs
  mbox: qcom: replace integer with valid macro
  mbox: qcom: add APCS child device for QCS404
  mailbox: mediatek: cmdq: clear the event in cmdq initial flow
  mailbox: mediatek: cmdq: support mt8183 gce function
  mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
  dt-binding: gce: add binding for gce client reg property
  dt-binding: gce: add gce header file for mt8183
  dt-binding: gce: remove thread-num property
  mailbox: armada-37xx-rwtm: Use device-managed registration API
2019-09-19 14:01:47 -07:00
Bibby Hsieh 6058f11870 mailbox: mediatek: cmdq: clear the event in cmdq initial flow
GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.

In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.

Fixes: 623a6143a8 ("mailbox: mediatek: Add Mediatek CMDQ driver")

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:40:05 -05:00
Linus Torvalds 399eb9b6cb ARM: SoC driver updates for v5.4
The branch contains driver changes that are tightly
 connected to SoC specific code. Aside from smaller
 cleanups and bug fixes, here is a list of the notable
 changes.
 
 New device drivers:
 
 - The Turris Mox router has a new "moxtet" bus driver
   for its on-board pluggable extension bus. The
   same platform also gains a firmware driver.
 
 - The Samsung Exynos family gains a new Chipid driver
   exporting using the soc device sysfs interface
 
 - A similar socinfo driver for Qualcomm Snapdragon
   chips.
 
 - A firmware driver for the NXP i.MX DSP IPC protocol
   using shared memory and a mailbox
 
 Other changes:
 
 - The i.MX reset controller driver now supports the
   NXP i.MX8MM chip
 
 - Amlogic SoC specific drivers gain support for
   the S905X3 and A311D chips
 
 - A rework of the TI Davinci framebuffer driver to
   allow important cleanups in the platform code
 
 - A couple of device drivers for removed ARM SoC
   platforms are removed. Most of the removals were
   picked up by other maintainers, this contains
   whatever was left.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "This contains driver changes that are tightly connected to SoC
  specific code. Aside from smaller cleanups and bug fixes, here is a
  list of the notable changes.

  New device drivers:

   - The Turris Mox router has a new "moxtet" bus driver for its
     on-board pluggable extension bus. The same platform also gains a
     firmware driver.

   - The Samsung Exynos family gains a new Chipid driver exporting using
     the soc device sysfs interface

   - A similar socinfo driver for Qualcomm Snapdragon chips.

   - A firmware driver for the NXP i.MX DSP IPC protocol using shared
     memory and a mailbox

  Other changes:

   - The i.MX reset controller driver now supports the NXP i.MX8MM chip

   - Amlogic SoC specific drivers gain support for the S905X3 and A311D
     chips

   - A rework of the TI Davinci framebuffer driver to allow important
     cleanups in the platform code

   - A couple of device drivers for removed ARM SoC platforms are
     removed. Most of the removals were picked up by other maintainers,
     this contains whatever was left"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits)
  bus: uniphier-system-bus: use devm_platform_ioremap_resource()
  soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
  dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
  firmware: ti_sci: Allow for device shared and exclusive requests
  bus: imx-weim: remove incorrect __init annotations
  fbdev: remove w90x900/nuc900 platform drivers
  spi: remove w90x900 driver
  net: remove w90p910-ether driver
  net: remove ks8695 driver
  firmware: turris-mox-rwtm: Add sysfs documentation
  firmware: Add Turris Mox rWTM firmware driver
  dt-bindings: firmware: Document cznic,turris-mox-rwtm binding
  bus: moxtet: fix unsigned comparison to less than zero
  bus: moxtet: remove set but not used variable 'dummy'
  ARM: scoop: Use the right include
  dt-bindings: power: add Amlogic Everything-Else power domains bindings
  soc: amlogic: Add support for Everything-Else power domains controller
  fbdev: da8xx: use resource management for dma
  fbdev: da8xx-fb: drop a redundant if
  fbdev: da8xx-fb: use devm_platform_ioremap_resource()
  ...
2019-09-16 15:52:38 -07:00
Lokesh Vutla 45b659ee75 firmware: ti_sci: Allow for device shared and exclusive requests
Sysfw provides an option for requesting exclusive access for a
device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is
not used, the device is meant to be shared across hosts. Once a device
is requested from a host with this flag set, any request to this
device from a different host will be nacked by sysfw. Current tisci
driver enables this flag for every device requests. But this may not
be true for all the devices. So provide a separate commands in driver
for exclusive and shared device requests.

Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-04 20:44:33 +02:00
Arnd Bergmann 957af18f05 cmdq helper:
reoder function parameter and change size of the parameters
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Merge tag 'v5.3-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

cmdq helper:
reoder function parameter and change size of the parameters

* tag 'v5.3-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: cmdq: change the type of input parameter
  soc: mediatek: cmdq: reorder the parameter

Link: https://lore.kernel.org/r/8c860e37-3816-d75f-fc37-ce496905ba73@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-09-03 22:18:34 +02:00
Bibby Hsieh 556030f060 soc: mediatek: cmdq: change the type of input parameter
According to the cmdq hardware design, the subsys is u8,
the offset is u16 and the event id is u16.
This patch changes the type of subsys, offset and event id
to the correct type.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-08-23 14:06:48 +02:00
Bibby Hsieh 1a92f98912 soc: mediatek: cmdq: reorder the parameter
The order of gce instructions is [subsys offset value]
so reorder the parameter of cmdq_pkt_write_mask
and cmdq_pkt_write function.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-08-23 14:03:56 +02:00
Arnd Bergmann ffba29c9eb serial: lpc32xx: allow compile testing
The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the
one thing that relies on platform header files. Move that into the
core platform code so we only need a variable declaration for it,
and enable COMPILE_TEST building.

Link: https://lore.kernel.org/r/20190809144043.476786-12-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15 21:34:02 +02:00
Arnd Bergmann ecca1a6277 net: lpc-enet: move phy setup into platform code
Setting the phy mode requires touching a platform specific
register, which prevents us from building the driver without
its header files.

Move it into a separate function in arch/arm/mach/lpc32xx
to hide the core registers from the network driver.

Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15 21:33:52 +02:00
Arnd Bergmann 9dc03ffd99 net: lpc-enet: factor out iram access
The lpc_eth driver uses a platform specific method to find
the internal sram. This prevents building it on other machines.

Rework to only use one function call and keep the other platform
internals where they belong. Ideally this would look up the
sram location from DT, but as this is a rarely used driver,
I want to keep the modifications to a minimum.

Link: https://lore.kernel.org/r/20190809144043.476786-7-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-15 21:33:49 +02:00
Sylwester Nawrocki 40d8aff614 soc: samsung: chipid: Convert exynos-chipid driver to use the regmap API
Convert the driver to use regmap API in order to allow other
drivers, like ASV, to access the CHIPID registers.

Add definition of selected CHIPID register offsets and register bit
fields for Exynos5422 SoC.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-08-15 20:25:25 +02:00
Maxime Ripard 03b0f2ce73 Linus 5.3-rc1
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Merge v5.3-rc1 into drm-misc-next

Noralf needs some SPI patches in 5.3 to merge some work on tinydrm.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-07-22 21:24:10 +02:00
Linus Torvalds 8362fd64f0 ARM: SoC-related driver updates
Various driver updates for platforms and a couple of the small driver
 subsystems we merge through our tree:
 
  - A driver for SCU (system control) on NXP i.MX8QXP
  - Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
  - Qualcomm PM support for MSM8998
  - Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
  - Reset controller support for Bitmain BM1880
  - TI SCI (System Control Interface) support for CPU control on AM654
    processors
  - More TI sysc refactoring and rework
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

   - A driver for SCU (system control) on NXP i.MX8QXP

   - Qualcomm Always-on Subsystem messaging driver (AOSS QMP)

   - Qualcomm PM support for MSM8998

   - Support for a newer version of DRAM PHY driver for Broadcom (DPFE)

   - Reset controller support for Bitmain BM1880

   - TI SCI (System Control Interface) support for CPU control on AM654
     processors

   - More TI sysc refactoring and rework"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits)
  reset: remove redundant null check on pointer dev
  soc: rockchip: work around clang warning
  dt-bindings: reset: imx7: Fix the spelling of 'indices'
  soc: imx: Add i.MX8MN SoC driver support
  soc: aspeed: lpc-ctrl: Fix probe error handling
  soc: qcom: geni: Add support for ACPI
  firmware: ti_sci: Fix gcc unused-but-set-variable warning
  firmware: ti_sci: Use the correct style for SPDX License Identifier
  soc: imx8: Use existing of_root directly
  soc: imx8: Fix potential kernel dump in error path
  firmware/psci: psci_checker: Park kthreads before stopping them
  memory: move jedec_ddr.h from include/memory to drivers/memory/
  memory: move jedec_ddr_data.c from lib/ to drivers/memory/
  MAINTAINERS: Remove myself as qcom maintainer
  soc: aspeed: lpc-ctrl: make parameter optional
  soc: qcom: apr: Don't use reg for domain id
  soc: qcom: fix QCOM_AOSS_QMP dependency and build errors
  memory: tegra: Fix -Wunused-const-variable
  firmware: tegra: Early resume BPMP
  soc/tegra: Select pinctrl for Tegra194
  ...
2019-07-19 17:13:56 -07:00
Linus Torvalds fdcec00405 remoteproc updates for v5.3
This adds support for the STM32 remoteproc, additional i.MX platforms
 with Cortex M4 remoteprocs and Qualcomm's QCS404 Compute DSP. Initial
 support for vendor specific resource table entries and support for
 unprocessed Qualcomm firmware files.
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Merge tag 'rproc-v5.3' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This adds support for the STM32 remoteproc, additional i.MX platforms
  with Cortex M4 remoteprocs and Qualcomm's QCS404 Compute DSP.

  Also initial support for vendor specific resource table entries and
  support for unprocessed Qualcomm firmware files"

* tag 'rproc-v5.3' of git://github.com/andersson/remoteproc:
  remoteproc: stm32: fix building without ARM SMCC
  remoteproc: qcom: q6v5-mss: Fix build error without QCOM_MDT_LOADER
  remoteproc: copy parent dma_pfn_offset for vdev
  remoteproc: qcom: q6v5-mss: Support loading non-split images
  soc: qcom: mdt_loader: Support loading non-split images
  remoteproc: stm32: add an ST stm32_rproc driver
  dt-bindings: remoteproc: add bindings for stm32 remote processor driver
  dt-bindings: stm32: add bindings for ML-AHB interconnect
  remoteproc: Use struct_size() helper
  remoteproc: add vendor resources handling
  remoteproc: imx: Fix typo in "failed"
  remoteproc: imx: Broaden the Kconfig selection logic
  remoteproc,rpmsg: add missing MAINTAINERS file entries
  remoteproc: qcom: qdsp6-adsp: Add support for QCS404 CDSP
  dt-bindings: remoteproc: Rename and amend Hexagon v56 binding
2019-07-17 11:44:41 -07:00
Linus Torvalds 916f562fb2 This round of clk driver and framework updates is heavy on the driver update
side. The two main highlights in the core framework are the addition of an bulk
 clk_get API that handles optional clks and an extra debugfs file that tells the
 developer about the current parent of a clk.
 
 The driver updates are dominated by i.MX in the diffstat, but that is mostly
 because that SoC has started converting to the clk_hw style of clk
 registration. The next big update is in the Amlogic meson clk driver that
 gained some support for audio, cpu, and temperature clks while fixing some PLL
 issues. Finally, the biggest thing that stands out is the conversion of a large
 part of the Allwinner sunxi-ng driver to the new clk parent scheme that uses
 less strings and more pointer comparisons to match clk parents and children up.
 
 In general, it looks like we have a lot of little fixes and tweaks here and
 there to clk data along with the normal addition of a handful of new drivers
 and a couple new core framework features.
 
 Core:
  - Add a 'clk_parent' file in clk debugfs
  - Add a clk_bulk_get_optional() API (with devm too)
 
 New Drivers:
  - Support gated clk controller on MIPS based BCM63XX SoCs
  - Support SiLabs Si5341 and Si5340 chips
  - Support for CPU clks on Raspberry Pi devices
  - Audsys clock driver for MediaTek MT8516 SoCs
 
 Updates:
  - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme
  - Small frequency support for SiLabs Si544 chips
  - Slow clk support for AT91 SAM9X60 SoCs
  - Remove dead code in various clk drivers (-Wunused)
  - Support for Marvell 98DX1135 SoCs
  - Get duty cycle of generic pwm clks
  - Improvement in mmc phase calculation and cleanup of some rate defintions
  - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs
  - Add GPIO, SNVS and GIC clocks for i.MX8 drivers
  - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock
  - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting
  - Add clks for new Exynos5422 Dynamic Memory Controller driver
  - Clock definition for Exynos4412 Mali
  - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3
  - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M
  - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs
  - TI clock probing done from DT by default instead of firmware
  - Fix Amlogic Meson mpll fractional part and spread sprectrum issues
  - Add Amlogic meson8 audio clocks
  - Add Amlogic g12a temperature sensors clocks
  - Add Amlogic g12a and g12b cpu clocks
  - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N
  - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W
  - Add Clock Domain support on Renesas RZ/N1
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round of clk driver and framework updates is heavy on the driver
  update side. The two main highlights in the core framework are the
  addition of an bulk clk_get API that handles optional clks and an
  extra debugfs file that tells the developer about the current parent
  of a clk.

  The driver updates are dominated by i.MX in the diffstat, but that is
  mostly because that SoC has started converting to the clk_hw style of
  clk registration. The next big update is in the Amlogic meson clk
  driver that gained some support for audio, cpu, and temperature clks
  while fixing some PLL issues. Finally, the biggest thing that stands
  out is the conversion of a large part of the Allwinner sunxi-ng driver
  to the new clk parent scheme that uses less strings and more pointer
  comparisons to match clk parents and children up.

  In general, it looks like we have a lot of little fixes and tweaks
  here and there to clk data along with the normal addition of a handful
  of new drivers and a couple new core framework features.

  Core:
   - Add a 'clk_parent' file in clk debugfs
   - Add a clk_bulk_get_optional() API (with devm too)

  New Drivers:
   - Support gated clk controller on MIPS based BCM63XX SoCs
   - Support SiLabs Si5341 and Si5340 chips
   - Support for CPU clks on Raspberry Pi devices
   - Audsys clock driver for MediaTek MT8516 SoCs

  Updates:
   - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme
   - Small frequency support for SiLabs Si544 chips
   - Slow clk support for AT91 SAM9X60 SoCs
   - Remove dead code in various clk drivers (-Wunused)
   - Support for Marvell 98DX1135 SoCs
   - Get duty cycle of generic pwm clks
   - Improvement in mmc phase calculation and cleanup of some rate defintions
   - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs
   - Add GPIO, SNVS and GIC clocks for i.MX8 drivers
   - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock
   - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting
   - Add clks for new Exynos5422 Dynamic Memory Controller driver
   - Clock definition for Exynos4412 Mali
   - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3
   - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M
   - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs
   - TI clock probing done from DT by default instead of firmware
   - Fix Amlogic Meson mpll fractional part and spread sprectrum issues
   - Add Amlogic meson8 audio clocks
   - Add Amlogic g12a temperature sensors clocks
   - Add Amlogic g12a and g12b cpu clocks
   - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N
   - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W
   - Add Clock Domain support on Renesas RZ/N1"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (190 commits)
  clk: consoldiate the __clk_get_hw() declarations
  clk: sprd: Add check for return value of sprd_clk_regmap_init()
  clk: lochnagar: Update DT binding doc to include the primary SPDIF MCLK
  clk: Add Si5341/Si5340 driver
  dt-bindings: clock: Add silabs,si5341
  clk: clk-si544: Implement small frequency change support
  clk: add BCM63XX gated clock controller driver
  devicetree: document the BCM63XX gated clock bindings
  clk: at91: sckc: use dedicated functions to unregister clock
  clk: at91: sckc: improve error path for sama5d4 sck registration
  clk: at91: sckc: remove unnecessary line
  clk: at91: sckc: improve error path for sam9x5 sck register
  clk: at91: sckc: add support to free slow clock osclillator
  clk: at91: sckc: add support to free slow rc oscillator
  clk: at91: sckc: add support to free slow oscillator
  clk: rockchip: export HDMIPHY clock on rk3228
  clk: rockchip: add watchdog pclk on rk3328
  clk: rockchip: add clock id for hdmi_phy special clock on rk3228
  clk: rockchip: add clock id for watchdog pclk on rk3328
  clk: at91: sckc: add support for SAM9X60
  ...
2019-07-17 10:07:48 -07:00
Sam Ravnborg 66620f48cb drm/meson: drop use of drmP.h
Drop use of the deprecated drmP.h header.
While doing so used the opportunity
to clean up a little so includes are now
sorted and removed unused include files.
In a few cases added some forwards to allow header
files to built in different include order.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Maxime Jourdan <mjourdan@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://patchwork.freedesktop.org/patch/msgid/20190716064220.18157-2-sam@ravnborg.org
2019-07-17 12:47:57 +02:00
Bjorn Andersson 498b98e939 soc: qcom: mdt_loader: Support loading non-split images
In some software releases the firmware images are not split up with each
loadable segment in it's own file. Check the size of the loaded firmware
to see if it still contains each segment to be loaded, before falling
back to the split-out segments.

Acked-by: Andy Gross <agross@kernel.org>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-07-01 19:02:28 -07:00
Olof Johansson 6c249cc7a7 SOC: TI SCI updates for v5.3
- Couple of fixes to handle resource ranges and
   requesting response always from firmware;
 - Add processor control
 - Add support APIs for DMA
 - Fix the SPDX license plate
 - Unused varible warning fix
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Merge tag 'drivers_soc_for_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI SCI updates for v5.3

- Couple of fixes to handle resource ranges and
  requesting response always from firmware;
- Add processor control
- Add support APIs for DMA
- Fix the SPDX license plate
- Unused varible warning fix

* tag 'drivers_soc_for_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  firmware: ti_sci: Fix gcc unused-but-set-variable warning
  firmware: ti_sci: Use the correct style for SPDX License Identifier
  firmware: ti_sci: Parse all resource ranges even if some is not available
  firmware: ti_sci: Add support for processor control
  firmware: ti_sci: Add resource management APIs for ringacc, psi-l and udma
  firmware: ti_sci: Always request response from firmware

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-19 09:02:52 -07:00