Commit Graph

376966 Commits

Author SHA1 Message Date
Alex Deucher cc066715e6 drm/radeon: update CIK soft reset
Update to the newer programming model.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:46 -04:00
Alex Deucher 44fa346f7a drm/radeon: add get_gpu_clock_counter() callback for cik
Used for GPU clock counter snapshots.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:45 -04:00
Alex Deucher 64f759cc6a drm/radeon: Update radeon_info_ioctl for CIK (v2)
v2: rebase changes, fix a couple missed cases

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:45 -04:00
Alex Deucher c2037ad1e1 drm/radeon: add SS override support for KB/KV
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:44 -04:00
Alex Deucher c7d2f227e3 drm/radeon: use frac fb div on DCE8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:43 -04:00
Alex Deucher 2f0047b2ba drm/radeon: Handle PPLL0 powerdown on DCE8
Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:43 -04:00
Alex Deucher 0331f6749e drm/radeon: add support pll selection for DCE8 (v4)
v2: make PPLL0 is available for non-DP on CI
v3: rebase changes, update documentation
v4: fix kabini

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:42 -04:00
Alex Deucher 8542c12b4c drm/radeon: update DISPCLK programming for DCE8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:41 -04:00
Alex Deucher aea6564133 drm/radeon/atom: add support for new DVO tables
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:41 -04:00
Alex Deucher e68adef824 drm/radeon/atom: add DCE8 encoder support
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:40 -04:00
Alex Deucher 8da0e50092 drm/radeon/dce8: crtc_set_base updates
Some new fields and DESKTOP_HEIGHT register moved.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:39 -04:00
Alex Deucher d798f2f2c3 drm/radeon/dce8: properly handle interlaced timing
The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:39 -04:00
Alex Deucher 9e05fa1d24 drm/radeon/cik: add hw cursor support (v2)
CIK (DCE8) hw cursors are programmed the same as evergreen
(DCE4) with the following caveats:
- cursors are now 128x128 pixels
- new alpha blend enable bit

v2: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:38 -04:00
Alex Deucher cd84a27d18 drm/radeon/dce8: add support for display watermark setup
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:37 -04:00
Alex Deucher bc19f59704 drm/radeon: update power state parsing for CI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher 5115020714 drm/radeon: handle the integrated thermal controller on CI
No support for reading the temperature yet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher 9ae94be523 drm/radeon: atombios power table updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:35 -04:00
Alex Deucher 1da8f5fbb1 drm/radeon: upstream atombios.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher b7aa4cda22 drm/radeon: upstream ObjectID.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher 7bf94a2c18 drm/radeon/cik: fill in startup/shutdown callbacks (v5)
v2: update to latest driver changes
v3: properly tear down vm on suspend
v4: fix up irq init ordering
v5: remove outdated comment

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-06-26 16:11:33 -04:00
Alex Deucher d0e092d969 drm/radeon/cik: add support for doing async VM pt updates (v5)
Async page table updates using the sDMA engine.  sDMA has a
special packet for updating entries for contiguous pages
that reduces overhead.

v2: add support for and use the CP for now.
v3: update for 2 level PTs
v4: rebase, fix DMA packet
v5: switch to using an IB

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:34 -04:00
Alex Deucher 605de6b97e drm/radeon: implement async vm_flush for the sDMA (v6)
Update the page table base address and flush the
VM TLB using the sDMA.

V2: update for 2 level PTs
V3: update vm flush
V4: update SH_MEM* regs
V5: switch back to old style VM TLB invalidate
V6: fix packet formatting

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:33 -04:00
Alex Deucher 21a93e130d drm/radeon/cik: add support for sDMA dma engines (v8)
CIK has new asynchronous DMA engines called sDMA
(system DMA).  Each engine supports 1 ring buffer
for kernel and gfx and 2 userspace queues for compute.

TODO: fill in the compute setup.

v2: update to the latest reset code
v3: remove ib_parse
v4: fix copy_dma()
v5: drop WIP compute sDMA queues
v6: rebase
v7: endian fixes for IB
v8: cleanup for release

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:33 -04:00
Alex Deucher 9d97c99b18 drm/radeon/cik: log and handle VM page fault interrupts
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:32 -04:00
Alex Deucher a59781bbe5 drm/radeon: add support for interrupts on CIK (v5)
Todo:
- handle interrupts for compute queues

v2: add documentation
v3: update to latest reset code
v4: update to latest illegal CP handling
v5: fix missing break in interrupt handler switch statement

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:31 -04:00
Alex Deucher f6796caee6 drm/radeon: Add support for RLC init on CIK (v4)
RLC handles the interrupt controller and other tasks
on the GPU.

v2: add documentation
v3: update programming sequence
v4: additional setup

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:31 -04:00
Alex Deucher f96ab48457 drm/radeon: implement async vm_flush for the CP (v7)
Update the page table base address and flush the
VM TLB using the CP.

v2: update for 2 level PTs
v3: use new packet for invalidate
v4: update SH_MEM* regs when flushing the VM
v5: add pfp sync, go back to old style vm TLB invalidate
v6: fix hdp flush packet count
v7: use old style HDP flush

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:30 -04:00
Alex Deucher fbc832c7f5 drm/radeon: add ring and IB tests for CIK (v3)
v2: add documenation
v3: update the latest ib changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:29 -04:00
Alex Deucher 2cae3bc3f3 drm/radeon: add IB and fence dispatch functions for CIK gfx (v7)
For gfx ring only.  Compute is still todo.

v2: add documentation
v3: update to latest reset changes, integrate emit update patch.
v4: fix count on wait_reg_mem for HDP flush
v5: use old hdp flush method for fence
v6: set valid bit for IB
v7: cleanup for release

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:29 -04:00
Alex Deucher 841cf442fd drm/radeon: Add CP init for CIK (v7)
Sets up the GFX ring and loads ucode for GFX and Compute.

Todo:
- handle compute queue setup.

v2: add documentation
v3: integrate with latest reset changes
v4: additional init fixes
v5: scratch reg write back no longer supported on CIK
v6: properly set CP_RB0_BASE_HI
v7: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:28 -04:00
Alex Deucher bc8273fe97 drm/radeon: add support mc ucode loading on CIK (v2)
Load the GDDR5 ucode and train the links.

v2: update ucode

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:27 -04:00
Alex Deucher 02c8132741 drm/radeon: add initial ucode loading for CIK (v5)
Currently the driver required 6 sets of ucode:
1. pfp - pre-fetch parser, part of the GFX CP
2. me - micro engine, part of the GFX CP
3. ce - constant engine, part of the GFX CP
4. rlc - interrupt, etc. controller
5. mc - memory controller (discrete cards only)
6. mec - compute engines, part of Compute CP

V2: add documentation
V3: update MC ucode
V4: rebase
V5: update mc ucode

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:27 -04:00
Alex Deucher a00024b03d drm/radeon/cik: stop page faults from hanging the system (v2)
Redirect invalid memory accesses to the default page
instead of locking up the memory controller.

v2: rebase on top of 2 level PTs

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:26 -04:00
Alex Deucher 1c49165d0a drm/radeon: add support for MC/VM setup on CIK (v6)
The vm callbacks are the same as the SI ones right now
(same regs and bits). We could share the SI variants, and
I may yet do that, but I figured I would add CIK specific
ones for now in case we need to change anything.

V2: add documentation, minor fixes.
V3: integrate vram offset fixes for APUs
V4: enable 2 level VM PTs
V5: index SH_MEM_* regs properly
V6: add ib_parse()

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:25 -04:00
Alex Deucher 6f2043ce15 drm/radeon: Add support for CIK GPU reset (v2)
v2: split soft reset into compute and gfx.  Still need
to make reset more fine grained, but this should be a
start.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:25 -04:00
Alex Deucher 8cc1a5328b drm/radeon: add gpu init support for CIK (v9)
v2: tiling fixes
v3: more tiling fixes
v4: more tiling fixes
v5: additional register init
v6: rebase
v7: fix gb_addr_config for KV/KB
v8: drop wip KV bits for now, add missing config reg
v9: fix cu count on Bonaire

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:24 -04:00
Alex Deucher efad86db4e drm/radeon: adapt to PCI BAR changes on CIK
register BAR is now at PCI BAR 5.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:23 -04:00
Alex Deucher e282917ca3 drm/radeon: add DCE8 macro for CIK
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:23 -04:00
Alex Deucher 6eac752ec6 drm/radeon: add CIK chip families
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:22 -04:00
Alex Deucher 8f61b34ceb drm/radeon: add a reset work handler
New asics support non-privileged IBs.  This allows us
to skip IB checking in the driver since the hardware
will check the command buffers for us.  When using
non-privileged IBs, if the CP encounters an illegal
register in the command stream, it will halt and generate
an interrupt.  The CP needs to be reset to continue.  For now
just do a full GPU reset when this happens.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:21 -04:00
Alex Deucher 8010179067 drm/radeon: add backlight quirk for hybrid mac
Mac laptops with multiple GPUs apparently use the gmux
driver for backlight control.  Don't register a radeon
backlight interface.  We may need to add other pci ids
for other hybrid mac laptops.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=65377

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-06-12 08:22:49 -04:00
Alex Deucher f100380ecd drm/radeon: fix AVI infoframe generation
- remove adding 2 to checksum, this is incorrect.

This was incorrectly introduced in:
92db7f6c86
http://lists.freedesktop.org/archives/dri-devel/2011-December/017717.html
However, the off by 2 was due to adding the version twice.
From the examples in the URL above:

[Rafał Miłecki][RV620] fglrx:
0x7454: 00 A8 5E 79     R600_HDMI_VIDEOINFOFRAME_0
0x7458: 00 28 00 10     R600_HDMI_VIDEOINFOFRAME_1
0x745C: 00 48 00 28     R600_HDMI_VIDEOINFOFRAME_2
0x7460: 02 00 00 48     R600_HDMI_VIDEOINFOFRAME_3
===================
(0x82 + 0x2 + 0xD) + 0x1F8 = 0x289
-0x289 = 0x77

However, the payload sum is not 0x1f8, it's 0x1f6.
00 + A8 + 5E + 00 +
00 + 28 + 00 + 10 +
00 + 48 + 00 + 28 +
00 + 48 =
0x1f6

Bits 25:24 of HDMI_VIDEOINFOFRAME_3 are the packet version, not part
of the payload.  So the total would be:
(0x82 + 0x2 + 0xD) + 0x1f6 = 0x287
-0x287 = 0x79

- properly emit the AVI infoframe version.  This was not being
emitted previous which is probably what caused the issue above.

This should fix blank screen when HDMI audio is enabled on
certain monitors.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Cc: Rafał Miłecki <zajec5@gmail.com>
2013-06-12 08:17:22 -04:00
Alex Deucher 9b1be4dc02 drm/radeon: fix UVD on big endian
This fixes the kernel side so that the ring should come
up and ring and IB tests should work.  The userspace
UVD drivers will also need big endian fixes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:17:21 -04:00
Jerome Glisse 089920f21d drm/radeon: fix write back suspend regression with uvd v2
UVD ring can't use scratch thus it does need writeback buffer to keep
a valid address or radeon_ring_backup will trigger a kernel fault.

It's ok to not unpin the write back buffer on suspend as it leave in
gtt and thus does not need eviction.

v2: Fix the uvd case.

Reported and tracked by Wojtek <wojtask9@wp.pl>

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:16:29 -04:00
Jerome Glisse 3813f5ca9a drm/radeon: do not try to uselessly update virtual memory pagetable
If a buffer is never bound to a virtual memory pagetable than don't try
to unbind it. Only drawback is that we don't update the pagetable when
unbinding the ib pool buffer which is fine because it only happens at
suspend or module unload/shutdown.

Fixes spurious messages about buffers without VM mappings. E.g.:
radeon 0000:01:00.0: bo ffff88020afac400 don't has a mapping in vm ffff88021ca2b900

Cc: stable@kernel.org
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:16:28 -04:00
Dave Airlie df63d3ecbc Merge tag 'drm-intel-fixes-2013-06-11' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
Daniel writes:
Just tiny regression fixes here:
- Two fixes to fix sdvo hotplug which broke in the hpd storm detection
  work.
- One fix to patch-up the sdvo lvds regression fixer from the last pull -
  we need to prefer the vbt mode over edid modes.

* tag 'drm-intel-fixes-2013-06-11' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915: prefer VBT modes for SVDO-LVDS over EDID
  drm/i915: Enable hotplug interrupts after querying hw capabilities.
  drm/i915: Fix hotplug interrupt enabling for SDVOC
2013-06-11 19:38:27 +10:00
Dave Airlie e6eea1536e Merge branch 'gma500-fixes' of git://github.com/patjak/drm-gma500 into drm-fixes
Patrik writes:
Two fixes for memory leaks split into Cedarview and Poulsbo versions,
and a fix for properly setting the pipe base when using fbdev. It's on
my todo-list to start unifying the chips since they are very similar,
but until then I'd like to split them up in case there are side-effects
on Cedarview that I cannot currently test.

airled: Verified pull from github matches what I expected.
* 'gma500-fixes' of git://github.com/patjak/drm-gma500:
  drm/gma500/cdv: Fix cursor gem obj referencing on cdv
  drm/gma500/psb: Fix cursor gem obj referencing on psb
  drm/gma500/cdv: Unpin framebuffer on crtc disable
  drm/gma500/psb: Unpin framebuffer on crtc disable
  drm/gma500: Add fb gtt offset to fb base
2013-06-11 08:16:10 +10:00
Linus Torvalds ab0296319a spi: Fixes for v3.10
A few nasty issues, particularly a race with the interrupt controller in
 the xilinx driver, together with a couple of more minor fixes and a much
 needed move of the mailing list away from sourceforge.
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Merge tag 'spi-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A few nasty issues, particularly a race with the interrupt controller
  in the xilinx driver, together with a couple of more minor fixes and a
  much needed move of the mailing list away from sourceforge."

* tag 'spi-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: hspi: fixup long delay time
  spi: spi-xilinx: Remove ISR race condition
  spi: topcliff-pch: fix error return code in pch_spi_probe()
  spi: topcliff-pch: Pass correct pointer to free_irq()
  spi: Move mailing list to vger
2013-06-10 13:28:39 -07:00
Linus Torvalds 50e6f8511a Bug-fixes for regressions:
- xen/tmem stopped working after a certain combination of modprobe/swapon was used
  - cpu online/offlining would trigger WARN_ON.
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Merge tag 'stable/for-linus-3.10-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen

Pull xen fixes from Konrad Rzeszutek Wilk:
 "Two bug-fixes for regressions:
   - xen/tmem stopped working after a certain combination of
     modprobe/swapon was used
   - cpu online/offlining would trigger WARN_ON."

* tag 'stable/for-linus-3.10-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
  xen/tmem: Don't over-write tmem_frontswap_poolid after tmem_frontswap_init set it.
  xen/smp: Fixup NOHZ per cpu data when onlining an offline CPU.
2013-06-10 13:27:46 -07:00
Linus Torvalds 30f5f73926 regmap: Fixes for v3.10
The biggest fix here is Lars-Peter's fix for custom locking callbacks
 which is pretty localised but important for those devices that use the
 feature.  Otherwise we've got a couple of fairly small cleanups which
 would have been sent sooner were it not for letting Lars-Peter's patch
 soak for a while.
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Merge tag 'regmap-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap

Pull regmap fixes from Mark Brown:
 "The biggest fix here is Lars-Peter's fix for custom locking callbacks
  which is pretty localised but important for those devices that use the
  feature.  Otherwise we've got a couple of fairly small cleanups which
  would have been sent sooner were it not for letting Lars-Peter's patch
  soak for a while"

* tag 'regmap-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  regmap: rbtree: Fixed node range check on sync
  regmap: regcache: Fixup locking for custom lock callbacks
  regmap: debugfs: Check return value of regmap_write()
2013-06-10 13:26:41 -07:00