Commit Graph

1976 Commits

Author SHA1 Message Date
Christoph Egger cb6643e1c3 [libata] pata_marvell: CONFIG_AHCI is really CONFIG_SATA_AHCI
The marvell driver comtains a fallback to ahci for the sata ports
which is incorrectly checked as CONFIG_AHCI while the only AHCI config
item is actually called SATA_AHCI (which also sounds sensible
considering it's a fallback for the sata ports).

Signed-off-by: Christoph Egger <siccegge@stud.informatik.uni-erlangen.de>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Alan Cox 96780078f3 libata: Allow pata_legacy to be built on non-ISA but PCI systems
This is needed for some unsupported hardware setups on strange 64bit
mainboards where crazy stuff has been done like putting flash ata adapters
on the LPC bus, or where the real hardware is hidden/confused.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Bartlomiej Zolnierkiewicz 750e519da7 pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsets
PDC2026x chipsets need the same treatment as PDC20246 one.

This is completely untested but will hopefully fix UDMA issues
that people have been reporting against pata_pdc202xx_old for
the last couple of years.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Bartlomiej Zolnierkiewicz a75032e877 pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cards
On Monday 04 January 2010 02:30:24 pm Russell King wrote:

> Found the problem - getting rid of the read of the alt status register
> after the command has been written fixes the UDMA CRC errors on write:
>
> @@ -676,7 +676,8 @@ void ata_sff_exec_command(struct ata_port *ap, const struct
> ata_taskfile *tf)
>         DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
>
>         iowrite8(tf->command, ap->ioaddr.command_addr);
> -       ata_sff_pause(ap);
> +       ndelay(400);
> +//     ata_sff_pause(ap);
>  }
>  EXPORT_SYMBOL_GPL(ata_sff_exec_command);
>
>
> This rather makes sense.  The PDC20247 handles the UDMA part of the
> protocol.  It has no way to tell the PDC20246 to wait while it suspends
> UDMA, so that a normal register access can take place - the 246 ploughs
> on with the register access without any regard to the state of the 247.
>
> If the drive immediately starts the UDMA protocol after a write to the
> command register (as it probably will for the DMA WRITE command), then
> we'll be accessing the taskfile in the middle of the UDMA setup, which
> can't be good.  It's certainly a violation of the ATA specs.

Fix it by adding custom ->sff_exec_command method for UDMA33 chipsets.

Debugged-by: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Jeff Garzik 429e3861f9 [libata] pata_at91: fix backslash-continued string
Noticed and rough patch by Joe Perches.

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Bartlomiej Zolnierkiewicz 460f531846 pata_via: store UDMA masks in via_isa_bridges table
* store UDMA masks in via_isa_bridges[] and while at it make "flags"
  field to be u8 instead of u16

* convert the driver to use UDMA masks from via_isa_bridges[]

* remove no longer needed VIA_UDMA* defines

Make some minor documentation and CodingStyle fixes while at it.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:46 -05:00
Bartlomiej Zolnierkiewicz f777582f49 pata_via: fix address setup timings underlocking
Correct via_do_set_mode() documentation while at it.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz cfcf9ee26a pata_serverworks: fix error message
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz 8490377acc pata_serverworks: fix PIO setup for the second channel
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz 73e2e3d0e9 pata_efar: fix secondary port support
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz 3403c24529 pata_cypress: fix PIO timings underclocking
Timing registers should be programmed with the desired number of clocks
minus one clock.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz 8ebf473860 pata_cs5535: use correct values for PIO1 and PIO2 data timings
There shouldn't be any problems with it as IDE cs5535 host driver
has been using those values for years and they match values given
in the (publicly available) datasheet.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz c754d9b6e0 pata_cmd64x: remove unused definitions
s/ARTIM2/ARTTIM23/ in cmd648_bmdma_stop() while at it

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz 03a849e6dd pata_cmd64x: cmd648_bmdma_stop() fix
Clear the primary channel pending interrupt bit
instead of the reserved one.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:45 -05:00
Bartlomiej Zolnierkiewicz d62f5576ef pata_cmd64x: fix handling of address setup timings
Account for the requirements of the DMA mode currently used
by the pair device.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Bartlomiej Zolnierkiewicz a2bd62207a pata_cmd64x: fix PIO setup
Fix incorrect handling of recovery clocks value == 16 resulting
in overclocked recovery timings & potentially underclocked active
timings.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Bartlomiej Zolnierkiewicz d8b3d8cfe6 pata_ali: documentation fixes
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Bartlomiej Zolnierkiewicz 9e8808a99c libata: fix CFA handling in ide_timing_compute()
Use standard cycle timing for CFA PIO5 and PIO6 modes.

Based on commit 74638c8 for IDE subsystem.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Bart Hartgers 02d1d6160f sata_via: Correctly setup PIO/DMA for pata slave on vt6421.
Before only the timings for master were set. Datasheet can be found
here: ftp://ftp.vtbridge.org/Docs/Storage/DS_VT6421A_100_CCPL.PDF
Surprisingly, a slave drive works without this patch. According to the
datasheet, the controller by default derives the DMA mode from the
Set Features command issued to a drive. Not sure about the PIO
timings, though. The real problem is that the timings for the master
effectively are the ones tuned for the slave. If these support
different UDMA-settings, there is trouble, especially when the slave
supports a higher UDMA than the master.

Anyhow, using the same mechanism for both master and slave seems like
a good idea.

Signed-off-by: Bart Hartgers <bart.hartgers@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Robert Hancock 9ffc5da5e1 libata: make functions/variables static
Make some variables in ahci and a function in pata_pcmcia static, as found
using sparse.

Signed-off-by: Robert Hancock <hancockrwd@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Tejun Heo 27943620cb libata: implement spurious irq handling for SFF and apply it to piix
Traditional IDE interface sucks in that it doesn't have a reliable IRQ
pending bit, so if the controller raises IRQ while the driver is
expecting it not to, the IRQ won't be cleared and eventually the IRQ
line will be killed by interrupt subsystem.  Some controllers have
non-standard mechanism to indicate IRQ pending so that this condition
can be detected and worked around.

This patch adds an optional operation ->sff_irq_check() which will be
called for each port from the ata_sff_interrupt() if an unexpected
interrupt is received.  If the operation returns %true,
->sff_check_status() and ->sff_irq_clear() will be cleared for the
port.  Note that this doesn't mark the interrupt as handled so it
won't prevent IRQ subsystem from killing the IRQ if this mechanism
fails to clear the spurious IRQ.

This patch also implements ->sff_irq_check() for ata_piix.  Note that
this adds slight overhead to shared IRQ operation as IRQs which are
destined for other controllers will trigger extra register accesses to
check whether IDE interrupt is pending but this solves rare screaming
IRQ cases and for some curious reason also helps weird BIOS related
glitch on Samsung n130 as reported in bko#14314.

  http://bugzilla.kernel.org/show_bug.cgi?id=14314

* piix_base_ops dropped as suggested by Sergei.

* Spurious IRQ detection doesn't kick in anymore if polling qc is in
  progress.  This provides less protection but some controllers have
  possible data corruption issues if the wrong register is accessed
  while a command is in progress.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Johannes Stezenbach <js@sig21.net>
Reported-by: Hans Werner <hwerner4@gmx.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Tejun Heo d88ec2e5c1 libata: cleanup ata_sff_interrupt()
host->ports[i] is never NULL if i < host->n_ports and non-NULL return
from ata_qc_from_tag() guarantees that the returned qc is active.
Drop unnecessary tests.

Superflous () dropped as suggested by Sergei.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:44 -05:00
Seth Heasley 88e8201e67 ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs
Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Seth Heasley 5623cab83e ahci: AHCI and RAID mode SATA patch for Intel Cougar Point DeviceIDs
Signed-off-by: Seth Heasley <seth.heasley@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Shane Huang d6ef31539d ahci: Implement SATA AHCI FIS-based switching support
Tested on AMD internal reference board.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Sergei Shtylyov d817898c2f pata_hpt366: remove irrelevant TODO
HPT36x chips just don't have DPLL.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Sergei Shtylyov fd5e62e22d pata_hpt{37x|3x2n}: improve timing register documentation
Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
31 about it being meaningful for PIO only.  Reformat the whole comment,
while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Sergei Shtylyov 859faa875e pata_hpt366: remove redundant code
There's no need to clear the fast interrupt bit in hpt366_set_mode()
since we're doing it in hpt366_init_chipset() already.

While at it, rename 'addr1' local variable to 'addr' and
exclude 'ap->port_no' from its calculation as HPT36x are
single-channel-per-function chips.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Sergei Shtylyov 1a1b172b96 pata_hpt{37x|3x2n}: unify mode programming
As these drivers' set_piomode() and set_dmamode() methods are almost
identical, factor out the common hpt{37x|3x2n}_set_mode() function
to be called by both of them, the same as in 'pata_hpt366' driver.

This results in ~5% decrease in the 'pata_hpt37x' driver binary
size and in ~4% decrease in the 'pata_hpt3x2n' driver binary size
(as measured on x86-32).

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:43 -05:00
Sergei Shtylyov 6066193399 pata_hpt3x2n: always stretch UltraDMA timing
The UltraDMA Tss timing must be stretched with ATA clock of 66 MHz, but the
driver only does this when PCI clock is 66 MHz, whereas it always programs
DPLL clock (which is used as the ATA clock) to 66 MHz.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: <stable@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:42 -05:00
Sergei Shtylyov 56f46f8c87 pata_hpt37x: use ATA_DMA_* constants
Use ATA_DMA_* constants instead of the bare numbers for the BMIDE registers.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-03-01 14:58:42 -05:00
Linus Torvalds b1bf936840 Merge branch 'for-2.6.34' of git://git.kernel.dk/linux-2.6-block
* 'for-2.6.34' of git://git.kernel.dk/linux-2.6-block: (38 commits)
  block: don't access jiffies when initialising io_context
  cfq: remove 8 bytes of padding from cfq_rb_root on 64 bit builds
  block: fix for "Consolidate phys_segment and hw_segment limits"
  cfq-iosched: quantum check tweak
  blktrace: perform cleanup after setup error
  blkdev: fix merge_bvec_fn return value checks
  cfq-iosched: requests "in flight" vs "in driver" clarification
  cciss: Fix problem with scatter gather elements in the scsi half of the driver
  cciss: eliminate unnecessary pointer use in cciss scsi code
  cciss: do not use void pointer for scsi hba data
  cciss: factor out scatter gather chain block mapping code
  cciss: fix scatter gather chain block dma direction kludge
  cciss: simplify scatter gather code
  cciss: factor out scatter gather chain block allocation and freeing
  cciss: detect bad alignment of scsi commands at build time
  cciss: clarify command list padding calculation
  cfq-iosched: rethink seeky detection for SSDs
  cfq-iosched: rework seeky detection
  block: remove padding from io_context on 64bit builds
  block: Consolidate phys_segment and hw_segment limits
  ...
2010-03-01 09:00:29 -08:00
Martin K. Petersen 8a78362c4e block: Consolidate phys_segment and hw_segment limits
Except for SCSI no device drivers distinguish between physical and
hardware segment limits.  Consolidate the two into a single segment
limit.

Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2010-02-26 13:58:08 +01:00
Martin K. Petersen 086fa5ff08 block: Rename blk_queue_max_sectors to blk_queue_max_hw_sectors
The block layer calling convention is blk_queue_<limit name>.
blk_queue_max_sectors predates this practice, leading to some confusion.
Rename the function to appropriately reflect that its intended use is to
set max_hw_sectors.

Also introduce a temporary wrapper for backwards compability.  This can
be removed after the merge window is closed.

Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2010-02-26 13:58:08 +01:00
Robert Hancock 453d3131ec ahci: disable FPDMA auto-activate optimization on NVIDIA AHCI
Mike Cui reported that his system with an NVIDIA MCP79 (aka MCP7A)
chipset stopped working with 2.6.32. The problem appears to be that
2.6.32 now enables the FPDMA auto-activate optimization in the ahci
driver. The drive works fine with this enabled on an Intel AHCI so
this appears to be a chipset bug.  Since MCP79 is a fairly recent
NVIDIA chipset and we don't have any info on whether any other NVIDIA
chipsets have this issue, disable FPDMA AA optimization on all NVIDIA
AHCI controllers for now.

Should address http://bugzilla.kernel.org/show_bug.cgi?id=14922

Signed-off-by: Robert Hancock <hancockrwd@gmail.com>
While-we-investigate-issue-this-patch-looks-good-to-me-by:
	Prajakta Gudadhe <pgudadhe@nvidia.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Cc: stable@kernel.org
2010-02-24 22:44:48 -05:00
Catalin Marinas 2d68b7fe55 [libata] Call flush_dcache_page after PIO data transfers in libata-sff.c
flush_dcache_page() must be called after (!ATA_TFLAG_WRITE) the
data copying to avoid D-cache aliasing with user space or I-D cache
coherency issues (when reading data from an ATA device using PIO,
the kernel dirties the D-cache but there is no flush_dcache_page()
required on Harvard architectures).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-02-04 01:04:50 -05:00
Tejun Heo cedc9bf906 ahci: add Acer G725 to broken suspend list
Acer G725 shares the same suspend problem with the HP laptops which
lose ATA devices on resume.  New firmware which fixes the problem is
already available.  Add G725 with old firmwares to the broken suspend
list.

This problem has been reported in bko#15104.

  http://bugzilla.kernel.org/show_bug.cgi?id=15104

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Jani-Matti Hätinen <jani-matti.hatinen@iki.fi>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-02-04 01:01:39 -05:00
Douglas Gilbert bc496ed00a libata-scsi passthru: fix bug which truncated LBA48 return values
Fix assignment which overwrote SAT ATA PASS-THROUGH command EXTEND
bit setting (ATA_TFLAG_LBA48)

Signed-off-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-02-04 01:01:22 -05:00
Tejun Heo 534ead7092 libata: retry FS IOs even if it has failed with AC_ERR_INVALID
libata currently doesn't retry if a command fails with AC_ERR_INVALID
assuming that retrying won't get it any further even if retried.
However, a failure may be classified as invalid through hardware
glitch (incorrect reading of the error register or firmware bug) and
there isn't whole lot to gain by not retrying as actually invalid
commands will be failed immediately.  Also, commands serving FS IOs
are extremely unlikely to be invalid.  Retry FS IOs even if it's
marked invalid.

Transient and incorrect invalid failure was seen while debugging
firmware related issue on Samsung n130 on bko#14314.

  http://bugzilla.kernel.org/show_bug.cgi?id=14314

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-20 14:25:11 -05:00
Tejun Heo 5040ab67a2 libata: retry link resume if necessary
Interestingly, when SIDPR is used in ata_piix, writes to DET in
SControl sometimes get ignored leading to detection failure.  Update
sata_link_resume() such that it reads back SControl after clearing DET
and retry if it's not clear.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: fengxiangjun <fengxiangjun@neusoft.com>
Reported-by: Jim Faulkner <jfaulkne@ccs.neu.edu>
Cc: stable@kernel.org
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-12 14:34:14 -05:00
Tejun Heo 0b67c7439f ata_piix: enable 32bit PIO on SATA piix
Commit 871af1210f enabled 32bit PIO for
PATA piix but didn't for SATA.  There's no reason not to use 32bit PIO
on SATA piix.  Enable it.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-12 14:33:23 -05:00
Mikael Pettersson a2342f4643 sata_promise: don't classify overruns as HSM errors
When sata_promise encounters an overrun or underrun error it
translates that to a libata AC_ERR_HSM, causing a hard reset.
Since over/under-runs were thought to be rare and transient,
this action seemed reasonable.

Unfortunately it turns out that the controller throws overrun
errors when e.g. hal polls a CD or DVD writer containing blank
media, causing long sequences of hard resets and retries before
EH finally gives up.

This patch updates sata_promise to classify over/under-runs as
AC_ERR_OTHER instead. This allows libata EH and upper layers to
retry or fail the operation as they see fit without the disruption
caused by repeated hard resets.

This fixes a problem using a DVD-RAM drive with sata_promise,
reported by Thomas Schorpp. I also tested it on a DVD-RW drive.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Tested-by: thomas schorpp <thomas.schorpp@googlemail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-01-12 14:33:07 -05:00
Len Brown fcb11235d3 Merge branch 'misc-2.6.33' into release 2009-12-24 01:19:00 -05:00
Carlos R. Mafra 2370b5ed03 ACPI: do not select ACPI_DOCK from ATA_ACPI
In March 2008 commit 0ac4a3c2fb ("ACPI: fix
ATA_ACPI build") made CONFIG_ACPI_DOCK be selected by CONFIG_ATA_ACPI because
of a build error when CONFIG_ATA_ACPI=y and CONFIG_ACPI_DOCK=m.

However, in September 2008 commit 898b054f3e
("dock: make dock driver not a module") removed the possibility of having
CONFIG_ACPI_DOCK=m and therefore there is no need for selecting it when
CONFIG_ATA_ACPI=y.

This makes the kernel ~5 Kb smaller for people who don't have a dock by
allowing them to not have ACPI_DOCK compiled-in because of ATA_ACPI=y.

Signed-off-by: Carlos R. Mafra <crmafra@aei.mpg.de>
Cc: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-12-24 00:04:40 -05:00
Sonic Zhang 3439d65062 pata_bf54x: handle portmuxing of pins through GPIO PORTs
By default, the PATA pins are routed to the async address lines in which
case, no peripheral muxing needs to be done.  However, if the pins get
routed through the GPIO PORTs pins, we need to make sure to request them
so that the muxing is properly set up.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-21 13:55:38 -05:00
Bartlomiej Zolnierkiewicz 509426bd46 pata_cmd64x: fix overclocking of UDMA0-2 modes
adev->dma_mode stores the transfer mode value not UDMA mode number
so the condition in cmd64x_set_dmamode() is always true and the higher
UDMA clock is always selected.  This can potentially result in data
corruption when UDMA33 device is used, when 40-wire cable is used or
when the error recovery code decides to lower the device speed down.

The issue was introduced in the commit 6a40da0 ("libata cmd64x: whack
into a shape that looks like the documentation") which goes back to
kernel 2.6.20.

Cc: stable@kernel.org
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-20 15:42:12 -05:00
Jeff Garzik 06393afde3 Revert "pata_cmd64x: implement serialization as per notes"
This reverts commit d43744390e, because
it breaks the boot on several machines (mostly sparc64, at present).

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-20 15:39:55 -05:00
Linus Torvalds 70e66a5079 Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  sata_mv: remove pointless NULL test
  pata_hpt3x2n: fix clock turnaround
  libata: fix reporting of drained bytes when clearing DRQ
  sata_mv: add power management support for the PCI controllers.
  sata_mv: store the board_idx into the host private data
  pata_octeon_cf: use resource_size(), to fix resource sizing bug
  libata: use the WRITE_SAME_16 define
  sata_mv: move the PCI bar description initialization code
  sata_mv: add power management support for the platform driver
  sata_mv: support clkdev framework
  sata_mv: increase PIO IORDY timeout

Fixed crazy mode-change in merge.
2009-12-19 11:04:29 -08:00
Jeff Garzik 0535f2bc17 sata_mv: remove pointless NULL test
Remove !ap test, where ap is guaranteed not-NULL.  Found by way of automated
bug report from Alexander Strakh via "Linux Device Drivers Verification
Project (Svace Detector)"

Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-17 01:23:16 -05:00
Sergei Shtylyov 256ace9bbd pata_hpt3x2n: fix clock turnaround
The clock turnaround code still doesn't work for several reasons:

- 'USE_DPLL' flag in 'ap->host->private_data' is never initialized
  or updated, so the driver can only set the chip to the DPLL clock
  mode, not the PCI mode;

- the driver doesn't serialize access to the channels depending on
  the current clock mode like the vendor drivers, so the clock
  turnaround is only executed "optionally", not always as it should be;

- the wrong ports are written to when hpt3x2n_set_clock() is called
  for the secondary channel;

- hpt3x2n_set_clock() can inadvertently enable the disabled channels
  when resetting the channel state machines.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: stable@kernel.org
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-12-17 01:11:27 -05:00