Commit Graph

17 Commits

Author SHA1 Message Date
Gabriel Fernandez ccf719b884 clk: stm32mp1: remove ck_apb_dbg clock
It's recommended to use only clk_sys_dbg clock instead to activate
debug IP.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:23 -07:00
Gabriel Fernandez 1742aed6e5 clk: stm32mp1: set stgen_k clock as critical
stgen_k should be declared as critical to avoid blocking console
when ck_hsi is not used.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:20 -07:00
Gabriel Fernandez a1bf646f71 clk: stm32mp1: add missing tzc2 clock
This patch adds tzc2 clock and rename tzc clock into tzc1

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:16 -07:00
Gabriel Fernandez 4cd2136031 clk: stm32mp1: fix SAI3 & SAI4 clocks
fix bad copy / paste.
SAI3 & SAI4 used gate of SAI2 instead SAI3 & SAI4

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:43:14 -07:00
Gabriel Fernandez aa5fc95fd5 clk: stm32mp1: remove unused dfsdm_src[] const
This patch remove unused constant.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:42:45 -07:00
Gabriel Fernandez e631ad60d2 clk: stm32mp1: add missing static
Add missing static for const parent names and clock ops.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-04-06 13:42:43 -07:00
Gabriel Fernandez 3a43006783 clk: stm32mp1: add Debug clocks
RCC manages clock for debug and trace.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:34 -07:00
Gabriel Fernandez 44cd455a8e clk: stm32mp1: add MCO clocks
Two micro-controller clock output (MCO) pins are available:
MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable
prescaler.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:34 -07:00
Gabriel Fernandez 2c87c9d331 clk: stm32mp1: add RTC clock
This patch adds the RTC clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 1f80590b6b clk: stm32mp1: add Peripheral & Kernel Clocks
Each peripheral requires a bus interface clock.
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.

For each IP, Peripheral clock and Kernel are generally gating with same
gate. Also, Kernel clocks can share a same multiplexer.
This patch introduces a mechanism to manage a gate with several
clocks and to manage a shared multiplexer (mgate and mmux).

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 799b6a125e clk: stm32mp1: add Kernel timers
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez e51d297e9a clk: stm32mp1: add Sub System clocks
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss
and ck_mcuss.
This patch adds also some MUX system and several prescalers.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez a97703c59f clk: stm32mp1: add Post-dividers for PLL
Each PLL has 3 outputs with post-dividers.

pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected

pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR

pll3_p is dedicated for mcu
pll3_q is for Peripheral Kernel Clock
pll3_r is for Peripheral Kernel Clock

pll4_p is for Peripheral Kernel Clock
pll4_q is for Peripheral Kernel Clock
pll4_r is for Peripheral Kernel Clock

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez c6cf4d3248 clk: stm32mp1: add PLL clocks
STMP32MP1 has 4 PLLs.
PLL supports integer and fractional mode.
Each PLL has 3 output dividers (p, q, r)

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez dc32eaac49 clk: stm32mp1: add Source Clocks for PLLs
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:33 -07:00
Gabriel Fernandez 8e6c27c0d7 clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators
MP1 Gate is a gate with a set and a clear register.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:32 -07:00
Gabriel Fernandez 9bee94e7b7 clk: stm32mp1: Introduce STM32MP1 clock driver
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate, divider and fixed factor).

All clocks will be defined in one table.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2018-03-11 15:40:32 -07:00