Commit Graph

80 Commits

Author SHA1 Message Date
Christian König e86f9ceee1 drm/amdgpu: move sync into job object
No need to keep that for every IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König a0332b56f6 drm/amdgpu: send SDMA/GFX IB tests directly to the ring again
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00
Christian König b07c60c065 drm/amdgpu: move ring from IBs into job
We can't submit to multiple rings at the same time anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König 9e5d53094c drm/amdgpu: make pad_ib a ring function v3
The padding depends on the firmware version and we need that for BO moves as
well, not only for VM updates.

v2: new approach of making pad_ib a ring function
v3: fix typo in macro name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König b07c9d2a73 drm/amdgpu: move more logic into amdgpu_vm_map_gart v3
No need to duplicate that code over and over again. Also stop using the
flags to determine if we need to map the addresses.

v2: constify the pages_addr
v3: rebased, fix typo in commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:04 -05:00
Christian König a27de35caa drm/amdgpu: remove the ring lock v2
It's not needed any more because all access goes through the scheduler now.

v2: Update commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:58 -05:00
Alex Deucher ea5e4c8731 drm/amdgpu: remove some more semaphore leftovers
No longer needed since semaphores were removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:51 -05:00
Chunming Zhou 2f4b940033 drm/amdgpu: clean up hw semaphore support in driver
No longer used.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Alex Deucher e3b04bc790 drma/dmgpu: move cg and pg flags into shared headers
So they can be used by powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Christian König b7e4dad3e1 drm/amdgpu: remove old lockup detection infrastructure
It didn't worked to well anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-21 11:35:12 -04:00
Alex Deucher c113ea1c4f drm/amdgpu: rework sdma structures
Rework the sdma structures in the driver to
consolidate all of the sdma info into a single
structure and allow for asics that may have
different numbers of sdma instances.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:36 -04:00
Jammy Zhou ac01db3dd5 drm/amdgpu: implement burst NOP for SDMA
Customize the insert_nop func for SDMA rings, and use burst NOP for
ring/IB submissions in other places as well

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02 12:35:39 -04:00
Jammy Zhou edff0e2826 drm/amdgpu: add insert_nop ring func and default implementation
The insert_nop function is added to amdgpu_ring_funcs structure as
well as the default implementation

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02 12:24:43 -04:00
Jammy Zhou 18111de0df drm/amdgpu: add burst_nop flag for sdma
The burst NOP is supported for SDMA when feature_version is >= 20.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02 12:22:28 -04:00
Chunming Zhou 6e7a384074 drm/amdgpu: use IB for fill_buffer instead of direct command
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-28 15:04:19 -04:00
Chunming Zhou c7ae72c01b drm/amdgpu: use IB for copy buffer of eviction
This aids handling buffers moves with the scheduler.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-26 17:50:42 -04:00
Christian König b203dd9594 drm/amdgpu: fix zeroing all IB fields manually v2
The problem now is that we don't necessarily call amdgpu_ib_get()
in some error paths and so work with uninitialized data.

Better require that the memory is already zeroed.

v2: better commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-20 17:05:34 -04:00
Chunming Zhou 281b422301 drm/amdgpu: add reference for **fence
fix fence is released when pass to **fence sometimes.
add reference for it.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:51:17 -04:00
Chunming Zhou 1763552ee8 drm/amdgpu: add kernel fence in ib_submit_kernel_helper
every sbumission should be able to get a fence.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:54 -04:00
Chunming Zhou ed88a0ee7f drm/amdgpu: use kernel fence for sdma ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17 16:50:54 -04:00
Chunming Zhou 0011fdaa4d drm/amdgpu: use gpu scheduler for sdma ib test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17 16:50:45 -04:00
Chunming Zhou 4274f5d45c drm/amdgpu: prepare job before push to sw queue for pte ring
user mode will still use pte ring as a normal ring.
if the prepare job generates another command(update pte) on its ring in scheduler,
then will kill scheduler which is going to waiting later job but pending running job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:36 -04:00
Jammy Zhou cfa2104fbc drm/amdgpu: add feature version for SDMA ucode
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 14:26:50 -04:00
Alex Deucher 454fc95e84 drm/amdgpu: fix the build on big endian
Some leftover copy and pastes from radeon that never
got updated.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:01 -04:00
Chunming Zhou 890ee23fc6 drm/amdgpu: disable user fence interrupt (v2)
amdgpu submits both kernel and user fences, but just need one interrupt,
disable user fence interrupt and don't effect user fence.

v2: fix merge error

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-05 11:02:06 -04:00
monk.liu b9a7faaeb2 drm/amdgpu: remove all sh mem register modification in vm flush
Leave that at the values set during init.  No need to update
them repeatedly.

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-06-03 21:03:56 -04:00
yanyang1 5fc3aeeb9e drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:51 -04:00
Christian König d2edb07b10 drm/amdgpu: cleanup HDP flush handling
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-03 21:03:32 -04:00
Jack Xiao 74a5d1656e drm/amdgpu: allow unaligned memory access (v2)
Set up the CP and SDMA for proper unaligned memory access.
Required for OpenCL 2.x

v2: udpate commit message

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-03 21:03:28 -04:00
Alex Deucher a2e73f56fa drm/amdgpu: Add support for CIK parts
This patch adds support for CIK parts.  These parts
are also supported by radeon which is the preferred
option, so there is a config option to enable support
for CIK parts in amdgpu for testing.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:17 -04:00