Commit Graph

43 Commits

Author SHA1 Message Date
Geert Uytterhoeven c8d9fdbe2d ARM: shmobile: sh73a0 dtsi: Add L2 cache-controller node
Add the missing L2 cache-controller node, and link the CPU nodes to it.
This will allow migration to the generic l2c OF initialization.

The L2 cache is an ARM L2C-310 (r3p1), of size 512 KiB (64 KiB x 8
ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-25 10:42:38 +09:00
Geert Uytterhoeven 94bdc48d55 ARM: shmobile: sh73a0 dtsi: Add missing "gpio-ranges" to gpio node
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the
case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT
doesn't work:

    requesting hog GPIO led1-high (chip sh73a0_pfc, offset 20) failed

The actual error code is -517 == -EPROBE_DEFER.

The problem is that PFC+GPIO registration is handled in multiple steps:
  1. pinctrl_register(),
  2. gpiochip_add(),
  3. gpiochip_add_pin_range().

Configuration of the hogs is handled in gpiochip_add():

    gpiochip_add
        of_gpiochip_add
            of_gpiochip_scan_hogs
                gpiod_hog
                    gpiochip_request_own_desc
                        __gpiod_request
                            chip->request
                                pinctrl_request_gpio
                                    pinctrl_get_device_gpio_range

However, at this point the GPIO controller hasn't been added to
pinctrldev_list yet, so the range can't be found, and the operation fails
with -EPROBE_DEFER.

To fix this, add a "gpio-ranges" property to the gpio device node, so
the ranges are added by of_gpiochip_add_pin_range(), which is called by
of_gpiochip_add() before the call to of_gpiochip_scan_hogs().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-05 06:39:28 +09:00
Geert Uytterhoeven 4239baee80 ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes
irqpin -> interrupt-controller

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11 15:01:26 +09:00
Geert Uytterhoeven dfaac7b7e4 ARM: shmobile: sh73a0 dtsi: Fix SCIFB naming
The single SCIFB on SH-Mobile AG5 is called "scifb", not "scifb8".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-04-28 09:47:59 +09:00
Geert Uytterhoeven bee7a18e85 ARM: shmobile: sh73a0 dtsi: Add PM domain support
Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up all devices to their respective PM domains.

Note that unlike on R-Mobile A1 (r8a7740), PM domain D4 can be powered
down without ill effects on s2ram behavior, just like on SH-Mobile AP4
(sh7372).  Hence we can postpone adding a (minimal) device node for the
Coresight-ETM hardware block.

The System Controller is also used by the R-Mobile Reset driver, which
can now restart the system.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 08:22:49 +09:00
Geert Uytterhoeven 3022574385 ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
Add a node for the Private Timer and Watchdog, as found in the Cortex-A9
MPCore.

Without this, there's no clocksource available during early kernel
initialization, before cmt1 is initialized, leading to a lock-up if
CONFIG_CPU_IDLE=y.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 08:22:48 +09:00
Geert Uytterhoeven 217b6e65e5 ARM: shmobile: sh73a0 dtsi: Add Bus State Controller node
Add a node for the Bus State Controller (BSC) on sh73a0, to which
multiple external devices can be connected.

The BSC is driven by the ZB clock, and located in PM domain A4S.
A reference to the latter will be added later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 08:22:47 +09:00
Ulrich Hecht 09940bf079 ARM: shmobile: sh73a0 dtsi: Add selectable sources to DIV6 clocks
Specifies clock sources and register bits.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Drop renesas,src-shift/renesas,src-width, pad to 4 or 8 parents]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:41 +09:00
Geert Uytterhoeven 56a215d66b ARM: shmobile: sh73a0 dtsi: Add missing INTCA0 clock for irqpin module
This clock drives the irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.
By making it available to the driver, we make sure it gets enabled when
needed, and allow it to be managed by system or runtime PM.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:41 +09:00
Laurent Pinchart 48bdf06dd9 ARM: shmobile: sh73a0 dtsi: Set control-parent for all irqpin nodes
The sh73a0 INTC can't mask interrupts properly most likely due to a
hardware bug. Set the control-parent property to delegate masking to the
parent interrupt controller.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:36 +09:00
Linus Torvalds 18656782a8 ARM: SoC driver updates
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 This time around, much of this is for at91, with the bulk of it being syscon
 and udc drivers.
 
 Also, there's:
 - coupled cpuidle support for Samsung Exynos4210
 - Renesas 73A0 common-clk work
 - of/platform changes to tear down DMA mappings on device destruction
 - a few updates to the TI Keystone knav code
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Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  This time around, much of this is for at91, with the bulk of it being
  syscon and udc drivers.

  Also, there's:
   - coupled cpuidle support for Samsung Exynos4210
   - Renesas 73A0 common-clk work
   - of/platform changes to tear down DMA mappings on device destruction
   - a few updates to the TI Keystone knav code"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  cpuidle: exynos: add coupled cpuidle support for exynos4210
  ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary
  soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static
  soc: ti: knav_qmss_queue: makefile tweak to build as dynamic module
  pcmcia: at91_cf: depend on !ARCH_MULTIPLATFORM
  soc: ti: knav_qmss_queue: export API calls for use by user driver
  of/platform: teardown DMA mappings on device destruction
  usb: gadget: at91_udc: Allocate udc instance
  usb: gadget: at91_udc: Update DT binding documentation
  usb: gadget: at91_udc: Rework for multi-platform kernel support
  usb: gadget: at91_udc: Simplify probe and remove functions
  usb: gadget: at91_udc: Remove non-DT handling code
  usb: gadget: at91_udc: Document DT clocks and clock-names property
  usb: gadget: at91_udc: Drop uclk clock
  usb: gadget: at91_udc: Fix clock names
  mfd: syscon: Add Atmel SMC binding doc
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-matrix registers definition
  clk: shmobile: fix sparse NULL pointer warning
  ...
2015-02-17 09:38:59 -08:00
Geert Uytterhoeven 29828c8756 ARM: shmobile: sh73a0 dtsi: Add memory-controller nodes
Add device nodes for the two SDRAM Bus State Controllers.
The SBSCs are located in the A4BC0 resp. A4BC1 PM domains, which must
not be powered down, else the system will crash.

References to the A4BC0 and A4BC1 PM domains will be added later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-15 08:54:38 +09:00
Geert Uytterhoeven f76452fdfe ARM: shmobile: sh73a0 dtsi: Add SoC-specific FSI2 compatible property
The FSI2 sound node used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-08 09:09:18 +09:00
Ulrich Hecht f73e1e28b5 ARM: shmobile: sh73a0: add MSTP clock assignments to DT
Assigns clocks to cmt1, i2c*, mmcif, sdhi*, and scif*.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 17:09:24 +09:00
Ulrich Hecht 00df611376 ARM: shmobile: sh73a0: Common clock framework DT description
Declares all sh73a0 clocks supported by the legacy clock framework.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 17:09:22 +09:00
Geert Uytterhoeven dd4dc874d1 ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
The IIC nodes used the generic compatible properties only.
This causes the driver to fail when using Standard Speed, as the
operational clock is driven by the 104 MHz HP clock:

    i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf
    i2c-sh_mobile: probe of e6820000.i2c failed with error -22

Add the SoC-specific compatible property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-19 09:21:50 +09:00
Linus Torvalds eb785bef68 ARM: SoC DT updates for 3.18
As usual, this is the largest branch, though this time a little under
 half of the total changes with 307 individual non-merge changesets.
 
 The largest changes are the addition of new machines, in particular
 the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
 for the old i.MX1 platform.
 
 Other changes include
 - at91: various sam9 and sama5 updates
 - exynos: much extended Peach Pi/Pit (Chromebook 2) support
 - keystone: new peripherals
 - meson: added DT for meson6 SoC
 - mvebu: new device support for Armada 370/375
 - qcom: improved support for IPQ8064 and MSM8x60
 - rockchip: much improved support for rk3288
 - shmobile: lots of updates all over the place
 - sunxi: dts license change
 - sunxi: more a23 device support
 - vexpress: CLCD DT description
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, this is the largest branch, though this time a little under
  half of the total changes with 307 individual non-merge changesets.

  The largest changes are the addition of new machines, in particular
  the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support
  for the old i.MX1 platform.

  Other changes include
   - at91: various sam9 and sama5 updates
   - exynos: much extended Peach Pi/Pit (Chromebook 2) support
   - keystone: new peripherals
   - meson: added DT for meson6 SoC
   - mvebu: new device support for Armada 370/375
   - qcom: improved support for IPQ8064 and MSM8x60
   - rockchip: much improved support for rk3288
   - shmobile: lots of updates all over the place
   - sunxi: dts license change
   - sunxi: more a23 device support
   - vexpress: CLCD DT description"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits)
  ARM: DTS: meson: update DTSI to add watchdog node
  ARM: dts: keystone-k2l: fix mdio io start address
  ARM: dts: keystone-k2e: fix mdio io start address
  ARM: dts: keystone-k2e: update usb1 node for dma properties
  ARM: dts: keystone: fix io range for usb_phy0
  Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt"
  Revert "ARM: dts: hix5hd2: add wdg node"
  ARM: dts: add rk3288 i2s controller
  ARM: vexpress: Add CLCD Device Tree properties
  ARM: bcm2835: add I2S pinctrl to device tree
  ARM: meson: documentation: add bindings documentation
  ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
  ARM: dts: mt6589: Change compatible string for GIC
  ARM: dts: mediatek: Add compatible property for aquaris5
  ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk
  ARM: dts: mt6589: Fix typo in GIC unit address
  ARM: dts: Build dtb for Mediatek board
  ARM: dts: keystone: fix bindings for pcie and usb clock nodes
  ARM: dts: keystone: k2l: Fix chip selects for SPI devices
  ARM: dts: keystone: add dsp gpio controllers nodes
  ...
2014-10-08 17:22:23 -04:00
Arnd Bergmann 60f91268ee Second Round of Renesas ARM Based SoC DT Timers Updates for v3.18
* kzm9g-reference: Enable CMT1 in device tree
 * Use SoC-specific timer compat strings
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Merge tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Second Round of Renesas ARM Based SoC DT Timers Updates for v3.18" from Simon Horman:

* kzm9g-reference: Enable CMT1 in device tree
* Use SoC-specific timer compat strings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: kzm9g-reference: Enable CMT1 in device tree
  ARM: shmobile: sh73a0: Add CMT1 device to DT
  ARM: shmobile: r8a7740: Use SoC-specific 48-bit CMT compat string
  ARM: shmobile: r8a7779: Use SoC-specific TMU compat string
  ARM: shmobile: r8a7791: Use SoC-specific 48-bit CMT compat string
  ARM: shmobile: r7s72100: Use SoC-specific MTU2 compat string
  ARM: shmobile: r8a7790: Use SoC-specific 48-bit CMT compat string
2014-09-11 09:45:18 +02:00
Ulrich Hecht 6a5336a77c ARM: shmobile: sh73a0: Add CMT1 device to DT
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-09-09 11:53:08 +09:00
Geert Uytterhoeven f170b97c9a ARM: shmobile: sh73a0 dtsi: Move interrupt-parent to the top
Add an "interrupt-parent = <&gic>;" at the top, which is inherited by
all child nodes, so the "interrupt-parent" properties can be removed
from the individual child nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 12:34:53 +09:00
Magnus Damm 13bd825bdd ARM: shmobile: sh73a0: Update DTS to include CPU frequency
Add CPU Frequency information to the sh73a0 DTS file. This
will allow us to use the shared C code on sh73a0 and KZM9G
which reads out the clock frequency from DT and calculates the
delay settings from there.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 11:31:56 +09:00
Simon Horman 2131421b85 ARM: shmobile: sh73a0: Add SCIF nodes
This describes all of the SCIF hardware of the sh73a0.
Each node is disabled and may be enabled as necessary
by board DTS files.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-12 15:16:57 +02:00
Lucas Stach de66b58404 ARM: shmobile: sh73a0: drop address cells from GIC node
This is likely a copy-and-paste error from the
ARM GIC documentation, that has already been fixed.

address-cells should have been set to 0, as with the size
cells. As having those properties set to 0 is the
same thing as not specifying them, drop them completely.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-15 07:37:57 +09:00
Laurent Pinchart aba76d286e ARM: shmobile: sh73a0: Specify PFC interrupts in DT
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19 20:01:32 +09:00
Kuninori Morimoto 63b1303d19 ARM: shmobile: sh73a0: add FSI support via DTSI
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12 21:06:14 +09:00
Magnus Damm 8bb44445b0 ARM: shmobile: Use sh73a0 suffix for INTC compat string
Add "renesas,intc-irqpin-sh73a0" to the compatible string for the
IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow
the same style as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10 17:27:22 +09:00
Kuninori Morimoto e8a8b8a3cd ARM: shmobile: sh73a0: fixup sdhi compatible name
sh73a0 != r8a7740

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10 17:27:10 +09:00
Laurent Pinchart 5f75e73c37 ARM: shmobile: Use interrupt macros in SoC DT files
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10 17:27:07 +09:00
Kuninori Morimoto 33f6be3bf6 ARM: shmobile: sh73a0: tidyup DT node naming
According to ePAPR spec,
this patch tidies up DT node name and related clock.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10 17:27:00 +09:00
Kevin Hilman 7587b5965f Changes needed to prepare for making omap3 device tree only:
- Always build in board-generic, and add pdata quirks and auxdata
   support for it so we have all the pdata related quirks
   in the same place.
 
 - Merge of the drivers/pinctrl changes that are needed for PM
   to continue working on omap3 and also needed for other omaps
   eventually. The three pinctrl related patches have been acked
   by Linus Walleij and are pulled into both the pinctrl tree
   and this branch.
 
 - Few defconfig related changes for drivers needed.
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Merge tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

From Tony Lindgren:
Changes needed to prepare for making omap3 device tree only:

- Always build in board-generic, and add pdata quirks and auxdata
  support for it so we have all the pdata related quirks
  in the same place.

- Merge of the drivers/pinctrl changes that are needed for PM
  to continue working on omap3 and also needed for other omaps
  eventually. The three pinctrl related patches have been acked
  by Linus Walleij and are pulled into both the pinctrl tree
  and this branch.

- Few defconfig related changes for drivers needed.

* tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits)
  ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies
  ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig
  ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it
  ARM: OMAP2+: Add minimal 8250 support for GPMC
  ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3
  ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap
  ARM: OMAP2+: Add support for auxdata
  pinctrl: single: Add support for auxdata
  pinctrl: single: Add support for wake-up interrupts
  pinctrl: single: Prepare for supporting SoC specific features
  ARM: OMAP2+: igep0020: use display init from dss-common
  ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board
  +Linux 3.12-rc4

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-10-14 15:29:24 -07:00
Guennadi Liakhovetski eda3a4fa95 ARM: shmobile: only enable used I2C interfaces in DT on all Renesas boards
Currently all I2C interfaces in all *.dtsi files for various Renesas SoCs
are enabled by default. Switch them all off and only enable populated I2C
interfaces in board-specific *.dts files.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-10-08 09:25:13 +09:00
Guennadi Liakhovetski df1d0584b2 ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format
Currently DT compatibility strings of both types can be found in the kernel
sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be
followed and the former one is preferred. This patch converts the SDHI
MMC driver and its users to the common standard. This is safe for now, since
ATM no real products are using this driver with DT.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Chris Ball <cjb@laptop.org>
[Removed r8a7740.dtsi portion as it is not applicable]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-09-21 09:55:32 -07:00
Linus Torvalds fa91515cbf ARM: Renesas SoC cleanup, refactoring and more SMP support
Lots of cleanup and refactoring and some SMP additions for Renesas
 platforms.  Due to some inter-dependencies with other arm-soc
 branches, this Renesas stuff was separated out for sending after the
 other branches were merged.
 
 Highlights:
 - remove unused board support and cleanup of unused headers
 - refactoring of init and device registration
 - simplify IRQ initialization
 
 Conflicts: Too many. Most of these are because Simon chose to send
 some board updates through the V4L tree that ends up colliding with
 the main platform changes. We'll work with him on sorting out his
 workflow:
 
 - arch/arm/boot/dts/r8a7740.dtsi:
   - Add/add conflict in a devicetree file (keep both)
 
 - arch/arm/mach-shmobile/Makefile:
   - Splitting out of clock files collides with intc move to DT.
     Keep HEAD version but remove intc-* files for R8A7740 and R8A7779.
 
 - arch/arm/mach-shmobile/board-bockw.c:
   - Keep HEAD but remove i2c, hspi and mmc device init calls
 
 - arch/arm/mach-shmobile/board-marzen.c
   - Remove mach/hardware.h include and r8a7779_add_usb_phy_device() call,
     everything else stays.
 
 - arch/arm/mach-shmobile/include/mach/r8a7778.h:
   - From HEAD, Keep camera-rcar.h include and r8a7778_add_vin_device()
   - From branch, keep everything
 
 - arch/arm/mach-shmobile/include/mach/r8a7779.h:
   - From HEAD, Keep only camera-rcar.h include and r8a7779_add_vin_device()
 
 - arch/arm/mach-shmobile/setup-r8a7778.c
   - Keep HEAD, but drop the MMC section (struct resource + add_mmc_device())
   - take the new function name from our side (r8a7778_add_dt_devices())
 
 - arch/arm/mach-shmobile/setup-r8a7779.c
   - Keep HEAD, but drop r8a7779_add_usb_phy_device()
 
 I've also pushed a test-merge2 branch where you can see how I resolved
 them.
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Merge tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Renesas SoC cleanup, refactoring and more SMP support from Kevin Hilman:
 "Lots of cleanup and refactoring and some SMP additions for Renesas
  platforms.  Due to some inter-dependencies with other arm-soc
  branches, this Renesas stuff was separated out for sending after the
  other branches were merged.

  Highlights:
   - remove unused board support and cleanup of unused headers
   - refactoring of init and device registration
   - simplify IRQ initialization"

* tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
  ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
  ARM: shmobile: Introduce per-CPU SMP boot / sleep code
  ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
  ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
  ARM: shmobile: Add shared SCU CPU Hotplug code
  ARM: shmobile: Use shared SCU SMP boot code on emev2
  ARM: shmobile: Use shared SCU SMP boot code on r8a7779
  ARM: shmobile: Use shared SCU SMP boot code on sh73a0
  ARM: shmobile: Introduce shared SCU SMP boot code
  ARM: shmobile: sh73a0: Remove global GPIO_NR definition
  ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
  ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
  ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
  ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
  ARM: shmobile: bockw: add missing __initdata
  ARM: shmobile: r8a7790: add missing __initdata
  ARM: shmobile: r8a7779: add missing __initdata
  ARM: shmobile: Remove unused shmobile_init_time()
  ARM: shmobile: Use clocksource_of_init() on r8a7790
  ARM: shmobile: Use default ->init_time() on KZM9G DT ref
  ...
2013-09-09 16:33:57 -07:00
Magnus Damm 4c90483a9c ARM: shmobile: sh73a0: add PMU information to sh73a0.dtsi
Add PMU information to sh73a0.dtsi. With this
included KZM9G DT reference may use the PMU.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-31 15:31:10 +09:00
Laurent Pinchart 3f59007e8e ARM: shmobile: sh73a0: Add pin control device to device tree
Add a pfc node to the sh73a0 device tree and remove manual pinmux
initialization from the corresponding board files.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-07-22 10:12:36 +09:00
Guennadi Liakhovetski 561a1a31d2 ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
The convention for Device Tree node names is <device>@<hex-address>, where
the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
DT names.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-18 16:18:02 +09:00
Simon Horman eb0ae72809 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10
Highlights:
 
 * Compilation fixes for sh7269 and for when CONFIG_BUG is not set
 * sh-pfc Support for r8a73a4 SoC
 * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC
 
 This pull request is based on a merge of:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
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Merge tag 'renesas-pinmux2-for-v3.10' into boards-base

Second round of Renesas ARM and SH based SoC pinmux updates for v3.10

Highlights:

* Compilation fixes for sh7269 and for when CONFIG_BUG is not set
* sh-pfc Support for r8a73a4 SoC
* Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC

This pull request is based on a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

This merge is made to supply run-time dependencies for the following
patches that will bea added on top:

ARM: shmobile: APE6EVM LAN9220 support
ARM: shmobile: APE6EVM PFC support
2013-04-03 10:49:18 +09:00
Guennadi Liakhovetski 558f874029 ARM: shmobile: sh73a0: add irqpin DT nodes
Add DT nodes for the 4 irqpin interrupt controllers on sh73a0. We add them
to sh73a0.dtsi, which is also used by configurations, doing all their
device instantiation from board the .c code. We rely on the fact, that
such configurations don't instantiate devices from the device-tree.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02 10:58:24 +09:00
Guennadi Liakhovetski a463f73176 ARM: shmobile: kzm9g-reference: fix device-tree bindings and device names
Fix several device-tree bindings, that haven't been updated for newest
versions of respective drivers, and device names and pin numbers, left over
from non-DT and old pinctrl versions.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-21 22:03:50 +09:00
Guennadi Liakhovetski 546e5d3ef6 ARM: shmobile: sh73a0: move SDHI and MMCIF DT nodes to sh73a0.dtsi
To avoid having to repeat common DT node properties in all .dts files
move them to SoC's .dtsi file, setting their status to "disabled."
Individual boards will pick up devices, that they want to use and
change their DT node status to enabled.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-21 19:35:16 +09:00
Simon Horman c5795aec84 ARM: mach-shmobile: sh73a0: Add reg and device_type properties to cpus
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-29 11:44:54 +09:00
Simon Horman 486095331a ARM: mach-shmobile: sh73a0: Minimal setup using DT
Allow a minimal setup of the sh73a0 SoC using a flattened device tree.
In particular, Configure the i2c controllers using a flattened device tree.

SCI serial controller and CMT clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.

*** Please note that the clock initialisation scheme used in
    this patch does not currently work with SMP as there
    is a yet to be resolved lock-up in workqueue initialisation.

    CONFIG_SMP must be disabled when using this code. ***

Includes update from Thierry Reding to no longer use gic_handle_irq()

Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

fix
2013-01-25 12:43:49 +09:00
Simon Horman a3f22db510 ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DT
This allows the GIC interrupt controller of the sh73a0 SoC to be
initialised using a flattened device tree blob.

It does not allow the INTC interrupt controller which is also present on
the sh73a0 SoC to be enabled via device tree.  Nor does it handle sharing
of interrupts between the GIC and INTC interrupt controllers.

This limits the usefulness of this code to applications which only wish to
access devices which use interrupts that can be handled by the GIC
interrupt controller. Other applications should, for now, continue using
non-device tree initialisation of the sh72a0 interrupt controllers.

Includes update to use irqchip_init() by Thierry Reding

Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-25 12:43:48 +09:00