Devicetree changes for omaps for gta04, Phytec am335x devices, and to
drop a obsolete compatible property:
- A non-urgent fix for gta04 to enable more dma channels for some audio
configurations
- Update the dts compatible and vendor prefixes for gta04
- A series of updates for Phytec am335x based boards to configure more
devices like rtc and audio, and a few clean-up patches
- A change to drop the usage of "ti,omap36xx" compatible, the driver
code already checks for "ti,omap3630" that is also alread set in the
dts files. This makes the yaml binding conversion a bit simpler.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmQlfyQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOrTQ//XymLo20hGo51edplbkVZf8ORcJIZKh/p
MHGHBNRprg1LXkix1bMv/eeW2VbY8Cibuv03alMzNY1PMhlQhaQ3HdkPDLkXFYEB
2N75ysNNnx6AuVZwTraBICLXgSRixjUcPcxWIV/x59F98n3vkxVi14JgoWxcN8a4
apHptRHuMKrUWGk8r1RIa9NbwM8sMU6pM1kRl9nED8lROs6gK0D9UNkZh1ZGvSfC
Ml8N4WMAE7BGf8zHVgaoclB9SDqDPJ0hxvO9/wgoXShLhdIS2ay8WPvSVCaTxLO9
BA1LZ8x2Xxr3XD+9HTNTUCHiBiVwuQtF0luzzN0iWQZA9NMPeCNIDCtRatOTe+Mj
Z/xUbKeMKOdjfigPmCVcxHb/eC87gJxUz2mrwIokvmFuvOJM2gWNySyUeDILm6hq
wY5aI23XrPv0mv15/XfaMc/p5/REBgdcWw/3A1siUuZIEsObL5k7Y8+GcMMPddEw
6s4t6gICEe273dnES4wmYGBbRd7NP9qoDhk680ulzTfSBznRyDQjB5hkCQcZpyPq
FaSpDMuhobGjRD9sgmbNmcUlPvZkO29BXhzxi+fuE2zi/0HcXglVU6RQg1Lx93IC
JNB3gXC2pfzcBcWEHl2h4p9JOdbB80Sh+yi0E8g52IntlfzuUUqBc64VA8GlF1Go
cg/ch14DeaA=
=iNMn
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQsMfIACgkQmmx57+YA
GNls+A//Q7sSZY9qjxPWc7HRfaoul6Iy5DBOOkC8IkkZziid5/WcERGp64asSIOA
U3igJv+1hk4TpiMuX7lSfB+EWZCefo+RFkw/mUOSKhFEnfk0mDEcPTV5cRAhxLxR
ybs3E77k4R8wGJLAi3d586FY3kDy8p0pdIF3LjqLtJjbnMFi3mu5pf/t6KbzqRDz
ZJoxwpFcnTbfLV6XOjlAyQUDKadT1ki4UMd0tVqQHP+l1LrlPwSsl+5HirdytZyE
xiAa56B9l7NwgV5YA4hfKCR6NuFUTRu0MFMep0Hgv6lMAhJVL8JGz3qt9eLvbwQC
GOWj/4rZAVmb69jVJXjrPCD/1IFFfMSFd5DWRqlYMuAWm3OKdmLyMM4W3spQyPOo
/Ab6NY7MmM6XZf9Dl6A0NMyr3AWvvs7KDN6Z24JozKuXp8W8v6vsrF3VhUoEumEa
tOhd4PldLSFJ65JOL0JQSYXhMb/m3TqdDEfae75w77+X5+9G3BLDfb5iikhOmiWT
iBdKziKCAssjmli6KdaPlaf2emyiyHONFxAbZ+cT1UEJTQvP1WYwvqvolimvnEum
14LEZM8tcX+HQLqE7/kLWhHjYFhY9GvrX/UQ7RRN2yS7+APAMBhY5XaC93bjeJsg
XODwubgs1i+mhZ0FG8UGX+XLW+t3AVn2p3wE5z0XDOsOrKvcx1M=
=yJ9h
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.4
Devicetree changes for omaps for gta04, Phytec am335x devices, and to
drop a obsolete compatible property:
- A non-urgent fix for gta04 to enable more dma channels for some audio
configurations
- Update the dts compatible and vendor prefixes for gta04
- A series of updates for Phytec am335x based boards to configure more
devices like rtc and audio, and a few clean-up patches
- A change to drop the usage of "ti,omap36xx" compatible, the driver
code already checks for "ti,omap3630" that is also alread set in the
dts files. This makes the yaml binding conversion a bit simpler.
* tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap: Drop ti,omap36xx compatible
ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type.
ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger.
ARM: dts: am335x-phycore-som: Remove underscore in node names.
ARM: dts: am335x-regor: Remove underscore in node names.
ARM: dts: am335x-pcm-935: Remove underscore in node names.
ARM: dts: am335x-wega: Change node name of sound card, remove underscores.
ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver.
ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC
ARM: dts: omap3-gta04: fix compatible record for GTA04 board
ARM: dts: gta04: fix excess dma channel usage
Link: https://lore.kernel.org/r/pull-1680180389-756753@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0,
- Add uSD card and eMMC support for the RZ/V2M Evaluation Kit 2.0,
- Add CAN-FD, thermal, GMSL2 video capture, and sound support for the
R-Car V4H SoC and the White-Hawk development board,
- Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs,
- Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
- Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and
the Renesas Condor and ULCB development boards,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZCFQ5wAKCRCKwlD9ZEnx
cGqBAQDWxWvL3fy+srYshTn4KoTmoJ1T00SQDNvRoN0r97N8bAD+Mw3hhApGtn9O
SpnBwOSvQeYzMLrG9NczM5JJu1eW8Qs=
=eROn
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQsMWsACgkQmmx57+YA
GNnIkQ//ciTSKL/63MEfvrFf4PLTcyupw0VDMmZHyianCgPmHvSIFFusTttU8Sfv
O9ColKpKy2kAsPKjlsmdGkw2kdw/RCypQLcf+VHNGR06Imn4kUQBDIqEN9X1NgQi
gdEoQi70l4HD87rLa+Oow5XGFEAPXDcJqYZ0UF09CJcHcdaUfDy0wnEwxw4WU17N
oUsoKcv5b+bxgXqWNNWMkTqdDAbDTdBLJiwuzKuUwNJBJfr+UNIL1fslL8L08RmO
QPuhE5N3XjDViOWPr5q75IGTVmSRJ6ng88PheBlMiPmhbDPlNw5l9MebV6XTaosX
+rqMaEboftqSID1bp8PyT/s5u9ev+VjMqQFxSIjb1oueALMRO5nV5un4Al9Qxf3s
HgWXyaGwD5ENWE6yDTcbery6dowB+dZHCA2Ks6iVnEofr+SPd52a8A0ug0pXUaQ1
4iD/KONIzEC6Qzb++6fLUcQocK+ICERQYU+9USv2fGKjRA3zUuDfmM7MUv1wSC9s
nMTLVl3lATYM/LSnruugiAtK0HWHSQbN9DsfeTaFz8/f0jHPbLvo1gIYWytUsb1J
pofvNjBdQrDi/ZQUOKTtg2YXPq/GkK21Ctk9Jq+ycCXbPJUtPnqOAc1NSG57+pyA
PoNP9e5QGGt8/xAzzUNFbUOuIcBp6QCed2FmaA3T9dYxYZG1jr4=
=HxdL
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4
- Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0,
- Add uSD card and eMMC support for the RZ/V2M Evaluation Kit 2.0,
- Add CAN-FD, thermal, GMSL2 video capture, and sound support for the
R-Car V4H SoC and the White-Hawk development board,
- Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs,
- Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
- Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and
the Renesas Condor and ULCB development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (30 commits)
arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value
arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC
arm64: dts: renesas: condor: Add I2C EEPROM for PMIC
ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address
arm64: dts: renesas: Remove R-Car H3 ES1.* devicetrees
arm64: dts: renesas: white-hawk: Add R-Car Sound support
arm64: dts: renesas: r8a779g0: R-Car Sound support
arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels
arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels
arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table
arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table
arm64: dts: renesas: r9a07g054: Add Cortex-A55 PMU node
arm64: dts: renesas: white-hawk-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodes
arm64: dts: renesas: r8a779f0: Use proper labels for thermal zones
arm64: dts: renesas: r8a779g0: Add thermal nodes
arm64: dts: renesas: rzv2mevk2: Add uart0 pins
arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems
arm64: dts: renesas: r9a07g044: Add Cortex-A55 PMU node
...
Link: https://lore.kernel.org/r/cover.1679907064.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Replace cpu paths with labels since those already exist in tree.
Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
LG Optimus Vu (p895) and Optimus 4X HD (p880) have 266.5MHz RAM
clock and require this entry to work with it correctly.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Accelerometer mount matrix used in tf101 downstream is inverted.
This new matrix was generated on actual device using calibration
script, like on other transformers.
Tested-by: Robert Eckelmann <longnoserob@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add aliases for eMMC, SD card and WiFi where applicable, so that
assigned mmc indeces are always the same.
Co-developed-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
[ Tested on exynos5800-peach-pi ]
Tested-by: Valentine Iourine <iourine@iourine.msk.su>
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Previously, the mshc0 alias has been necessary so that
MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0.
However, these capabilities should be described in the device tree so
that we do not have to rely on the alias.
The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width =
<8>, which is already set for all the mshc0/mmc0 nodes, replaces
MMC_CAP_8_BIT_DATA.
Also drop other mshc aliases as they are not needed.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add QSPI support on STM32MP13x SoC family
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"make dtbs_check" gives following output :
stm32mp157c-emstamp-argon.dtb: gpu@59000000: 'contiguous-area' does not match
any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"make dtbs_check" gives following output :
stm32mp157c-odyssey.dt.yaml: gpu@59000000: 'contiguous-area' does not match
any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"make dtbs_check" gives following output :
stm32mp157x-xxx.dt.yaml: gpu@59000000: 'contiguous-area' does not match
any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/gpu/vivante,gc.yaml
Solve this trouble for STM32MPU Boards :
- stm32mp157c-ed1
- stm32mp157x-dkx
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~33%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP
Link: https://lore.kernel.org/r/20230328101517.1595738-4-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-3-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Describe the four General Purpose Switches on the Marzen development
board, so they can be used for user input and/or for wake-up from s2ram.
The GPIO block on R-Car H1 does not support triggering interrupts on
both edges of a changing input signal, hence one cannot use gpio-keys
with gpios properties. Instead, one of two alternatives needs to be
used:
1. Use gpio-keys with interrupts instead of gpios properties, at the
expense of receiving only key presses (release events will be
auto-generated),
2. Use gpio-keys-polled with gpios properties, at the expense of
making these keys unusable as wake-up sources.
As the DTS for the Marzen development board serves mainly as an example,
the approach taken is to use the first alternative for the first two
switches, and the second alternative for the last two switches.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f834a3c397362f2424fcae6a0c0440356208b182.1679329829.git.geert+renesas@glider.be
Update device-tree stm32mp135f-dk.dts to add usart1, uart8, usart2
and uart aliases.
- Usart2 is used to interface a BT device, enable it by default.
- Usart1 and uart8 are available on expansion connector.
They are kept disabled. So, the pins are kept in analog state to
lower power consumption by default or can be used as GPIO.
- Uart4 is used for console.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add pins for uart4, uart8, usart1 and usart2 in stm32mp13-pinctrl.dtsi
Theses pins have three states: default, sleep and idle.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Remove duplicates and clean uart aliases.
Uart aliases and uart pins should be declared and associated to
uart instance at the same time.
Put also aliases node above chosen node as same as stm32mp157c-dk2.dts.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Remove duplicates and clean uart aliases.
Uart aliases and uart pins should be declared and associated to
uart instance at the same time.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
On stm32mp15xx-dkx boards:
- Fix slew-rate of USART 2 to 0 like other USARTs, because frequency of
USART pins doesn't exceed 10Mhz.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Bank A and B IOs can't be handled by the pin controller 'Z'. This patch
assign spi1 pin definition to the correct controller.
Fixes: 9ad65d245b ("ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group")
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"simple-panel" compatible is not documented and nothing in Linux kernel
binds to it.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This was not matched anywhere and provides no additional information. The
driver code already checks also for "ti,omap3630" compatible.
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <20230216153339.19987-2-afd@ti.com>
[tony@atomide.com: updated comments for ti,omap3630 compatible]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The MangoPi MQ-R-T113 is a small SBC with the Allwinner T113-s3 SoC.
The SoC features two Arm Cortex-A7 cores and 128 MB of co-packaged DDR3
DRAM. The board adds mostly connectors and the required regulators, plus
a Realtek RTL8189FTV WiFi chip.
Power comes in via a USB-C connector wired as a peripheral, and there is
a second USB-C connector usable as a host port.
Add a .dtsi file describing most of the board's peripherals, and include
that from the actual board .dts file. This allows to re-use the .dtsi
for the MQ-R-F113 RISC-V variant of that board.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230320005249.13403-5-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The Allwinner T113-s SoC is apparently using the same (or at least a very
similar) die as the D1/D1s, but replaces the single RISC-V core with
two Arm Cortex-A7 cores.
Since the D1 core .dtsi already describes all common peripherals, we
just need a DT describing the ARM specific peripherals: the CPU cores,
the Generic Timer, the GIC and the PMU.
We include the core .dtsi directly from the riscv DT directory.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230320005249.13403-3-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
According to docu and dtschema check, 'gpmc,device-nand = true' is
no longer valid, so remove it.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <20230214132302.39087-8-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to docu and dtschema check, 'linux,default-trigger = gpio' is
no longer valid, so remove it.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <20230214132302.39087-7-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Change node name of sound card to recommended generic and remove also
further underscores in other node names.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <20230214132302.39087-3-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Sound did not work with the previous EVM sound card binding, EVM dts
switched to using 'simple-audio-card', so this fixes audio codec by using
simple-audio-card driver.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <20230214132302.39087-2-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without an alias for the TPS65910 RTC, it snatches the rtc0 device in
advance to the I2C RTC assigned to that alias.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <20230214132302.39087-1-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Vendor of the GTA04 boards is and always was
Golden Delicious Computers GmbH&Co. KG, Germany
and not Texas Instruments.
Maybe, TI was references here because the GTA04 was based on
the BeagleBoard design which is designated as "ti,omap3-beagle".
While we are looking at vendors of omap3 based devices, we also
add the record for OpenPandora. The DTS files for the pandora
device already make use of it.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Message-Id: <38b49aad0cf33bb5d6a511edb458139b58e367fd.1676566002.git.hns@goldelico.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP processors support 32 channels but there is no check or
inspect this except booting a device and looking at dmesg reports
of not available channels.
Recently some more subsystems with DMA (aes1+2) were added filling
the list of dma channels beyond the limit of 32 (even if other
parameters indicate 96 or 128 channels). This leads to random
subsystem failures i(e.g. mcbsp for audio) after boot or boot
messages that DMA can not be initialized.
Another symptom is that
/sys/kernel/debug/dmaengine/summary
has 32 entries and does not show all required channels.
Fix by disabling unused (on the GTA04 hardware) mcspi1...4.
Each SPI channel allocates 4 DMA channels rapidly filling
the available ones.
Disabling unused SPI modules on the OMAP3 SoC may also save
some energy (has not been checked).
Fixes: c312f06631 ("ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2")
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
[re-enabled aes2, improved commit subject line]
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-Id: <20230113211151.2314874-1-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is a more interesting use of DT Overlays than the previous patches.
Here we have two touchscreen modules. Each is compatible with, and can be
attached to, either of the two AM57xx IDK development board variants
(AM571x or AM572x).
Due to the way the extension header was wired on the development boards,
the touch sensor on the touchscreen modules will connect to different
SoC pins when connected. For this the touch sensor is modeled as an
additional overlay that is specific to the development board for which it
is connected.
Basically the LCD overlay can be swapped, but the touchscreen overlay
that attaches to the LCD must be used with the corresponding base DT
and not to the LCD.
AM571x -\ /- osd101t2045.dtbo -\ /- am571x-idk-touchscreen.dtbo
X X
AM572x -/ \- osd101t2587.dtbo -/ \- am572x-idk-touchscreen.dtbo
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <20230307161715.15209-4-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The A3 revision of the AM57xx GP EVM has the same EVM feature set as the
original but is paired with an updated revision C BeagleBoard X15.
DT Overlays allow us to model this in the same way, we simply apply the
EVM overlay to the Rev C BeagleBoard to create the Rev A3 AM57xx GP EVM.
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <20230307161715.15209-3-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM57xx GP EVM boards are built on top the AM57xx BeagleBoard-X15.
The EVM extends the BeagleBoard by adding a touchscreen, some buttons,
and a handful of peripheral extension slots.
Being a plugin extension of an existing standalone board; we define
the am57xx-evm as a composite-DTB of the base am57xx-beagle-x15
and a new am57xx-evm overlay.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <20230307161715.15209-2-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add a devicetree for the Tolino Vision Ebook reader. It is based
on boards marked with "37NB-E60Q30+4A3". It is equipped with an i.MX6SL
SoC.
Expected to work:
- Buttons
- Wifi
- LEDs
- uSD
- eMMC
- USB
- RTC
- Touchscreen
- Backlight
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PCB used for all the current boards (Ursa, Draco, Hydra, Orion, Crux)
was slightly redesigned and delivers some new features while some unused
components were removed.
- External RTC chip with supercap added.
- Secure element added.
- LCD display power supply enable/disable signal added.
- Touch keyboard reset and interrupt signals added.
- Factory reset GPIO button added.
- Audio codec LM49350 (EoL) removed and replaced by PWM audio output.
- QCA8334 switch was replaced by Marvell 88E6141.
- PCIe completely removed.
- uSD card removed and replaced by board-to-board expansion connector.
There are four configuration variants of the new board:
1. Pegasus
The board configuration is based on Orion with the following major changes:
- Quad core SoC
- 4GB of RAM
- RTC with supercap added
- Secure element added
2. Pegasus+
This is the very same board as Pegasus but uses the i.MX6QuadPlus SoC.
3. Lynx
The board configuration is based on Draco with the following major changes:
- DualLite SoC
- 1GB of RAM
- RTC with supercap added
- Secure element added
4. Phoenix
The board configuration is based on Ursa with the following major changes:
- DualLite Soc
- 1GB of RAM
- RTC with supercap added
- Secure element added
- LCD display support removed
- UART2 removed
- Factory reset GPIO button added
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Explicit status = "okay" is not needed as it is the default.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The status property should always be last in the list.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Drop the phy-reset-duration and phy-reset-gpios deprecated properties and
move reset-gpios under the switch node.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
1. TI, Marvell, HiSilicon: "okay" over "ok" is preferred for status
property.
2. OMAP: align UART node name with bindings.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmQXKS0QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD16HWD/0WUG95Uf2bxSBpW02PeOfStLYi5XgNxtcU
MqAn2i/UsgNAqC8snXmAbCchG4pEEQxie0+NavO510C0jc6YXfGPmrWru1qN+3NO
p2UpiPmv+6gd2Du7ECCmW+l6Q+C3W63s4mIzJUHVg4hm9dMcY2GUN53kpOeeGuac
QO+AgdKfclkDJtpTFobWD7TzPXa6CBzLgBMA/GpL9QOhb+bTB7TKlC0Wp450nymb
/ooCZykSGkMg8/uRl48zCT5KUq4LV0EWsH16Ez7BTpdDvqnQ+J5msK5HoWJOmxBa
wgZPFWIqFnBEeitZ9JltNHGkWXTzqa3wMHuRWYsI4TG2Q0UQSSTqZJDROwwTvseb
pEgh2ZzwUZkNmGq09e/YaFy+wu8M/CAn5QHjZcAaWaEgiQfdQVwuxFWtDunc8/o1
P9sAAtptPkdoHljaw2JDXyCxWiRDdoq9gqjeoPjJQG654rrgFio/GMmLrBbRjzIy
7WXR2vvJyDU2/BB5E4kLyxzXcSf0XMU3KdbFFpd92p4BzQyga47ZBJCLkP5hKwpt
P3bQv+qv413tCDndH+AHvbP5mG4r1Xn4Bo9N932WkI65NL6hXR62dq7HzqOeyjVt
IEMCKySgRV9EkCwHvUSVFLLIM2ZBxwcNHIzV15huVT8kVpDzMGZ98jfojUS9u2Iq
Nw2xiFRi+g==
=CuB1
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQd4/8ACgkQmmx57+YA
GNm6sw//XbKeEibuY8UrO+BqQpPZ1ltAalHjJ7Qtl6ixSNAadMkbBP8V4vp+qodl
PDh2oqfHJl/XkqzrtD4MwYHDsEPJc8aNiP4IIHYY9Zxp3uyFXtiNRb2oiTvo/YQz
ECW71Uy+x1BFSMQZnruEBAgBbXDq7vtygjBtnKqCN0N1Bx19OnvkpH1+XeF040le
FOHoIJ8oB0fG3TVSMIPp9gyeDq16ScfJfGXFVOD2IPs1TjKfsIpGISuBCvpOuouG
CgK+XFmU2qbKDiPEZ1DscFk/z/fyF+8YeRVD1JF8ps9fEJ5jkO7tUS6PDoEoCXBm
TmxAc2elaSa+v3JqPoSMeU7LL44a/1KPmtbsQy0UUaFJphLjXWXog76835uLSLzV
LLboBeCYenivKYKiCZAYtPDuaIRNxks+RSI6aNMDCA2BJc5KjhH2DSrkF7VOMI9K
c7K2qLERGqjjjEcOGbwX+zOkGCTd09T3fauTsxIf6Y1Pp87qWXm99HHRy1j/8WW5
2oI1um9wrs7MngWnRg3Z8AMkF50yFXdbYedRh5AcPQ4BmHCZyQlqpPBTu6ZRuFI0
ZvwJCikVbMh3GqK3vOOzZYtYn9dnqEnkgkXTFffK+rCIpXeIJOL19oTZk8pNNqVI
n4PpcvAaH0FrSUf0cIrvK2JuR1u6lllJC1k2LL4BcNAS66OBzA4=
=6sDX
-----END PGP SIGNATURE-----
Merge tag 'dt-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.4
1. TI, Marvell, HiSilicon: "okay" over "ok" is preferred for status
property.
2. OMAP: align UART node name with bindings.
* tag 'dt-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: hisilicon: use "okay" for status
ARM: dts: ti: use "okay" for status
ARM: dts: marvell: use "okay" for status
ARM: dts: omap: align UART node name with bindings
Link: https://lore.kernel.org/r/20230319152740.34551-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.
Alongside the obligatory micro-SD card slot, the board features a
SPI-NAND flash chip, LCD and touch connectors, and unpopulated
expansion header pins.
There are two USB Type-C ports on the board: One supplies the power, also
connects to the USB MUSB OTG controller port. The other one is connected
to an CH340 USB serial chip, which in turn is connected to UART1.
Add a devicetree file, so that the board can be used easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
PopStick is a minimal Allwinner F1C200s dongle, with its USB controller
wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and
an on-board CH340 USB-UART converted connected to F1C200s's UART0.
Add a device tree for it. As F1C200s is just F1C100s with a different
DRAM chip co-packaged, directly use F1C100s DTSI here.
This commit covers the v1.1 version of this board, which is now shipped.
v1.0 is some internal sample that have not been shipped at all.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected
to the USB pins of the SoC and ID pin connected to PE2 GPIO.
Enable the USB functionality.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-3-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The suniv SoC has a USB OTG controller and a USB PHY like other
Allwinner SoCs.
Add their device tree node.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
With the conversion of rockchip,analogix-dp.yaml a port@1 node
is required, so add a node with label edp_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/0a423eb4-0ab6-7ecb-d450-d93639160dbc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the conversion of rockchip,lvds.yaml a port@1 node
is required, so add a node with label lvds_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/e7b78a73-0e89-d9e9-2ecc-a8a380635f64@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use generic node name for rk3288.dtsi dsi node.
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label mipi_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/f3edcbff-4aef-1d24-8d65-e519c9451cda@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The MXIII Plus uses an Ampak AP6330 Bluetooth and WiFi combo chip.
Bluetooth is connected to &uart_A and requires toggling GPIOX_20.
WiFi can be routed to either &sdhc or &sdio. Route WiFi to &sdhc
since &sdio is already connected to the SD card. Additionally WiFi
requires toggling GPIOX_11 and GPIOAO_6 as well as enabling the 32kHz
clock signal.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-4-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Add the pins for the SDHC MMC controller which connect to the SDIO wifi
on some boards.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
GPIOX_10 can generate a 32768Hz signal when enabling the "xtal_32k_out"
group with the xtal function. This is typically used as LPO clock for
the SDIO wifi chips.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-2-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
To support the detach feature, add a new mailbox channel to inform
the remote processor on a detach. This signal allows the remote processor
firmware to stop IPC communication and to reinitialize the resources for
a re-attach.
See 6257dfc1c4 for a patch that does the
same for stm32mp15x-dkx boards.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
To align with rest of the devicetree files, let's move the "status"
property down
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-11-manivannan.sadhasivam@linaro.org
To align with the rest of the devicetree files and the relative properties,
let's list the values of properties such as {reg/clock/interrupt}-names
vertically.
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-9-manivannan.sadhasivam@linaro.org
The PCIe controller in SDX55 can act as the RC controller also. Let's
add support for it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-8-manivannan.sadhasivam@linaro.org
There is only one PCIe PHY in this SoC, so there is no need to add an
index to the suffix. This also matches the naming convention of the PCIe
controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-7-manivannan.sadhasivam@linaro.org
Unit address of PCIe EP node should be 0x1c00000 as it has to match the
first address specified in the reg property.
This also requires sorting the node in the ascending order.
Fixes: e6b6981328 ("ARM: dts: qcom: sdx55: Add support for PCIe EP")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-6-manivannan.sadhasivam@linaro.org
For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses
(0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for
I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 93241840b6 ("ARM: dts: qcom: Add pcie nodes for ipq8064")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-17-manivannan.sadhasivam@linaro.org
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address
(0x40200000) specified in the ranges property for I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 1875194032 ("ARM: dts: ipq4019: Add a few peripheral nodes")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-16-manivannan.sadhasivam@linaro.org
To maintain the uniformity, let's use the 0x prefix for the values of
ranges property.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-15-manivannan.sadhasivam@linaro.org
Add the XO and Sleep Clock sources to the GCC node on MSM8226.
Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230121192540.9177-3-rayyan@ansari.sh
Add missing clock configuration by adding clocks, clock-names
and #clock-cells bindings for each kpss-acc-v1 clock-controller
node for apq8064 and msm8960 to reflect Documentation schema.
Add missing #clock-cells binding and remove useless clock-output-names for
ipq806x dtsi.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-6-ansuelsmth@gmail.com
Add per Soc compatible for qcom,kpss-gcc nodes. While currently not used
by the kpss driver they can serve further customization and they are
required to be defined per Documentation schema.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-5-ansuelsmth@gmail.com
All of them have an internal emmc that becomes mmc0 and
devices including the sdmmc snippet get mmc1 for the external
sd slot on suitable devices.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20230307095516.4116827-1-heiko@sntech.de
Replace the license blob by a clean SPDX-License-Identifier with GPL2
or MIT even if X11 is specified in the original blob since the actual
license text corresponds to a MIT license.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This Technologic board file still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This Freescale board file still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
All additional I2SE Duckbill 2 variants always have the same
base board in common. So consider this by including the base
board and avoid a lot of redundancy.
Special care needs to be taken of the SPI variant. ssp2 is used
as SD card interface on the base board, but on the SPI variant
it's downgrade to a SPI interface to connect the QCA7000. So
the SD card properties must be deleted.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These I2SE board files still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These Crystal fontz board files still use node name and unit
address to reference parts from the imx28.dtsi . This causes
a lot of redundancy. So use label references in order to make
it easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Brian Lilly <brian@crystalfontz.com>
Cc: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This board file still use node name and unit address to
reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in orer to make it
easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Aapo Vienamo <aapo.vienamo@iki.fi>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These board files still use node name and unit address to
reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in orer to make it
easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Grandegger <wg@aries-embedded.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These Armadeus board files still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: <support@armadeus.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
usb@2184000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fixes: c100ea86e6 ("ARM: dts: add Netronix E60K02 board common file")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Arnd Bergmann