Commit Graph

869 Commits

Author SHA1 Message Date
Alex Deucher d93f3ca706 drm/amdgpu/gfx7: rework gpu_init()
Split the sw and hw parts into separate functions.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:52:03 -05:00
Alex Deucher 8f8e00c17e drm/amdgpu/gfx: clean up harvest configuration (v2)
Read back harvest configuration from registers and simplify
calculations.  No need to program the raster config registers.
These are programmed as golden registers and the user mode
drivers program them as well.

v2: rebase on Tom's patches

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:47:18 -05:00
Christian König a750b47e49 drm/amdgpu: fix coding style in amdgpu_ctx.c
Don't use pointer arithmetic and fix the indentation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:42:54 -05:00
Christian König 20874179a2 drm/amdgpu: nuke the kernel context
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:41:58 -05:00
Christian König c594989cc0 drm/amdgpu: use separate scheduler entity for VCE submissions
This allows us to remove the kernel context and use a better
priority for the submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:41:01 -05:00
Christian König ead833eced drm/amdgpu: use separate scheduler entity for UVD submissions
This allows us to remove the kernel context and use a better
priority for the submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:40:02 -05:00
Christian König 703297c1fe drm/amdgpu: use separate scheduler entitiy for buffer moves
This allows us to remove the global kernel context.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:39:07 -05:00
Christian König 2d55e45a03 drm/amdgpu: use SDMA round robin for VM updates v3
Distribute the load on both rings.

v2: use a loop for the initialization
v3: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:38:16 -05:00
Christian König 3ee94136b4 drm/amdgpu: remove is_pte_ring
Not used for anything.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:35:54 -05:00
Christian König 2bd9ccfa75 drm/amdgpu: use per VM entity for page table updates (v2)
Updates from different VMs can be processed independently.

v2: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:35:16 -05:00
Christian König c41d271d75 drm/amdgpu: remove the userptr rmn->lock
Avoid a lock inversion problem by just using the mmap_sem to
protect the entries of the intervall tree.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2016-02-12 15:32:07 -05:00
Tom St Denis 5cb60bf697 drm/amdgpu/gfx7: Fix whitespace
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:31:04 -05:00
Tom St Denis 7edd6b2faa drm/amdgpu/gfx7: Simplify wptr/rptr functions
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:30:26 -05:00
Tom St Denis 6d1d683181 drm/amdgpu/gfx7: LOC reduction in gfx_v7_0_setup_rb
Reduce for loop with bitmask to simple complement and mask

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:29:47 -05:00
Tom St Denis d3a7207bdb drm/amdgpu/gfx7: Simplify bitmask creation
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:27:46 -05:00
Tom St Denis 840a20d31b drm/amdgpu/gfx7: Reduce linecount in table init
Replaces switch statements with direct assignments to
reduce line count significantly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:27:34 -05:00
Vitaly Prosyak 6bd9e877ce drm/amdgpu: Move MMIO flip out of spinlocked region
Prior actual  MMIO flip we need to acquire DAL mutex to guard
our target state which get modified on reset mode.
Assign page flip status before actual flip to handle
the possible race condition with interrupt.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:08:55 -05:00
Harry Wentland 9ddf940f5d drm/amdgpu: Don't crash system if we can't get crtc
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 16:08:40 -05:00
Christian König e86f9ceee1 drm/amdgpu: move sync into job object
No need to keep that for every IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König 9f2ade33e6 drm/amdgpu: send VCE IB tests directly to the ring again
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König d7af97dbcc drm/amdgpu: send UVD IB tests directly to the ring again
We need the IB test for GPU resets as well and
the scheduler should be stoped then.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:23 -05:00
Christian König 0856cab1a6 drm/amdgpu: rename amdgpu_sched.c to amdgpu_job.c
That's probably a better matching name.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:23 -05:00
Christian König d71518b5aa drm/amdgpu: cleanup in kernel job submission
Add a job_alloc_with_ib helper and proper job submission.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00
Christian König a0332b56f6 drm/amdgpu: send SDMA/GFX IB tests directly to the ring again
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00
Christian König ec72b8006c drm/amdgpu: directly return fence from ib_schedule
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:21 -05:00
Christian König b07c60c065 drm/amdgpu: move ring from IBs into job
We can't submit to multiple rings at the same time anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König 9e5d53094c drm/amdgpu: make pad_ib a ring function v3
The padding depends on the firmware version and we need that for BO moves as
well, not only for VM updates.

v2: new approach of making pad_ib a ring function
v3: fix typo in macro name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Christian König 4c0b242cf2 drm/amdgpu: cleanup user fence handling in the CS
Don't keep that around twice.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:19 -05:00
Christian König 50838c8cc4 drm/amdgpu: add proper job alloc/free functions
And use them in the CS instead of allocating IBs and jobs separately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:18 -05:00
Christian König 4acabfe379 drm/amdgpu: fix num_ibs check
Specifying no IBs on command submission is invalid, stop crashing
badly when somebody tries it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:18 -05:00
Christian König 867d0517c7 drm/amdgpu: remove AMDGPU_NUM_SYNCS
Just a leftover from semaphores.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:17 -05:00
Christian König 8a8f0b48a0 drm/amdgpu: remove adev and fence from amdgpu_sync_free
Just leftovers from the semaphores.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:17 -05:00
Christian König cc325d1913 drm/amdgpu: check userptrs mm earlier
Instead of when we try to bind it check the usermm when
we try to use it in the IOCTLs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:16 -05:00
Alex Deucher 6e9821b26d drm/amdgpu/gfx: minor code cleanup
Drop needless function wrapper.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:15 -05:00
Christian König cd75dc6887 drm/amdgpu: separate pushing CS to scheduler
Move that out of the main IOCTL function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:14 -05:00
Christian König 7270f8391d drm/amdgpu: add amdgpu_set_ib_value helper (v2)
And use it in UVD/VCE command patching.

v2: squash in Christian's fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:14 -05:00
Christian König b6ea2f37a2 drm/amdgpu: fix size estimation for clear IB
We only need a few dw here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:13 -05:00
Alex Deucher b87c032b4b drm/amdgpu/smu: skip SMC ucode loading on SR-IOV capable boards (v2)
VBIOS does this for us in asic_init.

v2: update iceland as well

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:13 -05:00
Alex Deucher c12d287119 drm/amdgpu/gmc8: skip MC ucode loading on SR-IOV capable boards
VBIOS does this for us in asic_init.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:12 -05:00
Alex Deucher 8cce244cf6 drm/amdgpu: always repost cards that support SR-IOV
Generally a good idea between VM sessions.  We need a way to
detect VM pass-through in general and always run asic_init in
that case.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:11 -05:00
Alex Deucher 7e471e6fba drm/amdgpu: track whether the asic supports SR-IOV
Required to make desicions about certain code pathes.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:11 -05:00
Alex Deucher e74adf2039 drm/amdgpu: add check for atombios GPU virtualization table
This table is found on boards that support SR-IOV.  This will
be used to determine if the board supports SR-IOV and allow
the driver to take specific action in certain cases.

Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:10 -05:00
Alex Deucher 383b6f608b drm/amdgpu: remove unused function
amdgpu_boot_test_post_card() is not used anywhere.  Probably
a leftover from the original port from radeon.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:10 -05:00
Maruthi Srinivas Bayyavarapu 25030321ba drm/amd: add pm domain for ACP IP sub blocks
ACP IP have internal DMA controller, DW I2S controller and DSPs
as separate power tiles. DMA and I2S devices are added to generic
pm domain, so that entire IP can be powered off/on at appropriate
times. Unused DSPs are made to be powered off though they are powered
on during ACP pm domain power on sequence.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:09 -05:00
Maruthi Bayyavarapu a8fe58cec3 drm/amd: add ACP driver support
This adds the ACP (Audio CoProcessor) IP driver and wires
it up to the amdgpu driver.  The ACP block provides the DMA
engine for i2s based ALSA driver. This is required for audio
on APUs that utilize an i2s codec.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Murali Krishna Vemuri <murali-krishna.vemuri@amd.com>
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:08 -05:00
Christian König 4ebd1673c6 drm/amdgpu: remove power of two limit for vramlimit
That works with other values as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:08 -05:00
Christian König 31f6c1fedb drm/amdgpu: optimize amdgpu_vm_update_ptes a bit
Don't calculate the end address multiple times.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:07 -05:00
Christian König 8843dbbbf3 drm/amdgpu: cleanup comments in VM code
Neither the global nor the local mutex exists any more and
amdgpu doesn't support cayman.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:07 -05:00
Christian König a1e08d3b83 drm/amdgpu: optimize VM fencing
No need to fence every page table, just the page directory is enough.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:06 -05:00
Christian König a14faa6573 drm/amdgpu: split VM mappings into smaller operations (v3)
If we can't copy entries from the GTT or fill them with one command split
up the mapping operation into multiple ones.

v2: agd: rebase on upstream
v3: squash in Christian's fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:05 -05:00
Christian König 9ab2146289 drm/amdgpu: use BOs GART instance for mapping addresses v4
That allows the VM code to use GART BOs from other driver instances.

v2: don't use copy optimization for foreign GARTs, that won't work.
v3: some more comment cleanups
v4: agd: rebase on upstream

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:05 -05:00
Christian König b07c9d2a73 drm/amdgpu: move more logic into amdgpu_vm_map_gart v3
No need to duplicate that code over and over again. Also stop using the
flags to determine if we need to map the addresses.

v2: constify the pages_addr
v3: rebased, fix typo in commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:04 -05:00
Christian König 599f434817 drm/amdgpu: remove nonsense IB size checks
Those are just leftovers from the time we wrote the VM
updates directly to the ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:04 -05:00
Christian König fe6b2ad91f drm/amdgpu: use WARN_ON_ONCE instead of BUG_ON in the SA
Crashing the system doesn't helps at all. Also properly return
-EINVAL if size or alignment are outside valid ranges.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:03 -05:00
Eric Huang f3898ea12f drm/amd/powerplay: add some sysfs interfaces for powerplay.
The new sysfs interfaces:
pp_num_states: Read-only, return the number of all pp states, 0 if powerplay is not available.
pp_cur_state: Read-only, return the index number of current pp state.
pp_force_state: Read-write, to write a power state index will switch to selected state forcedly and
		enable forced state mode, disable forced state mode. such as "echo >...".
pp_table: Read-write, binary output, to be used to read or write the dpm table, the maximum
		file size is 4KB of page size.
pp_dpm_sclk: Read-write, reading will return a dpm levels list, to write an index number will force
		powerplay to set the corresponding dpm level.
pp_dpm_mclk: same as sclk.
pp_dpm_pcie: same as sclk.

And add new setting "manual" to the existing interface power_dpm_force_performance_level.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:59 -05:00
Christian König c7e6be2303 drm/amdgpu: remove rptr checking
With the scheduler enabled we don't need that any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:59 -05:00
Christian König a27de35caa drm/amdgpu: remove the ring lock v2
It's not needed any more because all access goes through the scheduler now.

v2: Update commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:58 -05:00
Christian König a9a78b329a drm/amdgpu: use a global LRU list for VMIDs
With the scheduler enabled managing per ring LRUs don't
make much sense any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:58 -05:00
Christian König 94dd0a4ae0 drm/amdgpu: merge vm_grab_id and vm_fence v2
No need for an extra function any more.

v2: comment cleanups

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:57 -05:00
Christian König 8d0a7cea82 drm/amdgpu: grab VMID before submitting job v5
This allows the scheduler to handle the dependencies on ID contention as well.

v2: grab id only once
v3: use a separate lock for the VMIDs
v4: cleanup after semaphore removal
v5: minor coding style change

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:56 -05:00
Christian König 165e4e07c2 drm/amdgpu: add VM pointer to id trace
Because of the scheduler all traces come from the same thread now and
can't be distincted otherwise.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:56 -05:00
Alex Deucher 1c343fc9db drm/amdgpu: drop hard_reset module parameter
It doesn't currently do anything and there's no need for it
going forward since pci config reset will be required as a
fallback even when we have fine grained reset implemented.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:55 -05:00
Alex Deucher 18db89b402 drm/amdgpu: add a debugfs property to trigger a GPU reset
Ported from similar code in radeon.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:55 -05:00
Alex Deucher bfa99269ea drm/amdgpu: post card after hard reset
Posting is required after a pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:54 -05:00
Alex Deucher a2c5c69825 drm/amdgpu: clean up asic level reset for VI
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:54 -05:00
Alex Deucher ceb5bc861e drm/amdgpu: clean up asic level reset for CI
Drop soft reset, always use pci config reset.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:53 -05:00
Christian König 5907a0d8af drm/amdgpu: cleanup sync_seq handling
Not used any more without semaphores

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:52 -05:00
Christian König 046c12c67b drm/amdgpu: remove sync_to from sync obj v2
Not needed any more without semaphores.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:52 -05:00
Alex Deucher ea5e4c8731 drm/amdgpu: remove some more semaphore leftovers
No longer needed since semaphores were removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:51 -05:00
Chunming Zhou cadf97b196 drm/amdgpu: clean up non-scheduler code path (v2)
Non-scheduler code is longer supported.

v2: agd: rebased on upstream

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:50 -05:00
Chunming Zhou be86c606b5 drm/amdgpu: cleanup amdgpu_sync_rings V2
No longer needed now that semaphores are gone.

V2: remove the first amdgpu_sync_wait in amdgpu_ib_schedule

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com> (V1)
Reviewed-by: Monk Liu <monk.liu@amd.com> (V2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:50 -05:00
Chunming Zhou 2f4b940033 drm/amdgpu: clean up hw semaphore support in driver
No longer used.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Christian König a8480309df drm/amdgpu: try to find BO VAs only for the BOs in the list
The other ones don't have any VAs assigned anyway or are uninteresting to us.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Christian König 15486fd20c drm/amdgpu: search only the BO list for VM mappings
Make UVD/VCE VM emulation more efficient.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:48 -05:00
Christian König 1ea863fd73 drm/amdgpu: keep the prefered/allowed domains in the BO
Stop copying that to the bo list entry, it doesn't change anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:47 -05:00
Christian König 636ce25c30 drm/amdgpu: cleanup bo list bucket handling
Move that into the BO list. No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:47 -05:00
Christian König 2a7d9bdabe drm/amdgpu: cleanup amdgpu_cs_parser_relocs
Rename it to amdgpu_cs_parser_bos and move validation and bo list init there.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:46 -05:00
Christian König c3cca41e62 drm/amdgpu: cleanup amdgpu_cs_parser structure
Remove unused user_ptr field, group fields by usage.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:46 -05:00
Christian König 25cfc3c27e drm/amdgpu: group VM mapping tree with its lock (v2)
And also update the comment.

v2: agd: rebase on usptream.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:45 -05:00
Christian König 36409d122c drm/amdgpu: cleanup amdgpu_cs_list_validate
No need to actually check the current placement. Just use the allowed domains
when the threshold is reached.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:45 -05:00
Christian König f69f90a113 drm/amdgpu: fix amdgpu_cs_get_threshold_for_moves handling
The threshold should only be computed once.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:44 -05:00
Christian König d7006964d4 drm/amdgpu: fix issue with overlapping userptrs
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:43 -05:00
Christian König cc1de6e800 drm/amdgpu: fix issue with overlapping userptrs
Otherwise we could try to evict overlapping userptr BOs in get_user_pages(),
leading to a possible circular locking dependency.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:52 -05:00
Nicolai Hähnle b19763d0d8 drm/amdgpu: remove unnecessary forward declaration
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:38 -05:00
Nicolai Hähnle a8d81b3626 drm/amdgpu: hold reference to fences in amdgpu_sa_bo_new (v2)
An arbitrary amount of time can pass between spin_unlock and
fence_wait_any_timeout, so we need to ensure that nobody frees the
fences from under us.

A stress test (rapidly starting and killing hundreds of glxgears
instances) ran into a deadlock in fence_wait_any_timeout after
about an hour, and this race condition appears to be a plausible
cause.

v2: agd: rebase on upstream

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:31 -05:00
Flora Cui ca19852884 drm/amdgpu: fix s4 resume
No need to re-init asic if it's already been initialized.
Skip IB tests since kernel processes are frozen in thaw.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-10 14:07:13 -05:00
Lukas Wunner 156d7d4120 vga_switcheroo: Add handler flags infrastructure
Allow handlers to declare their capabilities and allow clients to
obtain that information. So far we have these use cases:

* If the handler is able to switch DDC separately, clients need to
  probe EDID with drm_get_edid_switcheroo(). We should allow them
  to detect a capable handler to ensure this function only gets
  called when needed.

* Likewise if the handler is unable to switch AUX separately, the active
  client needs to communicate link training parameters to the inactive
  client, which may then skip the AUX handshake and set up its output
  with these pre-calibrated values (DisplayPort specification v1.1a,
  section 2.5.3.3). Clients need a way to recognize such a situation.

The flags for the radeon_atpx_handler and amdgpu_atpx_handler are
initially set to 0, this can later on be amended with
  handler_flags |= VGA_SWITCHEROO_CAN_SWITCH_DDC;
when a ->switch_ddc callback is added.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
    [MBP  9,1 2012  intel IVB + nvidia GK107  pre-retina  15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/2b0d93ed6e511ca09e95e45e0b35627f330fabce.1452525860.git.lukas@wunner.de
2016-02-09 11:21:07 +01:00
Alex Deucher e3b04bc790 drma/dmgpu: move cg and pg flags into shared headers
So they can be used by powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Alex Deucher b118af7012 drm/amdgpu: remove unused cg defines
Leftover from radeon.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Alex Deucher 08d3340876 drm/amdgpu: add a cgs interface to fetch cg and pg flags
Needed to pass the cg and pg info to powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:46 -05:00
Alex Deucher 35e5912d08 drm/amdgpu: be consistent with uvd cg flags
Don't do anything if the uvd cg flags are not set.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:44 -05:00
Alex Deucher 0fd4af9e32 drm/amdgpu: clean up vce pg flags for cz/st
It was already disabled elsewhere, make it offical.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:43 -05:00
Alex Deucher 808a934fd4 drm/amdgpu: handle vce pg flags properly
Don't attempt to start/stop the vce block if pg is disabled.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:43 -05:00
Alex Deucher b6df77fc5c drm/amdgpu: handle uvd pg flags properly
Don't attempt to start/stop the uvd block if pg is disabled.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:42 -05:00
Alex Deucher 50171ebecf drm/amdgpu/dpm/ci: switch over to the common pcie caps interface
We already query this at driver init, so use that info.  Also
handles virtualization cases.

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:42 -05:00
Alex Deucher 76ecb2c75b drm/amdgpu/cik: don't mess with aspm if gpu is root bus
Pcie registers may not be available in a virtualized
environment.

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:41 -05:00
Alex Deucher cd474ba0d6 drm/amdgpu: add pcie cap module parameters (v2)
Allows the user to force the supported pcie gen and lane
config on both the asic and the chipset.
Useful for debugging pcie problems and for virtualization
where we may not be able to query the pcie bridge caps.

Default to:
gen: chipset 1/2, asic 1/2/3
lanes: 1/2/4/8/16

v2: fix bare metal case

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:41 -05:00
Dave Airlie c745884b30 Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
- fix and enable iceland/topaz support
- handle WC on platforms that don't support it

* 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: disable uvd and vce clockgating on Fiji
  drm/amdgpu: remove exp hardware support from iceland
  drm/amdgpu: load MEC ucode manually on iceland
  drm/amdgpu: don't load MEC2 on topaz
  drm/amdgpu: drop topaz support from gmc8 module
  drm/amdgpu: pull topaz gmc bits into gmc_v7
  drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above
  drm/amdgpu: iceland use CI based MC IP
  drm/amdgpu: move gmc7 support out of CIK dependency
  drm/amdgpu/gfx7: enable cp inst/reg error interrupts
  drm/amdgpu/gfx8: enable cp inst/reg error interrupts
  drm/amdgpu: mask out WC from BO on unsupported arches
  drm/radeon: mask out WC from BO on unsupported arches
  drm: add helper to check for wc memory support
  drm/amdgpu: no need to load MC firmware on fiji
2016-02-05 14:48:36 +10:00
Dave Airlie ec71f1284a Merge tag 'drm-amdkfd-fixes-2016-01-28' of git://people.freedesktop.org/~gabbayo/linux into drm-fixes
two static checker fixes.

* tag 'drm-amdkfd-fixes-2016-01-28' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: Remove unnecessary cast in kfree
  drm/amdgpu: fix non-ANSI declaration of amdgpu_amdkfd_gfx_*_get_functions()
2016-02-05 14:47:24 +10:00
Alex Deucher 6357b75a5c drm/amdgpu: disable uvd and vce clockgating on Fiji
Doesn't work properly yet.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-03 13:49:51 -05:00
Alex Deucher dba280b20b drm/amdgpu: remove exp hardware support from iceland
It's working now.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=92270

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:39 -05:00
Alex Deucher 951e09624a drm/amdgpu: load MEC ucode manually on iceland
The smc doesn't handle it.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:32 -05:00
Alex Deucher 97dde76a30 drm/amdgpu: don't load MEC2 on topaz
Not validated.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:25 -05:00
Alex Deucher 8878d8548a drm/amdgpu: drop topaz support from gmc8 module
topaz is actually gmc7.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:18 -05:00
Alex Deucher 72b459c8f7 drm/amdgpu: pull topaz gmc bits into gmc_v7
Add the topaz golden settings into the gmc7 module.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:12 -05:00
Ken Wang 8f3c162961 drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:11 -05:00
Ken Wang 429c45deae drm/amdgpu: iceland use CI based MC IP
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:54:10 -05:00
Alex Deucher e42d852616 drm/amdgpu: move gmc7 support out of CIK dependency
It's used by iceland which is VI.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 22:52:48 -05:00
Alex Deucher ef720532ec drm/amdgpu/gfx7: enable cp inst/reg error interrupts
Enable CP register/instruction error interrupts. Useful
for debugging command stream problems.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02 16:26:10 -05:00
Alex Deucher 1d22a454ec drm/amdgpu/gfx8: enable cp inst/reg error interrupts
Enable CP register/instruction error interrupts. Useful
for debugging command stream problems.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-02 16:25:40 -05:00
Oded Gabbay a187f17f0e drm/amdgpu: mask out WC from BO on unsupported arches
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-02-02 10:09:11 -05:00
Alex Deucher ad32152eb2 drm/amdgpu: no need to load MC firmware on fiji
Vbios does this for us on asic_init.

Reviewed-by: Ken Wang >Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-29 11:10:40 -05:00
Nicolai Hähnle 28b8d66e0c drm/amdgpu: only move pt bos in LRU list on success
This fixes a race condition in the error case: since the pt bos have not
necessarily been reserved in case of an error, we could move a pt bo that
is currently in the middle of being evicted/moved by another process,
which then resulted in a BUG_ON in ttm_bo_add_to_lru.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-28 11:46:45 -05:00
Colin Ian King f785d98711 drm/amdgpu: fix non-ANSI declaration of amdgpu_amdkfd_gfx_*_get_functions()
amdgpu_amdkfd_gfx_7_get_functions and amdgpu_amdkfd_gfx_8_0_get_functions
have no parameters, so use the normal void parameter convention to make
them  match their prototypes in the header file
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2016-01-28 14:39:34 +02:00
Alex Deucher f49d45c973 drm/amdgpu: don't init fbdev if we don't have any connectors
Don't init fbdev if we don't have connectors.  E.g., if you have
a PX laptop with the displays attached to an IGP with no driver
support, you may end up with a blank screen rather than falling
back to vesa, etc.

Based on a similar radeon patch from Rob Clark.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-26 00:35:56 -05:00
Christian König 41f2d99056 drm/amdgpu: fix next_rptr handling for debugfs
That somehow got lost.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-22 14:44:08 -05:00
Christian König 78d0e182b6 drm/amdgpu: fix amdgpu_bo_pin_restricted VRAM placing v2
We could pin BOs into invisible VRAM otherwise.

v2: make logic more readable as suggested by Michel

Cc: stable@vger.kernel.org
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-01-22 10:47:48 -05:00
Eric Huang 4b5ece24ce drm/amd/amdgpu: Improve amdgpu_dpm* macros to avoid unexpected result (v2)
The two macros returns are values which probably are used
in the expression of calculation. Without the brackets
the result of the expression may be wrong.

v2: agd: squash both patches together

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2016-01-22 10:47:48 -05:00
Jordan Lazare 3466904d38 drm/amdgpu: Allow the driver to load if amdgpu.powerplay=1 on asics without powerplay support
Avoid setting pp_enabled if there is no powerplay implementation.

Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-19 12:42:30 -05:00
Michel Dänzer 9571e1d840 drm/amdgpu: Use drm_calloc_large for VM page_tables array
It can be big, depending on the VM address space size, which is tunable
via the vm_size module parameter.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93721
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-19 12:25:09 -05:00
Alex Deucher 7776a69386 drm/amdgpu: Add some tweaks to gfx 8 soft reset
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-15 12:43:22 -05:00
Alex Deucher e160e4db83 drm/amdgpu: fix tonga smu resume
Need to make sure smu buffers are pinned on resume.  This
matches what Fiji does.

Cc: stable@vger.kernel.org
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-15 12:43:11 -05:00
Dave Airlie e9c5e7402d drm/amdgpu: add missing irq.h include
this fixes the build on arm.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-01-14 08:07:55 +10:00
Christian König d8e0cae645 drm/amdgpu: validate duplicates first
Most VM BOs end up in the duplicates list, validate it
first make -ENOMEM less likely.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:22:59 -05:00
Christian König eceb8a1562 drm/amdgpu: move VM page tables to the LRU end on CS v2
This makes it less likely to run into an ENOMEM because
VM page tables are evicted last.

v2: move the BOs in the LRU tail after validation

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:22:17 -05:00
Geliang Tang cc29ec874b drm/amdgpu: use kobj_to_dev()
Use kobj_to_dev() instead of open-coding it.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:14:59 -05:00
Alex Deucher 403664bbf8 drm/amdgpu/cz: force vce clocks when sclks are forced
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:13:33 -05:00
Alex Deucher 5f57642672 drm/amdgpu/cz: force uvd clocks when sclks are forced
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:13:26 -05:00
Alex Deucher 044c0629b5 drm/amdgpu/cz: add code to enable forcing VCE clocks
VCE DPM works similarly to SCLK DPM.  Add a similar interface
for VCE for forcing the VCE clocks.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:12:43 -05:00
Alex Deucher d83b1e8132 drm/amdgpu/cz: add code to enable forcing UVD clocks
UVD DPM works similarly to SCLK DPM.  Add a similar interface
for UVD for forcing the UVD clocks.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-13 12:11:30 -05:00
Chunming Zhou 888c9e33e4 drm/amdgpu: fix lost sync_to if scheduler is enabled.
when scheduler is enabled, the semaphore isn't used at all.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2016-01-13 11:39:15 -05:00
Alex Deucher 5f2323658e drm/amdgpu: add irq domain support
Hardware blocks on the GPU like ACP generate interrupts in
the GPU interrupt controller, but are driven by a separate
driver.  Add an irq domain to the GPU driver so that
blocks like ACP can register a Linux interrupt.

Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11 09:52:57 -05:00
Alex Deucher ba228ac8f5 drm/amdgpu/cgs: add an interface to access PCI resources
This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.).  Only MMIO and
DOORBELL are implemented right now.  This is necessary to
properly utilize shared drivers on platform devices.  IP
modules can use this interface to get the base address
of the resource and add any additional offset and set the
size when setting up the platform driver(s).

Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11 09:52:43 -05:00
Christian König 191caba6cc drm/amdgpu: add warning to amdgpu_bo_gpu_offset() v2
Check if there really is a valid offset for the BO.

v2: user WARN_ON_ONCE

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:28 -05:00
Rex Zhu 9354573d76 drm/amdgpu: Show gpu load when display gpu performance for Ci.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:24 -05:00
Rex Zhu 75ac63dbc3 drm/amd/powerplay: fix Smatch static checker warnings with indenting (v2)
v2: AGD: rebase on upstream

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-08 15:39:22 -05:00
Tom St Denis 15c3277ff6 amdgpu/dce11: Add test for crtc < 0 to various DCEv11 functions
To be consistent with other DCE11 functions test for crtc < 0.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:14 -05:00
Tom St Denis 9e4e1ae82f amdgpu/dce11: Remove division from dce_v11_0_vblank_wait()
Mimics odd behaviour where (i++ % 100 == 0) is true in the first iteration of each loop...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:03 -05:00
Tom St Denis 691ca86a3a amdgpu/vce3: Simplify vce_v3_0_hw_init and ensure both rings default to not ready.
Simplified the ring test and added logic to ensure rings are marked not ready
by default.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:54 -05:00
Tom St Denis 74af12762d amdgpu/vce3: Remove magic constants from harvest register masks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:20:42 -05:00
Tom St Denis 81da2edef9 amdgpu/vce3: Simplify vce_v3_0_process_interrupt()
Fold two cases into one for a LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:33 -05:00
Tom St Denis af18b0f7fb amdgpu/vce3: Simplify vce_v3_0_soft_reset()
LOC reduction and simplification.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:24 -05:00
Tom St Denis 92988e604b amdgpu/vce3: Simplify idle and wait for idle code
More LOC reductions in VCE3 code.  This patch simplifies the is_idle and
wait_for_idle logic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:13 -05:00
Tom St Denis 1dab5f067e amdgpu/vce3: Cleanup harvest config function.
Basic LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:04 -05:00
Chunming Zhou e1de741529 drm/amdgpu: fix NULL in vm_grab_id while S3 back
vm_manager_fini shouldn't be in suspend phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
2016-01-04 17:17:49 -05:00
Dan Carpenter b92c26d180 drm/amdgpu/cgs: cleanup some indenting
This code is indented too far.  Also we normally use spaces to align if
statement conditions.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:18:36 -05:00
Dave Airlie 20f8e032e6 Backmerge drm-fixes merge into Linus's tree into drm-next.
This merges '5b726e06d6e8309e5c9ef4109a32caf27c71dfc8' into drm-next

Just to resolve some merges to make Daniel's life easier.

Signed-off-by: DAve Airlie <airlied@redhat.com>
2015-12-24 08:08:47 +10:00
Dave Airlie fd3e14ffbd Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next
[airlied: fixup build problems on arm - added errno.h include]
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits)
  amd/powerplay: fix copy paste typo in hardwaremanager.c
  amd/powerplay: disable powerplay by default initially
  amd/powerplay: don't enable ucode fan control if vbios has no fan table
  drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
  drm/amd/powerplay: check whether need to enable thermal control. (v2)
  drm/amd/powerplay: add point check to avoid NULL point hang.
  drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
  drm/amd/powerplay: Don't return an error if fan table is missing
  drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
  drm/powerplay: add debugging output to processpptables.c
  drm/powerplay: add debugging output to tonga_processpptables.c
  amd/powerplay: Add structures required to report configuration change
  amd/powerplay: Fix get dal power level
  amd\powerplay Implement get dal power level
  drm/amd/powerplay: display gpu load when print performance for tonga.
  drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
  drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
  drm/amd/powerplay: check whether enable dpm in powerplay.
  drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
  drm/amd/powerplay: fix boolreturn.cocci warnings
  ...
2015-12-23 14:15:26 +10:00
Alex Deucher 53d8eabe3d amd/powerplay: disable powerplay by default initially
Hopefully we can enable this by default once we get more
upstream feedback on stability, etc.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 17:07:40 -05:00
Alex Deucher 898b1dead9 drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
To avoid users accessing them before the module has finished
initializing them and make sure they are only created if
dpm has properly initialized.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:51 -05:00
Rex Zhu 1ea6c1e8e4 drm/amd/powerplay: check whether enable dpm in powerplay.
Change-Id: I0a2dbf8ef7d4a3e9788fe211fc5964dd2487c519
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
Rex Zhu 7ad4e7f093 drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
in dpm module, sysfs init func move to late_init from sw_init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Change-Id: Ice4a73212d8e3106d05f04a27043820ffd32929e
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
Qiang Yu bd90dd89e5 drm/amdgpu: Prepare DKMS build for powerplay module.
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0bbb817618 drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0689a57013 drm/amd/amdgpu: add vce3.0 clock gating support. (v2)
v2: fix grbm locking

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang 9b08a30647 drm/amd/amdgpu: add uvd6.0 clock gating support. (v2)
v2: fix bug in register mask setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Jammy Zhou b57fd5663e drm/amdgpu: rename fiji_smumgr.h to fiji_smum.h
This conflicts with fiji_smumgr.h from powerplay
in DKMS environment

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou dbd29f0d85 drm/amdgpu: rename tonga_smumgr.h to tonga_smum.h
This conflicts with the tonga_smumgr.h from powerplay
in DKMS environement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:43 -05:00
Rex Zhu 7fb72a1fc0 drm/amd/powerplay: export interface to DAL to init/change display configuration.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Tom St Denis 9c97e75f0f amdgpu/powerplay: Add Stoney to list of early init cases
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
Eric Huang 6cec2655fa drm/amd/powerplay: add parts of system clock gating support for Fiji. (v2)
Removed fiji_mgcg_cgcg_init that is affected and redundant for new implementation.

v2: re-add mgcg_cgcg init

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang 3c997d2412 drm/amdgpu: add sdma clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang a0d69786b5 drm/amd/amdgpu: add gmc clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Eric Huang 6e378858df drm/amd/amdgpu: add gfx clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Alex Deucher cfd316d59e drm/amdgpu/cgs: add sys info query for pcie gen and link width
Needed by powerplay to properly handle pcie dpm switching.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher d0dd7f0cc3 drm/amdgpu: store pcie gen mask and link width
We'll need this later for pcie dpm.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Jammy Zhou e61710c59d drm/amdgpu: support per device powerplay enablement (v2)
The amdgu_powerplay variable is global for multiple GPU instances.

v2: fold in Flora's module option change, protect adev reference in
macros

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 8804b8d5b0 drm/amdgpu: enable sysfs interface for powerplay
Same interface exposed in pre-powerplay dpm code.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 3af76f23a4 drm/amdgpu: export fan control functions to amdgpu
Hook up the amdgpu thermal control callbacks for powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu edb611c1e1 drm/amdgpu: enable powerplay module by default for fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu 76c8cc6b3b drm/amdgpu: enable powerplay module by default for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Eric Huang 899fa4c04e drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.
Switch over to handling in the powerplay module.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:18 -05:00
Jammy Zhou 3a74f6f273 drm/amdgpu: add amdgpu.powerplay module option
This option can be used to enable the new powerplay implementation,
and it is disabled by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang 770911a3cf drm/amd/powerplay: add/update headers for Fiji SMU and DPM
New headers for Fiji.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
yanyang1 306d8db3e7 drm/amd/powerplay: add header file for tonga smu and dpm
These headers provide the SMU interface used by the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1 7ff1d70a40 drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:13 -05:00
Jammy Zhou 4630f0faae drm/amd/powerplay: add Carrizo smu support
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.

v3: delete peci sub-module.
v2: use cgs interface directly
    add load_mec_firmware function

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Rex Zhu 1b5708ffb1 drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Update amdgpu to deal with the new powerplay module properly.

v2: squash in fixes
v3: squash in Rex's power state reporting fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Rex Zhu ba5c2a87b0 drm/amdgpu: disable legacy path of firmware check if powerplay is enabled
Powerplay will use a different interface once it's integrated.  These
legacy pathes will be removed once powerplay is enabled by default.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Alex Deucher 1f7371b2a5 drm/amd/powerplay: add basic powerplay framework
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.

CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.

v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 47bf18b5b2 drm/amdgpu: add new cgs interface to get display info (v2)
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 5e6186991a drm/amdgpu: implement cgs interface to query system info
Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 3f1d35a03b drm/amdgpu: implement new cgs interface for acpi function
Add a new driver internal interface for accessing ACPI
methods.  These will be used by various new components
including powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 66dc0ddd02 drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h
This will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 7e85be9948 drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h
These will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 3a2c788d95 drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:04 -05:00
Felix Kuehling 005ae95e6e drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map
eaddr is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:14 -05:00
Alex Deucher 41869c1c7f drm/amdgpu: fix dp link rate selection (v2)
Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:38:51 -05:00
Christian König ee1782c3f2 drm/amdgpu: keep the PTs validation list in the VM v2
This avoids allocating it on the fly.

v2: fix grammar in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:46 -05:00
Christian König 56467ebfb2 drm/amdgpu: split VM PD and PT handling during CS
This way we avoid the extra allocation for the page directory entry.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Christian König 3c0eea6c35 drm/amdgpu: put VM page tables directly into duplicates list
They share the reservation object with the page directory anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-12-18 17:29:45 -05:00
Chunming Zhou 5b0112356c drm/amdgpu: restrict the sched jobs number to power of two
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
CC: stable@vger.kernel.org
2015-12-18 17:29:44 -05:00
Alex Deucher a1493cd575 drm/amdgpu: limit visible vram if it's smaller than the BAR
In some cases the amount of vram may be less than the BAR size,
if so, limit visible vram to the amount of actual vram, not the
BAR size.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-17 11:56:41 -05:00
Christian König 91acbeb68a drm/amdgpu: fix user fence handling
This fixes a random corruption under memory pressure. We need to fence
the BO for the user fence as well, otherwise it might be swapped out
and the GPU could write the fence value to an undesired location.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-16 17:48:59 -05:00
Chunming Zhou b70f014d58 drm/amdgpu: change default sched jobs to 32
Change the default scheduler queue size from 16 to 32.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:47:17 -05:00
Chunming Zhou 37cd0ca204 drm/amdgpu: unify AMDGPU_CTX_MAX_CS_PENDING and amdgpu_sched_jobs
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:45:24 -05:00
Chunming Zhou c648ed7c5c drm/amdgpu: handle error case for ctx
Properly handle ctx init failure.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-14 19:42:11 -05:00
Alex Deucher 2c1a278403 drm/amdgpu: add more debugging output for driver failures
Add more fine grained debugging output for init/fini/suspend/
resume failures.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:42 -05:00
Flora Cui abdfb850ca drm/amdgpu: update rev id register for VI
Change-Id: I2ae9bb4a929f7c0c8783e0be563ae04be77596e2
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-11 11:13:41 -05:00
Flora Cui c27816a883 drm/amdgpu/gfx8: update PA_SC_RASTER_CONFIG:PKR_MAP only
Use default value as a base.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-11 11:13:41 -05:00