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OpenCloudOS-Kernel
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Author SHA1 Message Date
Fabio Estevam 05e062f92c clk: imx: clk-imx6q: Provide initial IPU clock settings for mx6dl 
Currently it is not possible to use HDMI and LVDS at the same time on a
imx6dl-sabresd board.

Fix this usecase by setting IMX6QDL_CLK_PLL3_PFD1_540M to 540MHz and
also by setting it as the parent of IMX6QDL_CLK_IPU1_SEL.

Based on the configuration done in the FSL kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
 2015-07-13 16:35:30 +08:00
Sébastien Szymanski da946aeaea ARM: clk-imx6q: refine sata's parent 
According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
 2015-06-03 14:49:38 +08:00
Shawn Guo 11f6812009 ARM: imx: move clock drivers into drivers/clk 
After the cleanup on clock drivers, they are now ready to be moved into
drivers/clk.  Let's move them into drivers/clk/imx folder.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
 2015-06-03 14:44:33 +08:00