Commit Graph

3403 Commits

Author SHA1 Message Date
Jonas Aaberg f1671bf5f0 pinctrl/nomadik: make independent of prcmu driver
Currently there are some unnecessary criss-cross
dependencies between the PRCMU driver in MFD and a lot of
other drivers, mainly because other drivers need to poke
around in the PRCM register range.

In cases like this there are actually just a few select
registers that the pinctrl driver need to read/modify/write,
and it turns out that no other driver is actually using
these registers, so there are no concurrency issues
whatsoever.

So: don't let the location of the register range complicate
things, just poke into these registers directly and skip
a layer of indirection.

Take this opportunity to add kerneldoc to the pinctrl
state container.

Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-09 13:13:23 +01:00
Axel Lin 924da31416 pinctrl: samsung and exynos need to depend on OF && GPIOLIB
This patch fixes below build error when !CONFIG_OF_GPIO.

  CC      drivers/pinctrl/pinctrl-samsung.o
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2

The samsung pinctrl driver supports only device tree enabled
platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.

The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
when GPIOLIB is selected.

Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
PINCTRL_EXYNOS4 depend on OF && GPIOLIB.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-06 10:02:14 +01:00
Axel Lin f6f94f6660 pinctrl: at91: Staticize non-exported symbols
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 14:30:45 +01:00
Axel Lin 8c995d6dd6 pinctrl: nomadik: Add terminating entry for platform_device_id table
The platform_device_id table is supposed to be zero-terminated.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:45:17 +01:00
Vipul Kumar Samar 0504271c8d pinctrl: SPEAr1340: Add clcd sleep mode pin configuration
CLCD pads must be configured differently for sleep mode. This patch adds support
for clcd_sleep_pingroup.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:32 +01:00
Deepak Sikri 35d1480694 pinctrl: SPEAr1340: Make DDR reset & clock pads as gpio
Some gpio pins are used to control DDR reset and clock enable while the system
is moved into Low power. This patch adds in the corresponding GPIO entries in
the pads_as_gpio_pins to ensure the pads are available as gpio's.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:26 +01:00
Shiraz Hashim 0e6f1e5c39 pinctrl: SPEAr1310: add register entries for enabling pad direction
Pad direction must also be updated for SPEAr1310, while setting pads values.
This patch adds support for that.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:23 +01:00
Vipul Kumar Samar f7c5b3d574 pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin group
SPEAr1310 has separate PCI and PCIe implementations which are not muxed with
each other. Presently they have been implemented as muxed together with SATA and
are represented wrongly in the software.

In reality only PCIe and SATA implementations are muxed with each other. This
patch separates out pci pins creating a new pingroup and function for pci.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:34:20 +01:00
Vipul Kumar Samar 82a2deb93c pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFT
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection
shift.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:57 +01:00
Shiraz Hashim b06fbfdb06 pinctrl: SPEAr1310: fix clcd high resolution pin group name
All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the
same for clcd_high_res_grp.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:46 +01:00
Deepak Sikri b06bf9a905 pinctrl: SPEAr320: Correct pad mux entries for rmii/smii
pin entries of rmii and smii are interchanged by mistake. Fix it.

Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:41 +01:00
Shiraz Hashim a778005589 pinctrl: SPEAr3xx: correct register space to configure pwm
To have pwm on pad no. 34 we also need to select between pwm and SD_LED
functions. Add this to pwm pin mux register configuration.

Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:37 +01:00
Viresh Kumar 0b53fa3535 pinctrl: SPEAr: Don't update all non muxreg bits on pinctrl_disable
Not all bits of a register are used for pinctrl in SPEAr. So only update bits
relevant to pinctrl using muxreg->mask.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 12:33:34 +01:00
Linus Walleij c3b9d1db23 ARM: plat-nomadik: convert platforms to SPARSE_IRQ
This converts the Nomadik and Ux500 platforms to use SPARSE_IRQ.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 09:55:34 +01:00
Linus Walleij c3123cfdc9 pinctrl/nomadik: merge old pincfg header
This merges the old <plat/pincfg.h> header into
<linux/platform_data/pinctrl-nomadik.h> and rids us of
yet one more <plat/*> include.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 09:55:29 +01:00
Linus Walleij 7cb15e1036 pinctrl/nomadik: move the platform data header
This moves the platform data header for the Nomadik pin controller
to <linux/platform_data/pinctrl-nomadik.h>.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-05 09:55:27 +01:00
Patrice Chotard 0c61ae779c pinctrl/nomadik: db8500: fix kp pin group
kp_a_2 pin group was defined but was not declared
as a group of kp function.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:29:18 +01:00
Jean-Nicolas Graux 2249b19f37 pinctrl/nomadik: debugfs display of other alternate-C functions
In pinctrl debug pins file, enable display of AltCx functions.

Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:18:33 +01:00
Jean-Nicolas Graux d3cd8d0caa pinctrl/nomadik: update other alternate-C functions on DB8500
In pinctrl-nomadik-db8500.c, add missing definitions that deal
with other alternate-C functions.

Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:18:33 +01:00
Linus Walleij 287f121c8b pinctrl/nomadik: merge old pincfg header
This merges the old <plat/pincfg.h> header into
<linux/platform_data/pinctrl-nomadik.h> and rids us of
yet one more <plat/*> include.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:18:33 +01:00
Linus Walleij bb16bd9b9d pinctrl/nomadik: move the platform data header
This moves the platform data header for the Nomadik pin controller
to <linux/platform_data/pinctrl-nomadik.h>.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:18:33 +01:00
Patrice Chotard f64228ee23 ARM: plat-nomadik: move NMK_GPIO_PER_CHIP into gpio-nomadik.h
Move NMK_GPIO_PER_CHIP to gpio-nomadik.h and define it with a
shift operator.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:16:15 +01:00
Patrice Chotard 1d853ca5ba pinctrl/nomadik: allow to support several ranges per GPIO bank
With DB8500 the number of GPIO chips = number GPIO bank =
number of GPIO ranges.

With DB8540, a new GPIO range configuration is used, some GPIO
banks can have several GPIO ranges.

For example, DB8540 GPIO bank0 (GPIO0 to GPIO32) have 2 GPIO
ranges:
    - GPIO0 to GPIO17  : routed
    - GPIO18 to GPIO21 : hole
    - GPIO22 to GPIO28 : routed
    - GPIO29 to GPIO32 : hole

Previously, during nmk_pinctrl_probe(), all GPIO ranges were
parsed, as GPIO ranges are larger than the number of GPIO chips,
a warning occurs. This commit allows each bank to have several
GPIO ranges.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 21:16:15 +01:00
Wei Yongjun a7e35b9c32 pinctrl/at91: remove unused variable in at91_dt_node_to_map()
The variable pin is initialized but never used
otherwise, so remove the unused variable.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 20:34:14 +01:00
Wei Yongjun 05daa16a86 pinctrl/at91: using for_each_set_bit to simplify the code
Using for_each_set_bit() to simplify the code.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 20:34:09 +01:00
Wei Yongjun 11aabdcd74 pinctrl/at91: remove duplicated include from pinctrl-at91.c
Remove duplicated include.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 20:34:02 +01:00
Jean-Christophe PLAGNIOL-VILLARD dffa91230f pinctrl/: at91: fix warnings
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_pinctrl_probe_dt':
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:952:12: warning: assignment discards qualifiers from pointer target type
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c: In function 'at91_gpio_probe':
/opt/work/linux-2.6/drivers/pinctrl/pinctrl-at91.c:1517:17: warning: assignment discards qualifiers from pointer target type

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-28 20:02:56 +01:00
Jean-Christophe PLAGNIOL-VILLARD a728c7cdd0 gpio/at91: auto request and configure the pio as input when the interrupt is used via DT
If we do this

	interrupt-parent = <&pioA>;
	interrupts = <7 0x0>;

The current core map the irq correctly but the gpio is not configured as input.
The pinctrl configure the pin as gpio with the correct mux parameter but is
not responsible to configure it as input.

So do it during the xlate

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-24 14:01:15 +02:00
Jean-Christophe PLAGNIOL-VILLARD 525fae2131 pinctrl: at91: fix typo on PULL_UP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-24 13:59:45 +02:00
Linus Walleij 38843e2921 pinctrl/nomadik: pass DT node to the irqdomain
When creating the simple irqdomain, pass the DT node pointer along,
as is apropriate.

Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 11:52:25 +02:00
Linus Walleij 832b6cdf72 pinctrl/nomadik: use zero as default irq_start
The irqdomain semantics were supposed to be such that a linear
domain would be used if the passed first_irq was zero or
negative, but I got it wrong so only passing zero as first_irq
will work properly. Well, zero is NO_IRQ these days so let's
pass zero. The semantics of irqdomain_add_simple() will be
fixed in a separate patch.

Acked-by: Lee Jones <lee.jones@linaro.org>
Reported-by: Rikard Olsson <rikard.p.olsson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 11:52:19 +02:00
Wei Yongjun b4dd784ba8 pinctrl: fix missing unlock on error in pinctrl_groups_show()
Add the missing unlock on the error handle path in function
pinctrl_groups_show().

Cc: stable@kernel.org
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 10:35:10 +02:00
Linus Walleij 268300be0e pinctrl/nomadik: use irq_create_mapping()
Since in the DT case, the linear domain path will not allocate
descriptors for the IRQs, we need to use irq_create_mapping()
for mapping hwirqs to Linux IRQs, so these descriptors get
created on-the-fly in this case.

ChangeLog v1->v2:

- Just use irq_create_mapping() in the .to_irq function since
  this is called before unmasking or enabling any interrupt
  lines, so irq_find_mapping() should be sufficient for the
  IRQ handler function.

Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-23 10:33:39 +02:00
Haojian Zhuang 7ae9d71e8d pinctrl: remove mutex lock in groups show
Mutex is locked duplicatly by pinconf_groups_show() and
pin_config_group_get(). It results dead lock. So avoid to lock mutex
in pinconf_groups_show().

Cc: stable@kernel.org
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-18 20:27:31 +02:00
Pritesh Raithatha a03690e444 pinctrl: tegra: correct bank for pingroup and drv pingroup
Cc: stable@kernel.org
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-17 19:49:28 +02:00
Pritesh Raithatha 154f3ebf53 pinctrl: tegra: set low power mode bank width to 2
Cc: stable@kernel.org
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-17 19:47:06 +02:00
Tomasz Figa a19fe2d45c pinctrl: samsung: Add GPIO to IRQ translation
Some drivers require a way to translate GPIO pins to their IRQ numbers.

This patch adds the .to_irq() gpiolib callback to pinctrl-samsung
driver, which creates (if not present yet) and returns an IRQ mapping
for given GPIO pin.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 22b9ba033b pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
Pins used as wake-up interrupts need to be configured as EINTs. This
patch adds the required configuration code to exynos_wkup_irq_set_type,
to set the pin as EINT when its interrupt trigger type is configured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa a04b07c0fc pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
This patch reworks wake-up interrupt handling in pinctrl-exynos driver,
so each pin bank, which provides wake-up interrupts, has its own IRQ
domain.

Information about whether given pin bank provides wake-up interrupts,
how many and whether they are separate or muxed are parsed from device
tree.

It gives following advantages:
  - interrupts can be specified in device tree in a more readable way,
    e.g. :
    	device {
		/* ... */
		interrupt-parent = <&gpx2>;
		interrupts = <4 0>;
		/* ... */
	};
  - the amount and layout of interrupts is not hardcoded in the code
    anymore, but defined in SoC-specific structure
  - bank and pin of each wake-up interrupt can be easily identified, to
    allow operations, such as setting the pin to EINT function, from
    irq_set_type() callback

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa d3a7b9e3a1 pinctrl: samsung: Use one GPIO chip per pin bank
This patch modifies the pinctrl-samsung driver to register one GPIO chip
per pin bank, instead of a single chip for all pin banks of the
controller.

It simplifies GPIO accesses a lot (constant time instead of looping
through the list of banks to find the right one) and should have a good
effect on performance of any bit-banging driver.

In addition it allows to reference GPIO pins by a phandle to the bank
node and a local pin offset inside of the bank (similar to previous
gpiolib driver), which is more clear and readable than using indices
relative to the whole pin controller.

Example:
	device {
		/* ... */
		gpios = <&gpk0 4 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 595be7268a pinctrl: exynos: Use one IRQ domain per pin bank
Instead of registering one IRQ domain for all pin banks of a pin
controller, this patch implements registration of per-bank domains.

At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts
of Exynos4x12) it simplifies driver code and device tree sources,
because GPIO interrupts can be now specified per banks.

Example:
	device {
		/* ... */
		interrupt-parent = <&gpa1>;
		interrupts = <3 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 1b6056d6db pinctrl: samsung: Include bank-specific eint offset in bank struct
Some SoCs, like Exynos4x12, have non-sequential layout of EINT control
registers and so current way of calculating register addresses does not
work correctly for them.

This patch adds eint_offset field to samsung_pin_bank struct and
modifies the driver to use it instead of calculating the offsets from
bank index.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa 6defe9a0dd pinctrl: samsung: Hold pointer to driver data in bank struct
This patch is a preparation for converting the pinctrl-samsung driver to
one GPIO chip and IRQ domain per bank. It allows one having only
a pointer to particular bank struct to access driver data struct.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:12 +02:00
Tomasz Figa ab663789d6 pinctrl: samsung: Match pin banks with their device nodes
This patch is a preparation for converting the pinctrl-samsung driver to
one GPIO chip and IRQ domain per bank. It binds banks defined by
internal driver data with bank nodes in device tree.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 724e56a48c pinctrl: samsung: Distinguish between pin group and bank nodes
This patch modifies the loop iterating over all child nodes and parsing
pin groups to check whether the node is really a pin group node by
checking for existence of samsung,pins property.

This is a prerequisite for further patches adding additional subnodes to
the pinctrl node, required for per bank GPIO and interrupt specifiers.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 3a232ba86f pinctrl: samsung: Remove static pin enumerations
Since pin numbers are now assigned dynamically, those are not needed
anymore.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 40ba6227ae pinctrl: samsung: Assing pin numbers dynamically
This patch modifies the pinctrl-samsung driver to assign numbers to pins
dynamically instead of static enumerations.

Thanks to this change the amount of code requried to support a SoC can
be greatly reduced and the code made more readable.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 62f14c0ef5 pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank
The pointer to gpio_chip passed to pin_to_reg_bank utility function is
used only to retrieve a pointer to samsung_pinctrl_drv_data structure.

This patch modifies the function and its users to pass a pointer to
samsung_pinctrl_drv_data directly.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:11 +02:00
Tomasz Figa 7c367d3da6 pinctrl: samsung: Detect and handle unsupported configuration types
This patch modifies the pinctrl-samsung driver to detect when width of a
bit field is set to zero (which means that such configuraton type is not
supported) and return an error instead of trying to modify an inexistent
register.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:10:10 +02:00
Linus Walleij 51f58c68a3 pinctrl/nomadik: always use the simple irqdomain
Since the simple irqdomain will fall back to a linear domain
if the first_irq provided is <= 0, just use this, just make
sure the first_irq is negative in the device tree case.

Cc: Rob Herring <rob.herring@calxeda.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Linus Walleij b721370266 pinctrl/nomadik: provide stubs for legacy Nomadik
The compilation of the pinctrl driver failed on the legacy
Nomadik NHK8815 platform because it was not providing the PRCMU
interfaces needed to support the extended alternate functions
used by the ux500 series.

Solve this by providing some stubs for the legacy platform, to
avoid too much #ifdefs in the code per se. Theoretically this
actually allows the Nomadik and Ux500 to have a single kernel
image with support for the PRCM registers on the Ux500 (though
they have incompatible archs, but the spirit is there).

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Wei Yongjun b51b16a36f pinctrl: remove duplicated include from pinctrl-xway.c
Remove duplicated include.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Arnd Bergmann 7bec207427 pinctrl: sirf: remove sirfsoc_gpio_set_pull function
The prima2 platform advertises needing no mach/gpio.h header file,
but its pinctrl driver now has a sirfsoc_gpio_set_pull function
that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h,
which fails to build.

Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the
kernel, so we can safely remove it. Any out of tree drivers using
it will have to be converted to use proper pinctrl functions to
do the same.

Without this patch, building prima2_defconfig results in:

drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull':
drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in
drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function)
drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Wei Yongjun 3ee73aa077 pinctrl: fix return value in bcm2835_pinctrl_probe()
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The PTR_ERR() in the return value
should be replaced with error no.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Wei Yongjun 1cd6dc2e3c pinctrl: remove duplicated include from pinctrl-bcm2835.c
Remove duplicated include.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Tobias Klauser 8c6871979d pinctrl: bcm2835: Use existing pointer to struct device
The pointer to "pdev->dev" is already stored in "dev", so use it in
devm_request_and_ioremap().

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Arnd Bergmann 47dbec59c3 pinctrl: samsung: use __devinit section for init code
The samsung pinctrl driver has a probe function that is
__devinit and that calls a lot of other functions that are
marked __init, which kbuild complains about.

Marking everything __devinit means that the code does not
discarded when CONFIG_HOTPLUG is set, which is a little
more wasteful, but also more consistent

Without this patch, building exynos_defconfig results in:

WARNING: drivers/pinctrl/built-in.o(.devinit.text+0x124): Section mismatch in reference from the function samsung_pinctrl_probe() to the function .init.text:samsung_gpiolib_register()
The function __devinit samsung_pinctrl_probe() references
a function __init samsung_gpiolib_register().
If samsung_gpiolib_register is only used by samsung_pinctrl_probe then
annotate samsung_gpiolib_register with a matching annotation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-15 09:09:27 +02:00
Jean-Christophe PLAGNIOL-VILLARD 6732ae5cb4 ARM: at91: add pinctrl support
This is also include the gpio controller as the IP share both.
Each soc will have to describe the SoC limitation and pin configuration via
DT.

This will allow to do not need to touch the C code when adding new SoC if the
IP version is supported.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:21:43 +08:00
Linus Walleij 6054b9cae2 pinctrl/nomadik: use simple or linear IRQ domain
This alters the Nomadik pinctrl driver to:

- Call irqdomain_add_linear() for the DT case so we get
  all independent from IRQ numbers in this case.
- Call irqdomain_add_simple() for the legacy case, which
  allocates the IRQ descriptors for the Nomadik pin controller
  dynamically.

Cc: Lee Jones <lee.jones@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-10 08:57:26 +02:00
Jean-Nicolas Graux c22df08c7f pinctrl/nomadik: support other alternate-C functions
Upgrade nomadik pinctrl driver to enable selection of other
alternate-C[1-4] functions on some specific ux500 SoC pins.
Handling of those functions is done thanks to PRCM GPIOCR
registers. This was previously managed in PRCMU driver and
it was not really convenient. Idea is to provide a common
way to control all alternate functions.

Note that this improvement does not support the old-fashioned way
used to control nomadik pins, namely the "nmk_config_pin()" function
and its derivatives.

Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-10 08:36:59 +02:00
Linus Torvalds de390bba79 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS update from Ralf Baechle:
 "This is the MIPS update for 3.7.

  A fair chunk of them are platform updates to the Cavium Octeon SOC
  (which involves machine generated header files of considerable size),
  Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx
  platforms.

  Support for the commercial MIPS simulator MIPSsim has been removed as
  MIPS Technologies is shifting away from this product and Qemu is
  offering various more powerful platforms.  The generic MIPS code can
  now also probe for no-execute / write-only TLB features implemented
  without the full SmartMIPS extension as permitted by the latest MIPS
  processor architecture.  Lots of small changes to generic code."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits)
  MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
  MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
  MIPS: BCM63XX: Properly handle mac address octet overflow
  MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user.
  MIPS: Replace `-' in defconfig filename wth `_' for consistency.
  MIPS: Wire kcmp syscall.
  MIPS: MIPSsim: Remove the MIPSsim platform.
  MIPS: NOTIFY_RESUME is not needed in TIF masks
  MIPS: Merge the identical "return from syscall" per-ABI code
  MIPS: Unobfuscate _TIF..._MASK
  MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).
  MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
  MIPS: Add base architecture support for RI and XI.
  MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
  MIPS: uasm: Add INS and EXT instructions.
  MIPS: Avoid pipeline stalls on some MIPS32R2 cores.
  MIPS: Make VPE count to be one-based.
  MIPS: Add new end of interrupt functionality for GIC.
  MIPS: Add EIC support for GIC.
  MIPS: Code clean-ups for the GIC.
  ...
2012-10-09 16:08:04 +09:00
Linus Torvalds 5e090ed7af ARM: soc: late platform updates
This branch contains updates to OMAP and Marvell platforms (kirkwood,
 dove, mvebu) that came in after we had done the big multiplatform merges,
 so they were kept separate from the rest, and not separated into the
 traditional topics of cleanup/driver/platform features.
 
 For OMAP, the updates are:
 - Runtime PM conversions for the GPMC and RNG IP blocks
 - Preparation patches for the OMAP common clock framework conversion
 - clkdev alias additions required by other drivers
 - Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4
 - OMAP hwmod code and data improvements
 - Preparation patches for the IOMMU runtime PM conversion
 - Preparation patches for OMAP4 full-chip retention support
 
 For Kirkwood/Dove/mvebu:
 
 - New driver for "address decoder controller" for mvebu, which
   is a piece of hardware that configures addressable devices and
   peripherals. First user is the boot rom aperture on armada XP since
   it is needed for SMP support.
 - New device tree bindings for peripherals such as gpio-fan, iconnect
   nand, mv_cesa and the above address decoder controller.
 - Some defconfig updates, mostly to enable new DT boards and a few drivers.
 - New drivers using the pincontrol subsystem for dove, kirkwood and mvebu
 - New clean gpio driver for mvebu
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQblIiAAoJEIwa5zzehBx3J1EP/1pxMqjVKQDXxak+A6g8a7r0
 hUTjqfiA9nZ4st+nk3PKJL9DNkoTEoZZqXghYRA+N6ej4hAaFJX1izgQDtjtjfRE
 s2izZuxGka8Oiic6FpCUoQnMORg10tSLgyvlHNW4hXy3qpe2C4u1D2GJwA/GPeLQ
 lHREekcJ3RKWutpG2hMtCT+9Bm4AwnnMY5uO39gxoXeMn6RoaACNIyYxz0NeL5bV
 GDuawi7Pc4KJTXX+D/VU0o7VtksiUO8YBczFEra/9khSL/RI2PFalIX3DKiioqvA
 yUA11d9proqojIdfdjVRPBHnIMl49H8ohBwbQfKnkNz9msl1BKN5PbakKls97mQ+
 vaJpoACnc/3x4P/izEpwry5XqeIl5S5mwz4R4+fojpWpp4JPcly/cAKMAsXf5WRi
 NF50E4D/8ysHE8WuBU5YHFgEEbn3nXkRbNMgdYtUwzixdmNJNaU8+33BJo34c4j0
 DNktiEdKUBoiiEdsC1MgH86olD/sFNUxvXBub30hhOywoapgQE61fGQGxG38DV/K
 kspTHz9SKUrmgbYEyMNOhz4paRrheYxx9cAgKP7Hp7m4Gu8d6ZqRqLqN9hbAbLuW
 TbH2FpqcjSw4KnYYCepTixJ3dhGiICiILWHfsW3qCj5Le3YVwedCpBCL1/I+RqEP
 kYTToVhur/T1yamHAmBi
 =xVaJ
 -----END PGP SIGNATURE-----

Merge tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull late ARM soc platform updates from Olof Johansson:
 "This branch contains updates to OMAP and Marvell platforms (kirkwood,
  dove, mvebu) that came in after we had done the big multiplatform
  merges, so they were kept separate from the rest, and not separated
  into the traditional topics of cleanup/driver/platform features.

  For OMAP, the updates are:
   - Runtime PM conversions for the GPMC and RNG IP blocks
   - Preparation patches for the OMAP common clock framework conversion
   - clkdev alias additions required by other drivers
   - Performance Monitoring Unit (PMU) support for OMAP2, 3, and
     non-4430 OMAP4
   - OMAP hwmod code and data improvements
   - Preparation patches for the IOMMU runtime PM conversion
   - Preparation patches for OMAP4 full-chip retention support

  For Kirkwood/Dove/mvebu:
   - New driver for "address decoder controller" for mvebu, which is a
     piece of hardware that configures addressable devices and
     peripherals.  First user is the boot rom aperture on armada XP
     since it is needed for SMP support.
   - New device tree bindings for peripherals such as gpio-fan, iconnect
     nand, mv_cesa and the above address decoder controller.
   - Some defconfig updates, mostly to enable new DT boards and a few
     drivers.
   - New drivers using the pincontrol subsystem for dove, kirkwood and
     mvebu
   - New clean gpio driver for mvebu"

* tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (98 commits)
  ARM: mvebu: fix build breaks from multi-platform conversion
  ARM: OMAP4460/4470: PMU: Enable PMU for OMAP4460/70
  ARM: OMAP2+: PMU: Add runtime PM support
  ARM: OMAP4430: PMU: prepare to create PMU device via HWMOD
  ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMOD
  ARM: OMAP3: hwmod data: Add debugss HWMOD data
  ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
  ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP
  hwrng: OMAP: remove SoC restrictions from driver registration
  ARM: OMAP: split OMAP1, OMAP2+ RNG device registration
  hwrng: OMAP: convert to use runtime PM
  hwrng: OMAP: store per-device data in per-device variables, not file statics
  ARM: OMAP2xxx: hwmod/CM: add RNG integration data
  ARM: OMAP2+: gpmc: minimal driver support
  ARM: OMAP2+: gpmc: Adapt to HWMOD
  ARM: OMAP2/3: hwmod data: add gpmc
  ARM: OMAP4: hwmod data: add mmu hwmod for ipu and dsp
  ARM: OMAP3: hwmod data: add mmu data for iva and isp
  ARM: OMAP: iommu: fix including iommu.h without IOMMU_API selected
  ARM: OMAP4: hwmod data: add missing HWMOD_NO_IDLEST flags to some PRCM IP blocks
  ...
2012-10-07 20:55:16 +09:00
Linus Torvalds 06fe918e9f These are the bulk pinctrl changes for kernel v3.7:
- Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
   provide platform config for the Nomadik.
 - Add a driver for the i.MX35.
 - Add a driver for the BCM2835, an advanced GPIO expander.
 - Various fixes and clean-ups and minor improvements for the core,
   Nomadik, pinctr-single, sirf drivers.
 - Some platform config for the ux500.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iQIcBAABAgAGBQJQatYeAAoJEEEQszewGV1zv78QAIjWWnQgZlMrX+ol6r5w44bx
 nnTLY22VE6GMliR9SagCo1VydjdZdsmLf03yLBP4Lmcc/PV4DmvJmX5l3cXxdCQe
 CmFCMbSOTxpIM0mgrhqDjSl8mJkJEXd2RvgvQaeffqShzK7qSU7LZbbZDX/YnY6O
 eb0UqgkQNXyutahq7qRKyVT3repb4EweA8wa45ix5Nx3Cco2PD7Pp5PV/LVlMHIf
 hDL3+2RmGrKDa52r5aOfg6ZvOabGU7TVmT21V7VzbtPvwP4yGHrwt3SrgGRFfwTk
 U8SwdT/DRVl44per8cxcdvxpde693xxxgWWVf01Exc5bOKfaaDjAh6fOdqbL0nkI
 kQQrQt5F+tT8ODtwoaObu7w1SSHiquV6/dNHAz03S6TwsNs7fPfk9IiQpwHuFFUL
 RSDZ3Z3dTmcU5PqhpRaPQwsPYWM7n9lF2uPZsH+uO+H1M0ag9w3Xz3up1nwRBzCC
 jr+W5s3vmmDot9JSfbZGCAGelb2AdX3FL1iRF95QjbAAdJdzS/szmA4x01R/xJax
 W8gfkgOr8mOiAdxqyS9LQu8cr1fn+e/6d2up0kBl0W7SPipeuUSd4SzJuSj9Zj9V
 BA6RxYQxPFRuwwU6YfKui3jBaKgvcD1lWTF8lJHljn5NqB3IbUjWe3px9ZmLq6wA
 nQLDXvuP36SbGTdkha0D
 =g2i2
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl changes from Linus Walleij:
 "Some of this stuff is hitting arch/arm/* and have been ACKed by the
  ARM SoC folks, or it's device tree bindings pertaining to the specific
  driver.

  These are the bulk pinctrl changes for kernel v3.7:
   - Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs,
     provide platform config for the Nomadik.
   - Add a driver for the i.MX35.
   - Add a driver for the BCM2835, an advanced GPIO expander.
   - Various fixes and clean-ups and minor improvements for the core,
     Nomadik, pinctr-single, sirf drivers.
   - Some platform config for the ux500."

* tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits)
  pinctrl: add bcm2835 driver
  pinctrl: clarify idle vs sleep states
  pinctrl/nomadik: use irq_find_mapping()
  pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq
  pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range
  pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input
  pinctrl: sirf: add missing pins to pinctrl list
  pinctrl: sirf: fix a typo in sirfsoc_gpio_probe
  pinctrl: pinctrl-single: add debugfs pin h/w state info
  ARM: ux500: 8500: update I2C sleep states pinctrl
  pinctrl: Fix potential memory leak in pinctrl_register_one_pin()
  ARM: ux500: tidy up pin sleep modes
  ARM: ux500: fix spi2 pin group
  pinctrl: imx: remove duplicated const
  pinctrl: document semantics vs GPIO
  ARM: ux500: 8500: use hsit_a_2 group for HSI
  pinctrl: use kasprintf() in pinmux_request_gpio()
  pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
  pinctrl/nomadik : add MC1_a_2 pin MC1 function group list
  pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
  ...
2012-10-02 16:20:20 -07:00
Linus Torvalds 8f446a7a06 ARM: soc: driver specific changes
- A long-coming conversion of various platforms to a common LED
   infrastructure
 - AT91 is moved over to use the newer MCI driver for MMC
 - Pincontrol conversions for samsung platforms
 - DT bindings for gscaler on samsung
 - i2c driver fixes for tegra, acked by i2c maintainer
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaO48AAoJEIwa5zzehBx3excP/ieEkRhvfnWxdYST6ekvGIQr
 nEyskOh2rVjgYKmSXUJyKSbvG+7bZ8VIxvPvojeAJ/R84pTFMzbR2F0CaPKzAuSW
 inDt6c0Bnx1NZlfUTAoXcz7feyq9zHYNs9BCLoPU0bYNchCCqcWSKzqnpXk2ph/P
 LFnmNa0j6a4E3QJYAjM2zFvc3Tgk+MWTq1fWwNFvsWTh2WbQtmB/iGnzT5Xs4XQh
 u1SSx5tz0lcF5zQRGmJhXgL5+nnIP4sRwRUBAkpe3Gv5cM6WBVEBRDANa5QpbUL2
 RXK5YyCTIln2Me4bPk32zEBLjiZ/WXbmiA2uwoqVgy6XToubemDXd0PtKmjj5tZ1
 BkTD1DND7BKBEQnJj/GBECEdvx2FbrKfruoPcJHvXPZ7Svn5Dt/MWYJQIkRFkuhL
 zlVNoDGWlU8nScGrgmTM56UvWmGWC3UFsWSgdVQNfW9yEva+G1FvRUwUH02Ip5Ad
 4r28JFIn6zyjtM99ZHipU6C6Rze2ordC7fl5X5LBLkVOobioblxCAhIhcqkhfKsk
 rFriNsdfYs7SrJA7mK7GzvaMEJgp/5o1noJKXI7ZBcLI8yYagzbQbPu/vGi6G6d3
 0xC7NaTEJbtoXoDAtmtilLRxmw0YCXgVBBGua0K2YKpcRwnzCHNbV4gsLMnDuOXS
 HP4M96LxLHJlLGCxhEme
 =ck7M
 -----END PGP SIGNATURE-----

Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc driver specific changes from Olof Johansson:
 - A long-coming conversion of various platforms to a common LED
   infrastructure
 - AT91 is moved over to use the newer MCI driver for MMC
 - Pincontrol conversions for samsung platforms
 - DT bindings for gscaler on samsung
 - i2c driver fixes for tegra, acked by i2c maintainer

Fix up conflicts as per Olof.

* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  drivers: bus: omap_l3: use resources instead of hardcoded irqs
  pinctrl: exynos: Fix wakeup IRQ domain registration check
  pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data
  pinctrl: exynos: Correct the detection of wakeup-eint node
  pinctrl: exynos: Mark exynos_irq_demux_eint as inline
  pinctrl: exynos: Handle only unmasked wakeup interrupts
  pinctrl: exynos: Fix typos in gpio/wkup _irq_mask
  pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
  drivers: bus: Move the OMAP interconnect driver to drivers/bus/
  i2c: tegra: dynamically control fast clk
  i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20
  ARM: tegra: clock: remove unused clock entry for i2c
  ARM: tegra: clock: add connection name in i2c clock entry
  i2c: tegra: pass proper name for getting clock
  ARM: tegra: clock: add i2c fast clock entry in clock table
  ARM: EXYNOS: Adds G-Scaler device from Device Tree
  ARM: EXYNOS: Add clock support for G-Scaler
  ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform
  ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC
  ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used
  ...
2012-10-01 18:46:13 -07:00
Linus Torvalds ac9e7ab32f ARM: soc: cleanups, part 2
A shorter cleanup branch submitted separately due to dependencies with
 some of the previous topics.
 
 Major thing here is that the Broadcom bcmring platform is removed. It's an
 SoC that's used on some stationary VoIP platforms, and is in desperate
 need of some cleanup. Broadcom came back and suggested that we just
 deprecate the platform for now, since they aren't going to spend the
 resources needed on cleaning it up, and there are no users of the platform
 directly from mainline.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaO3MAAoJEIwa5zzehBx39VgQAKKjVG+QLQMaDhcZD8bl8xrZ
 vDbH5b4kOso34q6D4kXtSb3bA9Anzps6ZZ+dLHBRNHXTXH5FNHTcKNxqhEV1b0qP
 3XTZ05/FopixmSKfUvNvx84jM93phGSdXcvz6zcpGgUdNVQ5ElsX5BS3DBSGw12O
 K3zVJlQxEQHgT+iXvoFQv5YOREQOzbqrFSm/QORT78+zcm6nPCY5rCJfz1Po05rS
 hHTU/JfL5rXgLJaPXqbCkRFitM1CSGQXw8GkSP3IxB5mfDH6DqcWon0Uh3AOh+k2
 PXQGNhzHlL6RNesscLDU3YsFhQq1tPL/JA8gzzaTa8z4CCWGTmD48iHUJ0mtXN33
 XmglrpNQwiiD9pepWyfN0TPiAD9mBfnRRzwkmmHUkeNeIeVOo+nH+6JWEBc3kjFD
 CemIIAtbflC0IZpnaoieOUwO6USukq4CCBdR2icQp9hG9nNnZ1O2L/HeuXn8DxPf
 7TksF0wsBAbWkFWRLWmx0dVO0b0fuXsgQ/9+G51OxWOxpMIgMG3BBgkNN6fAybjg
 t10jzilu3UKAVyqetWrrmzkzMtHLz6uAlOkR4W0+YoEBG57HD0iepBJZfzqulkb3
 i5mdwYUQgPViNsvq9cuIfj/+S8QxRbJ4hT59u7YaAPX5Y3jstHXdjS4nFxv/mH0x
 4qzaqYCJxDqdq6CssEKX
 =LPF/
 -----END PGP SIGNATURE-----

Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc cleanups, part 2 from Olof Johansson:
 "A shorter cleanup branch submitted separately due to dependencies with
  some of the previous topics.

  Major thing here is that the Broadcom bcmring platform is removed.
  It's an SoC that's used on some stationary VoIP platforms, and is in
  desperate need of some cleanup.  Broadcom came back and suggested that
  we just deprecate the platform for now, since they aren't going to
  spend the resources needed on cleaning it up, and there are no users
  of the platform directly from mainline."

Fix some conflicts due to BCM2835 getting added next to the removed
BCMRING, and removal of tegra files that had been converted to
devicetree.

* tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: Orion5x: ts78xx: Add IOMEM for virtual addresses.
  ARM: ux500: use __iomem pointers for MMIO
  ARM: Remove mach-bcmring
  ARM: clps711x: Remove board support for CEIVA
  ARM: clps711x: Fix register definitions
  ARM: clps711x: Fix lowlevel debug-macro
  ARM: clps711x: Added simple clock framework
  pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrl
  ARM: tegra: delete unused headers
  ARM: tegra: remove useless includes of <mach/*.h>
  ARM: tegra: remove dead code
2012-10-01 18:32:45 -07:00
Linus Torvalds 2a2bf85f05 ARM: soc: device tree updates
Device tree conversion and enablement branch. Mostly a bunch of new
 bindings and setup for various platforms, but the Via/Winchip VT8500
 platform is also converted over from being 100% legacy to now use
 device tree for probing. More of that will come for 3.8.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQaiKNAAoJEIwa5zzehBx329AP/1TwJk1dTHaAA7vDxyz2mq1E
 F0MBL9p32R1SczrFGjbmb9ouVW5tTjbK1zted5zBrGBXDIX9Kdz3Dmm7x6b2/JvZ
 8yMrdiBNpF3r8au6IaMuMlOq5yAaN+F4SxbC2rE0a9y3YmMZ6ug5dgoZ4O8orAC4
 il3eq1sb+rTTPCf7C5cGlKzdRQi2KYdAycpa7ChQCYSamxJjdM7cXR7pohVv9vhd
 9sF+h1I0ArxcVYn/mUOoCin8MyIWXlBQvbUnF+3aYO8CO9erhKH/owPngVBWGKZH
 +X6dk0ChUJfjzaWr2HPZIYUqLUnIoO8TsRhQVmLp1rPrSzSXMG3iDq0M4WEwL4Xo
 bMbAZ1KWYg53HRqbIOEQk5q9Mg7HUgtbJuOE7WLgBO5ubdKFFWLmDUJ+WVcoWzSW
 qyWaWpECSptlQjFyqZJd9MjizIDhuYjog2EWaSWXETQ+1XRmCSsqx8AX6n1MVdhP
 6jDLnYHYiJoOtGiaDpYxsXgMXdOVsrTegecNduqH/XhdEL1iwy3fwgK1DjoclYoj
 iFbn0/Tw3N5SvJlG4xitl12DQ7MeCCbfzJGRKenVh9/O4U+qrTbFRmsNaaZw5dA1
 bt+iEZ3aU8YBaKj02LexunAevpZJ2rfGNX2tBjQrIzzZK6CZibPWg42qfKJfdn7w
 etXVVApw5jQjAImY64kh
 =q7ZY
 -----END PGP SIGNATURE-----

Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc device tree updates from Olof Johansson:
 "Device tree conversion and enablement branch.  Mostly a bunch of new
  bindings and setup for various platforms, but the Via/Winchip VT8500
  platform is also converted over from being 100% legacy to now use
  device tree for probing.  More of that will come for 3.8."

Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
  arm: vt8500: Fixup for missing gpio.h
  ARM: LPC32xx: LED fix in PHY3250 DTS file
  ARM: dt: mmp-dma: add binding file
  arm: vt8500: Update arch-vt8500 to devicetree support.
  arm: vt8500: gpio: Devicetree support for arch-vt8500
  arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
  arm: vt8500: clk: Add Common Clock Framework support
  video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
  serial: vt8500: Add devicetree support for vt8500-serial
  rtc: vt8500: Add devicetree support for vt8500-rtc
  arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
  ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
  ARM: tegra: Add Avionic Design Medcom-Wide support
  ARM: tegra: Add Avionic Design Plutux support
  ARM: tegra: Add Avionic Design Tamonten support
  ARM: tegra: dts: Add pwm label
  ARM: ux500: Fix SSP register address format
  ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
  ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
  ARM: ux500: Add all encompassing sound node to the HREF Device Tree
  ...
2012-10-01 18:28:06 -07:00
Simon Arlott e1b2dc70cd pinctrl: add bcm2835 driver
The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
controller, and pinmux/control device.

Original driver by Simon Arlott.
Rewrite including GPIO chip device by Chris Boot.

Upstreaming changes by Stephen Warren:
* Wrote DT binding documentation.
* Changed brcm,function to an integer to more directly match the
  datasheet, and to match brcm,pins being an integer.
* Implemented pull-up/down pin config.
* Removed read-only DT property and related code. The restriction this
  implemented are driven by the board, not the GPIO HW block, so don't
  really make sense of a HW block binding, were in general incomplete
  (since they could only know about the few pins hard-coded into the
  Raspberry Pi B board design and not the uncommitted GPIOS), and are
  better represented simply by not writing incorrect data into pin
  configuration nodes.
* Don't set GPIO_IN function select in gpio_request_enable() to avoid
  glitches; defer this to gpio_set_direction(). Consequently, removed
  empty bcm2835_pmx_gpio_request_enable().
* Simplified enabled_irq_map[]; make it explicitly 1 entry per bank.
* Lifted use of enabled_irq_map[] outside the per-interrupt loop in
  IRQ handler, thus fixing an issue where the code was indexing into
  enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID.
* Removed locking in IRQ handler, since all other code uses
  spin_lock_irqsave() and so guarantees it doesn't run concurrently
  with the handler.
* Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of
  bcm2835_gpio_pins[].
* Remove range-checking from bcm2835_pctl_get_groups_count() since we've
  decided to trust the pinctrl core.
* Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set()
  directly for simplicity.
* Fixed body of dt_free_map() to match latest dt_node_to_map().
* Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl
  core owns doing this.
* Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more
  descriptive.
* Simplified remove(); removed call to non-existent
  pinctrl_remove_gpio_range(), remove early return on error.
* Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's
  base GPIO number.
* Error-handling cleanups in probe().
* Switched to module_platform_driver() rather than open-coding.
* Made pin, group, and function names lower-case.
* s/broadcom/brcm/ in DT property names.
* s/2708/2835/.
* Fixed a couple minor checkpatch warnings, and other minor cleanup.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-01 08:05:22 +02:00
Linus Walleij 95f0bc9bf0 pinctrl/nomadik: use irq_find_mapping()
The code was using a homegrown method of looking up the offset
from the irq domain, not to be encouraged. Use the proper
irq_find_mapping() call instead.

Cc: Lee Jones <lee.jones@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:31:26 +02:00
Barry Song 6fd4011e16 pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq
This patch fixes the chained irq hang issue, tested by DM9000 driver using
GPIO0-3(irqnr=131) as the external IRQ on SiRFmarco:
   $ cat /proc/interrupts
               CPU0       CPU1
     32:       1608          0       GIC  sirfsoc_timer0
     33:          0       3197       GIC  sirfsoc_timer1
     50:      10207          0       GIC  sirfsoc-uart
     56:          2          0       GIC  cc0e0000.i2c
     70:         44          0       GIC  mmc0
    131:        333          0  sirf-gpio-irq  eth0
    ...

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:27:36 +02:00
Barry Song 1983040139 pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range
This patch initializes the optional irq_chip pointer gc in sirfsoc
pinctrl_gpio_range.

Signed-off-by: Baohua Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:27:36 +02:00
Barry Song 58d26c1eab pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input
sirfsoc_gpio_set_input() is called in those functions which have
held the spinlock, so delete the duplicated locking.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:27:35 +02:00
Barry Song 8dd9766f68 pinctrl: sirf: add missing pins to pinctrl list
We always use pinctrl_request_gpio() to get GPIO, If we don't have these
missing pins in the pin list, gpio_request and related operations will fail
for them.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:27:35 +02:00
Barry Song ea5363663f pinctrl: sirf: fix a typo in sirfsoc_gpio_probe
Return 0 while probing success.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:27:34 +02:00
Matt Porter 7d66ce7f8c pinctrl: pinctrl-single: add debugfs pin h/w state info
Adds support for displaying the individual pin h/w config state.

Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-28 09:12:53 +02:00
Sachin Kamat eb26cc9c71 pinctrl: Fix potential memory leak in pinctrl_register_one_pin()
'pindesc' was not freed when returning from an error induced
exit path.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-27 13:43:14 +02:00
Olof Johansson c740ae7404 Merge branch 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
From Jason Cooper:

New drivers:
 - pinctrl (dove, kirkwood, mvebu)
 - gpio (mvebu)

* 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: add gpio support in defconfig
  arm: mvebu: add DT information for GPIO banks on Armada 370 and XP
  arm: mvebu: use GPIO support now that a driver is available
  Documentation: add description of DT binding for the gpio-mvebu driver
  gpio: introduce gpio-mvebu driver for Marvell SoCs
  arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms
  arm: mvebu: split Kconfig options for Armada 370 and XP
  ARM: mvebu: adjust Armada XP evaluation board DTS
  ARM: mvebu: Add pinctrl support to Armada 370 SoC
  ARM: mvebu: Add pinctrl support to Armada XP SoCs
  pinctrl: mvebu: add pinctrl driver for Armada XP
  pinctrl: mvebu: add pinctrl driver for Armada 370
  pinctrl: mvebu: kirkwood pinctrl driver
  pinctrl: mvebu: dove pinctrl driver
  pinctrl: mvebu: pinctrl driver core

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 14:23:11 -07:00
Thomas Petazzoni 463e270f76 pinctrl: mvebu: add pinctrl driver for Armada XP
This pinctrl driver is not a full-blown pinctrl driver from scratch:
it relies on the common pinctrl-mvebu driver, which is used for all
Marvell EBU SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:20 +00:00
Thomas Petazzoni 5f597bb2be pinctrl: mvebu: add pinctrl driver for Armada 370
This pinctrl driver is not a full-blown pinctrl driver from scratch:
it relies on the common pinctrl-mvebu driver, which is used for all
Marvell EBU SoCs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:19 +00:00
Sebastian Hesselbarth 9d4b1632bc pinctrl: mvebu: kirkwood pinctrl driver
This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:17 +00:00
Sebastian Hesselbarth c9f95cedfe pinctrl: mvebu: dove pinctrl driver
This patch adds a SoC specific pinctrl driver for Marvell Dove SoCs
plus DT binding documentation. This driver will use the mvebu pinctrl
driver core.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-22 14:50:16 +00:00
Sebastian Hesselbarth 7e8d941567 pinctrl: mvebu: pinctrl driver core
This patch adds a pinctrl driver core for Marvell SoCs plus DT
binding documentation. This core driver will be used by SoC family
specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

Conflicts:

	arch/arm/Kconfig
2012-09-22 14:50:14 +00:00
Olof Johansson ea832c41da Merge branch 'next/dt' into next/multiplatform
* next/dt: (182 commits)
  ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
  ARM: tegra: Add Avionic Design Medcom-Wide support
  ARM: tegra: Add Avionic Design Plutux support
  ARM: tegra: Add Avionic Design Tamonten support
  ARM: tegra: dts: Add pwm label
  ARM: dt: tegra: whistler: configure power off
  ARM: mxs: m28evk: Disable OCOTP OUI loading
  ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent
  ARM: dts: imx6q-sabrelite: add usbotg pinctrl support
  ARM: dts: imx23-olinuxino: Add USB host support
  ARM: dts: imx6q-sabrelite: add usbmisc device
  ARM: dts: mx23: Add USB resources
  ARM: dts: mxs: Add ethernetX to macX aliases
  ARM: msm: Remove non-DT targets from 8960
  ARM: msm: Add DT support for 8960
  ARM: msm: Move io mapping prototypes to common.h
  ARM: msm: Rename board-msm8x60 to signify its DT only status
  ARM: msm: Make 8660 a DT only target
  ARM: msm: Move 8660 to DT timer
  ARM: msm: Add DT support to msm_timer
  ...
2012-09-20 21:16:43 -07:00
Tomasz Figa d3c977927b pinctrl: exynos: Fix wakeup IRQ domain registration check
Because of a typo, incorrect field of a structure was being checked.
This patch fixes the check to use correct field.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:34:07 +09:00
Tomasz Figa 2f0253ffed pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data
Although the function is used only a single time, it is not performance
critical and it is pretty heavy, so let the compiler decide whether to
inline it instead.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:34:04 +09:00
Tomasz Figa c3ad056b26 pinctrl: exynos: Correct the detection of wakeup-eint node
Current way of finding the wakeup-eint node scans the whole device tree
not only children of the pinctrl node, so it might detect a wakeup-eint
node of another pinctrl device.

This patch limits the scope of looking for nodes only to subnodes of the
pinctrl node.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:34:01 +09:00
Tomasz Figa 9759e2ebc4 pinctrl: exynos: Mark exynos_irq_demux_eint as inline
The exynos_irq_demux_eint utility function is used in chained IRQ
handler for EINT16-31 to handle multiplexed interrupts. Inlining it
should improve the performance a bit.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:33:58 +09:00
Tomasz Figa de59049bd6 pinctrl: exynos: Handle only unmasked wakeup interrupts
A bit in EINTxx_PEND register is set regardless of interrupt mask, which
causes spurious interrupts. To avoid them, the read value of pending
register must be masked with current interrupt mask manually.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:33:55 +09:00
Tomasz Figa 3da23f27a0 pinctrl: exynos: Fix typos in gpio/wkup _irq_mask
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to
be set.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:33:52 +09:00
Tomasz Figa ee2f573c42 pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
Pins used as GPIO interrupts need to be configured as EINTs. This patch
adds the required configuration code to exynos_gpio_irq_set_type,
to set the pin as EINT when its interrupt trigger is configured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21 07:33:48 +09:00
Richard Zhao a695145b9c pinctrl: imx: remove duplicated const
fix smatch warning:
drivers/pinctrl/pinctrl-imx.c:435:21: warning: duplicate const

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-18 15:19:13 +02:00
Stephen Warren 3b2f941296 pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrl
Now that Tegra's pinmux is configured solely from device tree, there's
no need for the pinconf types to be defined in arch/arm/mach-tegra/.
Move it into the pinctrl directory to clean up mach-tegra, as a pre-
requisite for single-zImage.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-14 11:35:37 -06:00
Thomas Petazzoni 23a895aee6 pinctrl: use kasprintf() in pinmux_request_gpio()
Instead of using a temporary buffer, snprintf() and kstrdup(), just
use kasprintf() that does the same thing in just oneline.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Colin Cross <ccross@google.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-14 15:53:13 +02:00
John Crispin e316cb2b16 OF: pinctrl: MIPS: lantiq: adds support for FALCON SoC
Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks
of up to 32 pins.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
2012-09-13 10:30:58 +02:00
John Crispin 3f8c50c9b1 OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support
Implement support for pinctrl on lantiq/xway socs. The IO core found on these
socs has the registers for pinctrl, pinconf and gpio mixed up in the same
register range. As the gpio_chip handling is only a few lines, the driver also
implements the gpio functionality. This obseletes the old gpio driver that was
located in the arch/ folder.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
2012-09-13 10:30:49 +02:00
Peter Ujfalusi 9e605cb68a pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
With pinctrl-single,bits it is possible to update just part of the register
within the pinctrl-single,function-mask area.
This is useful when one register configures mmore than one pin's mux.

pinctrl-single,bits takes three parameters:
<reg offset, value, sub-mask>

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[Removed a misplaced comment]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-13 09:00:10 +02:00
Patrice Chotard 2830c3686b pinctrl/nomadik : add MC1_a_2 pin MC1 function group list
Another possible pin configuration for the MC1 pin group.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-10 10:29:35 +02:00
Peter Ujfalusi 00ba7a502d pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
Use the pcs->fmask to make sure that the value is not changing (setting)
bits in areas where it should not.
To avoid situations like this:

pmx_dummy: pinmux@4a100040 {
	compatible = "pinctrl-single";
	reg = <0x4a100040 0x0196>;
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-single,register-width = <16>;
	pinctrl-single,function-mask = <0x00ff>;
};

&pmx_dummy {
	pinctrl-names = "default";
	pinctrl-0 = <&board_pins>;

	board_pins: pinmux_board_pins {
		pinctrl-single,pins = <
			0x6c 0xf0f
			0x6e 0x10f
			0x70 0x23f
			0x72 0xa5f
		>;
	};
};

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-10 09:14:03 +02:00
Thomas Abraham 43b169db18 pinctrl: add exynos4210 specific extensions for samsung pinctrl driver
Add information about the Exynos4210 pin banks and driver data which is
used by the Samsung pinctrl driver. In addition to this, the support for
external gpio and wakeup interrupt support is included and hooked up with
the Samsung pinctrl driver.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07 06:07:19 +09:00
Thomas Abraham 30574f0db1 pinctrl: add samsung pinctrl and gpiolib driver
Add a new device tree enabled pinctrl and gpiolib driver for Samsung
SoC's. This driver provides a common and extensible framework for all
Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This
driver supports only device tree based instantiation and hence can be
used only on those Samsung platforms that have device tree enabled.

This driver is split into two parts: the pinctrl interface and the gpiolib
interface. The pinctrl interface registers pinctrl devices with the pinctrl
subsystem and gpiolib interface registers gpio chips with the gpiolib
subsystem. The information about the pins, pin groups, pin functions and
gpio chips, which are SoC specific, are parsed from device tree node.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07 06:07:19 +09:00
Barry Song 056876f6c7 pinctrl: sirf: add DT-binding pinmux mapping support
This makes us possible to define pinmux mapping in board-specific DTS.
prima2.dtsi provides all possible (groups,functions) configuration, and
device in .dts select configurations from dtsi files.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-05 14:48:10 +08:00
Arnd Bergmann 3fbb96d275 Merge branch 'cleanup/io-pci' into next/cleanup
The io-pci series has gained a merge to resolve a nontrivial
conflict.

* cleanup/io-pci:
  ARM: Fix ioremap() of address zero

Also includes an update to Linux 3.6-rc3

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-04 15:07:35 +02:00
Etienne Carriere 4921e7452c pinctrl/nomadik: MASK_ON_SUSPEND
ux500 machines performs pins (GPIO) reconfiguration when entering
in the suspended mode. This reconfiguration aims at reaching an ultra
low power HW configuration.

Due to this HW reconfiguration, some HW devices can change of HW state
and have their output signals at level that could generate IRQs.

If the non-wakeup IRQs are disabled but not yet masked (delayed interrupt
disable feature from the generic irq layer), effective interrupts reach
the system only because the system attempt to enter the suspended mode.

To prevent such IRQs to trig, all irq chips embedded in ux500 platform
should enable their IRQCHIP_MASK_ON_SUSPEND flag.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03 13:21:37 +02:00
Shawn Guo d5fff72db1 pinctrl: imx5: start numbering pad from 0
Unlike imx6q pinctrl driver that starts nubmering pad from 0, imx5
pinctrl drivers number pad from 1.  It causes problem/confusion when
driver accesses imx51_pinctrl_pads array using pin ID as the index.

Change imx51_pads and imx53_pads numbering start from 0.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03 13:21:37 +02:00
Uwe Kleine-König b9aa8f13ea pinctrl: pinctrl-imx: add imx35 pinctrl driver
This is mostly cut'n'paste from the imx51 pinctrl driver.
The data was generated using sed and awk on
arch/arm/plat-mxc/include/mach/iomux-mx35.h.

Changes since (implicit) v1
 - remove references to file names in binding documentation
 - remove sed commands from comments in driver
 - add explicit numbers for pins and functions

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03 13:21:37 +02:00
Linus Walleij f79c5ed9da pinctrl/nomadik: add STn8815 ASIC support
This adds support for the STN8815 ASIC for the Nomadik pin
controller.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03 13:21:37 +02:00
Patrice Chotard 45a1b53195 pinctrl/nomadik: add ASIC DB8450 pinctrl driver
This implements a subdriver for the DB8540 ASIC for the
Nomadik pin controller.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03 13:21:37 +02:00
Patrice Chotard 4c39104da8 pinctrl/nomadik: add kp_b_2 keyboard function group list
There is yet another way to mux the keyboard, so fix up that
group.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17 11:09:58 +02:00
Shawn Guo b20fd25a94 pinctrl: imx51: fix .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSI
The .conf_reg of MX51_PAD_SD2_CMD__CSPI_MOSI should be 0x7bc rather
than NO_PAD.  This error will cause SD2 probe failure.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17 11:09:58 +02:00
Richard Genoud d599bfb324 trivial: pinctrl core: remove extraneous code lines
In function pinctrl_get_locked, pointer p is returned on
error, and also return on no_error.
So, we just return it with no error test.

It's pretty the same in function pinctrl_lookup_state_locked:
state is returned in every case, so we drop the error test
and just return state.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
2012-08-17 11:09:58 +02:00
Linus Walleij 2ee38d4de5 pinctrl/nomadik: fix null in irqdomain errorpath
The irqdomain conversion failed to notice that we do not always
have a DT node to dereference, fix this up by using a simple
dev_err() that also tells the name of the device.

Cc: Loic Pallardy <loic.pallardy@st.com>
Cc: Patrice Chotard <patrice.chotard@stericsson.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-17 11:09:58 +02:00
Linus Walleij 6517285071 pinctrl/coh901: move header to platform data dir
Move the platform-specific COH901 pin control header out of the
ARM tree and down into the proper platform data include
directory.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-13 13:53:05 +02:00
Linus Walleij 04b13de622 pinctrl/coh901: retire ancient GPIO block versions
As the non-U335 U300 variants are retired from the ARM tree,
also delete the pinctrl driver codepaths for these variants.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-13 13:53:05 +02:00
Julia Lawall 75c353ecac drivers/pinctrl/pinctrl-nomadik.c: drop devm_kfree of devm_kzalloc'd data
devm_kfree should not have to be explicitly used.

The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression x,d;
@@

x = devm_kzalloc(...)
...
?-devm_kfree(d,x);
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07 14:34:12 +02:00
Devendra Naga f4b49dee1a pinctrl-sirf: remove devm_kfree at error path
the pointers that are allocated with devm_kzalloc will be automatically freed,
at unload time.

Signed-off-by: Devendra Naga <develkernel412222@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07 14:20:06 +02:00
Patrice Chotard 606b64ea66 pinctrl/nomadik: fix hsi function group list
Tidy up a small typo in the HSI function group list.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-07 13:30:13 +02:00
Devendra Naga 0e3ac20d9f pinctrl/pinctrl-u300: remove unneeded devm_kfree call
the allocated memory will be destroyed at the driver unload time,
automatically if driver uses the devm_ functions, so no need of
doing devm_kfree at the error path

Signed-off-by: Devendra Naga <develkernel412222@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-05 00:24:15 +02:00
Shawn Guo c43ba80082 pinctrl: mxs: register driver at postcore_initcall time
It's not so usual, but there are still some cases which require pinctrl
driver function at arch_initcall time.  So register imx23 and imx28
pinctrl driver at postcore_initcall time.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-05 00:24:15 +02:00
Linus Torvalds 914311c9fb Pin control changes for v3.6:
- Various cleanups to the U300 driver
 - Refactor the pin control core to automatically remove
   any GPIO ranges when the drivers are removed, instead of
   having the drivers do this explicitly.
 - Add a function for registering a batch of GPIO ranges.
 - Fix a number of incorrect but non-regressive error checks.
 - Incremental improvements to the COH901, i.MX and Nomadik drivers
 - Add a one-register-per-pin entirely Device Tree-based pin
   control driver from Tony Lindgren.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJQDUCxAAoJEEEQszewGV1z4EIQAMUREEJG+usUzX/2y9yMvtjn
 i3HQLV1UuPYiVyQfkrpwG7yEGYboZg4PoX4MjyTwiJt1Nq6QhHGjncYj8ngL7uSd
 B7EvulqH2lhLXdvW6s/nqBf5GfAqAhusLOi3FmyMbt4rnJ5bhFnbIdQ4h5MC7eFf
 jwQaDPJWcMPOisNJKAC+McVYpTO+VjivbfqMmQ/B9gmmtGSVoQf6YA3CvjJ0P8IT
 Or3xUr1VS6AnkS139qg473pYMKiSDzk9tQaN1k9V37jQvTeDv9ALOrLcJV+Bi002
 tfTtmOnPDQskgjz/NQvXuPMykZNT9E+XkjxAT1ClY6YVzrLogcYJxkFH5JQ80Lb5
 YMhgciRH92KSzQRsGJrJsH8HkAp3FubbC3rEt1MmkVV9ZPBgcUETGIR5tqcdyh8s
 5Hj4VASksTeExi7ajYEcDXDihYOB4l9ApDs+5XNhfPRGDY8sUjoxFLvpdzFXIfhn
 UZ5KJt16DoDkq0KVVIx1FHRdCcga+TtpARdi0kl2pzxDRrEti9x3F4nHFgaT4Eqb
 osnH17RlO+VGZYtg6635wcxEWr/wMzfzpVOi/0JO2wAm+R5A3VaIqsfvvm+ouRR0
 0Q++6NAVHySKTuab8Rz6D0dvTRF8O8zgJowdMDMX52C5nc5fhlKOl/Pc3g0W1q5C
 zmCaKOzT9RyPx2l+SrWz
 =79Wu
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "These are the accumulated pin control patches for v3.6:
   - Various cleanups to the U300 driver
   - Refactor the pin control core to automatically remove any GPIO
     ranges when the drivers are removed, instead of having the drivers
     do this explicitly.
   - Add a function for registering a batch of GPIO ranges.
   - Fix a number of incorrect but non-regressive error checks.
   - Incremental improvements to the COH901, i.MX and Nomadik drivers
   - Add a one-register-per-pin entirely Device Tree-based pin control
     driver from Tony Lindgren."

* tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: Add one-register-per-pin type device tree based pinctrl driver
  pinctrl/nomadik: add spi2_oc1_2 pin group
  pinctrl/nomadik: kerneldoc fix
  pinctrl/nomadik: use devm_* allocators for gpio probe
  pinctrl/nomadik: add pin group to mco function
  pinctrl/nomadik: add hsit_a_2 pin group
  pinctrl/nomadik: add pin group smcs1 and smps0
  pinctrl/nomadik: fix hsir_a_1_pins pin list
  pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set
  pinctrl/coh901: use clk_prepare_[en|dis]able()
  pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl
  pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl
  pinctrl/u300: drop unused variable
  pinctrl: select the proper symbol
  pinctrl: add pinctrl_add_gpio_ranges function
  pinctrl: remove pinctrl_remove_gpio_range
  pinctrl/pinctrl-core: cleanup pinctrl_register
  pinctrl/u300: delete pointless debug print
  pinctrl/pinctrl-u300: remove devm_kfree at driver unload
2012-07-24 14:05:46 -07:00
Linus Torvalds e81218f5f0 arm-soc: pincontrol drivers
We are converting platforms to use the pinctrl framework over time,
 rather than using platform specific code for the same effect. This
 adds the respective driver for the prima2 platform.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIVAwUAUA2dgmCrR//JCVInAQJTqA/7BYaJpsNCKxc2GOVFVtva6Nvq+QaTk9Af
 ft2dgEExL5zjaH+HYwLLhdwOFf4Ilwqadw23jtNb2Mqq/FmmO5omenGEWVhTGr7x
 RjqWtfgq9PMVh7mZKtTZoC9/vECiX0ZyU3+2Zw+Fn0Begchc1meJGPUbniHwprL6
 hLSBC7h+92C5I6WiileE5QNHmkhClQ8Hv9GoLnwR59HSkkspmZNIqsV+vkpPHNaX
 GJy3HhT6Xg7KiOLjvvbCjsmt/qgyIKIuJWBzXl1VlnNn0dNDt1Km14DZOdhhXEFv
 70IbcZs7ykcJNCApNDH1Hgro69O95phQTJOo6w8FspeAt8UogNTb2uj+lS2GOQHM
 rlRfm3XQlXd40Pr8RNCJdg2WWQKGiOhrN+zTuaPovjfTdkdnZkSyhMdrZVT9T7HC
 unvsBQ7HXVEwQ0i24d4CqBUscYNRo3iAWjqEAqnXDpDSVrVaJmp9T1LRcX2vF5Lu
 nvyLOYYITBkHjkpAjgAoaKdhOBoAq86be0Uo8NjFxVI2881wTSEwdfVOsufTB1HA
 L4XGVrc70Bhrk+9Nu4wjXtEz+6tV+6KO+bZdYeCkvwzbCeUo+a0qPqxz7ynBdNbt
 FPOToiA8qj6qzkTMl+EeC2bIoYjpbhkMP4V1BsgAjXScuVt2NQdTl8nDJUGtHga6
 W590SViMI9U=
 =YodD
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc pincontrol drivers update from Arnd Bergmann:
 "We are converting platforms to use the pinctrl framework over time,
  rather than using platform specific code for the same effect.  This
  adds the respective driver for the prima2 platform."

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: prima2: enable gpiolib unconditionally
  PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
2012-07-23 17:36:53 -07:00
Linus Torvalds 4f2d658b2f arm-soc: device tree description updates
This branch contains two kinds of updates: Some platforms in the process
 of getting converted to device tree based booting, and the platform
 specific patches necessary for that are included here. Other platforms
 are already converted, so we just need to update the actual device
 tree source files and the binding documents to add support for new board
 and new drivers.
 In the future we will probably separate those into two branches, and
 in the long run, the plan is to move the device tree source files out
 of the kernel repository, but that has to wait until we have completed
 a much larger portion of the binding documents.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIVAwUAUA2dbmCrR//JCVInAQJl0hAA3U3AnfBBXbKEJhUi47z6QU2kRPVfyjAj
 ct+FsZMWFihEHC5/YkB/bQ/i7Hf/AKBZRG6eAUfsyevuhQ0Li+wsRM4eU3FaF6kw
 HNqqB6GQWM+2rR8//Y6AAZymTLfe5nbuWFhRXiIggIlQne5jJ1kSidmSzG+OJEuN
 sAKXX7Ud5goVsby9Uwp4Gc0fpDsjFmIarhHfMDizFozNZIFzZIhKKdl1VOf+Kv+o
 PFRfCGB2KQrrDy0oB62y3iNUiK84LA0xWX4KkI9rD4OHWeiDQpbUITchf//Wa20X
 vgZdI8T16sxbmAHi1zerIl8y/CLgLyerp1L3KSMGTwirC+92vZg+jOGYGgNqu973
 NOl0IBQFpbAlNzmf52naNgcQ2OxxFQ3ogrlpvE2bItLL7J3vpmn1JwWMTtSrcs3Z
 xgbovAq2ivNOiKpzXexvMsWDCU3PxzXaP+2hEUhglJcdXkx5Iwiwi6un2FuF2qWT
 l5rSAWkg2kT/OkgYHLBI5JW7e7ugWhUAuCsrIH9eW7xstm4hIlN950vefs2FrZkP
 FeE7pn6s6mr98+j9isJKusETXIoEXDLX61vxA8PQP7GYN+/O/g2qB0qztBwarMBL
 wAdHCjavOYNwPkxYaGLjv9qKt3X575O/6aFa/NoKGhIECanjLl02Tqg02BdHecST
 8HENXCvwQns=
 =K3WL
 -----END PGP SIGNATURE-----

Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc device tree description updates from Arnd Bergmann:
 "This branch contains two kinds of updates: Some platforms in the
  process of getting converted to device tree based booting, and the
  platform specific patches necessary for that are included here.

  Other platforms are already converted, so we just need to update the
  actual device tree source files and the binding documents to add
  support for new board and new drivers.

  In the future we will probably separate those into two branches, and
  in the long run, the plan is to move the device tree source files out
  of the kernel repository, but that has to wait until we have completed
  a much larger portion of the binding documents."

Fix up trivial conflicts in arch/arm/mach-imx/clk-imx6q.c due to newly
added clkdev registers next to a few removed unnecessary ones.

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
  ARM: LPC32xx: Add PWM to base dts file
  ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary
  ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platforms
  ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5
  ARM: EXYNOS: Add spi clock support for EXYNOS5
  ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms
  ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4
  ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clock
  ARM: ux500: Remove PMU platform registration when booting with DT
  ARM: ux500: Remove temporary snowball_of_platform_devs enablement structure
  ARM: ux500: Ensure vendor specific properties have the vendor's identifier
  pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes
  ARM: ux500: Move rtc-pl031 registration to Device Tree when enabled
  ARM: ux500: Enable the AB8500 RTC for all DT:ed DB8500 based devices
  ARM: ux500: Correctly reference IRQs supplied by the AB8500 from Device Tree
  ARM: ux500: Apply ab8500-debug node do the db8500 DT structure
  ARM: ux500: Add a ab8500-usb Device Tree node for db8500 based devices
  ARM: ux500: Add db8500 Device Tree node for misc/ab8500-pwm
  ARM: ux500: Add db8500 Device Tree node for ab8500-sysctrl
  ARM: ux500: Enable LED heartbeat functionality on Snowbal via DT
  ...
2012-07-23 16:17:43 -07:00
Tony Lindgren 8b8b091bf0 pinctrl: Add one-register-per-pin type device tree based pinctrl driver
Add one-register-per-pin type device tree based pinctrl driver.

This driver has been tested on omap2+ series of processors,
where there is either an 8 or 16-bit padconf register for each pin.
Support for other similar pinmux controllers can be added.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-14 22:33:08 +02:00
Dong Aisheng 4a5f7eff8b pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID
The original pin registers table is derived from u-boot mainline,
but somehow it was found missing some mux functions for USBOTG_ID.
We added it at the bottom by following the exist pin function ids,
then it will not break the exist using of pin function id in dts file.

Reported-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
2012-07-14 22:32:10 +02:00
Dong Aisheng a6e7360b22 pinctrl: pinctrl-imx: only print debug message when DEBUG is defined
Fix regression for commit 3a86a5f8 (pinctrl: pinctrl-imx: free allocated
pinctrl_map structure only once and use kernel facilities for IMX_PMX_DUMP)
introduced in 3.5-rc3.
With above commit, the debug code will alway be excuted.
Change to excute it only when DEBUG is defined.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-14 22:31:02 +02:00
Lee Jones 612e1d5f1c pinctrl: pinctrl-nomadik: Append sleepmode property with vendor specific prefixes
Any non-standard property should contain the vendor's identifier which
should be perpended onto the property name followed by a comma. This
aids in name-space collision prevention. This patch ensures the
sleepmode property adheres to the rules.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-07-13 10:14:39 +02:00
Patrice Chotard 3923040bd1 pinctrl/nomadik: add spi2_oc1_2 pin group
On 8500 and 9540, all SPI2 pins are driven by SPI block except SPI2_FRM
which is driven as GPIO due to specific constraints.
A new group spi2_oc1_2 is created which exclude SPI2_FRM pin.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-05 10:37:37 +02:00
Linus Walleij 50bcd47c31 pinctrl/nomadik: kerneldoc fix
Document a missing function parameter to nmk_config_pin().

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-04 11:25:36 +02:00
Linus Walleij 5e754f330d pinctrl/nomadik: use devm_* allocators for gpio probe
The GPIO portions of the Nomadik pinctrl driver was not using
the managed devm_* interfaces, lets' use them consequently and
cut down the error path and special case handling.

Acked-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-04 11:05:05 +02:00
Patrice Chotard fcd217edc0 pinctrl/nomadik: add pin group to mco function
mc0_dat47_a_1 and mc0dat31dir_a_1 groups are missing for mco function

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:09 +02:00
Patrice Chotard f098e183f2 pinctrl/nomadik: add hsit_a_2 pin group
On 8500 and 9540, all HSI pins are driven by HSI block except
HSIT_ACWAKE0_a which is driven as GPIO due to specific
constraints. A new group hsit_a_2 is created which exclude
HSIT_ACWAKE0_a pin.

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:09 +02:00
Patrice Chotard a3b0105765 pinctrl/nomadik: add pin group smcs1 and smps0
Add smcs1_b_1_pins as DB8500_PIN_B14 can be SM_CS1 in alt B
Add smps0_c_1_pins as DB8500_PIN_E8 can be SM_PS0 in alt C

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:09 +02:00
Patrice Chotard 7beea7f3bf pinctrl/nomadik: fix hsir_a_1_pins pin list
move DB8500_PIN_AJ11(HSIR_RDY0_a) from hsit_a_1_pins to hsir_a_1_pins

Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:09 +02:00
Hui Wang 1807161067 pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set
new_map is allocated according to map_num instead of grp->npins,
if a pin or some pins of a group has NO_PAD_CTL property, the map_num
and the grp->npin are different definitely.

When we set mapping information to the new_map[], we should skip those
pins with NO_PAD_CTL from index, otherwise it is possible the driver
will aceesss to a unallocated region.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Linus Walleij 27e8461cd5 pinctrl/coh901: use clk_prepare_[en|dis]able()
The COH901 GPIO driver did not prepare or unprepare its
clock, so let us fix it to do so.

Acked-by: Pankaj Jangra <jangra.pankaj9@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Devendra Naga cb0f7d35e3 pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl
pinctrl_register returns a pointer of struct type struct pinctrl_dev,
if successfully registered to pinctrl subsystem, otherwise returns
NULL, and there wont' be any pointers which are not dereferencible.

They are not type of pointer addresses but are kind of error
codes rather actual addresses, but are a kind of return
codes of functions returning integer types.

return -ENODEV if device registration fails.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Devendra Naga 8003ae335a pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl
pinctrl_register returns a pointer of struct type struct pinctrl_dev,
if successfully registered to pinctrl subsystem, otherwise returns
NULL, and there wont' be any pointers which are not dereferencible.

They are not type of pointer addresses but are kind of error
codes rather actual addresses, but are a kind of return
codes of functions returning integer types.

return -ENODEV if device registration fails.

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Linus Walleij ebddc88e99 pinctrl/u300: drop unused variable
The "i" variable was left after the GPIO range cleanup
moved to core.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Linus Walleij 3c94d1bbda pinctrl: select the proper symbol
The Kconfig entry for the COH901 pin controller depended on
PINMUX_U300 which is stale, use PINCTRL_U300 as it is called
these days.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Dong Aisheng 3e5e00b654 pinctrl: add pinctrl_add_gpio_ranges function
Often GPIO ranges are added in batch, so create a special
function for that.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:08 +02:00
Dong Aisheng 5d589b092a pinctrl: remove pinctrl_remove_gpio_range
The gpio ranges will be automatically removed when the pinctrl
driver is unregistered.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:07 +02:00
Devendra Naga da9aecb02d pinctrl/pinctrl-core: cleanup pinctrl_register
lots of places the ret is used just for non zero cases
with out that also we can check the status of the function
calls.

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:07 +02:00
Linus Walleij 7e1dfe5319 pinctrl/u300: delete pointless debug print
This is some leftover from earlier development, let's get rid
of it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:07 +02:00
Devendra Naga 5a511cd33f pinctrl/pinctrl-u300: remove devm_kfree at driver unload
the memory allocated by devm_kzalloc is automatically
freed at the driver detach side, so no neeed of calling
devm_kfree

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-03 21:51:07 +02:00
Barry Song 5130216265 PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
In SiRFprimaII, Each GPIO pin can be configured as input or output
independently. If a GPIO is configured as input, it can also be
enabled as an interrupt source (either edge or level triggered).

These pins must be either MUXed as GPIO or other function pads.

Signed-off-by: Yuping Luo <yuping.luo@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-02 10:59:07 +08:00
Linus Torvalds a2a2609c97 Merge branch 'akpm' (Andrew's patch-bomb)
* emailed from Andrew Morton <akpm@linux-foundation.org>: (21 patches)
  mm/memblock: fix overlapping allocation when doubling reserved array
  c/r: prctl: Move PR_GET_TID_ADDRESS to a proper place
  pidns: find_new_reaper() can no longer switch to init_pid_ns.child_reaper
  pidns: guarantee that the pidns init will be the last pidns process reaped
  fault-inject: avoid call to random32() if fault injection is disabled
  Viresh has moved
  get_maintainer: Fix --help warning
  mm/memory.c: fix kernel-doc warnings
  mm: fix kernel-doc warnings
  mm: correctly synchronize rss-counters at exit/exec
  mm, thp: print useful information when mmap_sem is unlocked in zap_pmd_range
  h8300: use the declarations provided by <asm/sections.h>
  h8300: fix use of extinct _sbss and _ebss
  xtensa: use the declarations provided by <asm/sections.h>
  xtensa: use "test -e" instead of bashism "test -a"
  xtensa: replace xtensa-specific _f{data,text} by _s{data,text}
  memcg: fix use_hierarchy css_is_ancestor oops regression
  mm, oom: fix and cleanup oom score calculations
  nilfs2: ensure proper cache clearing for gc-inodes
  thp: avoid atomic64_read in pmd_read_atomic for 32bit PAE
  ...
2012-06-20 14:41:57 -07:00
Viresh Kumar 10d8935f46 Viresh has moved
viresh.kumar@st.com email-id doesn't exist anymore as I have left the
company.  Replace ST's id with viresh.linux@gmail.com.

It also updates .mailmap file to fix address for 'git shortlog'

Signed-off-by: Viresh Kumar <viresh.linux@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-06-20 14:39:36 -07:00
Linus Walleij daf731748f pinctrl/nomadik: document Alt-C glitch
This documentation comment existed in an earlier patch set for
GPIO consolidation, so I'm saving it for maintainability of the
code.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-17 19:44:44 +02:00
Fabio Estevam 14e1e9f5ca pinctrl: mxs: Use kfree to fix build error
commit 0bf7481 (pinctrl: pinctrl-mxs: Take care of frees if the kzalloc fails)
introduced the following build error:

drivers/pinctrl/pinctrl-mxs.c:140:3: error: implicit declaration of function 'free'

Use kfree function instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-17 19:44:44 +02:00
Devendra Naga 149ff9e1f2 pinctrl: pinctrl-mxs: set platform driver data to NULL at errpath and at unregister
clear the platform data pointer when mxs_pinctrl_probe_dt fails,
and also before the unregistering with pinctrl subsystem.

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 16:26:08 +02:00
Devendra Naga 0bf7481852 pinctrl: pinctrl-mxs: Take care of frees if the kzalloc fails
if there is no purecfg , the group pointer is allocated using kzalloc and if it
fails to allocate, we wont free the new_map,

if config is true, we call kmemdup and if it
fails to do so we wont free the allocated group if there is no purecfg.

fix this by doing the frees of new_map pointer and group pointers.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 16:25:56 +02:00
Dong Aisheng 67695f2eae pinctrl: pinctrl-imx: fix incorrect debug message of maps
After create config map, the new_map pointer becomes point to
PIN_MAP_TYPE_CONFIGS_PIN map rather than PIN_MAP_TYPE_MUX_GROUP map any more.
Thus using new_map pointer to display the MUX_GROUP info is not correct.
Using map pointer instead to show the correct MUX_GROUP map info.
Original the debug message is:
imx6q-pinctrl 20e0000.iomuxc: maps: function Yp group MX6Q_PAD_SD3_CMD num 12
After fix it is:
imx6q-pinctrl 20e0000.iomuxc: maps: function usdhc3 group usdhc3grp-1 num 11

Reported-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 13:35:33 +02:00
Devendra Naga c71157c54a pinctrl: pinctrl-imx: free if of_get_parent fails to get the parent node
of_get_parent can return null if no parent node found, so the allocated new_map
should be freed.

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 13:35:32 +02:00
Devendra Naga 3a86a5f8ab pinctrl: pinctrl-imx: free allocated pinctrl_map structure only once and use kernel facilities for IMX_PMX_DUMP
a) as we allocate the pinctrl_map structure at imx_dt_node_to_map at  line 167, anyway
   if its an element, or a num_elements * (sizeof(type)) elements allocated to one single
   pointer must be freed only once.

CASE. A)

as new_map is not moved and allocated like,

for (i = 0; i < MAX_ELEMS; i++) {
    new_map[i] = kmalloc(numelems * size, GFP_KERNEL);
}

its freed as

for (i = 0; i < MAX_ELEMS; i++) {
    kfree(new_map[i]);
}

CASE. B)
and its allocated like
        new_map = kmalloc(numelems * size, GFP_KERNEL);

it just needs kfree not as case A's.

b) use KERN_DEBUG facility for the IMX_PMX_DUMP macro.

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 13:35:32 +02:00
Linus Walleij e85bbc19d5 pinctrl: nomadik: fix up typo
Commit a60b57edda
"drivers/gpio: gpio-nomadik: Add support for irqdomains"
changed GPIO offset calculations to have this form:
(gpio % NMK_GPIO_PER_CHIP) except in this one place for
setting sleep mode, where the conversion was all wrong, and
instead mod:ing the GPIO with the IRQ base which does not
make any sense.

So fix this up so we can use sleepmode.

Reviewed-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2012-06-12 13:35:24 +02:00
Linus Walleij efec381ced pinctrl: nomadik: add clk_prepare() call
We now strictly require clk_prepare() calls to be issued before
any clk_enable() calls.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-12 12:57:07 +02:00
Guennadi Liakhovetski bc66468cee pinctrl: fix a minor harmless typo
The way the for_each_maps() macro is currently used, using "i" instead of
"_i_" works and is harmless. Still, this is a bug, that can trigger any
time, if the code around that macro changes. Better fix it now.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-04 09:52:52 +02:00
Barry Song 1253585d7c pinctrl: sirf: mark of_device_id match table as __devinitconst
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-06-04 09:52:52 +02:00
Lee Jones 855f80cd16 pinctrl-nomadik: Allow Device Tree driver probing
The Nomadik GPIO controller now relies on Nomadik pinctrl, however
the pinctrl driver is not currently started by any ux500 platform.
This is requred or GPIOs do not work at all.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-06-01 02:03:25 +02:00
Linus Torvalds 30b842889e arm-soc: soc specific changes, part 2
This adds support for the spear13xx platform, which has first been under
 review a long time ago and finally been completed after generic spear
 work has gone into the clock, dt and pinctrl branches.
 
 Also a number of updates for the samsung socs are part of this branch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJPuezDAAoJEIwa5zzehBx3mooP/iTHd1wRjr2MzKNx4+LpLWgl
 aAXH002xe9Lvu7m75BRvEYWWdRLkyEy9ARM4s2wJCnxU41KmbF65ED1erxK8xaSe
 Ako34vzH+HiUCM2DLzIP6FXyJMM7OcfrdGaY/GxOv+U+MzGUHeu3Q+8b0B/yfBnm
 M3HdDrpyZHKZP9UM3wVQ4/ilDck6vEjYSV2jC11IaHiDMRD2nSpfRKh8H3+gv65S
 gtj9EZpWM8CZg/fCe5lsm3PZnBnqHHW3WVafVnDQfGWeJYqZxMB5QKLU6qf/ntpx
 LU2WjXoGaMmGBVZWynrwNEY6GVp3fZrDV30/q8Htf0/fBpEjUncrLHXtw0DxkpnK
 UuyoRgn7zxOc3kDzohFNIexp1K3q+PNzXklR9hg7OSVji+9bPd2LIOEnpBeghBGj
 WzZIebz5dIdddHlnOl4fRdmxZva2UTuI4bFAJ0izi10Mup7A9lrENnFHG/iVA0rQ
 QlqJZoyeDCvbXQqZCgHirYRPhIxXdQj4G5IivfRxQ7Jgjy76Kt9uDp1egwezF/3a
 2jVtcK42XokVv3Dhsvq9UNFn9GWdVImZ7eh70XLv+q834zAVxSzjWLtlS8I1Q5WO
 7BGIJaICtugNwgYr44Dif6nsoVUmMnSwU5hVw1pApKZspN6EhMhMdp2hw8JPHFUs
 mrZdHi1NAWuYSbObc3UB
 =W2Ri
 -----END PGP SIGNATURE-----

Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
 "This adds support for the spear13xx platform, which has first been
  under review a long time ago and finally been completed after generic
  spear work has gone into the clock, dt and pinctrl branches.

  Also a number of updates for the samsung socs are part of this branch."

Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997d6 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c983 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.

So the conflict diff looks like hell, but it's actually a fairly simple
change.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: fix building with CONFIG_OF disabled
  ARM: EXYNOS: Add AUXDATA for i2c controllers
  ARM: dts: Update device tree source files for EXYNOS5250
  ARM: EXYNOS: Add device tree support for interrupt combiner
  ARM: EXYNOS: Add irq_domain support for interrupt combiner
  ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
  ARM: EXYNOS: update irqs for EXYNOS5250 SoC
  ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
  ARM: EXYNOS: add GPC4 bank instance
  ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
  ARM: EXYNOS: Modify the GIC physical address for static io-mapping
  ARM: EXYNOS: Add watchdog timer clock instance
  pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
  SPEAr: Update MAINTAINERS and Documentation
  SPEAr13xx: Add defconfig
  SPEAr13xx: Add compilation support
  SPEAr13xx: Add dts and dtsi files
  pinctrl: Add SPEAr13xx pinctrl drivers
  pinctrl: SPEAr: Create macro for declaring GPIO PINS
  SPEAr13xx: Add common clock framework support
  ...
2012-05-26 13:05:55 -07:00
Linus Torvalds 813a95e5b4 arm-soc: soc-specific pinctrl changes
With this, five platforms are moving to the relatively new pinctrl
 subsystem for their pin management, replacing the older soc specific
 in-kernel interfaces with common code.
 
 There is quite a bit of net addition of code for each platform being
 added to the pinctrl subsystem. but the payback comes later when adding
 new boards can be done by only providing new device trees instead.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJPuw1/AAoJEIwa5zzehBx3wbsP/RFCYzMVyz85BNLQuRyY9eO2
 GCRWd0Vvy3fIfypiPdHdhkq6nIU/JnxgsfBbKX9FvWqvxXi96Ojh13KSIhSI1rQ9
 t14VyuwUXaS3leeCyKxhNF1vRscz2iyEGXJqp+XEN4ckf2nrQCpKBiY5Eg9sH6/J
 fvYgSBY9Lf9nFAn+/wqSKIfdvw7H0NXwUdsLvNU0uCwvrSG929bTxx2AnHX00TdJ
 qf4XLhmatMg1uwdUgL/99ZxxgHlj6o55u7S6aRhUWXNXCimV6uEZ1F35ET37b+x3
 YUltBCIaXjFR7iwNHmkkl42d8uyfkBznB555sY5qS3G/uF5Ma1R5I7fv8EIEy+2w
 bVHsva4lj1yFazic6m8yKTET4i8n6OPiKVNqGnDsp2yb6WzOGSliKdr0Jlo1oNG2
 gS69LcDZxCkXrqEq0Ht8uUoCo9TWei+qhJ6ZOJ1Z3+9ZyFq1iRTKgPVxyA5VaHaB
 wwBbqKrohAwuExY8/gkAj6SYqBOF3l/J8QSB2JjXyj4trLC5UMq+l3L4cIWyMRPc
 fil83hV6460CiIBoKcsnV9hDUS0oh74mv52zHo0Xj73qABqZ4dcrpHVayWjtMtpl
 Z+tUpvD1rMQ+E0gdXDrwMrwILVyCDsBvpFKF4avnujDJ4WmyywtKZ+xvnpMd73VZ
 YrI/+XQsMT8ZfVkkj54D
 =HIfz
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm soc-specific pinctrl changes from Olof Johansson:
 "With this, five platforms are moving to the relatively new pinctrl
  subsystem for their pin management, replacing the older soc specific
  in-kernel interfaces with common code.

  There is quite a bit of net addition of code for each platform being
  added to the pinctrl subsystem.  But the payback comes later when
  adding new boards can be done by only providing new device trees
  instead."

Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  mtd: nand: gpmi: fix compile error caused by pinctrl call
  ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
  ARM: nomadik: enable PINCTRL_NOMADIK where needed
  ARM: mxs: enable pinctrl support
  video: mxsfb: adopt pinctrl support
  ASoC: mxs-saif: adopt pinctrl support
  i2c: mxs: adopt pinctrl support
  mtd: nand: gpmi: adopt pinctrl support
  mmc: mxs-mmc: adopt pinctrl support
  serial: mxs-auart: adopt pinctrl support
  serial: amba-pl011: adopt pinctrl support
  spi/imx: adopt pinctrl support
  i2c: imx: adopt pinctrl support
  can: flexcan: adopt pinctrl support
  net: fec: adopt pinctrl support
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  ...
2012-05-22 09:39:42 -07:00
Dong Aisheng 4f6a16bf01 pinctrl: pinctrl-imx: add imx51 pinctrl driver
ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-20 21:00:41 +02:00
Dong Aisheng 93fbd3c050 pinctrl: pinctrl-imx: add imx53 pinctrl driver
ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-20 21:00:18 +02:00
Arnd Bergmann 0fa7be407d ARM: nomadik: enable PINCTRL_NOMADIK where needed
The nomadik gpio code has been converted to pinctrl, but the nomadik platform
still expects the old code to be present. Change it to use the new one instead.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 14:42:57 +02:00
Dong Aisheng 19055b8fa7 pinctrl: pinctrl-pxa3xx: remove empty pinmux disable function
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 09:59:50 +02:00
Dong Aisheng eaf7bfb092 pinctrl: pinctrl-mxs: remove empty pinmux disable function
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 09:48:07 +02:00
Dong Aisheng 273f0c349e pinctrl: pinctrl-imx: remove empty pinmux disable function
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 09:46:41 +02:00
Dong Aisheng 02b50ce4cb pinctrl: make pinmux disable function optional
Some SoCs may not have pinmux disable function in HW.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 09:44:50 +02:00
Dong Aisheng c95df2db2c pinctrl: a minor error checking improvement for pinconf
Also checking invalid num_configs when validate the pinconf map.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-15 09:43:18 +02:00
Viresh Kumar eb3f995d7e pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 17:34:11 +02:00
Viresh Kumar 85ed41a76f pinctrl: Add SPEAr13xx pinctrl drivers
This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two
machines: SPEAr1310 and SPEAr1340.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 17:34:07 +02:00
Viresh Kumar d1e77afe9d pinctrl: SPEAr: Create macro for declaring GPIO PINS
Same GPIO pins declarations would be required for other SoCs and that will be a
lot of lines of code. Its better to create common macros for it.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 17:34:06 +02:00
Shawn Guo 4851680491 pinctrl: mxs: skip gpio nodes for group creation
The recent added mxs gpio device tree bindings require gpio nodes
defined under pinctrl node too.  The pinctrl-mxs driver should skip
these node for group parsing and creating.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 10:43:35 +02:00
Shawn Guo 3b7ac941e0 pinctrl: mxs: create group for pin config node
The initial mxs pinctrl support, commit 1772311 (pinctrl: add
pinctrl-mxs support) skipped creating group from device tree pin config
node.  Add it to get pin config node work for client device.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 10:42:40 +02:00
Olof Johansson 7af07ad902 ux500 GPIO and pinctrl changes for kernel 3.5
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJPrioxAAoJEEEQszewGV1zpPkP/1nMK0LMo8sy7ScnCCumNils
 ZiWgB8pViyfl5gLggOwldI/ILVzXTbR6pJZAJNoU3Tbu7n96UyA2QCdeBn/JKCbY
 Yr0I/8uT0hXlh4QVrCgyVKQt2e05rP2mt8vtP1CoFad0R56RfwZ9U9u9S2kx5DnY
 oKXeg/sjxURueMPYQuvZVZBdLJ+82rsBNVXukKb2h2gY8ntMm6CBLUgk/oHBpPrM
 CWaNBT0llBwwWhsmrErYZ7Sb7nRRGDL2rf6kKrw1UPwZ5FIefS+RHaudRic/AiGD
 DfVGh22hpv0WFQ6ruEayA1JfoYS0IKsvGBn8Ywf+2tz9uteED6rXJ+fOF6FayR6y
 NarGmCFUoQauh5ZSK8h7nv0oNlRFgb3OFp/FfLZC9N+jCWJVVbtbLD9X+M5wN6aE
 lUjQwVbiA7q7ZTYs12X/zzBjrQj+ZrV5IXZLq+dvZ1HKBh4FLSpXaZocOCP0n0f1
 N4VkGgIngWeiQDDJqc11mZ3ueD/p2AsWsxLRAEafL5CaIk+vz9JXcF3gYDt57Oph
 WjPOWXTHiRxb1W4OfgvKWtZbxJdqECJ8HnWUbpTjiG0/MK8Tfprk8iSEOqS2tM1B
 usBXBLk8I4P2RwGgIcsnuJ1gEEsZzjSbvpxf2VKVvdP86qw7LizYrEjXKvjnq4G/
 nGSTZ3F3/53x2mFEihpM
 =xjdL
 -----END PGP SIGNATURE-----

Merge tag 'ux500-gpio-pins-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/pinctrl

ux500 GPIO and pinctrl changes for kernel 3.5

* tag 'ux500-gpio-pins-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  pinctrl: add sleep state definition
  pinctrl/nomadik: implement pin configuration
  pinctrl/nomadik: implement pin multiplexing
  pinctrl/nomadik: reuse GPIO debug function for pins
  pinctrl/nomadik: break out single GPIO debug function
  pinctrl/nomadik: basic Nomadik pinctrl interface
  pinctrl/nomadik: !CONFIG_OF build error
  gpio: move the Nomadik GPIO driver to pinctrl

Context conflicts resolved in drivers/pinctrl/Kconfig and
drivers/pinctrl/Makefile.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-05-12 19:57:34 -07:00
Arnd Bergmann 7afeca1a30 Merge branch 'spear/pinctrl' into next/pinctrl
* spear/pinctrl:
  pinctrl: (cosmetic) fix two entries in DocBook comments
  pinctrl: add more info to error msgs in pin_request
  CLKDEV: provide helpers for common clock framework
  pinctrl: add pinctrl-mxs support
  pinctrl: pinctrl-imx: add imx6q pinctrl driver
  pinctrl: pinctrl-imx: add imx pinctrl core driver
  dt: add of_get_child_count helper function
  pinctrl: support gpio request deferred probing
  pinctrl: add pinctrl_provide_dummies interface for platforms to use
  pinctrl: enhance reporting of errors when loading from DT
  pinctrl: add kerneldoc for pinctrl_ops device tree functions
  pinctrl: propagate map validation errors
  pinctrl: fix dangling comment
  pinctrl: fix signed vs unsigned conditionals inside pinmux_map_to_setting
  ARM: 7392/1: CLKDEV: Optimize clk_find()
  ARM: 7376/1: clkdev: Implement managed clk_get()

This just adds more dependencies that are required in order not to
break the spear pinctrl support.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-12 23:22:36 +02:00
Arnd Bergmann 366695ff70 Merge branches 'depends/pinctrl/devel' and 'depends/rmk/clkdev' into spear/pinctrl
The spear/pinctrl branch has hard dependencies on both the
pinctrl branch and the clkdev branch. We merge those here
to fix it up without having to rebase a branch that has
been pulled into other stable branches already.

Conflicts:
	Documentation/driver-model/devres.txt

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-12 20:38:42 +02:00
Linus Walleij d41af62763 pinctrl/nomadik: implement pin configuration
This implements the pin configuration interface for the
Nomadik pin controller.

As part of the exercise we add a bit in the pin_cfg_t for
the Nomadik pinctrl driver that indicates if the pin should
be forced into GPIO mode. This is not done to go behind the
back of the GPIO subsystem, but to ensure that default modes
can be set by hogs on boot and system suspend/resume states.
It was used implicitly by the old code defining all config
settings and modes in a single config word but we now have
a split between pinmux and pinconf leading to the need to
have this.

We also add a bit for explicitly setting sleepmode of the
pin. This was previously handled by custom calls with the
_sleep() suffix, but we now have one single interface into
the configuration so we replace this with a bit indicating
that the pin shall be configured into sleep mode.

Some of the configuration can be refactored later to use
less custom fields on the pin_cfg_t but we are currently
leaving the old function calls in place so we stay
compatible.

ChangeLog v1->v2:
- Drop a hunk changing pinmuxing for GPIO and move it
  over to the preceding pinmux patch.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 11:14:16 +02:00
Linus Walleij dbfe8ca259 pinctrl/nomadik: implement pin multiplexing
Implements basic pinmux for the Nomadik pin controller.

The plan is to split the existing singular pin config interface
nmk_config_pin(), nmk_config_pins(), that will configure muxing
and other settings at the same time, into two interfaces
by splitting the code in pinmux and pinctrl and eventually
deleting the old interface and its helper functions when all
users are gone.

nmk_gpio_set_mode() and nmk_gpio_get_mode() are two older
interfaces for just configuring muxing/altfunctions that
will also be replaced in the end.

We take some extra care to handle the glitch-avoidance here,
but it is simpler now since there is only one altsetting per
pingroup so we know immediately if we need to avoid altfunc
C glitches for a certain group.

As part of the makeover implement the .request() and .free()
calls on the GPIO chips and have them call back into the
pinctrl layer to reserve GPIOs.

ChangeLog v1->v2:
- Rebased on pinctrl-mergebase-20120418 so we get the latest
  driver infrastructure where function count is done by a fixed
  value and we can drop a few range checks since this is now
  handled by the core.
- Include a GPIO muxing hunk erroneously part of the pin config
  patch.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 11:14:16 +02:00
Linus Walleij 24cbdd75c4 pinctrl/nomadik: reuse GPIO debug function for pins
Since all pins we can control are GPIOs, match a GPIO range to
each pin in the debug function and call into the GPIO debug
print function to have the per-pin information.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 11:14:15 +02:00
Linus Walleij 6f4350a6da pinctrl/nomadik: break out single GPIO debug function
Break out the code displaying the status of a single pin so we
can use the same code in the pinctrl debug function.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 11:14:15 +02:00
Linus Walleij e98ea774c8 pinctrl/nomadik: basic Nomadik pinctrl interface
This adds a scratch pin control interface to the Nomadik pinctrl
driver, and defines the pins and groups in the DB8500 ASIC. We
define GPIO ranges to cover the pins exposed. The DB8500 has
more pins than this but we restrict the driver to the pins that
can be controlled from the combined GPIO and pin control hardware
to begin with.

ChangeLog v1->v2:
- Base on the latest pinctrl development from
  pinctrl-mergebase-20120418 so we can get rid of legacy
  group count mechanism. Also drop the range checks for group
  index, this is handled by the core now.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 11:14:14 +02:00
Arnd Bergmann 072e82a18f pinctrl/nomadik: !CONFIG_OF build error
a60b57e "drivers/gpio: gpio-nomadik: Add support for irqdomains" broke
building with CONFIG_OF_GPIO disabled.

Without this patch, building nhk8815_defconfig results in:

/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c: In function 'nmk_gpio_probe':
/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c:1238:6: error: 'struct gpio_chip' has no member named 'of_node'
make[3]: *** [drivers/gpio/gpio-nomadik.o] Error 1
make[2]: *** [drivers/gpio] Error 2
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [drivers] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [sub-make] Error 2

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 10:33:59 +02:00
Linus Walleij 1ae4e59279 gpio: move the Nomadik GPIO driver to pinctrl
I'm moving this driver over to the pinctrl subsystem to convert
the custom pin mux/config scheme over to use pinctrl.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-11 10:33:43 +02:00
Olof Johansson 7488185d07 Merge branch 'for-3.5/gpio-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/pinctrl
By Stephen Warren
via Stephen Warren
* 'for-3.5/gpio-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  pinctrl: tegra: error reporting cleanup
  pinctrl: tegra: debugfs enhancements
  pinctrl: tegra: refactor probe handling
  ARM: dt: tegra20: add pinmux to device tree
  ARM: dt: tegra cardhu: add pinmux to device tree
  ARM: tegra: Remove pre-pinctrl pinmux driver
  ARM: tegra: Switch to new pinctrl driver
  gpio: tegra: Hide tegra_gpio_enable/disable()
  ARM: tegra: seaboard: Don't gpio_request() ISL29018_IRQ
  gpio: tegra: configure pins during irq_set_type
  ARM: tegra: Remove VBUS_GPIO handling from board files
  usb: ehci-tegra: Add vbus_gpio to platform data
2012-05-09 23:43:04 -07:00
Olof Johansson b664ae6ff9 Merge tag 'pinctrl-mergebase-20120418' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into next/pinctrl
By Stephen Warren (12) and others
via Linus Walleij
* tag 'pinctrl-mergebase-20120418' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (24 commits)
  pinctrl: show pin name for pingroups in sysfs
  pinctrl: show pin name when request pins
  pinctrl: implement devm_pinctrl_get()/put()
  pinctrl: a minor fix of pin config debug information
  pinctrl: pinconf: fix compilation error if PINCONF is not selected
  pinctrl: allow pctldevs to decode pin config in debugfs
  pinctrl: ifdef CONFIG_DEBUG_FS cleanup
  pinctrl: mark non-EXPERIMENTAL
  pinctrl: tegra: Add complete device tree support
  dt: Document Tegra20/30 pinctrl binding
  dt: Move Tegra20 pin mux binding into new pinctrl directory
  dt: pinctrl: Document device tree binding
  dt: add property iteration helpers
  pinctrl: implement pinctrl deferred probing
  pinctrl: add some error checking for user interfaces
  pinctrl: fix pinmux_check_ops error checking
  pinctrl: replace list_*() with get_*_count()
  pinctrl: mark const init data with __initconst instead of __initdata
  Documentation: pinctrl: add missing spi0_0 grp in example
  pinctrl: fix build when CONFIG_OF && !CONFIG_PINCTRL
  ...

Resolved conflicts in drivers/pinctrl/core.c due to same patch being
applied in two branches.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-05-09 23:42:14 -07:00
Stephen Warren d4705316c1 pinctrl: add more info to error msgs in pin_request
Additionally print which pin the request failed for, which entity already
claimed it, and what entity was trying to claim it.

Remove duplicate device name from a debug message.

Clean up some indentation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-07 14:44:38 +02:00
Shawn Guo 17723111e6 pinctrl: add pinctrl-mxs support
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:18:27 +02:00
Dong Aisheng d8fe35727a pinctrl: pinctrl-imx: add imx6q pinctrl driver
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Dong Aisheng ae75ff8145 pinctrl: pinctrl-imx: add imx pinctrl core driver
The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.

The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.

Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Dong Aisheng 4650b7cbea pinctrl: support gpio request deferred probing
As pinctrl handles, it may be possible the pinctrl gpio ranges
are still not got registered when user call pinctrl_gpio_request.
Thus, add defer support for it too.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:20 +02:00
Arnd Bergmann ca731a5da0 Merge branch 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/gpio
Linus Walleij <linus.walleij@linaro.org> writes:

 This is a pull request for the GPIO and pin control stuff
 accumulated in the ST-Ericsson tree. Here we have:

 - Improvements and fixes and a custom pin config API from
   Rabin Vincent

 - Device Tree bindings from Lee Jones

 - Some accumulated patches by yours truly.

 - A MSP platform data init patch from Ola Lilja that is merged
   here due to dependency on pin config work. It is to be
   used with work being worked on in parallel in the ALSA
   SoC subsystem.

 If you wonder about the custom pin config implementation this
 is to be used as a transition base as I am rewriting the
 driver to use pinctrl. Expect a final pull request on top
 of this one that will move the ux500 over to pinctrl.

* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: Add support for MSP I2S-devices
  drivers/gpio: gpio-nomadik: Add support for irqdomains
  drivers/gpio: gpio-nomadik: Apply Device Tree bindings
  ARM: ux500: update pin handling
  ARM: ux500: implement pin API
  ARM: ux500: remove a bunch of internal pull-ups
  plat-nomadik: new sleep mode pincfg macros
  gpio/nomadik: use ioremap() instead of static mappings
  gpio/nomadik: support low EMI mode
  gpio/nomadik: fix spurious interrupts with SKE
  gpio/nomadik: cache [rf]w?imsc
  gpio/nomadik: don't set SLPM to 1 for non-wakeup pins

Also includes an update to v3.4-rc4.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-04-30 23:53:58 +02:00
Dong Aisheng 5b3aa5f7c6 pinctrl: add pinctrl_provide_dummies interface for platforms to use
Add a interface pinctrl_provide_dummies for platform to indicate
whether it needs use pinctrl dummy state.

ChangeLog v3->v4:
* remove dummy gpio support in pinctrl subsystem.
  Let gpio driver decide whether it wants to use pinctrl gpio mux
  function.
ChangeLog v2->v3:
* Also changed the missed pinctrl gpio APIs in v1.
ChangeLog v1->v2:
* Based on sascha's suggestion, drop using kconfig since it will hide
  pinctrl errors on all other boards.
  See: https://lkml.org/lkml/2012/4/18/282
  It seemed both Linus and Stephen agreed with this way, so i'm ok
  with it too.
* Add dummy gpio support.
  pinctrl gpio in the same situation as state.
* Patch name changed.
  Original is pinctrl: handle dummy state in core.
* Split removing old dt dummy interface into a separate patch

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-26 23:31:04 +02:00
John Crispin ad6e1107ba pinctrl: enhance reporting of errors when loading from DT
There are a few places in the api where the code simply returns -EINVAL when
it finds an error. An example is pinmux_map_to_setting() which now reports an
error if we try to match a group with a function that it does not support.

The reporting of errors in pinconf_check_ops and pinmux_check_ops now has the
same style and is located inside the according functions and not the calling
code.

When the map is found in the DT but the default state can not be selected we
get an error to know that the code at least tried.

The patch also removes a stray word from one comment and a "->" from another
for the sake of consistency.

Finally we replace a few pr_err/debug() calls with dev_err/dbg().

Thanks go to Stephen Warren for reviewing the patch and enhancing the reporting
inside pinmux_map_to_setting().

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-26 23:11:04 +02:00
Stephen Warren fde04f419a pinctrl: propagate map validation errors
pinctrl_register_map() was returning early if pinmux_validate_map() or
pinconf_validate_map() failed, but was not actually returning the error
code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-26 10:49:28 +02:00
Stephen Warren aef7704c6c pinctrl: tegra: error reporting cleanup
Print an explicit error message in various failure cases to allow
easier diagnosis.

WARN_ON() some internal failures that users/clients shouldn't be able to
trigger.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-04-25 15:21:47 -06:00
John Crispin 15f70e1b9a pinctrl: fix signed vs unsigned conditionals inside pinmux_map_to_setting
pinmux_map_to_setting() uses setting->data.mux.func/group to store the return
code of pinmux_func_name_to_selector/pinctrl_get_group_selector(). However,
struct pinctrl_setting_mux defines these elements as unsigned, resulting in all
error codes getting lost. The conditionals following the assignments will always
evaluate to false thus breaking the error paths.

This bug can be triggered by loading a pinmux group map from the devicetree
with an invalid function/group string.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24 15:09:50 +02:00
Viresh Kumar 52130b6033 pinctrl: Add SPEAr3xx pinctrl drivers
This adds pinctrl driver for SPEAr3xx family. SPEAr3xx family supports three
families: SPEAr300, SPEAr310 and SPEAr320.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
2012-04-22 22:49:25 +02:00
Viresh Kumar deda8287e1 pinctrl: Add SPEAr pinctrl drivers
This adds pinctrl driver for SPEAr platform. It also updates MAINTAINERS file
for SPEAr pinctrl drivers.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
2012-04-22 22:49:23 +02:00
Stephen Warren b5badbaad1 pinctrl: tegra: debugfs enhancements
* Only provide debugfs-relates ops when CONFIG_DEBUG_FS is enabled.
* Implement pin_config_group_dbg_show op.
* Implement pin_config_config_dbg_show op.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 14:35:18 -06:00
Stephen Warren 52f48fe00f pinctrl: tegra: refactor probe handling
Rather than having a single tegra-pinctrl driver that determines whether
it's running on Tegra20 or Tegra30, instead have separate drivers for
each that call into utility functions to implement the majority of the
driver. This change is based on review feedback of the SPEAr pinctrl
driver, which had originally copied to Tegra driver structure.

This requires that the two drivers have unique names. Update a couple
spots in arch/arm/mach-tegra for the name change.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 10:26:40 -06:00
Stephen Warren f30d12b3ff ARM: tegra: Switch to new pinctrl driver
* Rename old pinmux and new pinctrl platform driver and DT match table
  entries, so the new driver gets instantiated.
* Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the
  pinmux.
* Re-write board-*-pinmux.c so that the pinmux configuration tables are
  in pinctrl format.

Ventana's pin mux table needed some edits on top of the basic format
conversion, since some mux options that were previously marked as
reserved are now valid in the new pinctrl driver. Attempting to use the
old reserved names will result in a failure. Specifically, groups lpw0,
lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya,
and group pta was changed from function rsvd2 to hdmi.

All boards' pin mux tables needed some edits on top of the based format
conversion, since function i2c was split into i2c1 (first general I2C
controller) and i2cp (power I2C controller) to better align function
definitions with HW blocks.

Due to the split of mux tables into pure mux and pull/tristate tables,
many entries in the separate Seaboard/Ventana tables could be merged
into the common table, since the entries differed only in the portion
in one of the tables, not both.

Most pin groups allow configuration of mux, tri-state, and pull. However,
some don't allow pull configuration, which is instead configured by new
groups that only allow pull configuration. This is a reflection of the
true HW capabilities, which weren't fully represented by the old pinmux
driver. This required adding new pull table entries for those new groups,
and setting many other entries' pull configuration to
TEGRA_PINCONFIG_DONT_SET.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
2012-04-18 10:26:39 -06:00
Dong Aisheng dcb5dbc305 pinctrl: show pin name for pingroups in sysfs
Pin name is more useful to users.

After change, when cat pingroups in sysfs, it becomes:
root@freescale /sys/kernel/debug/pinctrl/20e0000.iomuxc$ cat pingroups
registered pin groups:
group: uart4grp-1
pin 219 (MX6Q_PAD_KEY_ROW0)
pin 218 (MX6Q_PAD_KEY_COL0)

group: usdhc4grp-1
pin 305 (MX6Q_PAD_SD4_CMD)
pin 306 (MX6Q_PAD_SD4_CLK)
pin 315 (MX6Q_PAD_SD4_DAT0)
pin 316 (MX6Q_PAD_SD4_DAT1)
pin 317 (MX6Q_PAD_SD4_DAT2)
pin 318 (MX6Q_PAD_SD4_DAT3)
pin 319 (MX6Q_PAD_SD4_DAT4)
pin 320 (MX6Q_PAD_SD4_DAT5)
pin 321 (MX6Q_PAD_SD4_DAT6)
pin 322 (MX6Q_PAD_SD4_DAT7)

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:13 +02:00
Dong Aisheng d0bd8df56e pinctrl: show pin name when request pins
Pin name is more useful to users.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:13 +02:00
Stephen Warren 6d4ca1fb46 pinctrl: implement devm_pinctrl_get()/put()
These functions allow the driver core to automatically clean up any
allocations made by drivers, thus leading to simplified drivers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:13 +02:00
Dong Aisheng 2aeefe0233 pinctrl: a minor fix of pin config debug information
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:13 +02:00
Viresh Kumar 96593afe6d pinctrl: pinconf: fix compilation error if PINCONF is not selected
When we compile pinctrl layer for platforms without CONFIG_PINCONF, we get
following compilation errors:

drivers/built-in.o: In function `pinctrl_show':
linux-2.6/drivers/pinctrl/core.c:1116: undefined
reference to `pinconf_show_setting'
drivers/built-in.o: In function `pinctrl_maps_show':
linux-2.6/drivers/pinctrl/core.c:1071: undefined
reference to `pinconf_show_map'
drivers/built-in.o: In function `pinctrl_init_device_debugfs':
linux-2.6/drivers/pinctrl/core.c:1224: undefined
reference to `pinconf_init_device_debugfs'
make[1]: *** [.tmp_vmlinux1] Error 1

This patch fixes this.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Stephen Warren 6cb4158757 pinctrl: allow pctldevs to decode pin config in debugfs
Add a pinconf op so that pin controller drivers can decode their pin
config settings for debugfs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Stephen Warren c736d73c9e pinctrl: ifdef CONFIG_DEBUG_FS cleanup
Only provide prototypes for pin{mux,conf}.c debugfs-related functions
when both CONFIG_PIN* /and/ CONFIG_DEBUG_FS are enabled, otherwise
provide static inlines.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Linus Walleij 630e2d0494 pinctrl: mark non-EXPERIMENTAL
With the finalization of the external driver API and the device
tree support, this subsystem is now mature and can be promoted to
non-experimental status.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Stephen Warren 60f7f5003d pinctrl: tegra: Add complete device tree support
Implement pinctrl_ops dt_node_to_map() and dt_free_map(). These allow
complete specification of the desired pinmux configuration using device
tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Linus Walleij c05127c4e2 pinctrl: implement pinctrl deferred probing
If drivers try to obtain pinctrl handles for a pin controller that
has not yet registered to the subsystem, we need to be able to
back out and retry with deferred probing. So let's return
-EPROBE_DEFER whenever this location fails. Also downgrade the
errors to info, maybe we will even set them to debug once the
deferred probing is commonplace.

Cc: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:11 +02:00
Dong Aisheng ad8bb720c2 pinctrl: add some error checking for user interfaces
This patch can avoid kernel oops in case the mux or config
function is not supported by driver.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:11 +02:00
Dong Aisheng a1d31f71e6 pinctrl: fix pinmux_check_ops error checking
Do not use get_functions_count before checking.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:11 +02:00
Viresh Kumar d1e90e9e74 pinctrl: replace list_*() with get_*_count()
Most of the SoC drivers implement list_groups() and list_functions()
routines for pinctrl and pinmux. These routines continue returning
zero until the selector argument is greater than total count of
available groups or functions.

This patch replaces these list_*() routines with get_*_count()
routines, which returns the number of available selection for SoC
driver. pinctrl layer will use this value to check the range it can
choose.

This patch fixes all user drivers for this change. There are other
routines in user drivers, which have checks to check validity of
selector passed to them. It is also no more required and hence
removed.

Documentation updated as well.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
[Folded in fix and fixed a minor merge artifact manually]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:10 +02:00
Uwe Kleine-König 122dbe7e58 pinctrl: mark const init data with __initconst instead of __initdata
As long as there is no other non-const variable marked __initdata in the
same compilation unit it doesn't hurt. If there were one however
compilation would fail with

	error: $variablename causes a section type conflict

because a section containing const variables is marked read only and so
cannot contain non-const variables.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:10 +02:00
Stephen Warren eafeb7a44a pinctrl: fix build when CONFIG_OF && !CONFIG_PINCTRL
pinctrl/devicetree.c won't compile when !CONFIG_PINCTRL, since the
pinctrl headers don't declare some types when !PINCTRL. Make sure
pinctrl/Makefile only attempts to compile devicetree.c when OF &&
PINCTRL.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:10 +02:00
Stephen Warren 57291ce295 pinctrl: core device tree mapping table parsing support
During pinctrl_get(), if the client device has a device tree node, look
for the common pinctrl properties there. If found, parse the referenced
device tree nodes, with the help of the pinctrl drivers, and generate
mapping table entries from them.

During pinctrl_put(), free any results of device tree parsing.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:10 +02:00
Stephen Warren d26bc49fa4 pinctrl: implement pinctrl_check_ops
Most code assumes that the pinctrl ops are present. Validate this when
registering a pinctrl driver. Remove the one place in the code that
was checking whether one of these non-optional ops was present.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:10 +02:00
Stephen Warren f84cc342b1 pinctrl: implement pinctrl_check_ops
Most code assumes that the pinctrl ops are present. Validate this when
registering a pinctrl driver. Remove the one place in the code that
was checking whether one of these non-optional ops was present.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-11 09:31:02 +02:00
Linus Walleij dc0b1aa3e2 pinctrl: support pinconfig on the U300
This adds pin configuration support for the U300 driver pair,
we can now read out the biasing and drive mode in debugfs and
configure it using the new configuration API.

ChangeLog v1->v2:
- Migrate to pin config and generic pin config changes.
ChangeLog v2->v3:
- Adjust to generic pin config changes in v7 patch set.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-12 22:49:03 +01:00
Linus Walleij a050b3eee6 pinctrl/coh901: use generic pinconf enums and parameters
Adjust the COH 901 driver to use the standard enums for
biasing and driving pins, alter signature of config function
to suit the framework.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-12 22:49:02 +01:00
Linus Walleij 394349f778 pinctrl: introduce generic pin config
This is a split-off from the earlier patch set which adds generic
pin configuration for the pin controllers that want it. Since
we may have a system with mixed generic and custom pin controllers,
we pass a boolean in the pin controller ops vtable to indicate
if it is generic.

ChangeLog v1->v5:
- Follow parent patch versioning number system.
- Document the semantic meaning of return values from pin config
  get functions, so we can iterate over pins and check their
  properties from debugfs as part of the generic config code.
- Use proper cast functions in the generic debugfs pin config
  file.
- Expand generic config to optionally cover groups too.
ChangeLog v5->v6:
- Update to match underlying changes.
ChangeLog v6->v7:
- Drop DRIVE_OFF parameter, use bias high impedance for this
- Delete argument for drive modes push-pull, od and os. These
  are now just state transitions.
- Delete slew rate rising/falling due to discussions on on
  proper semantics
- Drop config wakeup, struct irq_chip does this for now, add
  back if need be.
- Set PIN_CONFIG_END to 0x7fff making room for custom config
  parameters from 0x8000 and up.
- Prefix accessor functions with pinconf_
2012-03-12 22:49:02 +01:00
Linus Walleij 70b36378d4 pinctrl: fix error path in pinconf_map_to_setting()
The code was using the union member
setting->data.configs.group_or_pin to store a potential
error code, but since that member is unsigned the
< 0 comparison was not true, letting errors pass through,
ending up as mapped to pin "-22". Fix this up and print
the error.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-12 22:48:43 +01:00
Stephen Warren 652162d469 pinctrl: allow concurrent gpio and mux function ownership of pins
Per recent updates to Documentation/gpio.txt, gpiolib drivers should
inform pinctrl when a GPIO is requested. pinctrl then marks that pin as
in-use for that GPIO function.

When an SoC muxes pins in a group, it's quite possible for the group to
contain e.g. 6 pins, but only 4 of them actually be needed by the HW
module that's mux'd to them. In this case, the other 2 pins could be
used as GPIOs. However, pinctrl marks all the pins within the group as
in-use by the selected mux function. To allow the expected gpiolib
interaction, separate the concepts of pin ownership into two parts: One
for the mux function and one for GPIO usage. Finally, allow those two
ownerships to exist in parallel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-12 22:43:09 +01:00
Linus Walleij a6c3b33f02 Merge branch 'pinctrl-tegra-for-next-diet' into for-next 2012-03-06 23:30:15 +01:00
Linus Walleij 872acc322c pinctrl: include machine header to core.h
struct pinctrl_setting contains an enum pinctrl_map_type
field, so we need to include machine.h. Also fix kerneldoc
to indicate that the pinctrl_setting is about both muxing
and other config.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-06 23:07:41 +01:00
Stephen Warren 971dac7123 pinctrl: add a driver for NVIDIA Tegra
This adds a driver for the Tegra pinmux, and required parameterization
data for Tegra20 and Tegra30.

The driver is initially added with driver name and device tree compatible
value that won't cause this driver to be used. A later change will switch
the pinctrl driver to use the correct values, switch the old pinmux
driver to be disabled, and update all code that uses the old pinmux APIs
to use the new pinctrl APIs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
[squashed "fix case of Tegra30's foo_groups[] arrays"]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-06 10:51:46 +01:00
Stephen Warren ba110d90c0 pinctrl: Show selected function and group in pinmux-pins debugfs
Until recently, the pinctrl pinmux-pins debugfs file displayed the
selected function for each owned pin. This feature was removed during
restructing in support of recent API rework. This change restoreds this
feature, and also displays the group that the function was selected on,
in case a pin is a member of multiple groups.

Based on work by: Linus Walleij <linus.walleij@linaro.org>

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:26:01 +01:00
Stephen Warren 1e2082b520 pinctrl: enhance mapping table to support pin config operations
The pinctrl mapping table can now contain entries to:
* Set the mux function of a pin group
* Apply a set of pin config options to a pin or a group

This allows pinctrl_select_state() to apply pin configs settings as well
as mux settings.

v3: Fix find_pinctrl() to iterate over the correct list.
   s/_MUX_CONFIGS_/_CONFIGS_/ in mapping table macros.
   Fix documentation to use correct mapping table macro.
v2: Added numerous extra PIN_MAP_*() special-case macros.
   Fixed kerneldoc typo. Delete pinctrl_get_pin_id() and
   replace it with pin_get_from_name(). Various minor fixes.
   Updates due to rebase.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:25:11 +01:00
Stephen Warren 6e5e959dde pinctrl: API changes to support multiple states per device
The API model is changed from:

p = pinctrl_get(dev, "state1");
pinctrl_enable(p);
...
pinctrl_disable(p);
pinctrl_put(p);
p = pinctrl_get(dev, "state2");
pinctrl_enable(p);
...
pinctrl_disable(p);
pinctrl_put(p);

to this:

p = pinctrl_get(dev);
s1 = pinctrl_lookup_state(p, "state1");
s2 = pinctrl_lookup_state(p, "state2");
pinctrl_select_state(p, s1);
...
pinctrl_select_state(p, s2);
...
pinctrl_put(p);

This allows devices to directly transition between states without
disabling the pin controller programming and put()/get()ing the
configuration data each time. This model will also better suit pinconf
programming, which doesn't have a concept of "disable".

The special-case hogging feature of pin controllers is re-written to use
the regular APIs instead of special-case code. Hence, the pinmux-hogs
debugfs file is removed; see the top-level pinctrl-handles files for
equivalent data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:22:59 +01:00
Stephen Warren 0e3db173e2 pinctrl: add usecount to pins for muxing
Multiple mapping table entries could reference the same pin, and hence
"own" it. This would be unusual now that pinctrl_get() represents a single
state for a client device, but in the future when it represents all known
states for a device, this is quite likely. Implement reference counting
for pin ownership to handle this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:21:46 +01:00
Stephen Warren 7ecdb16fe6 pinctrl: refactor struct pinctrl handling in core.c vs pinmux.c
This change separates two aspects of struct pinctrl:

a) The data representation of the parsed mapping table, into:

   1) The top-level struct pinctrl object, a single entity returned
      by pinctrl_get().

   2) The parsed version of each mapping table entry, struct
      pinctrl_setting, of which there is one per mapping table entry.

b) The code that handles this; the code for (1) above is in core.c, and
   the code to parse/execute each entry in (2) above is in pinmux.c, while
   the iteration over multiple settings is lifted to core.c.

This will allow the following future changes:

1) pinctrl_get() API rework, so that struct pinctrl represents all states
   for the device, and the device can select between them without calling
   put()/get() again.

2) To support that, a struct pinctrl_state object will be inserted into
   the data model between the struct pinctrl and struct pinctrl_setting.

3) The mapping table will be extended to allow specification of pin config
   settings too. To support this, struct pinctrl_setting will be enhanced
   to store either mux settings or config settings, and functions will be
   added to pinconf.c to parse/execute pin configuration settings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:20:50 +01:00
Stephen Warren 57b676f9c1 pinctrl: fix and simplify locking
There are many problems with the current pinctrl locking:

struct pinctrl_dev's gpio_ranges_lock isn't effective;
pinctrl_match_gpio_range() only holds this lock while searching for a gpio
range, but the found range is return and manipulated after releading the
lock. This could allow pinctrl_remove_gpio_range() for that range while it
is in use, and the caller may very well delete the range after removing it,
causing pinctrl code to touch the now-free range object.

Solving this requires the introduction of a higher-level lock, at least
a lock per pin controller, which both gpio range registration and
pinctrl_get()/put() will acquire.

There is missing locking on HW programming; pin controllers may pack the
configuration for different pins/groups/config options/... into one
register, and hence have to read-modify-write the register. This needs to
be protected, but currently isn't. Related, a future change will add a
"complete" op to the pin controller drivers, the idea being that each
state's programming will be programmed into the pinctrl driver followed
by the "complete" call, which may e.g. flush a register cache to HW. For
this to work, it must not be possible to interleave the pinctrl driver
calls for different devices.

As above, solving this requires the introduction of a higher-level lock,
at least a lock per pin controller, which will be held for the duration
of any pinctrl_enable()/disable() call.

However, each pinctrl mapping table entry may affect a different pin
controller if necessary. Hence, with a per-pin-controller lock, almost
any pinctrl API may need to acquire multiple locks, one per controller.
To avoid deadlock, these would need to be acquired in the same order in
all cases. This is extremely difficult to implement in the case of
pinctrl_get(), which doesn't know which pin controllers to lock until it
has parsed the entire mapping table, since it contains somewhat arbitrary
data.

The simplest solution here is to introduce a single lock that covers all
pin controllers at once. This will be acquired by all pinctrl APIs.

This then makes struct pinctrl's mutex irrelevant, since that single lock
will always be held whenever this mutex is currently held.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-05 11:19:49 +01:00
Linus Walleij 962bcbc57a pinctrl: fix the pin descriptor kerneldoc
The introduction of the owner field on the pin descriptor was not
properly documented so fix this up.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-02 16:52:46 +01:00
Stephen Warren 110e4ec5a1 pinctrl: assume map table entries can't have a NULL name field
pinctrl_register_mappings() already requires that every mapping table
entry have a non-NULL name field.

Logically, this makes sense too; drivers should always request a specific
named state so they know what they're getting. Relying on getting the
first mentioned state in the mapping table is error-prone, and a nasty
special case to implement, given that a given the mapping table may define
multiple states for a device.

Remove a small part of the documentation that talked about optionally
requesting a specific state; it's mandatory now.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-02 16:20:54 +01:00
Stephen Warren 46919ae63d pinctrl: introduce PINCTRL_STATE_DEFAULT, define hogs as that state
This provides a single centralized name for the default state.

Update PIN_MAP_* macros to use this state name, instead of requiring the
user to pass a state name in.

With this change, hog entries in the mapping table are defined as those
with state name PINCTRL_STATE_DEFAULT, i.e. all entries have the same
name. This interacts badly with the nested iteration over mapping table
entries in pinctrl_hog_maps() and pinctrl_hog_map() which would now
attempt to claim each hog mapping table entry multiple times. Replacing
the custom hog code with a simple pinctrl_get()/pinctrl_enable().

Update documentation and mapping tables to use this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-02 16:18:24 +01:00
Stephen Warren d4e3198736 pinctrl: enhance pinctrl_get() to handle multiple functions
At present, pinctrl_get() assumes that all matching mapping table entries
have the same "function" value, albeit potentially applied to different
pins/groups.

This change removes this restriction; pinctrl_get() can now handle a set
of mapping tables where different functions are applied to the various
pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-03-02 16:12:03 +01:00
Stephen Warren 3eedb43723 pinctrl: move pinctrl-maps debugfs file to top-level
The debugfs file pinctrl-maps is a system-wide file, not specific to any
pin controller, so place it in the top-level directory.

Also, move the code implementing the file to keep the order of all the
functions matching the order they're created in pinctrl_init_*debugfs().
The only non-obvious change here is no private data is passed to
debugfs_create_file() or single_open().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-29 19:10:56 +01:00
Linus Walleij 1cf94c45ca pinctrl: make the pinmux-pins more helpful
The debugfs file pinmux-pins used to tell which function was
enabled but now states simply which device owns the pin. Being
owned by the pinctrl driver itself means just that it's hogged
so be a bit more helpful by printing that.

ChangeLog v1->v2:
- Preserve the self-referential owner field, just clarify that
  when the pin controller states itself as owner this means
  that it's hogged.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-29 19:10:42 +01:00
Stephen Warren 2304b4737f pinctrl: remove pin and hogs locks from struct pinctrl_dev
struct pinctrl_dev's pin_desc_tree_lock and pinctrl_hogs_lock aren't
useful; the data they protect is read-only except when registering or
unregistering a pinctrl_dev, and at those times, it doesn't make sense to
protect one part of the structure independently from the rest.

Move pinctrl_init_device_debugfs() to the end of pinctrl_register() so
that debugfs can't access the struct pinctrl_dev until it's fully
initialized, i.e. after the hogs are set up.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-24 06:30:50 +01:00
Stephen Warren 02f5b98951 pinctrl: allocate sizeof(*p) instead of sizeof(struct foo)
This hopefully makes it harder to take the sizeof the wrong type.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-24 06:28:56 +01:00
Stephen Warren 95dcd4aea5 pinctrl: use dev_*() instead of pr_*(), add some msgs, minor cleanups
e.g. dev_err instead of pr_err prints messages in a slightly more
standardized format.

Also, add a few more error messages to track down errors.

Also, some small cleanups of messages.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-24 06:26:58 +01:00
Stephen Warren 1681f5ae4c pinctrl: disallow map table entries with NULL dev_name field
Hog entries are mapping table entries with .ctrl_dev_name == .dev_name.
All other mapping table entries need .dev_name set so that they will
match some pinctrl_get() call. All extant PIN_MAP*() macros set
.dev_name.

So, there is no reason to allow mapping table entries without .dev_name
set. Update the code and documentation to disallow this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-24 06:24:52 +01:00
Stephen Warren f7b9006f45 pinctrl: fix pinconf_groups_show() to emit newline
pinconf_groups_show() wrote all debug information on one line. Fix it to
match pinconf_pins_show() and be legible.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 18:42:00 +01:00
Stephen Warren 3cc70ed32c pinctrl: record a pin owner, not mux function, when requesting pins
When pins are requested/acquired/got, some device becomes the owner of
their mux setting. At this point, it isn't certain which mux function
will be selected for the pin, since this may vary between each of the
device's states in the pinctrl mapping table. As such, we should record
the owning device, not what we think the initial mux setting will be,
when requesting pins.

This doesn't make a lot of difference right now since pinctrl_get gets
only one single device/state combination, but this will make a difference
when pinctrl_get gets all states, and pinctrl_select_state can switch
between states.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:35 +01:00
Stephen Warren b1eed4ece7 pinctrl: error if mapping table's control dev can't be found
This is a serious error, and the pin control system will not function
correctly if it ends up not programing the mapping table entries into
the HW. Instead of just ignoring this, error out.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[rebased to fit the applied patch series, cast error to pointer]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:34 +01:00
Stephen Warren f026fe3d10 pinctrl: downgrade pinctrl_get warning when no maps are found
This may be perfectly legitimate. An IP block may get re-used
across SoCs. Not all of those SoCs may need pinmux settings for the
IP block, e.g. if one SoC dedicates pins to that function but
another doesn't. The driver won't know this, and will always
attempt to set up the pinmux. The mapping table defines whether any
HW programming is actually needed.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[rebased to fit the applied patch series]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:34 +01:00
Stephen Warren 9891d98c7a pinctrl: assume map table entries can't have a NULL ctrl_dev_name field
These are already disallowed. Clean up some code that doesn't assume this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:33 +01:00
Linus Walleij 128a06d4bb pinctrl: spawn U300 pinctrl from the COH901 GPIO
This solves the riddle on how the U300 pin controller shall be
able to reference the struct gpio_chip even though these are
two separate drivers: spawn the pinctrl child from the GPIO
driver and pass in the struct gpio_chip as platform data.
In the process we rename the U300 "pinmux-u300" to
"pinctrl-u300" so as not to confuse.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:33 +01:00
Stephen Warren 4ecce45dd6 pinctrl: core.c/h cleanups
* Make all functions internal to core.c static. Remove any of these from
  core.h.
* Add any missing EXPORT_SYMBOL_GPL().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:33 +01:00
Stephen Warren 2b69425017 pinctrl: Re-order pinconf.[ch] to match each-other
Modify the two files so that the order of function prototypes in the
header matches the order of implementations in the .c file.

Don't prototype a couple of internal functions.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:32 +01:00
Stephen Warren 03665e0f24 pinctrl: Re-order pinmux.[ch] to match each-other
Modify the two files so that the order of function prototypes in the
header matches the order of implementations in the .c file.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:32 +01:00
Stephen Warren b2b3e66e40 pinctrl: Store mapping table as a list of chunks
Instead of storing a single array of mapping table entries, which
requires realloc()ing that array each time it's extended and copying
the new data, simply store a list of pointers to the individual chunks.
This also removes the need to copy the mapping table at all; a pointer
is maintained to the original table, this saving memory.

A macro for_each_maps() is introduced to hide the additional complexity
of iterating over the map entries.

This change will also simplify removing chunks of entries from the mapping
table. This isn't important right now, but will be in the future, when
mapping table entries are dynamically added when parsing them from the
device tree, and removed when drivers no longer need to interact with
pinctrl.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:31 +01:00
Stephen Warren 8b9c139f16 pinctrl: use list_add_tail instead of list_add
This mostly makes debugfs files print things in the order that they
were added or acquired, which just feels a little more consistent.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:31 +01:00
Stephen Warren 13398a4b90 pinctrl: pinctrl_register_mappings() shouldn't be __init
It may be common for pinctrl_register_mappings() to be used from __init
context, but there's no reason that additional mappings shouldn't be
added at a later point, e.g. if loading modules that add pin controllers
and their mapping tables.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:30 +01:00
Stephen Warren 449d16b025 pinctrl: make "hog" mapping table entries work
Commit 77a5988 "pinctrl: changes hog mechanism to be self-referential"
modified the way "hog" entries were represented in the mapping table.
However, the new representation failed some error checks in
pinctrl_hog_map(). Remove the now-bogus error-check, and fix the code
to solve the issue the error-check used to avoid.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-22 17:59:30 +01:00
Linus Walleij 77a5988355 pinctrl: changes hog mechanism to be self-referential
Instead of a specific boolean field to indicate if a map entry shall
be hogged, treat self-reference as an indication of desired hogging.
This drops one field off the map struct and has a nice Douglas R.
Hofstadter-feel to it.

Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-10 21:33:10 +01:00
Linus Walleij befe5bdfbb pinctrl: factor pin control handles over to the core
This moves the per-devices struct pinctrl handles and device map
over from the pinmux part of the subsystem to the core pinctrl part.
This makes the device handles core infrastructure with the goal of
using these handles also for pin configuration, so that device
drivers (or boards etc) will need one and only one handle to the
pin control core.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-10 21:33:06 +01:00
Linus Walleij e93bcee00c pinctrl: move generic functions to the pinctrl_ namespace
Since we want to use the former pinmux handles and mapping tables for
generic control involving both muxing and configuration we begin
refactoring by renaming them from pinmux_* to pinctrl_*.

ChangeLog v1->v2:
- Also rename the PINMUX_* macros in machine.h to PIN_ as indicated
  in the documentation so as to reflect the generic nature of these
  mapping entries from now on.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-10 21:33:02 +01:00
Linus Walleij 28a8d14cc7 pinctrl: break out a pinctrl consumer header
This breaks out a <linux/pinctrl/consumer.h> header to be used by
all pinmux and pinconfig alike, so drivers needing services from
pinctrl does not need to include different headers. This is similar
to the approach taken by the regulator API.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-10 21:32:57 +01:00
Haojian Zhuang f4e6698329 pinctrl: enable pinmux for mmp series
Support PXA168/PXA910/MMP2 pinmux. Now only support function switch.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
[Rebase and fix some whitespace issues]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-01 19:42:35 +01:00
Linus Walleij 9dfac4fd7f pinctrl: delete raw device pointers in pinmux maps
After discussion with Mark Brown in an unrelated thread about
ADC lookups, it came to my knowledge that the ability to pass
a struct device * in the regulator consumers is just a
historical artifact, and not really recommended. Since there
are no in-kernel users of these pointers, we just kill them
right now, before someone starts to use them.

Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-01 19:42:35 +01:00
Linus Walleij 8dc6ae4d44 pinctrl: restore pin naming
Commit ca53c5f1ca
("pinctrl: conjure names for unnamed pins") made pins lose
their identity and only get autogenerated names.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-02-01 19:35:21 +01:00
Tony Lindgren b9130b776e pinctrl: add checks for empty function names
This is needed as otherwise we can get the following when
dealing with buggy data in a pinmux driver for
pinmux_search_function:

Unable to handle kernel NULL pointer dereference at virtual
address 00000000
...
PC is at strcmp+0xc/0x34
LR is at pinmux_get+0x350/0x8f4
...

As we need pctldev initialized to call ops->list_functions,
let's initialize it before check_ops calls and pass the
pctldev to the check_ops functions. Do this for both pinmux
and pinconf check_ops functions.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-26 14:13:11 +01:00
Tony Lindgren 9e2551e10b pinctrl: fix pinmux_hog_maps when ctrl_dev_name is not set
The ctrl_dev_name is optional for struct pinmux_map assuming
that ctrl_dev is set. Without this patch we can get:

Unable to handle kernel NULL pointer dereference at virtual
address 00000000
...
(pinmux_hog_maps+0xa4/0x20c)
(pinctrl_register+0x2a4/0x378)
...

Fix this by adding adding a test for map->ctrl_dev.
Additionally move the test for map->ctrl_dev earlier
to optimize out the loop a bit.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-26 14:13:05 +01:00
Tony Lindgren de849eecd0 pinctrl: fix some pinmux typos
Fix some pinmux typos so implementing pinmux drivers
is a bit easier.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-26 14:11:31 +01:00
Tony Lindgren 0215716083 pinctrl: free debugfs entries when unloading a pinmux driver
We were not cleaning up properly after unloading a pinmux
driver compiled as module.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-24 23:03:02 +01:00
Uwe Kleine-König f9d41d7cb5 pinctrl: unbreak error messages
It's better to not line break error messages to allow easier grepping
for them even when the line gets >80 chars. Additionally some minor
reformating is done.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-24 22:47:46 +01:00
Stephen Warren 546edd83ab pinctrl: fix pinconf_pins_show iteration
Commit 706e852 "pinctrl: correct a offset while enumerating pins"
modified the variable used by pinconf_pin_show()'s for loop, but didn't
update the for loop test expression.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-20 17:55:49 +01:00
Chanho Park 0d2006bbf0 pinctrl: remove unnecessary max pin number
This patch removes maxpin member in the pin control descriptor
because we don't need this value as we enumerate a pin space
using offset.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:09 +01:00
Chanho Park 706e8520e8 pinctrl: correct a offset while enumerating pins
This patch modifies a offset while enumerating pins to support a
partial pin space. If we use a pin number for enumerating pins,
the pin space always starts with zero base. Indeed, we always check
the pin is in the pin space. An extreme example, there is only two pins.
One is 0. Another is 1000. We always enumerate whole offsets until 1000.
For solving this problem, we use the offset of the pin array instead
of the zero-based pin number.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[Restored sparse pin space comment]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:09 +01:00
Dong Aisheng e6337c3c96 pinctrl: some typo fixes
Minor copyedits.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:08 +01:00
Linus Walleij 3bece55aa5 pinctrl: rename U300 and SIRF pin controllers
For stringent order, rename the pinmux-* pin controllers to
pinctrl-* and also rename the Kconfig symbols and in-kernel
users.

Cc: Rongjun Ying <Rongjun.Ying@csr.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:08 +01:00
Stephen Warren 43699dea1e pinctrl: pass name instead of device to pin_config_*
Obtaining a "struct pinctrl_dev *" is difficult for code not directly
related to the pinctrl subsystem. However, the device name of the pinctrl
device is fairly well known. So, modify pin_config_*() to take the device
name instead of the "struct pinctrl_dev *".

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[rebased on top of refactoring code]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:07 +01:00
Linus Walleij ca53c5f1ca pinctrl: conjure names for unnamed pins
If pins with blank names are registered, we assign them names on-the-fly
on the form "PINn" where n is the pin number for that pin on the specific
controller.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:06 +01:00
Stephen Warren 51cd24ee62 pinctrl: don't create a device for each pin controller
Pin controllers should already be instantiated as a device, so there's
no need for the pinctrl core to create a new struct device for each
controller.

This allows the controller's real name to be used in the mux mapping
table, rather than e.g. "pinctrl.0", "pinctrl.1", etc.

This necessitates removal of the PINMUX_MAP_PRIMARY*() macros, since
their sole purpose was to hard-code the .ctrl_dev_name field to be
"pinctrl.0".

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:06 +01:00
Linus Walleij ae6b4d8588 pinctrl: add a pin config interface
This add per-pin and per-group pin config interfaces for biasing,
driving and other such electronic properties. The details of passed
configurations are passed in an opaque unsigned long which may be
dereferences to integer types, structs or lists on either side
of the configuration interface.

ChangeLog v1->v2:
- Clear split of terminology: we now have pin controllers, and
  those may support two interfaces using vtables: pin
  multiplexing and pin configuration.
- Break out pin configuration to its own C file, controllers may
  implement only config without mux, and vice versa, so keep each
  sub-functionality of pin controllers separate. Introduce
  CONFIG_PINCONF in Kconfig.
- Implement some core logic around pin configuration in the
  pinconf.c file.
- Remove UNKNOWN config states, these were just surplus baggage.
- Remove FLOAT config state - HIGH_IMPEDANCE should be enough for
  everyone.
- PIN_CONFIG_POWER_SOURCE added to handle switching the power
  supply for the pin logic between different sources
- Explicit DISABLE config enums to turn schmitt-trigger,
  wakeup etc OFF.
- Update documentation to reflect all the recent reasoning.
ChangeLog v2->v3:
- Twist API around to pass around arrays of config tuples instead
  of (param, value) pairs everywhere.
- Explicit drive strength semantics for push/pull and similar
  drive modes, this shall be the number of drive stages vs
  nominal load impedance, which should match the actual
  electronics used in push/pull CMOS or TTY totempoles.
- Drop load capacitance configuration - I probably don't know
  what I'm doing here so leave it out.
- Drop PIN_CONFIG_INPUT_SCHMITT_OFF, instead the argument zero to
  PIN_CONFIG_INPUT_SCHMITT turns schmitt trigger off.
- Drop PIN_CONFIG_NORMAL_POWER_MODE and have a well defined
  argument to PIN_CONFIG_LOW_POWER_MODE to get out of it instead.
- Drop PIN_CONFIG_WAKEUP_ENABLE/DISABLE and just use
  PIN_CONFIG_WAKEUP with defined value zero to turn wakeup off.
- Add PIN_CONFIG_INPUT_DEBOUNCE for configuring debounce time
  on input lines.
- Fix a bug when we tried to configure pins for pin controllers
  without pinconf support.
- Initialized debugfs properly so it works.
- Initialize the mutex properly and lock around config tampering
  sections.
- Check the return value from get_initial_config() properly.
ChangeLog v3->v4:
- Export the pin_config_get(), pin_config_set() and
  pin_config_group() functions.
- Drop the entire concept of just getting initial config and
  keeping track of pin states internally, instead ask the pins
  what state they are in. Previous idea was plain wrong, if the
  device cannot keep track of its state, the driver should do
  it.
- Drop the generic configuration layout, it seems this impose
  too much restriction on some pin controllers, so let them do
  things the way they want and split off support for generic
  config as an optional add-on.
ChangeLog v4->v5:
- Introduce two symmetric driver calls for group configuration,
  .pin_config_group_[get|set] and corresponding external calls.
- Remove generic semantic meanings of return values from config
  calls, these belong in the generic config patch. Just pass the
  return value through instead.
- Add a debugfs entry "pinconf-groups" to read status from group
  configuration only, also slam in a per-group debug callback in
  the pinconf_ops so custom drivers can display something
  meaningful for their pins.
- Fix some dangling newline.
- Drop dangling #else clause.
- Update documentation to match the above.
ChangeLog v5->v6:
- Change to using a pin name as parameter for the
  [get|set]_config() functions, as suggested by Stephen Warren.
  This is more natural as names will be what a developer has
  access to in written documentation etc.
ChangeLog v6->v7:
- Refactor out by-pin and by-name get/set functions, only expose
  the by-name functions externally, expose the by-pin functions
  internally.
- Show supported pin control functionality in the debugfs
  pinctrl-devices file.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:04 +01:00
Linus Walleij b4e3ac74d5 pinctrl/coh901: driver to request its pins
This makes the COH 901 driver request muxing of its GPIO pins
from the pinmux-u300 driver using the standard API calls.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:04 +01:00
Linus Walleij f812f0f53e pinctrl: u300-pinmux: register proper GPIO ranges
This register the actual GPIO ranges used by the COH901XXX GPIO
driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:04 +01:00
Linus Walleij ca402d37dc pinctrl: move the U300 GPIO driver to pinctrl
This driver will be converted to a dual GPIO + pinctrl driver
since it supports biasing and driving control options. Hopefully
it can serve as an example.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:03 +01:00
Linus Walleij 59b099b049 pinctrl: make it possible to add multiple maps
Since we now anyway make a copy of the platform-supplied pinmux
map, we can just as well make it possible to call the function
adding maps several times, so as to simplify cases (as PXA) where
several sets of disparate mappings need to be added depending on
target platform.

Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:02 +01:00
Linus Walleij 97607d157c pinctrl: make a copy of pinmux map
This makes a deep copy of the pinmux function map instead of
keeping the copy supplied from the platform around. This makes
it possible to tag the platforms map with __initdata as is also
done as part of this patch.

Rationale: a certain target platform (PXA) has numerous
pinmux maps, many of which will be lying around unused after
boot in a multi-platform binary. Instead, deep-copy the one
we're going to use and tag them all __initdata so they go away
after boot.

ChangeLog v1->v2:
- Fixup the deep copy, missed a few items on the struct,
  plus mark bool member non-const since we're making runtime
  copies if this stuff now.
ChangeLog v2->v3:
- Make a shallow copy (just copy the array of map structs)
  as Arnd noticed, string constants never get discarded by the
  kernel anyway, so these pointers may be safely copied over.

Reviewed-by: Arnd Bergmann <arnd.bergmann@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:02 +01:00
Linus Walleij 542e704f3f pinctrl: GPIO direction support for muxing
When requesting a single GPIO pin to be muxed in, some controllers
will need to poke a different value into the control register
depending on whether the pin will be used for GPIO output or GPIO
input. So create pinmux counterparts to gpio_direction_[input|output]
in the pinctrl framework.

ChangeLog v1->v2:
- This also amends the documentation to make it clear the this
  function and associated machinery is *ONLY* intended as a backend
  to gpiolib machinery, not for everyone and his dog to start playing
  around with pins.
ChangeLog v2->v3:
- Don't pass an argument to the common request function, instead
  provide pinmux_* counterparts to the gpio_direction_[input|output]
  calls, simpler and anyone can understand it.
ChangeLog v3->v4:
- Fix numerous spelling mistakes and dangling text in documentation.
  Add Ack and Rewewed-by.

Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:01 +01:00
Linus Walleij 75d6642a3e pinctrl: print pin range in GPIO range debugs
Show the mapped pin range corresponding to the GPIO range in
debugfs for pin controllers.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:01 +01:00
Chanho Park 3c739ad0df pinctrl: add a pin_base for sparse gpio-ranges
This patch enables mapping a base offset of gpio ranges with
a pin offset even if does'nt matched. A base of pinctrl_gpio_range
means a base offset of gpio. However, we cannot convert gpio to pin
number for sparse gpio ranges just only using a gpio base offset.
We can convert a gpio to real pin number(even if not matched) using
a new pin_base which means a base pin offset of requested gpio range.
Now, the pin control subsystem passes the pin base offset to the
pinmux driver.

For example, let's assume below two gpio ranges in the system.

static struct pinctrl_gpio_range gpio_range_a = {
    .name = "chip a",
    .id = 0,
    .base = 32,
    .pin_base = 32,
    .npins = 16,
    .gc = &chip_a;
};

static struct pinctrl_gpio_range gpio_range_b = {
    .name = "chip b",
    .id = 0,
    .base = 48,
    .pin_base = 64,
    .npins = 8,
    .gc = &chip_b;
};

We can calucalate a exact pin ranges even if doesn't matched with gpio ranges.

chip a:
    gpio-range : [32 .. 47]
    pin-range  : [32 .. 47]
chip b:
    gpio-range : [48 .. 55]
    pin-range  : [64 .. 71]

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:01 +01:00
Marek Belisko 33d58949ad pinctrl: unify pin type from signed to unsigned
We want singned pins to mean "invalid" only on the outside
of the subsystem.

Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:00 +01:00
Linus Walleij 336cdba09a pinctrl: documentation update
Update the docs removing an obsolete __refdata tag and document
the mysterious return value of pin_free(). And fixes up some various
confusions in the pinctrl documentation.

Reported-by: Rajendra Nayak <rnayak@ti.com>
Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Reported-by: Thomas Abraham <thomas.abraham@linaro.org>
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:10:00 +01:00
Stephen Warren 3712a3c488 pinctrl: add explicit gpio_disable_free pinmux_op
Some pinctrl drivers (Tegra at least) program a pin to be a GPIO in a
completely different manner than they select which function to mux out of
that pin. In order to support a single "free" pinmux_op, the driver would
need to maintain a per-pin state of requested-for-gpio vs. requested-for-
function. However, that's a lot of work when the core already has explicit
separate paths for gpio request/free and function request/free.

So, add a gpio_disable_free op to struct pinmux_ops, and make pin_free()
call it when appropriate.

When doing this, I noticed that when calling pin_request():

    !!gpio == (gpio_range != NULL)

... and so I collapsed those two parameters in both pin_request(), and
when adding writing the new code in pin_free().

Also, for pin_free():

    !!free_func == (gpio_range != NULL)

However, I didn't want pin_free() to know about the GPIO function naming
special case, so instead, I reworked pin_free() to always return the pin's
previously requested function, and now pinmux_free_gpio() calls
kfree(function). This is much more balanced with the allocation having
been performed in pinmux_request_gpio().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:09:59 +01:00
Marek Belisko d2f6a1c6fb pinctrl: remove double pin validity check.
Function pin_is_valid just call pin_desc_get which is in pin_request
call some line below. Remove pin_is_valid() check.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:09:59 +01:00
Linus Walleij 7afde8baa8 pinctrl: move group lookup to core
Now also the core needs to look up pin groups so move the lookup
function there and expose it in the internal header.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:09:58 +01:00
Rajendra Nayak b84e673f51 pinctrl: iterate over u300_pmx_mask's in u300_pmx_endisable
Fix u300_pmx_endisable() to iterate over the list of 'bits' and
'mask' populated as part of u300_pmx_functions.mask[]

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-01-03 09:09:58 +01:00
Uwe Kleine-König cc96ffbb74 pinctrl: remove two unused global variables
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-12-08 16:18:30 +01:00
Uwe Kleine-König 3838d32759 pinctrl: make the "Debug PINCTRL calls" entry actually do something
DEBUG_PINCTRL wasn't used at all and DEBUG_PINMUX doesn't exist.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-12-08 16:17:47 +01:00
Barry Song f59d28dc00 pinctrl/sirf: fix pin number typo for SPI1
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-12-02 11:19:15 +01:00
Linus Walleij 45f034ef20 pinctrl: hide subsystem from the populace
Machines that have embedded pin controllers need to select them
explicitly, so why broadcast their config options to menuconfig.
We provide a helpful submenu for those machines that do select
it, making it possible to enable debugging for example.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-11-10 09:02:12 +01:00
Stephen Rothwell a5a697cdef pinctrl: EXPORT_SYMBOL needs export.h
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2011-10-31 19:32:21 -04:00
Jean-Christophe PLAGNIOL-VILLARD ad7761ab3a pinctrl/sirf: fix sirfsoc_get_group_pins prototype
fix sirfsoc_get_group_pins prototype introduced in 7e570f97, we
missed to de-constify a pointer.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-25 10:43:57 +02:00
Stephen Warren 5d2eaf8090 pinctrl: Don't copy function name when requesting a pin
Instead, store a pointer to the currently assigned function.

This allows us to delete the mux_requested variable from pin_desc; a pin
is requested if its currently assigned function is non-NULL.

When a pin is requested as a GPIO rather than a regular function, the
assigned function name is dynamically constructed. In this case, we have
to kstrdup() the dynamically constructed name, so that mux_function doesn't
pointed at stack data. This requires pin_free to be told whether to free
the mux_function pointer or not.

This removes the hard-coded maximum function name length.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-20 11:50:07 +02:00
Stephen Warren 9af1e44fb4 pinctrl: Don't copy pin names when registering them
A pin controller's names array is no longer marked __refdata. Hence, we
can avoid copying a pin's name into the descriptor when registering it.
Instead, just point at the string supplied in the pin array.

This both simplifies and speeds up pin controller initialization, but
also removes the hard-coded maximum pin name length.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-20 11:50:06 +02:00
Stephen Warren 25aec320d9 pinctrl: Remove unsafe __refdata
A pin controller's pin definitions are used both during pinctrl_register()
and pinctrl_unregister(). The latter happens outside of __init/__devinit
time, and hence it is unsafe to mark the pin array as __refdata.

Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-20 11:49:53 +02:00
Stephen Warren a5818a8bd0 pinctrl: get_group_pins() const fixes
get_group_pins() "returns" a pointer to an array of const objects, through
a pointer parameter. Fix the prototype so what's pointed at by the returned
pointer is const, rather than the function parameter being const.

This also allows the removal of a cast in each of the two current pinmux
drivers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-20 11:41:49 +02:00
Rongjun Ying 393daa814f pinctrl: add a driver for the CSR SiRFprimaII pinmux
This creates a pin controller driver for the SiRFprinaII
pin mux portions.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
[Fixup for changed function names and semantics in the v10 patch]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2011-10-13 12:57:46 +02:00
Linus Walleij 98da352953 pinctrl: add a driver for the U300 pinmux
This adds a driver for the U300 pinmux portions of the system
controller "SYSCON". It also serves as an example of how to use
the pinmux subsystem. This driver also houses the platform data
for the only supported platform.

This deletes the old U300 driver in arch/arm/mach-u300 and
replace it with a driver using the new subsystem.

The new driver is considerably fatter than the old one, but it
also registers all 467 pins of the system and adds the power
and EMIF pin groups and corresponding functions. The idea
is to use this driver as a a reference for other
implementation so it needs to be as complete and verbose
as possible.

Reviewed-by: Barry Song <21cnbao@gmail.com>
[Fixup for changed function names and semantics in the v10 patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-13 12:57:45 +02:00
Linus Walleij 2744e8afb3 drivers: create a pin control subsystem
This creates a subsystem for handling of pin control devices.
These are devices that control different aspects of package
pins.

Currently it handles pinmuxing, i.e. assigning electronic
functions to groups of pins on primarily PGA and BGA type of
chip packages which are common in embedded systems.

The plan is to also handle other I/O pin control aspects
such as biasing, driving, input properties such as
schmitt-triggering, load capacitance etc within this
subsystem, to remove a lot of ARM arch code as well as
feature-creepy GPIO drivers which are implementing the same
thing over and over again.

This is being done to depopulate the arch/arm/* directory
of such custom drivers and try to abstract the infrastructure
they all need. See the Documentation/pinctrl.txt file that is
part of this patch for more details.

ChangeLog v1->v2:

- Various minor fixes from Joe's and Stephens review comments
- Added a pinmux_config() that can invoke custom configuration
  with arbitrary data passed in or out to/from the pinmux driver

ChangeLog v2->v3:

- Renamed subsystem folder to "pinctrl" since we will likely
  want to keep other pin control such as biasing in this
  subsystem too, so let us keep to something generic even though
  we're mainly doing pinmux now.
- As a consequence, register pins as an abstract entity separate
  from the pinmux. The muxing functions will claim pins out of the
  pin pool and make sure they do not collide. Pins can now be
  named by the pinctrl core.
- Converted the pin lookup from a static array into a radix tree,
  I agreed with Grant Likely to try to avoid any static allocation
  (which is crap for device tree stuff) so I just rewrote this
  to be dynamic, just like irq number descriptors. The
  platform-wide definition of number of pins goes away - this is
  now just the sum total of the pins registered to the subsystem.
- Make sure mappings with only a function name and no device
  works properly.

ChangeLog v3->v4:

- Define a number space per controller instead of globally,
  Stephen and Grant requested the same thing so now maps need to
  define target controller, and the radix tree of pin descriptors
  is a property on each pin controller device.
- Add a compulsory pinctrl device entry to the pinctrl mapping
  table. This must match the pinctrl device, like "pinctrl.0"
- Split the file core.c in two: core.c and pinmux.c where the
  latter carry all pinmux stuff, the core is for generic pin
  control, and use local headers to access functionality between
  files. It is now possible to implement a "blank" pin controller
  without pinmux capabilities. This split will make new additions
  like pindrive.c, pinbias.c etc possible for combined drivers
  and chunks of functionality which is a GoodThing(TM).
- Rewrite the interaction with the GPIO subsystem - the pin
  controller descriptor now handles this by defining an offset
  into the GPIO numberspace for its handled pin range. This is
  used to look up the apropriate pin controller for a GPIO pin.
  Then that specific GPIO range is matched 1-1 for the target
  controller instance.
- Fixed a number of review comments from Joe Perches.
- Broke out a header file pinctrl.h for the core pin handling
  stuff that will be reused by other stuff than pinmux.
- Fixed some erroneous EXPORT() stuff.
- Remove mispatched U300 Kconfig and Makefile entries
- Fixed a number of review comments from Stephen Warren, not all
  of them - still WIP. But I think the new mapping that will
  specify which function goes to which pin mux controller address
  50% of your concerns (else beat me up).

ChangeLog v4->v5:

- Defined a "position" for each function, so the pin controller now
  tracks a function in a certain position, and the pinmux maps define
  what position you want the function in. (Feedback from Stephen
  Warren and Sascha Hauer).
- Since we now need to request a combined function+position from
  the machine mapping table that connect mux settings to drivers,
  it was extended with a position field and a name field. The
  name field is now used if you e.g. need to switch between two
  mux map settings at runtime.
- Switched from a class device to using struct bus_type for this
  subsystem. Verified sysfs functionality: seems to work fine.
  (Feedback from Arnd Bergmann and Greg Kroah-Hartman)
- Define a per pincontroller list of GPIO ranges from the GPIO
  pin space that can be handled by the pin controller. These can
  be added one by one at runtime. (Feedback from Barry Song)
- Expanded documentation of regulator_[get|enable|disable|put]
  semantics.
- Fixed a number of review comments from Barry Song. (Thanks!)

ChangeLog v5->v6:

- Create an abstract pin group concept that can sort pins into
  named and enumerated groups no matter what the use of these
  groups may be, one possible usecase is a group of pins being
  muxed in or so. The intention is however to also use these
  groups for other pin control activities.
- Make it compulsory for pinmux functions to associate with
  at least one group, so the abstract pin group concept is used
  to define the groups of pins affected by a pinmux function.
  The pinmux driver interface has been altered so as to enforce
  a function to list applicable groups per function.
- Provide an optional .group entry in the pinmux machine map
  so the map can select beteween different available groups
  to be used with a certain function.
- Consequent changes all over the place so that e.g. debugfs
  present reasonable information about the world.
- Drop the per-pin mux (*config) function in the pinmux_ops
  struct - I was afraid that this would start to be used for
  things totally unrelated to muxing, we can introduce that to
  the generic struct pinctrl_ops if needed. I want to keep
  muxing orthogonal to other pin control subjects and not mix
  these things up.

ChangeLog v6->v7:

- Make it possible to have several map entries matching the
  same device, pin controller and function, but using
  a different group, and alter the semantics so that
  pinmux_get() will pick all matching map entries, and
  store the associated groups in a list. The list will
  then be iterated over at pinmux_enable()/pinmux_disable()
  and corresponding driver functions called for each
  defined group. Notice that you're only allowed to map
  multiple *groups* to the same
  { device, pin controller, function } triplet, attempts
  to map the same device to multiple pin controllers will
  for example fail. This is hopefully the crucial feature
  requested by Stephen Warren.
- Add a pinmux hogging field to the pinmux mapping entries,
  and enable the pinmux core to hog pinmux map entries.
  This currently only works for pinmuxes without assigned
  devices as it looks now, but with device trees we can
  look up the corresponding struct device * entries when
  we register the pinmux driver, and have it hog each
  pinmux map in turn, for a simple approach to
  non-dynamic pin muxing. This addresses an issue from
  Grant Likely that the machine should take care of as
  much of the pinmux setup as possible, not the devices.
  By supplying a list of hogs, it can now instruct the
  core to take care of any static mappings.
- Switch pinmux group retrieveal function to grab an
  array of strings representing the groups rather than an
  array of unsigned and rewrite accordingly.
- Alter debugfs to show the grouplist handled by each
  pinmux. Also add a list of hogs.
- Dynamically allocate a struct pinmux at pinmux_get() and
  free it at pinmux_put(), then add these to the global
  list of pinmuxes active as we go along.
- Go over the list of pinmux maps at pinmux_get() time
  and repeatedly apply matches.
- Retrieve applicable groups per function from the driver
  as a string array rather than a unsigned array, then
  lookup the enumerators.
- Make the device to pinmux map a singleton - only allow the
  mapping table to be registered once and even tag the
  registration function with __init so it surely won't be
  abused.
- Create a separate debugfs file to view the pinmux map at
  runtime.
- Introduce a spin lock to the pin descriptor struct, lock it
  when modifying pin status entries. Reported by Stijn Devriendt.
- Fix up the documentation after review from Stephen Warren.
- Let the GPIO ranges give names as const char * instead of some
  fixed-length string.
- add a function to unregister GPIO ranges to mirror the
  registration function.
- Privatized the struct pinctrl_device and removed it from the
  <linux/pinctrl/pinctrl.h> API, the drivers do not need to know
  the members of this struct. It is now in the local header
  "core.h".
- Rename the concept of "anonymous" mux maps to "system" muxes
  and add convenience macros and documentation.

ChangeLog v7->v8:

- Delete the leftover pinmux_config() function from the
 <linux/pinctrl/pinmux.h> header.
- Fix a race condition found by Stijn Devriendt in pin_request()

ChangeLog v8->v9:

- Drop the bus_type and the sysfs attributes and all, we're not on
  the clear about how this should be used for e.g. userspace
  interfaces so let us save this for the future.
- Use the right name in MAINTAINERS, PIN CONTROL rather than
  PINMUX
- Don't kfree() the device state holder, let the .remove() callback
  handle this.
- Fix up numerous kerneldoc headers to have one line for the function
  description and more verbose documentation below the parameters

ChangeLog v9->v10:
- pinctrl: EXPORT_SYMBOL needs export.h, folded in a patch
  from Steven Rothwell
- fix pinctrl_register error handling, folded in a patch from
  Axel Lin
- Various fixes to documentation text so that it's consistent.
- Removed pointless comment from drivers/Kconfig
- Removed dependency on SYSFS since we removed the bus in
  v9.
- Renamed hopelessly abbreviated pctldev_* functions to the
  more verbose pinctrl_dev_*
- Drop mutex properly when looking up GPIO ranges
- Return NULL instead of ERR_PTR() errors on registration of
  pin controllers, using cast pointers is fragile. We can
  live without the detailed error codes for sure.

Cc: Stijn Devriendt <highguy@gmail.com>
Cc: Joe Perches <joe@perches.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Barry Song <21cnbao@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-10-13 12:49:17 +02:00