This extra buffer will be used so we can copy
triggered events from our event buffer to this cache
and process all of them later in bottom half
handler.
We need this in order to implement a workaround for
a known erratum in recent DWC3 release.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
dwc3_soft_reset() is doing the same thing as
dwc3_core_soft_reset(). Let's remove
dwc3_soft_reset() since that's not needed anymore.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a function to check properties and call it from probe. This will
allow us to add check code without bloating the probe function. This
needs to be done after dwc3_get_properties() and dwc3_core_init() so
that all the properties and hardware configs are available.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Finally get rid of dwc3_trace() hack. If any other
message is truly needed, we should add proper
tracepoints for them instead of hacking around with
dwc3_trace() or similar.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This helper will be responsible for reading and
parsing our properties. No functional changes in
this patch, cleanup only.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This little helper will be used to setup anything
related to GCTL register. There are no functional
changes, this is a cleanup only patch.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This little helper will be used to make sure we're
dealing with a valid Synopsys DWC3 or DWC3.1 core.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
For the usb31 IP and from version 2.90a of the usb3 IP, the core
supports HW exit from L1 in HS. Enable it, otherwise the controller may
never exit from LPM to do a transfer.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Member @mem in struct dwc3 is not used in any places. Clean up it.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This time around we have 92 non-merge commits. Most
of the changes are in drivers/usb/gadget (40.3%)
with drivers/usb/gadget/function being the most
active directory (27.2%).
As for UDC drivers, only dwc3 (26.5%) and dwc2
(12.7%) have really been active.
The most important changes for dwc3 are better
support for scatterlist and, again, throughput
improvements. While on dwc2 got some minor stability
fixes related to soft reset and FIFO usage.
Felipe Tonello has done some good work fixing up our
f_midi gadget and Tal Shorer has implemented a nice
API change for our ULPI bus.
Apart from these, we have our usual set of
non-critical fixes, spelling fixes, build warning
fixes, etc.
-----BEGIN PGP SIGNATURE-----
iQI6BAABCAAkBQJX2TpXHRxmZWxpcGUuYmFsYmlAbGludXguaW50ZWwuY29tAAoJ
EMy+uJnhGpkGxX0QAIOavB96wkAP4msMzCMIKyKX8NBVWEYzLy7Ou6IrPKiGOR28
CjDi1C5qW7838H4neA6Gfw896rfTiAODhoiOY/RTXI7p2hTUUXHQuJ81Bad75gHD
744BUMPy37YJnvgHTasYn0GxAvP73YmV+omRxo76poetYZ9eH8dGECvC9q6m+jRU
XaubWEq1JMvzHvlyO7BIrndGY4ByRbBoG0XPiZF07e5YDkKWQmv56tgAAN7fEkeh
8HIg8lG2xvgf+w6cDbrQ2c8fp055OvrOq40R2pSXwQgYYKXPJ+vFiNzriQ6Rfxai
gIYrB+mrKZcY6mi6OhoulGfNxT65VqMqnUfwVbbwlJQbDe5EkV6o/1WYdaBvdO2s
qTT9A5alabFzbQ8ZtjzsIHtV62LwmZlMWk7gxZlcvLFNjf/P2CMqqnJi30/JlrsE
iqhwIGRDhMq4QZZbiiEiJEaEn6vh2zseRdmCy3uMFearXKBP/I2177QOTDG7ZMKf
fZR4ROlv6c5tIpBCOsTV0+7c/fnnnOTHU4+vJiUzU0krkPzaLcL8iMT1tn+uGchX
4d2XLuT6AbVxQR4N8YF4FwRzB/PbEb+ZWWGu1mOVSd9/dsA43K50zNdc061dgz8K
q8lau6bmtfUXdbeWa3WMEaAZIuSBmFarJY0tPZV6W7cXUAgKitThRD6fp4E0
=vTFa
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.9 merge window
This time around we have 92 non-merge commits. Most
of the changes are in drivers/usb/gadget (40.3%)
with drivers/usb/gadget/function being the most
active directory (27.2%).
As for UDC drivers, only dwc3 (26.5%) and dwc2
(12.7%) have really been active.
The most important changes for dwc3 are better
support for scatterlist and, again, throughput
improvements. While on dwc2 got some minor stability
fixes related to soft reset and FIFO usage.
Felipe Tonello has done some good work fixing up our
f_midi gadget and Tal Shorer has implemented a nice
API change for our ULPI bus.
Apart from these, we have our usual set of
non-critical fixes, spelling fixes, build warning
fixes, etc.
This patch follows the similar fix in dwc2. See
commit 5268ed9d2e ("usb: dwc2: Fix dr_mode validation")
Currently, the dr_mode is only checked against the module configuration.
It also needs to be checked against the hardware capablities.
The driver now checks if both the module configuration and hardware are
capable of the dr_mode value. If not, then it will issue a warning and
fall back to a supported value. If it is unable to fall back to a
suitable value, then the probe will fail.
Behavior summary:
module : actual
HW config dr_mode : dr_mode
---------------------------------
host host any : host
host dev any : INVALID
host otg any : host
dev host any : INVALID
dev dev any : dev
dev otg any : dev
otg host any : host
otg dev any : dev
otg otg any : dr_mode
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
ENDXFER polling is available on version 3.10a and later of the
DWC_usb3 (USB 3.0) controller. With this feature, the software can poll
the CMDACT bit in the DEPCMD register after issuing an ENDXFER command.
This feature is enabled by writing GUCTL2[14].
This feature is NOT available on the DWC_usb31 (USB 3.1) IP.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
When dwc3 core enters into suspend mode, the system (especially for mobile
device) may power off the dwc3 controller for power saving, that will cause
dwc3 controller lost the mode operation when resuming dwc3 core.
Thus we can move the mode setting into dwc3_core_init() function to avoid this
issue.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Support to configure the UTMI+ PHY with an 8- or 16-bit
interface via DT. The UTMI+ PHY interface is a hardware
capability, and it's platform dependent. Normally, the
PHYIF can be configured during coreconsultant.
But for some specific USB cores(e.g. rk3399 SoC DWC3),
the default PHYIF configuration value is false, so we
need to reconfigure it by software.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
After going through runtime_suspend/runtime_resume
cycle once we would be left with an unbalanced
pm_runtime_get() call. Fix that by making sure that
we try to suspend right after resuming so things are
balanced and device can runtime_suspend again.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Implementations might use different IRQs for
host, gadget so use named interrupt resources
to allow device tree to specify the interrupts.
Following are the interrupt names
Peripheral Interrupt - peripheral
HOST Interrupt - host
Maintain backward compatibility for a single named
interrupt ("dwc3_usb3") for all interrupts as well as
unnamed interrupt at index 0 for all interrupts.
As platform_get_irq() variants are used, tackle
the -EPROBE_DEFER case as well.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
If there is a failure after pm_runtime_enable/get_sync()
we need to call pm_runtime_disable/put_sync().
Otherwise it will lead to an unbalanced pm_runtime_enable() on the
subsequent probe if the earlier probe bailed out due to -EPROBE_DEFER.
pm_runtime_get_sync() can fail as well so deal with that case too.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
We shouldn't change a host-only dwc3 to gadget-only
if driver is built as gadget-only. Fix that up here.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
No more users for it.
Tested-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
this patch implements the most basic pm_runtime
support for dwc3. Whenever USB cable is dettached,
then we will allow core to runtime_suspend.
Runtime suspending will involve completely tearing
down event buffers and require a full soft-reset of
the IP.
Note that a further optimization could be
implemented once we decide to support hibernation,
which is to allow runtime_suspend with cable
connected when bus is in U3. That's subject to a
separate patch, however.
Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
now that we have re-factored dwc3_core_init() and
dwc3_core_exit() we can use them for suspend/resume
operations.
This will help us avoid some common mistakes when
patching code when we have duplicated pieces of code
doing the same thing.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
The idea of this patch is for dwc3_core_init() to
abstract all the details about how to initialize
dwc3 and dwc3_core_exit() to do the same for
teardown.
With this, we can simplify suspend/resume operations
by a large margin and always know that we're going
to start dwc3 from a known starting point.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
this patch is in preparation for some further
re-factoring in dwc3 initialization. No functional
changes.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Here's the big USB Gadget pull request. This time
not as large as usual with only 57 non-merge
commits.
The most important part here is, again, all the work
on dwc3. This time around we're treating all
endpoints (except for control endpoint) exactly the
same. They all have the same amount of TRBs on the
ring, they all treat the ring as an actual ring with
a link TRB pointing to the head, etc.
We're also helping the host side burst (on
SuperSpeed GEN1 or GEN2 at least) for as long as
possible until the endpoint returns NRDY.
Other than this big TRB ring rework on dwc3, we also
have a dwc3-omap DMA initialization fix, some extra
debugfs files to aid in some odd debug sessions and
a complete removal of our FIFO resizing logic.
We have a new quirk for some dwc3 P3 quirk in some
implementations.
The rest is basically non-critical fixes and the
usual cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIek2AAoJEIaOsuA1yqRE2+cP/iZzzRshn6atj4b0BaRzyk6k
acK6YNs8pBgJMt9FaVWhDOlCfa/8hg5W+6Z5Ovpx4WPyJdZbYkoxJ0ZJGKYjYZ/y
U8hUxpTJ2s2wZKXRKchzT90hQvNlHdg3u2okP2GK0Oa17/idcQf2w1+0Cscm/dqN
Ur5HgukLe31/MrcPr49OuLkahSPfHUQlOn8i4AZyBTh9L8ouzKDCvzUt2ABoCRLE
wPcMegJhks7FQ5fksXtLsfqhqAoHpYHlsZQcH35iV8wPdtSueAtZ8tS6t445XbX9
vEsFq1ovpBMYfl/dwV6RBZiQTjZiGWaIdjOZMUcpbD03yXE2IC6l+mtE/wuhlnHu
J0Rr4YmfS4g++J1+380NQGoreOBZ2u7pujQ4TAy399zsLD8LR3zOQK5IErILSfpO
m6p3ElkGuAyHJKmo4CysSspXnnNGBp/fuTkYdPM9IJRJCe0YwnF/zsQd0OrNZ/Pm
39f6woE2aBQaEzdn+3Nya9B2IWYi6SIheQXPg0HETX/hujZHJv1x758VO6+c7aeq
nlhRlxSe8u8DKryBG43+F+myHaIz1p0Y2O3MzIlvRv0yw87QevJ4pAWptdMITaMh
YpgSjDPw5y2z91AhK/Fv+AXswKaoWBc6EEzBirW6hQWllSp+7qWloA6vYXkdHDr7
QajUBeXzNgXF8JfIos5H
=7szP
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: changes for v4.7 merge window
Here's the big USB Gadget pull request. This time
not as large as usual with only 57 non-merge
commits.
The most important part here is, again, all the work
on dwc3. This time around we're treating all
endpoints (except for control endpoint) exactly the
same. They all have the same amount of TRBs on the
ring, they all treat the ring as an actual ring with
a link TRB pointing to the head, etc.
We're also helping the host side burst (on
SuperSpeed GEN1 or GEN2 at least) for as long as
possible until the endpoint returns NRDY.
Other than this big TRB ring rework on dwc3, we also
have a dwc3-omap DMA initialization fix, some extra
debugfs files to aid in some odd debug sessions and
a complete removal of our FIFO resizing logic.
We have a new quirk for some dwc3 P3 quirk in some
implementations.
The rest is basically non-critical fixes and the
usual cleanups.
this helper will be used, initially, to dump space
of different queues and fifos in dwc3 to
debugfs. Later, it'll be used to issue remote wakeup
when we want to start a transfer and there's
something in a TX FIFO.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Debugfs init failure is not so important. We can continue our job on
this failure. Also no break need for debugfs_create_file call failure.
Signed-off-by: Du, Changbin <changbin.du@intel.com>
[felipe.balbi@linux.intel.com :
- remove out-of-memory message, we get that from OOM.
- switch dev_err() to dev_dbg() ]
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Some freescale QorIQ platforms require to disable receiver detection
in P3 for correct detection of USB devices. If GUSB3PIPECTL(DISRXDETINP3)
is set, Core will change PHY power state to P2 and then perform receiver
detection. After receiver detection, Core will change PHY power state to
P3. Same quirk would be added in dts file in future patches.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
we need to power off the PHY during suspend and
power it back on during resume.
Signed-off-by: Felipe Balbi <balbi@kernel.org>
[nsekhar@ti.com: fix call to usb_phy_set_suspend() in dwc3_suspend()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
we will be using a single event buffer and that
renders ev_buffs array unnecessary. Let's remove it
in favor of a single pointer to a single event
buffer.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
We never, ever route any of the other event buffers
so we might as well drop support for them.
Until someone has a real, proper benefit for
multiple event buffers, we will rely on a single
one. This also helps reduce memory footprint of
dwc3.ko which won't allocate memory for the extra
event buffers.
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
That FIFO resizing logic was added to support OMAP5
ES1.0 which had a bogus default FIFO size. I can't
remember the exact size of default FIFO, but it was
less than one bulk superspeed packet (<1024) which
would prevent USB3 from ever working on OMAP5 ES1.0.
However, OMAP5 ES1.0 support has been dropped by
commit aa2f4b16f8 ("ARM: OMAP5: id: Remove ES1.0
support") which renders FIFO resizing unnecessary.
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.
Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.
We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).
Suggested-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Check that dwc->maximum_speed is set to a valid value. Also add an error
when we use it later if we encounter an invalid value.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
If the maximum_speed is not set, set it to a known value, either
SuperSpeed or SuperSpeedPlus based on the type of controller we are
using. If we are on DWC_usb31 controller, check the PHY interface to see
if it is capable of SuperSpeedPlus.
Also this check is moved after dwc3_core_init() so that we can check
dwc->revision.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
The last few dev_dbg() messages are converted to
tracepoints and we can finally ignore dev_dbg()
messages during debug sessions.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.
Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch allows the dwc3 driver to run on the new Synopsys USB 3.1
IP core, albeit in USB 3.0 mode only.
The Synopsys USB 3.1 IP (DWC_usb31) retains mostly the same register
interface and programming model as the existing USB 3.0 controller IP
(DWC_usb3). However the GSNPSID and version numbers are different.
Add checking for the new ID to pass driver probe.
Also, since the DWC_usb31 version number is lower in value than the
full GSNPSID of the DWC_usb3 IP, we set the high bit to identify
DWC_usb31 and to ensure the values are higher.
Finally, add a documentation note about the revision numbering scheme.
Any future revision checks (for STARS, workarounds, and new features)
should take into consideration how it applies to both the 3.1/3.0 IP.
Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
No functional affect on existing platforms, but the driver
is now ready to extract the properties also from ACPI tables
as well as from DT.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
By using the unified device property interface, the function
can be made available for all platforms and not just the
ones using DT.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
By using the unified device property interface, the function
can be made available for all platforms and not just the
ones using DT.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add support for USB DRVVBUS pinctrl state change during
suspend/resume. This helps is conserving power during
system sleep.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
When a SoC supports both PHY interfaces but
doesn't define HSPHY in DT/pdata, we will get
an unnecessary dev_warn() which can mislead users
into thinking that they're missing something.
Instead, let's just silently rely on a correct
default. If the HW default is wrong, then HSPHY
is required and USB won't work, this will be
motivation enough for engineers to patch their
way into a working setup.
Reported-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
commit 3e10a2ce98 ("usb: dwc3: add hsphy_interface
property") introduced a possible NULL pointer
dereference because dwc->hsphy_interface can be
NULL.
In order to fix it, all we have to do is guard
strncmp() against a NULL argument.
Fixes: 3e10a2ce98 ("usb: dwc3: add hsphy_interface property")
Tested-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Registers DWC3's ULPI interface with the ULPI bus when it's
available.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Platforms that have configured DWC_USB3_HSPHY_INTERFACE with
value 3, i.e. UTMI+ and ULPI, need to inform the driver of
the actual HSPHY interface type with the property. "utmi" if
the interface is UTMI+ or "ulpi" if the interface is ULPI.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This allows dwc3_phy_setup() to be more useful later. There
is nothing preventing the PHY configuration registers from
being programmed early. They do not loose their context in
soft reset.
There are however other PHY related operations that should
be executed before the driver request handles to the PHYs,
such as registering DWC3's ULPI interface, which can now be
done in dwc3_phy_setup().
Also, if there ever was need for the two 100ms delays in
dwc3_phy_setup() there isn't anymore. The PHYs are now reset
after the PHY interfaces are setup.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
So it can be called from other places later.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
So they are available when ULPI interface support is added.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We need to store it before phys are handled, so we can later
use it in ULPI interface support code.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch removes "Enable USB3 LPM Capability" option from Kconfig
and adds snps,usb3_lpm_capable devicetree property instead of it.
USB3 LPM (Link Power Management) capability is hardware property, and
it's platform dependent, so if our hardware supports this feature, we
want rather to configure it in devicetree than having it as Kconfig option.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
That trick is only needed if we end up with an error, so
there's no point in messing that outside of an error path.
In fact doing so causes problems when removing dwc3.ko,
problems which commit c5a1fbc (usb: dwc3: dwc3-omap: Fix
the crash on module removal) mistakenly tried to fix.
Signed-off-by: Felipe Balbi <balbi@ti.com>
as it turns out, at least AM437x silicon (non-FPGA)
needs to enable PHY suspend quirk. So let's allow
for PHY suspend quirk to be used with non-FPGA
builds too.
Signed-off-by: Felipe Balbi <balbi@ti.com>
HIRD threshold should be configurable by different platforms.
From DesignWare databook:
When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.
When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
configurable according to PIPE3 specification.
Value Description
0 -6dB de-emphasis
1 -3.5dB de-emphasis
2 No de-emphasis
3 Reserved
It can be configured on DT or platform data.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core
initialization is completed above the dwc3 revision 1.94a.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds u2exit lfps quirk, and some special platforms can configure
that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
Configuration of coreConsultant, it supports of xHCI BESL Errata Dated
10/19/2011 is enabled in host mode. In device mode it adds the capability
to send NYET response threshold based on the BESL value received in the LPM
token, and the threhold is configurable for each soc platform.
This patch adds an entry that soc platform is able to define the lpm
capacity with their own device tree or bus glue layer.
[ balbi@ti.com : added devicetree documentation, spelled threshold
completely, made sure threshold is only applied to
proper core revisions. ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch adds disscramble quirk, and it only needs to be enabled at fpga
board on some vendor platforms.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Some chip vendor is on pre-silicon phase, which needs to use the simulation
board. It should have the same product and vendor id with the true soc, but
might have some minor different configurations.
Below thread discussion proposes to find a method to distinguish between
simulation board and soc.
http://marc.info/?l=linux-usb&m=141194772206369&w=2
In Andvanced Configuration of coreConsultant, there is the parameter of
DWC_USB_EN_FPGA. This bit has the function we need. And it would response as 7
bit of GHWPARAMS6 register. So it's able to check this functional bit to confirm
if works on FPGA board.
Reported-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
It enables hibernation if the function is set in coreConsultant.
Suggested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Using ->prepare()/->complete() to mask/unmask
IRQs is wrong at least for dwc3. We need to
make sure that by the end of ->resume(), IRQs
are working and ready to fire because a child
device may need working IRQs for its own ->resume()
method.
Signed-off-by: Felipe Balbi <balbi@ti.com>
If the probe drivers have already set the dma_mask, not
replacing the value.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
DWC3's GUID register is supposed to be used to write
any sort of version we might want. It helps when getting
bug reports for platforms you don't have HW to know
which kernel version of the driver was running on the
platform.
Because we don't really track driver version, but we _do_
track the kernel version, let's write LINUX_VERSION_CODE to
that register and use it for debugging.
Reviewed-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We can't suspend the PHYs before dwc3_core_exit_mode()
has been called, that's because the host and/or device
sides might still need to communicate with the far end
link partner.
Fixes: 8ba007a (usb: dwc3: core: enable the USB2 and USB3 phy in probe)
Cc: <stable@vger.kernel.org> # v3.9+
Suggested-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Currently, we disable pm_runtime before all register
accesses are done, this is dangerous and might lead
to abort exceptions due to the driver trying to access
a register which is clocked by a clock which was long
gated.
Fix that by moving pm_runtime_put_sync() and pm_runtime_disable()
as the last thing we do before returning from our ->remove()
method.
Fixes: 72246da (usb: Introduce DesignWare USB3 DRD Driver)
Cc: <stable@vger.kernel.org> # v3.2+
Signed-off-by: Felipe Balbi <balbi@ti.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Newer DWC3 controllers can be built for USB 2.0-only mode, where
most of the USB 3.0 circuitry is left out. To support this mode,
the driver must limit the speed programmed into the DCFG register
to Hi-Speed or lower.
Reads and writes to the PIPECTL register are left as-is, since
they should be no-ops in USB 2.0-only mode. Calls to phy_init()
etc. for the USB3 phy are also left as-is, since the no-op USB3
phy should be used for USB 2.0-only mode controllers.
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Putting together the code related to getting the 'IORESOURCE_MEM'
and assigning the same to dwc->xhci_resources, for increasing
the readability.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Not a lot here during this merge window. Mostly we just have
the usual miscellaneous patches (removal of unnecessary prints,
proper dependencies being added to Kconfig, build warning fixes,
new device ID, etc.
Other than those, the only important new features are the
new support for OS Strings which should help Linux Gadget
Drivers behave better under MS Windows. Also Babble Recovery
implementation for MUSB on AM335x. Lastly, we also have
ARCH_QCOM PHY support though phy-msm.
Signed-of-by: Felipe Balbi <balbi@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTfSbVAAoJEIaOsuA1yqREGU0P/RthhfwpHVOKREnWFvUnRcNn
MAPX1sv11gJiEs2Oe70/9YPL3ZLeV05mBgHoNUjyK5281TK9LDsUW8WwGLKbfe1u
5JsOC+Gmk7aFMCwGfQQKVZpy4UNikpa517Bg+m9oY37rjT2BMsP32Sq1KbD47q1q
0Ybn8iR0ZPAUDnpFc7OKyL9Ocko+AsQo1jmoR1epmhiByfDgzMPPIyE4MLv1SPXi
VvuuWWknTD6xev9m9ELVTo+Or/RNabi04DVOBRV2Qa5csKvkILrBpnCpR0fMTlQ8
ks8Zt0Fnwsre8/L/+HQj+2uOH3w+BDbe9qoVbkmkugZpFvrY0uFGrgGiqt8YOdiL
mQAE+/8lOgnUU5YRTr38h0yIZ1JTHGP1yv9YZwatk65bp2R6o5k5ejf1WnzRqUhy
HvXtILwZZiYknCCdPPEkyqpWEk8NcrLudw2k0EfU3q8JJnHeX+U4YNPhcFkjKido
Oo+SES09gmh+UHAtC1EOtHYs8boNKhe58hL5FzyyKV8zbM2SXmYoDLyBsVyOQQJQ
lDMKhS1+n8QLqBjZ2lypOqLuesHjk+E5iOjrXQZaEfA5eqUxaGezxOdbMkWwPLoS
yKR/tMQ7+OVn8yKhfIyVuzFwQkxc2p4gXtsyDwui6qVVlSrim2+14d2lv5FGVZ48
N8SCQis+ik6tShPOqccH
=Q1jA
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v3.16 merge window
Not a lot here during this merge window. Mostly we just have
the usual miscellaneous patches (removal of unnecessary prints,
proper dependencies being added to Kconfig, build warning fixes,
new device ID, etc.
Other than those, the only important new features are the
new support for OS Strings which should help Linux Gadget
Drivers behave better under MS Windows. Also Babble Recovery
implementation for MUSB on AM335x. Lastly, we also have
ARCH_QCOM PHY support though phy-msm.
Signed-of-by: Felipe Balbi <balbi@ti.com>
Conflicts:
drivers/usb/phy/phy-mv-u3d-usb.c
First usage of ret variable will re-write initial value. Thus, there is no need
to initialize it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Move mode (Host, Peripheral, OTG) initialization
to its own function in order to decrease the size
of our probe() routine.
Signed-off-by: Felipe Balbi <balbi@ti.com>
our probe() routine is too large and we can
easily refactor PHY-related code out to another
function to make it slightly less painful to read.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted to the Generic PHY Framework.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Since PHYs for dwc3 is optional (not all SoCs having PHYs for DWC3
should be programmed), do not return from probe if the USB PHY library
returns -ENODEV as that indicates the platform does not have a
programmable PHY.
While this can be considered as a temporary fix, a long term solution
would be to add 'nop' PHY for platforms that does not have programmable
PHY.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We must read HWPARAMS4 register to figure out
how many scratch buffers we should allocate.
Later patch will use "Set Scratchpad Buffer
Array" command to pass the pointer to the
IP so it can be used during hibernation.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Revisions between 2.10a and 2.50a (included) have
a known issue which may cause xHCI compliance tests
to fail and/or quality issues with Isochronous
transactions.
Note that this issue only impacts certain configurations
of those revisions, namely the ones which have clock
gating enabled.
The suggested workaround is to disable clock gating in
known broken revisions, make sure HW LPM is disabled
and set GCTL.SOFITPSYNC to 1.
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb phy was power'ed on but was never power'ed off in the error path.
Fix it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
usb_phy_set_suspend(phy, 0) is called before usb_phy_init. Fix it.
Reported-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This delay got introduced in:
"7415f17 usb: dwc3: core: add power management support"
which reflected similar code in dwc3_core_soft_reset() function.
However, originally the delay of 100ms in dwc3_core_soft_reset() was
meant to assist USB2PHY and USB3PHY reset, not for usb_phy_init()
sequence.
We should get rid of this delay, since things will still work
fine without this.
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
if pdata is a NULL pointer we could cause a
kernel oops when probing the driver. Make sure
to cope with systems which won't pass pdata
to the driver.
Tested-by: Paul Zimmerman <paulz@synopsys.com>
Reported-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
John Youn