Commit Graph

951496 Commits

Author SHA1 Message Date
Yifan Zhang c0fb85ae02 drm/amd/display: setup system context in dm_init
[why]
display S/G mode fails in Renoir

[how]
Setup system context in dm init.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-16 14:43:10 -04:00
Mihir Bhogilal Patel ff72bc4031 drm/amdgpu: Add debugfs entry for printing VM info
Create new debugfs entry to print memory info using VM buffer
objects.

V2: Added Common function for printing BO info.
    Dump more VM lists for evicted, moved, relocated, invalidated.
    Removed dumping VM mapped BOs.
V3: Fixed coding style comments, renamed print API and variables.
V4: Fixed coding style comments.

Signed-off-by: Mihir Bhogilal Patel <Mihir.Patel@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:23:24 -04:00
Evan Quan ded08454e5 drm/amdgpu: correct the gpu reset handling for job != NULL case
Current code wrongly treat all cases as job == NULL.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-and-tested-by: Jane Jian <Jane.Jian@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:23:15 -04:00
Likun Gao 5bab858eee drm/amdgpu: add rlc iram and dram firmware support
Support to load RLC iram and dram ucode when RLC firmware struct use v2.2

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:23:04 -04:00
Likun Gao 5fe19ce8e4 drm/amdgpu: add function to program pbb mode for sienna cichlid
Add function for sienna_cichlid to force PBB workload mode to zero by
checking whether there have SE been harvested.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:22:49 -04:00
Jiansong Chen 9294fa6a1d Revert "drm/amdgpu: disable gfxoff temporarily for navy_flounder"
This reverts commit 39ad082459.
TDR issue has been resovled by pmfw update.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:21:23 -04:00
Evan Quan 76c71f00d7 drm/amd/pm: properly setting GPO feature on UMD pstate entering/exiting
Disable/enable the GPO feature on UMD pstate entering/exiting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:21:17 -04:00
Evan Quan 27747293ce drm/amdgpu: fulfill Navi gfx and pcie settings on umd pstate switching(V2)
Fulfill Navi gfx and pcie settings on umd pstate switching.

V2: temporarily skip the pcie ASPM setting considering the ASPM function
    is not fully enabled yet

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:21:07 -04:00
Evan Quan 3e66275e09 drm/amdgpu: add interface for setting MGCG perfmon
Enable Navi1X MGCG perfmon setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:21:00 -04:00
Evan Quan f1213b1597 drm/amdgpu: add interface for setting ASPM
Support NAVI10 ASPM setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:53 -04:00
Evan Quan f2b75bc24d drm/amd/pm: correct gfx and pcie settings on umd pstate switching(V2)
For entering UMD stable Pstate, the operations to enter rlc_safe
mode, disable mgcg_perfmon and disable PCIE aspm are needed. And
the opposite operations should be performed on UMD stable Pstate
exiting.

V2: take those ASICs(CI/SI/VI) which may not support this into
    consideration

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:46 -04:00
Evan Quan 585584dbaa drm/amd/pm: populate Arcturus PCIE link state
Populate current link speed, width and clock domain frequency.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:39 -04:00
Evan Quan 7d92c1fd11 drm/amd/pm: populate the bootup LCLK frequency
As for other clock domains.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:31 -04:00
Huang Rui 72ca82c7d2 drm/amdgpu: disable gpa mode for direct loading
This patch fixes the gfx hang while use firmware direct loading mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:22 -04:00
Tom Rix 234de272b7 drm/amdgpu: add missing newline at eof
Representative checkpatch.pl warning

WARNING: adding a line without newline at end of file
 30: FILE: drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h:30:
+#endif

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 12:20:12 -04:00
Alex Deucher bdb4a1f9ed drm/amdgpu/display: DRM_AMD_DC_DCN3_02 depends on DRM_AMD_DC_DCN3_01
Fix this to avoid build problems if DRM_AMD_DC_DCN3_02 is defined, but
DRM_AMD_DC_DCN3_01 is not.

Fixes: 36d26912e8 ("drm/amd/display: Add support for DCN302 (v2)")
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:16:30 -04:00
Kent Russell 185b0d5a78 drm/amdkfd: Use kvfree in destroy_crat_image
Now that we use kvmalloc for the crat_image, we need to use kvfree when
we destroy this.

Fixes: d0e63b343e ("drm/amdkfd: Use kvmalloc instead of kmalloc for VCRAT")
Reported-by: Morris Zhang <shiwu.zhang@amd.clm>
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:45 -04:00
Veerabadhran G 56380c388c drm/amdgpu: vcn and jpeg ring synchronization
Synchronize the ring usage for vcn1 and jpeg1 to workaround a hardware bug.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:37 -04:00
Hawking Zhang f099471bc5 drm/amdgpu: enable GDDR6 save-restore support for dimgrey_cavefish
add mp0 11_0_12 for dimgrey_cavefish to the mem training
supported list, otherwise the modeprobe would fail
on dimgrey_cavefish with latest vbios.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:26 -04:00
Huang Rui 4d5af9b7ad drm/amdgpu: fix the issue that apu has no smu firmware binary
The driver needn't load smu binary on APU platforms.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Madhav Chauhan <madhav.chauhan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:19 -04:00
Evan Quan 4460571bee drm/amd/pm: increase mclk switch threshold to 200 us
To avoid underflow seen on Polaris10 with some 3440x1440
144Hz displays. As the threshold of 190 us cuts too close
to minVBlankTime of 192 us.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:09 -04:00
Mauro Carvalho Chehab 23aaf8058a docs: amdgpu: fix a warning when building the documentation
As reported by Sphinx:

	Documentation/gpu/amdgpu.rst:200: WARNING: Inline emphasis start-string without end-string.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:14:05 -04:00
Mauro Carvalho Chehab 8d8ac1a1e9 drm/amd/display: kernel-doc: document force_timing_sync
As warned when running "make htmldocs":

	./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h:345: warning: Function parameter or member 'force_timing_sync' not described in 'amdgpu_display_manager'

This new struct member was not documented at kernel-doc markup.

Fixes: 3d4e52d0cf ("drm/amd/display: Add debugfs for forcing stream timing sync")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:13:59 -04:00
Bernard Zhao 4fbb3ae219 drm/amd/display: remove no need return value
Functions (disable_all_writeback_pipes_for_stream &
dc_enable_stereo & dc_post_update_surfaces_to_stream)
always return true, there is no need to keep the return value.
This change is to make the code a bit more readable.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:13:53 -04:00
kernel test robot 206b737240 drm/amdgpu: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:608:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: b4a7db71ea ("drm/amdgpu: add per device user friendly xgmi events for vega20")
CC: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:13:48 -04:00
Alex Deucher cde3359acb drm/amdgpu/swsmu: init the baco mutex in early_init
GPU reset might get called during init time, before
sw_init has been called.

Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-14 15:13:34 -04:00
Roman Li 71c0fd9221 drm/amd/display: Add green_sardine support to DM
Display Manager support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:03:20 -04:00
Roman Li 9ba93114c4 drm/amd/display: Add green_sardine support to DC
Display Core support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:03:17 -04:00
Tao Zhou 7cc656e2d0 drm/amdgpu: add DM block for dimgrey_cavefish
Add DM block support for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:03:10 -04:00
Tao Zhou 78aafee761 drm/amdgpu: remove ASD ucode init for dimgrey_cavefish
dimgrey_cavefish has no ASD ucode currently, remove its initialization.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:03:01 -04:00
Bhawanpreet Lakha 2a41120504 drm/amd/display: Add DCN302 support in amdgpu_dm (v2)
Handle CAVE_DIMGREY_CAVEFISH in amdgpu_dm

v2: fix rebase typo (Alex)

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:56 -04:00
Bhawanpreet Lakha 36d26912e8 drm/amd/display: Add support for DCN302 (v2)
- add DCN302 resource, irq service, dmub loader,
 - handle  DC_VERSION_DCN_3_02
 - define DCN302 power gating functions
 - handle DCN302 in GPIO files
 - define I2C regs
 - add CONFIG_DRM_AMD_DC_DCN3_02 guard

v2: rebase fixes (Alex)

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:51 -04:00
Tao Zhou 4da6783908 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish
Per PMFW 59.7.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:48 -04:00
Tao Zhou eac88a5fc6 drm/amdgpu: remove gpu_info fw support for dimgrey_cavefish
Remove gpu_info fw support for dimgrey_cavefish, gpu info can be got
from ip discovery.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:46 -04:00
Tao Zhou 8e3bfb992c drm/amdgpu: enable ih CG for dimgrey_cavefish
Set ih CG flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:43 -04:00
Tao Zhou 2c70c332a1 drm/amdgpu: enable hdp CG and LS for dimgrey_cavefish
Set hdp CG and LS flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:40 -04:00
Tao Zhou aff39cdecd drm/amdgpu: add psp and smu block for dimgrey_cavefish
Add psp and smu block for dimgrey_cavefish with psp firmware load type.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by:Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:37 -04:00
Tao Zhou 7dc2ef4e70 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish(v2)
Per PMFW 59.5.0.

v2: refine subject and commit message, fix typo

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:31 -04:00
Tao Zhou 4ccc957f15 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish
Update driver if version from 0x5 to 0x6 for dimgrey_cavefish, per PMFW 59.04.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:29 -04:00
James Zhu be6b1cd3b7 drm/amdgpu: enable jpeg3.0 for dimgrey_cavefish
Enable jpeg3.0 ip block for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:26 -04:00
James Zhu 0afc770ba8 drm/amdgpu: enable vcn3.0 for dimgrey_cavefish
Enable vcn3.0 ip block for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:12 -04:00
Tao Zhou e8afbddfa1 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish
Update driver if version from 0x4 to 0x5 for dimgrey_cavefish, per PMFW 59.02.0.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:09 -04:00
Tao Zhou 73da8e8628 drm/amdgpu: enable athub/mmhub PG for dimgrey_cavefish
Set athub/mmhub PG flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:05 -04:00
Tao Zhou 135333a0ce drm/amdgpu: enable mc CG and LS for dimgrey_cavefish
Set mc CG and LS flag for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:02:00 -04:00
Tao Zhou 583e5a5e90 drm/amdgpu: enable GFX clock gating for dimgrey_cavefish
Enable GFX MGCG, CGCG and 3DCG for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:55 -04:00
Tao Zhou 4ed032bd13 drm/amdgpu/swsmu: update driver if version for dimgrey_cavefish
Update driver if version according to PMFW with version 0x003B0100.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:51 -04:00
Tao Zhou e4ed4f50d2 drm/amdgpu: support athub cg setting for dimgrey_cavefish
Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:48 -04:00
Tao Zhou f897ea3550 drm/amdgpu: enable front door loading for dimgrey_cavefish
Support both back and front door loading for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:46 -04:00
James Zhu cc6161aa70 drm/amdgpu: enable jpeg3.0 PG and CG for dimgrey_cavefish
Enable JPEG3.0 PG and CG for dimgrey_cavefish.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:43 -04:00
James Zhu d5bc1579b0 drm/amdgpu: enable VCN3.0 PG and CG for dimgrey_cavefish
Enable VCN3.0 PG and CG for dimgrey_cavefish

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-12 14:01:41 -04:00