Add driver state syncing that is invoked once all PMC consumers are
attached and ready. The consumers are the power domain clients.
The synchronization callback is invoked once all client drivers are
probed, the driver core handles this for us. This callback informs
PMC driver that all voltage votes are initialized by each PD client
and it's safe to begin voltage scaling of the core power domain.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash DT backwards-compatibility patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
to an external SoC power rail. Core power domain covers vast majority of
hardware blocks within a Tegra SoC. The voltage of a power domain should
be set to a level which satisfies all devices within the power domain.
Add support for the core power domain which controls voltage state of the
domain. This allows us to support system-wide DVFS on Tegra20-210 SoCs.
The PMC powergate domains now are sub-domains of the core domain, this
requires device-tree updating, older DTBs are unaffected and will continue
to work as before.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash lockdep class removal patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Ensure that SoC voltages are at a level suitable for a system reboot.
This is important for some devices that use CPU reset method for the
rebooting. SoC CPU and core voltages now are be restored to a level
that is suitable for rebooting. This patch fixes hang on reboot on
Asus Transformer TF101, it was also reported as fixing some of reboot
issues on Toshiba AC100.
Reported-by: Nikola Milosavljević <mnidza@outlook.com>
Tested-by: Nikola Milosavljević <mnidza@outlook.com> # TF101
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qiheng Lin <linqiheng@huawei.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210409110243.41-1-linqiheng@huawei.com
The name "get_power" is used within the Meson EE power controller driver
to indicate whether a power domain is turned on or off. With the
original "get_power" naming the result was:
- true = powered off
- false = powered on
Rename "get_power" to "is_powered_off" to make the naming consistent
with the third argument to pm_genpd_init. Also this naming is easier to
understand when reading the code without looking at the implementation
of "get_power".
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210517202115.1004065-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more
up-to-date list of PMICs with the respective IDs. Use those names for
socinfo. Some IDs seem to have been assigned to multiple PMICs so keep
that in the name as well.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The i.MX8MM VPU power up sequence is a bit special, it must follow:
1. request power up
2. reset assert
3. reset deassert
This change in this patch will not affect other domains, because
the power domain default is in asserted state, unless bootloader
deassert the reset. It also applies to GPU power domain.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
With the BLK-CTL driver now in place, let's add the missing domains.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds support for the power domains found on i.MX8MM. The 2D and 3D
GPU domains are abstracted as a single domain in the driver, as they can't
be powered up/down individually due to a shared reset.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ID for IPQ6018 was previously added, but ID-s for rest of the
family are missing.
So, lets add those based on downstream driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Normally the reset for the devices inside the power domain is
triggered automatically from the PGC in the power-up sequencing,
however on i.MX8MM this doesn't work for the GPU power domains.
Add support for triggering the reset explicitly during the power
up sequencing.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some of the PGC domains only control the handshake with the ADB400
and don't have any power sequence controls. Make such domains work
by allowing the pxx and map bits to be empty and skip all actions
using those controls.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This allows to nest domains into other power domains and have the
parent domain powered up/down as required by the child domains.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
New reference manuals show that there is actually a status bit for
the ADB400 handshake. Add a poll loop to wait for the ADB400 to
acknowledge our request.
[Peng Fan: i.MX8MM has blk ctl module, the handshake can only finish
after setting blk ctl. The blk ctl driver will set the bus clk bit and
the handshake will finish there. we just add a delay and suppose the
handshake will finish after that.]
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current mixed function to control both power up and power down
sequences is very hard to follow and already contains some sequence
errors like triggering the ADB400 handshake at the wrong time due to
this. Split the function into two, which results in slightly more
code, but is way easier to get right.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use clk_bulk API to simplify the code a bit. Also add some error
checking to the clk_prepare_enable calls.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As long as the power domain driver is active we want power control
over the domain (which is what the mapping bit requests), so there
is no point in whacking it for every power control action, simply
set the bit in driver probe and clear it when the driver is removed.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Switch to "goto out..." error handling in domain driver probe to
avoid repeating all the error paths.
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As on i.MX51 and i.MX53, initialize the SoC ID based on the SoC
compatible string of the board.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds missing MODULE_DEVICE_TABLE definition which generates
correct modalias for automatic loading of this driver when it is built
as an external module.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1620705350-104687-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-10-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Including:
- Big cleanup of almost unsused parts of the IOMMU API by
Christoph Hellwig. This mostly affects the Freescale PAMU
driver.
- New IOMMU driver for Unisoc SOCs
- ARM SMMU Updates from Will:
- SMMUv3: Drop vestigial PREFETCH_ADDR support
- SMMUv3: Elide TLB sync logic for empty gather
- SMMUv3: Fix "Service Failure Mode" handling
- SMMUv2: New Qualcomm compatible string
- Removal of the AMD IOMMU performance counter writeable check
on AMD. It caused long boot delays on some machines and is
only needed to work around an errata on some older (possibly
pre-production) chips. If someone is still hit by this
hardware issue anyway the performance counters will just
return 0.
- Support for targeted invalidations in the AMD IOMMU driver.
Before that the driver only invalidated a single 4k page or the
whole IO/TLB for an address space. This has been extended now
and is mostly useful for emulated AMD IOMMUs.
- Several fixes for the Shared Virtual Memory support in the
Intel VT-d driver
- Mediatek drivers can now be built as modules
- Re-introduction of the forcedac boot option which got lost
when converting the Intel VT-d driver to the common dma-iommu
implementation.
- Extension of the IOMMU device registration interface and
support iommu_ops to be const again when drivers are built as
modules.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmCMEIoACgkQK/BELZcB
GuOu9xAAvg6aR0uHlxvRq6cgNnHN9Ltp5+t3qFYtRRrauY0iOPMO62k0QQli5shX
CGeczD0e59KAZqI0zNJnQn8hMY5dg7XVkFCC5BrSzuCDCtwJZ0N5Tq3pfUlaV1rw
BJf41t79Fd+jp7kn53tu+vRAfYZ3+sLOx/6U3c15pqKRZSkyFWbQllOtD3J5LnLu
1PyPlfiNpMwCajiS7aQbN+fuJ/lKIFeA2MDPOsCBzhbfxiJUqJxZOKAZO3rOjFfK
feTibqQ+3Zz6MPXt9st1cvPpy8jCosv81OY6Knqvxf/oB5q+fEdi2uNrKISonb/t
Fw331oOIwg2A+HOpwC9MN1AumOIqiHSWWENAMk9SlP+TMIWKQ8kZreyI6IEB23dV
+QvP3DVA+CfLwtNY/Zh0IqKh28D+IHlKbpWNU1m+9AUe468mV/MTjfwxr9Yfffhm
LZ6C0DgFdmtqv8jPuDGUOgo3RNeN8bLnUSEHG9gHibA+RKujl5BWDjKkwILqMQTt
Ysdsu8TiNtFIULomizqCpgqEbQfW8TLFvASXCM1VMQ/PDURxvchZPxFDJonYXy+K
z2HGaG3eUE07YrAdRKH69aMVIbmS+sjEhvmi4xZ1Lh7wWcIE2AZVvO8qNb+Ckcp3
4tLPPDksm/iQngnFf6gdgH3qv4rgbzE4+74GXqeANiQCjY9dSJI=
=qF2C
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
- Big cleanup of almost unsused parts of the IOMMU API by Christoph
Hellwig. This mostly affects the Freescale PAMU driver.
- New IOMMU driver for Unisoc SOCs
- ARM SMMU Updates from Will:
- Drop vestigial PREFETCH_ADDR support (SMMUv3)
- Elide TLB sync logic for empty gather (SMMUv3)
- Fix "Service Failure Mode" handling (SMMUv3)
- New Qualcomm compatible string (SMMUv2)
- Removal of the AMD IOMMU performance counter writeable check on AMD.
It caused long boot delays on some machines and is only needed to
work around an errata on some older (possibly pre-production) chips.
If someone is still hit by this hardware issue anyway the performance
counters will just return 0.
- Support for targeted invalidations in the AMD IOMMU driver. Before
that the driver only invalidated a single 4k page or the whole IO/TLB
for an address space. This has been extended now and is mostly useful
for emulated AMD IOMMUs.
- Several fixes for the Shared Virtual Memory support in the Intel VT-d
driver
- Mediatek drivers can now be built as modules
- Re-introduction of the forcedac boot option which got lost when
converting the Intel VT-d driver to the common dma-iommu
implementation.
- Extension of the IOMMU device registration interface and support
iommu_ops to be const again when drivers are built as modules.
* tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (84 commits)
iommu: Streamline registration interface
iommu: Statically set module owner
iommu/mediatek-v1: Add error handle for mtk_iommu_probe
iommu/mediatek-v1: Avoid build fail when build as module
iommu/mediatek: Always enable the clk on resume
iommu/fsl-pamu: Fix uninitialized variable warning
iommu/vt-d: Force to flush iotlb before creating superpage
iommu/amd: Put newline after closing bracket in warning
iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()'
iommu/vt-d: Fix build error of pasid_enable_wpe() with !X86
iommu/amd: Remove performance counter pre-initialization test
Revert "iommu/amd: Fix performance counter initialization"
iommu/amd: Remove duplicate check of devid
iommu/exynos: Remove unneeded local variable initialization
iommu/amd: Page-specific invalidations for more than one page
iommu/arm-smmu-v3: Remove the unused fields for PREFETCH_CONFIG command
iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown
iommu/vt-d: Invalidate PASID cache when root/context entry changed
iommu/vt-d: Remove WO permissions on second-level paging entries
iommu/vt-d: Report the right page fault address
...
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the
device tree. The device tree is a functional programming
language and does not imply any order, so the right thing is
for the pin control core to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to
go in and select functions for a pin manually (iteratively, at
the prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver
making use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for
MIPS Broadcom devices to instead use the pin control subsystem.
New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362,
BCM6368, BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs
on PM8008 are supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and
X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic
fixes for the behaviour of the Ingenic pin controller.
Add DMIC pins for JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmCL5sAACgkQQRCzN7AZ
XXNX5RAAtdPvDrPzzWdeqNLyodnJu/SyeA2xbmsvywrSvgpSx3FojFW9AXY/sr7w
RuhGGA5KhnrovwiabRKoZ0d0lC/JtKdx5g2o9ePFHDy+7BzFnVacBjL38UftSKy0
4QpDNJ3zock/XTUgJdaJEsbHhP/N4fOF/SbLpguYzGz7JpybNrZ+2M73yeQSL6uE
yuhn/AgFMLgWS47nSAH91Yt387+XCEfB75nftXyFSN9GpQ9i3VixWsG3Um/Stoma
aR7IIknvHdpCrOHH1IKohYcdlOkE7Wh2wHXSJVv26M49Ri5KSXu17lsUknebQ/oq
UeDYdd/2q/wFjxdEbG2tqinEYHs3e1RPmatVesgyibtYHGwjnSFo/G6UtG4948ii
1exwBi+0fw58YWLu/z4bhnNtZx6VsOev6mJ5GF7pyYzGIJy3r5J/9KCDzOJEoLom
YTVmgZRjzJuH/i0rPgyg3lSxlP/pdvdk1YUMlIYN1zWdPnRqj7/q+qaxPOkltqD+
20NFkvhQuuq+dLn4jtNK9xr2+vIKxIRPClT3D/lAihEPC5MUaFw/+y/V7c1hEJfS
d1dh5DwgHK7i55/lqLFaXeNNYsmY/SiFecoB8xyFnOJFsHlSHe/6NfjmRhOMUn6V
IX2GG4CBAzaheIWtN/ub/DcQ1vwA2n9hO5WX+Y3CXkIxXUFPmJY=
=QrEn
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is a lot going on!
Core changes:
- A semantic change to handle pinmux and pinconf in explicit order
while up until now we depended on the semantic order in the device
tree. The device tree is a functional programming language and does
not imply any order, so the right thing is for the pin control core
to provide these semantics.
- Add a new pinmux-select debugfs file which makes it possible to go
in and select functions for a pin manually (iteratively, at the
prompt) for debugging purposes.
- Fixes to gpio regmap handling for a new pin control driver making
use of regmap-gpio.
- Use octal permissions on debugfs files.
New drivers:
- A massive rewrite of the former custom pin control driver for MIPS
Broadcom devices to instead use the pin control subsystem. New pin
control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368,
BCM63268 and BCM6318 SoC variants are implemented.
- Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B
in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are
supported.
- Support for the Rockchip RK3568/RK3566 pin controller.
- Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000.
- Support for Mediatek MTK8195.
- Add a new Xilinx ZynqMP pin control driver.
Driver improvements and non-urgent fixes:
- Modularization and improvements of the Rockchip drivers.
- Some new pins added to the description of new Renesas SoCs.
- Clarifications of the GPIO base calculation in the Intel driver.
- Fix the function names for the MPP54 and MPP55 pins in the Armada
CP110 pin controller.
- GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
- Support for ACPI probing of the Qualcomm SC8180x.
- Fix interrupt clear status on rockchip
- Fix some missing pins on the Ingenic JZ4770, some semantic fixes
for the behaviour of the Ingenic pin controller. Add DMIC pins for
JZ4780, X1000, X1500 and X1830.
- A slew of janitorial like of_node_put() calls"
* tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: Add Xilinx ZynqMP pinctrl driver support
firmware: xilinx: Add pinctrl support
pinctrl: rockchip: do coding style for mux route struct
pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param
pinctrl: Introduce MODE group in enum pin_config_param
pinctrl: Keep enum pin_config_param ordered by name
dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver
pinctrl: core: Fix kernel doc string for pin_get_name()
pinctrl: mediatek: use spin lock in mtk_rmw
pinctrl: add drive for I2C related pins on MT8195
pinctrl: add pinctrl driver on mt8195
dt-bindings: pinctrl: mt8195: add pinctrl file and binding document
pinctrl: Ingenic: Add pinctrl driver for X2000.
pinctrl: Ingenic: Add pinctrl driver for JZ4775.
pinctrl: Ingenic: Add pinctrl driver for JZ4755.
pinctrl: Ingenic: Add pinctrl driver for JZ4750.
pinctrl: Ingenic: Add pinctrl driver for JZ4730.
dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
pinctrl: Ingenic: Reformat the code.
pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs.
...
Updates for SoC specific drivers include a few subsystems that
have their own maintainers but send them through the soc tree:
TEE/OP-TEE:
- Add tracepoints around calls to secure world
Memory controller drivers:
- Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
- Add debug statistics to Tegra20 memory controller
- Update Tegra bindings and convert to dtschema
ARM SCMI Firmware:
- Support for modular SCMI protocols and vendor specific extensions
- New SCMI IIO driver
- Per-cpu DVFS
The other driver changes are all from the platform maintainers
directly and reflect the drivers that don't fit into any other
subsystem as well as treewide changes for a particular platform.
SoCFPGA:
- Various cleanups contributed by Krzysztof Kozlowski
Mediatek:
- add MT8183 support to mutex driver
- MMSYS: use per SoC array to describe the possible routing
- add MMSYS support for MT8183 and MT8167
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873
Tegra:
- Bug fixes to PMC and clock drivers
NXP/i.MX:
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance optimized
for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers
OMAP:
- Preparation to use devicetree for genpd
- ti-sysc needs iorange check improved when the interconnect target module
has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as we
now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and dra7
- omap-prm driver needs to enable autoidle retention support for omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of using
builtin_platform_driver_probe for deferred probe to work
Raspberry Pi:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
Qualcomm
- Improved detection for SCM calling conventions
- Support for OEM specific wifi firmware path
- Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JwACgkQmmx57+YA
GNkgRg//cBtq2NyDbjiNABxFSkmGCfcc0w0C2wjVzr4cfg6BLTbuvvlpZxI912pu
P1G2sbsdfQJ8sSeIyZos+PilWK0zHrqlaGZfKI19US45dMjpteDBgsPd7wNZwBjQ
jbops3YLjztZK1HpY4dIdvMnfxt7yRqhBWaTbPuCwQ35c5KsOM8NHB3cP3BUINWK
x1uuBCv9svppzwdDiPxneV93WKEzabOUo+WBMPyh5vnyvmW17Iif4BA/VKQxzymm
mWUi8HHpKBpvntJOKwAD2hnLAdpR3SwX20SLOpyLhnJMotbzNUEqq3LdRxDNPdHk
ry+rarJ78JGlYfpcfegf2bLf5ITNMfOyRGkjtzeYpcZIXPjufOg9DA9YtAy37k0u
L0T/9gQ+tQ01WGMca77OyUtIqJKdblZrQMfuH/yGlR99bqFQMV7rNc7GNlX1MXp/
zw4aOYrRWGtGEeAjx5JJWcYydvMSJpCrqxTz3YhgeJECHB2iA6YkV3NROR4TLW//
tfxaKqxR/KmSqE6hoVOAuuQ0BLXNlql/+4EE6MKsAOBiKPJclvmJg4CyuY8G21ev
9Su0zJnXMzai7gNu32v1pizGj26+AOhxCEgAG0mGgk2jlQSn24CKgm5e7kCUewcF
j/1XksNPT95v/K8MsLpXe5xGvF3jhA1BlFfvjJNZOrcZywBXRxg=
=iidq
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Updates for SoC specific drivers include a few subsystems that have
their own maintainers but send them through the soc tree:
TEE/OP-TEE:
- Add tracepoints around calls to secure world
Memory controller drivers:
- Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
- Add debug statistics to Tegra20 memory controller
- Update Tegra bindings and convert to dtschema
ARM SCMI Firmware:
- Support for modular SCMI protocols and vendor specific extensions
- New SCMI IIO driver
- Per-cpu DVFS
The other driver changes are all from the platform maintainers
directly and reflect the drivers that don't fit into any other
subsystem as well as treewide changes for a particular platform.
SoCFPGA:
- Various cleanups contributed by Krzysztof Kozlowski
Mediatek:
- add MT8183 support to mutex driver
- MMSYS: use per SoC array to describe the possible routing
- add MMSYS support for MT8183 and MT8167
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873
Tegra:
- Bug fixes to PMC and clock drivers
NXP/i.MX:
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance
optimized for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers
OMAP:
- Preparation to use devicetree for genpd
- ti-sysc needs iorange check improved when the interconnect target
module has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to
avoid issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as
we now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for
omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of
using builtin_platform_driver_probe for deferred probe to work
Raspberry Pi:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
Qualcomm
- Improved detection for SCM calling conventions
- Support for OEM specific wifi firmware path
- Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP"
* tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
soc: aspeed: fix a ternary sign expansion bug
memory: mtk-smi: Add device-link between smi-larb and smi-common
memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
memory: renesas-rpc-if: fix possible NULL pointer dereference of resource
clk: socfpga: fix iomem pointer cast on 64-bit
soc: aspeed: Adapt to new LPC device tree layout
pinctrl: aspeed-g5: Adapt to new LPC device tree layout
ipmi: kcs: aspeed: Adapt to new LPC DTS layout
ARM: dts: Remove LPC BMC and Host partitions
dt-bindings: aspeed-lpc: Remove LPC partitioning
soc: fsl: enable acpi support in RCPM driver
soc: qcom: mdt_loader: Detect truncated read of segments
soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
soc: qcom: pdr: Fix error return code in pdr_register_listener
firmware: qcom_scm: Fix kernel-doc function names to match
firmware: qcom_scm: Suppress sysfs bind attributes
firmware: qcom_scm: Workaround lack of "is available" call on SC7180
firmware: qcom_scm: Reduce locking section for __get_convention()
firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
...
Almost all SoC code changes this time are for the TI OMAP
platform, which continues its decade-long quest to move from
describing a complex SoC in code to device tree.
Aside from this, the Uniphier platform has a new maintainer
and some platforms have minor bugfixes and cleanups that were
not urgent enough for v5.12.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JoACgkQmmx57+YA
GNk2jg/9HPrMBjoxNMEynsN066Dnc3AVBG8veYAigS0mJuMX3HzUqp+RNn5YxEak
0SKWgocjawi5MjtuCRmM/BO0SY4wPUMOxnqx/AE4q3u6VVpfx+XJu+1bywAx7UFC
FnqstmqFAfJDLJUe4Pfv4SuXRJYyGKBoEdRK9Xr13qSstQ1gm4ccWbtRStWCcVvv
f4J0gPK0dw99lgbCOLbrBMfz1zuxCwhILg+qZ0+WPl9NNfxurQ2+/Cj/8P/L0IH+
BoiZ5NaISWnvlBWaSTh6P7d3omhbA149CPjybUy2b/s84oNHdm7XLpwymVp941zt
sM3gBIi7UDKMfXUrjWDZAXY06MZa/62BLCHQ2Fx+A1ve9TC0AqmSmUxhB4Z8xXs2
3U97kZnTAPX9Scno9k7eDXbVXKVzlDL8zdZtGvY56x/EiAiPSJaTcaU6puNgdF9z
7IPFKdpMbePcxHN03dC17B4HYVoSTp2gCadOSRSrBmVjAoswzYKoAOHrzibCwUzI
knbsShhJe/BtxvLJ7e/hq0YZBTTZXUcX/3Iuw6C+j+9l9Cod/JhYOoHQM7gvqHv6
JRz0Wt9IrMhYBMYlf0g8zHZa7IUDAq7k6x8XwLjK/M/WdeS2tI3+Cmt5ePhlgZVb
eBPzikxcvglDojE7zTkBeC/+jlpolWQ6UfRnptSvkof1DWVPkiE=
=YFEX
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"Almost all SoC code changes this time are for the TI OMAP platform,
which continues its decade-long quest to move from describing a
complex SoC in code to device tree.
Aside from this, the Uniphier platform has a new maintainer and some
platforms have minor bugfixes and cleanups that were not urgent enough
for v5.12"
* tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
MAINTAINERS: Update ARM/UniPhier SoCs maintainers and status
mailmap: Update email address for Nicolas Saenz
MAINTAINERS: Update BCM2711/BCM2335 maintainer's mail
ARM: exynos: correct kernel doc in platsmp
ARM: hisi: use the correct HiSilicon copyright
ARM: ux500: make ux500_cpu_die static
ARM: s3c: Use pwm_get() in favour of pwm_request() in RX1950
ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
ARM: at91: pm: Move prototypes to mutually included header
ARM: OMAP2+: use true and false for bool variable
ARM: OMAP2+: add missing call to of_node_put()
ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
ARM: imx: Kconfig: Fix typo in help
ARM: mach-imx: Fix a spelling in the file pm-imx5.c
bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
ARM: OMAP2+: Drop legacy platform data for omap5 l3
...
The intent here was to return negative error codes but it actually
returns positive values. The problem is that type promotion with
ternary operations is quite complicated.
"ret" is an int. "copied" is a u32. And the snoop_file_read() function
returns long. What happens is that "ret" is cast to u32 and becomes
positive then it's cast to long and it's still positive.
Fix this by removing the ternary so that "ret" is type promoted directly
to long.
Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Venture <venture@google.com>
Link: https://lore.kernel.org/r/YIE90PSXsMTa2Y8n@mwanda
Link: https://lore.kernel.org/r/20210423000919.1249474-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Better to have a MODE group of settings to keep them together
when ordered alphabetically. Hence, rename PIN_CONFIG_LOW_POWER_MODE
to PIN_CONFIG_MODE_LOW_POWER.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210412140741.39946-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Another smaller set of fixes for three of the Arm platforms:
TI OMAP:
Fix swapped mmc device order also for omap3 that got changed with the
recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the aliases
should be board specific, all the mmc device instances are all there in
the SoC, and we do probe them by default so that PM runtime can idle the
devices if left enabled from the bootloader.
Qualcomm Snapdragon:
This bypasses the, recently introduced, interconnect handling in the
GENI (serial engine) driver when running off ACPI, as this causes the
GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard
and touchpad.
Allwinner:
One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine,
some MAINTAINERS maintainance, and a clk / reset switch to our headers.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmB8hfwACgkQmmx57+YA
GNn5QA//TBcW23bLfjYI8kPl7yJ9KSD6UdNGHXYizJry5hAoyLhvCVSq6quPmAPy
psempGKQBYiRb0Ftewc2+v00u4XdOTxqFw2MDs6UoladfiqyYfkEJxPgXG/k0msJ
gGIOT5ysDeRiqNAFND0wO6z/wPmlgJl37yTztOrbghWwYLvwlUkqsXzJ9B72FCzM
MGwrv1LZfEiljuaJAT+nVNkStKxCxSWjzIvYMgC/K9xbAjjtJNZby2tNJObMiARe
d3G2nGYmo414eQGNb+SDBx5h4aPZGR0ZxdLbzhAFrdw+uUzwlnJ1ufJQnEr6CXql
4MziHYWRYOAF90uLVeWiH8ZEh/CbxdnenmYCooOj+LAkn6IHAErRlFeZAfjWnckh
pwcdeebk4SQ9SNDPIWwwVYKVeGtnMM7q8HucDulMRxYmDL5sTprMhJVwxXbshivw
dnYWzV86FUIOgegUyFgzPKSTVqHbG68dxz2yRhR8yP56pTLnzh/lsB+0DmtiHcIx
O8chRnvtJib5/XspF6CVXqWYDrvIR5L8h7JMbSU/IetADJwQyEYz9CVh/DyNuiJQ
+oZY8Xqt3NzC9xOP/pTP6NFDYsVvKwsQRdwT3CBoV7lEM9X4wEypHOR+QmvO8q8m
AhddgIhx3P7olKnKgylPXS0kjQ3AuBarmnUMI9eaS2tHO2n5z/Y=
=f2ly
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Another smaller set of fixes for three of the Arm platforms:
TI OMAP:
Fix swapped mmc device order also for omap3 that got changed with
the recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the
aliases should be board specific, all the mmc device instances are
all there in the SoC, and we do probe them by default so that PM
runtime can idle the devices if left enabled from the bootloader.
Qualcomm Snapdragon:
This bypasses the recently introduced interconnect handling in
the GENI (serial engine) driver when running off ACPI, as this
causes the GENI probe to fail and the Lenovo Yoga C630 to boot
without keyboard and touchpad.
Allwinner:
One 32kHz clock fix for the beelink gs1, a CD polarity fix for the
SoPine, some MAINTAINERS maintainance, and a clk / reset switch to
our headers"
* tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference
MAINTAINERS: Match on allwinner keyword
MAINTAINERS: Add our new mailing-list
arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems
arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices
ARM: OMAP2+: Fix uninitialized sr_inst
ARM: dts: Fix swapped mmc order for omap3
ARM: OMAP2+: Fix warning for omap_init_time_of()
soc: qcom: geni: shield geni_icc_get() for ACPI boot
- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance optimized
for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAmBvf7gACgkQhtxQDvus
FVTBLxAAgo7FWiVCMD+wnMy3nceAV4U9OZljumEKfvt7g27oMN9i/AWaWwzJ+wsF
zxMK9p0u8wCTG7PQIGbC4N1fRAaapc1w3TzDhFK4Uf5kqaoddqiFMf4IeRFmnYSF
6GDbxgxdZkvyGpYJ31Uo750UmC1Q9zmNoh17Nrs2wN12FLFlmiABokklzOuwKBxI
DLzdgbuTuBxGAv/6zSBmye391C0kf+ky6haOpyzHKToBnYJv/LyaGQGEGckfsnct
uKnigu7MjU+1l0LhftAT52UoFRR6SeyguqYbq4JAFvNJd66eNpZZpyJnGX8y7hJN
V8y4cvgeJBZl1ssVQVNA5sJSb9NCyPx0svwZqzJ3kdMWd8t8n2l4FrJSdPnjvCbz
HRwSzoMmSrQJZp+2LJATSHsHZz5ArBp+o79fLjWf/1aYO92B6MkZvdiL45ATl9uF
XOQJITdHI1rFWxXmu9rzUcgZx81LEf5jVP+L3GBrOIpPa6R0SQgXLInflVxoB+/l
SaJRp5CKjBstOvswJlA0dNyMNSn07qNjiR67Gvh7UXGvIa8w0Njv41ZYms2zvErd
6EIM1SuzrkByrq3zn+AiCNzTATgIJgU+JDq7doKwqCzBW9oBshZ9U3KKDdElqLv9
2UjMpP5dIkdbjh9vHZ+BwutuSjDwkkJrk40deck+9Q3/ZkNPvug=
=+DV0
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance optimized
for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers
* tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: enable acpi support in RCPM driver
Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
tty: serial: ucc_uart: replace qe_io{read,write}* wrappers by generic io{read,write}*
soc: fsl: qe: replace qe_io{read,write}* wrappers by generic io{read,write}*
soc: fsl: guts: fix comment syntax in file
soc: fsl: guts: remove unneeded semicolon
soc: fsl: qe: Use DEFINE_SPINLOCK() for spinlock
soc: fsl: qbman: Delete useless kfree code
soc: fsl: qbman: Ensure device cleanup is run for kexec
Link: https://lore.kernel.org/r/20210409205719.27927-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This improves the Qualcomm SCM driver logic related to detecting the
calling convention, in particular on SC7180, and fixes a few small
issues in the same.
It introduces additonal sanity checks of the size of loaded segments in
the MDT loader and adds a missing error in the return path of
pdr_register_listener().
It makes it possible to specify the OEM specific firmware path in the
wcn36xx control (and WiFi) driver.
Lastly it adds a missing path specifier in the MAINTAINERS' entry and
fixes a bunch of kerneldoc issues in various drivers.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBwfnAbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F1CEP/R8ZxRwzXdKUpS+SCzLp
lJoqE+bhNt7IbK4hVfw1poA+UW8iQN0xkHS/JIbAvEBefRxJ/6dikrli/6oqQM9u
0kIpWHp30QyFOt+i8VEzhLZrNZblFmlHu+AtYjicoGftNdsF1p6TKESzoEUXM+Bo
/m0c9Wuf00CQl+6E6/GrV04MnAJXehWum+c1BsD9drs1Er9A2BxHo/8KQmrzmagl
cOsEh1k1PDSUhUSbbCFSqzGweShXY1R9K+UKz0KKJPW3/Wduzd+wJ6eXCiDJEZvY
yq7Yim7hS3C8JjSoWipaNkUZFlnwgJs3BZnYcTPKv8esX+XxGUAp/fAE2/qizswv
D6rKc876xyHMcFvh+9eXPYnXQgE3vg5Jt0Yqf/oc8iuvYncqYtf+SdrLvD5o8jEY
GW7gIxeGRQ4cnQWoArj33usevxqLdiPp2tAliztxfEjUhNDJwm2MWPJzLgUW0BJ8
grEl5kfkU6Q90F3NW5gObq1uVFbfF0nTxeyEbC1mIJ8/78xINh4SLnSy8fmcjNT4
ZfPCX6sb45baYqpe7N5AeuXWXDMkl+pjQXU5UGyp2ZLDisCQlXmo1fj6hOk6tL5P
uC1UYYaZaBBMpqEyCDyhk1Xe0POZSlHjx2nVhDL0JrZic7KbjlRhz9/RNO+Wonhs
ypQ51qoAXeJu1PISHGmhRWwA
=C6IS
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
More Qualcomm driver updates for 5.13
This improves the Qualcomm SCM driver logic related to detecting the
calling convention, in particular on SC7180, and fixes a few small
issues in the same.
It introduces additonal sanity checks of the size of loaded segments in
the MDT loader and adds a missing error in the return path of
pdr_register_listener().
It makes it possible to specify the OEM specific firmware path in the
wcn36xx control (and WiFi) driver.
Lastly it adds a missing path specifier in the MAINTAINERS' entry and
fixes a bunch of kerneldoc issues in various drivers.
* tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: mdt_loader: Detect truncated read of segments
soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
soc: qcom: pdr: Fix error return code in pdr_register_listener
firmware: qcom_scm: Fix kernel-doc function names to match
firmware: qcom_scm: Suppress sysfs bind attributes
firmware: qcom_scm: Workaround lack of "is available" call on SC7180
firmware: qcom_scm: Reduce locking section for __get_convention()
firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
soc: qcom: wcnss_ctrl: Allow reading firmware-name from DT
soc: qcom: wcnss_ctrl: Introduce local variable "dev"
dt-bindings: soc: qcom: wcnss: Add firmware-name property
soc: qcom: address kernel-doc warnings
MAINTAINERS: add another entry for ARM/QUALCOMM SUPPORT
Link: https://lore.kernel.org/r/20210409162001.775851-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These patches fix the ASPEED LPC bindings and LPC-related device drivers
so in the future the KCS driver can properly use the hardware.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmBv7HAACgkQa3ZZB4FH
cJ68Gg/+KQns6SXdsCxu1sXctZmaSzmOXgGNnwLqCDu6TRFjtsUQ2CaIOFOhuUjJ
A75StHMPFqHmcciWBL5eYHH+1CwBqs3b6ZXRbXFvVq0PE709epGA1n0egzoXiVEF
nNjUM/74JY/4r2iEZu2cFRaGJKYJYPzn8cfTMvxdDZhmflgWtXxV7MejBr0r+JpF
3GevztzscuI8gmxH2VVs9BvvNZxp748oG3WNfHpyWUDG6kEK2/r4Y7BEmB+q6E0a
CpbMINHOT6e/Mc55EpK3+eby+OGs9BN8yzJaU9oBSPxUirDRPVIeu1NShpjukQ7F
wfO9OY7RR0mySmZp6u4Qj4FKnkUYoE0pzxslVoVAS68AiPy2Z6UB2nLpu+UlRQhf
zlycloD5Tywn3hkA5uaT0FPu2zV/Kbla4MJaOT8BIGfTC+/X2andYIUQN9dbjRhC
OyWpzYWRJar/nOLx6ergXtcPft2dn9g0KqPNRF4s414JFmrHLIjmdCXQiPePDFGQ
pI+8bTv614wGPeTE1zAD7sMrFSv+FEU8a6ZdXwMUHKrV8E8jgKqT40+eyZ6SHGOZ
u+ATncxGcOQTLk9/JiMFOLVlj0oUIGf4E6n+zldASwTPuFyzKlNFRSsmPxHkKF3/
FwE/cSXCtU83Vrr3e3zhV39Pz7hkMPbeQpqLmFiMCMbs3N+Oq0o=
=U2zj
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/drivers
ASPEED LPC updates for 5.13
These patches fix the ASPEED LPC bindings and LPC-related device drivers
so in the future the KCS driver can properly use the hardware.
* tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
soc: aspeed: Adapt to new LPC device tree layout
pinctrl: aspeed-g5: Adapt to new LPC device tree layout
ipmi: kcs: aspeed: Adapt to new LPC DTS layout
ARM: dts: Remove LPC BMC and Host partitions
dt-bindings: aspeed-lpc: Remove LPC partitioning
Link: https://lore.kernel.org/r/CACPK8Xcb12LsVr7CUaXXjQskKbVjb7x+jgueG1Hik-kBPWtDSg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210319062752.145730-5-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
This patch enables ACPI support in RCPM driver.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This introduces SC7280 and SM8350 support in the RPMH power-domain
driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
SMEM, QMI and EBI2 drivers.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp5LYbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FHBQP/08HEI7gyfrNkGHq0cMr
F0tDl0wUyh06meEnBT4G9O2Pzuu2vPUxUACEW1EwB61Qo/0Rin9pscSceNLYa7ul
BSevZKYbMu4yTylTkSTZIy9bIuTmOlcc7krk4MDpl/c8HzuGgILhm9nSTTv7pYfE
JLtoUdoZS77ToSsv8WVaAinslQKTA4j/YoZ6EKDcTxWw9L6IzkGphfo3p/8Bs3l/
y4iU87INu+oiINJF5TeLncB5VEBGQIDzBwIf/4R67bZ+lQiRVfPFmg44y/R7NK1f
NwJB8Ty2oCV1on62yJ93S5YhecJjzedhcIzyn5hsULKUHQT89fneFxVngK2LHTrC
l+aZLpH6MwC+9qAce5utmlfFFRKpzMtqnXnpexq8fT+EXt4wAnwDacOPcHDDblcS
zskyTGPGvyt54m3UwS9DOJy3Ed9NJL2D1Xmfonx94H9G8hkFyVBEOMXuegh0Sgtf
eYGjrYew3ajGiQeC5SaGMkd80CrLN4uUizPt9O6yHETeoQKzE4EluFkaLVlvgbEj
eauNu6uSiN/ESUc2LvkKN4pmPBspkTh/CyDArV+15IlE/AcSNgSeylxF1lXzo335
Msl0+3tKpW+i6AASdD8b74f6kV72VdaVflrI3rmacSwCkWP1bvO/1cWBeFzs0S+W
FtpgLl7nyng7tdMo/9FbeKkE
=sgiW
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 5.13
This introduces SC7280 and SM8350 support in the RPMH power-domain
driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
SMEM, QMI and EBI2 drivers.
* tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
bus: qcom: Put child node before return
dt-bindings: firmware: scm: Add sc7280 support
soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition
soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler
soc: qcom: rpmh-rsc: Remove tcs_is_free() API
soc: qcom: smem: Update max processor count
soc: qcom: aoss: Add AOSS QMP support for SC7280
dt-bindings: soc: qcom: aoss: Add SC7280 compatible
soc: qcom: llcc: Add configuration data for SC7280
dt-bindings: arm: msm: Add LLCC for SC7280
soc: qcom: Fix typos in the file qmi_encdec.c
soc: qcom: rpmhpd: Add sc7280 powerdomains
dt-bindings: power: rpmpd: Add sc7280 to rpmpd binding
soc: qcom: rpmhpd: Add SM8350 power domains
dt-bindings: power: Add rpm power domain bindings for SM8350
Link: https://lore.kernel.org/r/20210404164951.713045-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This bypasses the, recently introduced, interconnect handling in the
GENI (serial engine) driver when running off ACPI, as this causes the
GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
touchpad.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp2iQbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F7JoQAN7Tp3EFeaqKVWD+N6Jf
w0qobCdnJQ2HI34eH8TQUr6YFMzK0a/3y15uHEELlf4/f4g72myFsyvzV/ahGrv4
SPHw/Su8f4le+5NUu9i8JmZEBTHhO/xfaJ9tc7SYjD2ivra62ZocV9nrDotxFPW8
4LdfXAnWVIEG8GDPoAYfHaTOFPbP3znwaaETFCA6RPPqLBkGYNcs6StVgJ5SqRTG
NrQp87ixyHtSzhIDoLbGLEY16s3ijUgrysK4Toes7Y4U9+RN2AK3LsvcF88/GQPY
xKQCaHVNOLE8I4hZUieakVjmPxkKt1bfsN6TuicFN9Wjl13LheBVfcAk6c6cEACM
hd1/jnv1U5Bi3ACihLBae8NDX4XInqo+YROMoEGFT94cfL4S53I/J8cNEvwHHDZ1
fc8ZHhrCbJH9BxkDwTAON2pVLZnJCyufPuAfVuSWVGVq8JVQcsRt/7HO64vU3xvO
x0ktm8fAi3z8ySB3HmFy9rpY/00OkLF/uhyIj56EHv3hp0erenEE+mT8ORPYadwe
A41fRijlepbUXfrfIjjc3lK6SoA/99Cr8QVRDiYfZQJvmLumTgtUgF3ZpS9RuINV
NH+ltvISGSj94zDK2v8QyJCzbGTVoTTRGfbZ5qXjefGpWDselFnIaa3VQswZoFaZ
fsnd5d/TUtD0w/bi0qMuYbsO
=w0Zm
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm fix for 5.12
This bypasses the, recently introduced, interconnect handling in the
GENI (serial engine) driver when running off ACPI, as this causes the
GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
touchpad.
* tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: geni: shield geni_icc_get() for ACPI boot
Link: https://lore.kernel.org/r/20210404155604.712236-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Given that no validation of how much data the firmware loader read in
for a given segment truncated segment files would best case result in a
hash verification failure, without any indication of what went wrong.
Improve this by validating that the firmware loader did return the
amount of data requested.
Fixes: 445c2410a4 ("soc: qcom: mdt_loader: Use request_firmware_into_buf()")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107232526.716989-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The code validates that segments of p_memsz bytes of a segment will fit
in the provided memory region, but does not validate that p_filesz bytes
will, which means that an incorrectly crafted ELF header might write
beyond the provided memory region.
Fixes: 051fb70fd4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107233119.717173-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Most of the changes again are devicetree fixes, but there are also five
trivial build fixes for issues I found when test building with gcc-11 or
when running 'make W=1', and some OMAP platform specific code fixups.
Broadcom
- One revert for a Raspberry pi interrupt controller change that
caused a regression.
TI OMAP:
- Remove unused duplicate sha2md5_fck clock node that can race with the
OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
- Add aliases for omap4/5 mmc to put the slots back into the right
order again
- Fix typo for bionic voltage controllers that accidentally use mpu
for all instances instead of mpu, core and iva
- Fix random hangs for droid4 caused by missing fix from TI Android
kernel tree to do a dummy smc call on cpuidle wakeup path
NXP i.MX:
- Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
SD, by adding missing vmmc supply for SD interfaces.
- Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.
Marvell mvebu:
- Fix storm interrupt on Turris Omnia
- Enable hardware buffer management as it should be
Build fixes for PXA, Freescale, Marvell, OMAP1 an Keystone.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmBs0OgACgkQYKtH/8kJ
UifdEBAAiD3JebS8a1jsgL+/va/ptOuBZP2l4sCH3P/bczsNKeAn+BvwAy4jNJ4b
C55ZFnz6tX37CGY7e1Pe7LC8WhVd1LGfCm/gSreKUTkETZd/87PoR1xM4GxbhmBQ
8HNJOVDBSes6tHgWTAgQ7rHGQQ71JoRYc9FJPOH2JDsk8SaeL8Z+Bjay3O3nlBQw
RU0zoWv/khkdRvzt4oDTmW6pPDQh5c9twv2ORZM92+tXhSeF2AAY08GdAAmiZL5W
Lq30YozGSJHPcIYSN+jSWPJNtzmrF3oZVTqDzqTN/aIVoH+8MFZHSmCd3iM1RWkT
wkanNiqF7CRYAdLmC00YTToJUQxsbOYugfUMWYC04VocVbeEDAhnITFVF1zrJLZ4
q4E/S5WSZjLPUsiDhSK+d0S2bFVrEyQUaDaFWrC6Aet5wA6pI/8X0Q3ZSMV7jzq+
NkZYuA2oKoW0vwnH+7432/1g33CpCxKRVr/zBhesjCpB3Ymj0OWfqGeHA2fyjFQq
fNvUnG6LyXE+NBgIfgZTGbBr1gCT/XHqd0GcYrBy4v0L3x8qJSh1ClA0qlpWr+Zl
mY5jMC6MrGGuHXEhqIoS38mO0RTyx9i2iDjge2CrAMmRxdVR453Z4VIbDnSwGDAe
K8lASQKHEyvRzdmJDVhaesHqwU9BDtWULY8Q2+3jKqv3wwf6d0I=
=YY35
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Most of the changes again are devicetree fixes, but there are also
five trivial build fixes for issues I found when test building with
gcc-11 or when running 'make W=1', and some OMAP platform specific
code fixups.
Broadcom:
- One revert for a Raspberry pi interrupt controller change that
caused a regression.
TI OMAP:
- Remove unused duplicate sha2md5_fck clock node that can race with
the OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
- Add aliases for omap4/5 mmc to put the slots back into the right
order again
- Fix typo for bionic voltage controllers that accidentally use mpu
for all instances instead of mpu, core and iva
- Fix random hangs for droid4 caused by missing fix from TI Android
kernel tree to do a dummy smc call on cpuidle wakeup path
NXP i.MX:
- Fix a system failure on imx6qdl-phytec-pfla02 board when booting
from SD, by adding missing vmmc supply for SD interfaces.
- Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2
definition.
Marvell mvebu:
- Fix storm interrupt on Turris Omnia
- Enable hardware buffer management as it should be
... and build fixes for PXA, Freescale, Marvell, OMAP1 and Keystone"
* tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: turris-omnia: configure LED[2]/INTn pin as interrupt pin
ARM: dts: turris-omnia: fix hardware buffer management
Revert "arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts"
ARM: mvebu: avoid clang -Wtautological-constant warning
ARM: pxa: mainstone: avoid -Woverride-init warning
ARM: omap1: fix building with clang IAS
soc/fsl: qbman: fix conflicting alignment attributes
ARM: keystone: fix integer overflow warning
ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
ARM: OMAP4: PM: update ROM return address for OSWR and OFF
ARM: OMAP4: Fix PMIC voltage domains for bionic
ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"
Instead of a separate call to enable all devices from the list, just
enable the liodn once the device is attached to the iommu domain.
This also remove the DOMAIN_ATTR_FSL_PAMU_ENABLE iommu_attr.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-11-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Add a fsl_pamu_configure_l1_stash API that qman_portal can call directly
instead of indirecting through the iommu attr API.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-8-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The only thing that fsl_pamu_window_enable does for the current caller
is to fill in the prot value in the only dma_window structure, and to
propagate a few values from the iommu_domain_geometry struture into the
dma_window. Remove the dma_window entirely, hardcode the prot value and
otherwise use the iommu_domain_geometry structure instead.
Remove the now unused ->domain_window_enable iommu method.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-7-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The only domains allocated forces use of a single window. Remove all
the code related to multiple window support, as well as the need for
qman_portal to force a single window.
Remove the now unused DOMAIN_ATTR_WINDOWS iommu_attr.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-6-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The default geometry is the same as the one set by qman_port given
that FSL_PAMU depends on having 64-bit physical and thus DMA addresses.
Remove the support to update the geometry and remove the now pointless
geom_size field.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-4-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Commit 6ac9b61786 ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.
But as ioread/iowrite accessors are now equivalent since
commit 894fa235eb ("powerpc: inline iomap accessors"),
use them in order to allow removal of the qe specific ones.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Eliminate the following coccicheck warning:
./drivers/soc/fsl/guts.c:120:2-3: Unneeded semicolon
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The parameter of kfree function is NULL, so kfree code is useless, delete it.
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Make sure that the QBMan device cleanup routines are executed
when the device was previously initialized. This is needed for
kexec since the device will keep it's state from the previous
kernel that was executing.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Add routing table for DSI on MT8167 SoC. The registers are mostly
incompatible with the current defines, so new one for MT8167 are added.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The WLAN NV firmware blob differs between platforms, and possibly
devices, so add support in the wcnss_ctrl driver for reading the path of
this file from DT in order to allow these files to live in a generic
file system (or linux-firmware).
The new property is optional and the code falls back to the old filename
if the property isn't specified.
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Link: https://lore.kernel.org/r/20210312003318.3273536-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The header file <linux/errno.h> is already included above and can be
removed here.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Here is a single serial driver fix for 5.12-rc6. Is is a revert of a
change that showed up in 5.9 that has been reported to cause problems.
It has been in linux-next for a while with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYGhHew8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ykyOQCgwM7aKSHU9MuRiyU8jVk1qEEwfHgAn3YcQ6bY
2IWKKJ4MUo2Iks/+2HS7
=oGYE
-----END PGP SIGNATURE-----
Merge tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull serial driver fix from Greg KH:
"Here is a single serial driver fix for 5.12-rc6. Is is a revert of a
change that showed up in 5.9 that has been reported to cause problems.
It has been in linux-next for a while with no reported issues"
* tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
soc: qcom-geni-se: Cleanup the code to remove proxy votes
MMSYS:
- use per SoC array to describe the possible routing
- add support for MT8183
Power management domains:
- fix the case of a domain fails to get added
- add names for each power domain to make debugging easier
PMIC wrapper:
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBl0JgXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7R2BAArIiOQfH2+Ua71gQtPSoss4SX
1+j7pqfTAzHsLILC7SldGR7uBjUz9KjvuHab6lrZ5SMn2A6vF8IPEpAH0vJUPrq/
PACXese3VVlpDb3JjxcMSbFcuRW/f7Jptt1Kjss7IpwVYXgPWy/prWQdNIvX8uTn
15wa7JwljXsMjqBJdUYvBOYHDqyTuvqXPjGkwKTxKKRK843qUZ1ZT0lr0yux0p4R
83xh0MdqPNMzV02vNISd9fVJ4uL3Vv/k4vQXv5LOE1wnTgWKq4QPGvRxz8XOqcu9
y6EodyxMi2igTnnMXrGJTowB3j9j0FMWWKCTj8b8UmESbrk8VxtZjV4YTUJFlwks
EVke23hsiqQA4i4NWw+zduB9KCHRBqemt5Z20uGIEXj2I9dvUw94+ScTOkYsNE8h
B+wsFLQgPbD4wrzfs+GkX30c2D0uV8PLDtiQFmszbGHCslvXhwmdhp9wyOkA748L
JyZzQhkJUyq9rCDwQtsKfmdLKTfj0GDOEuzjInI22WgcZiU8n23/SKaS+dYQH6+E
Piz1MAzQGZuqQ2Xnp+2GyBrIZutyjuID0i3KbjuamJ6DHCiwq0u8t/fqWwFNB4oe
YlCE4Gh7IP0/8q0t1uPNyO4EC1Nr9tiq6ahUUG5w4RgzhdVwqBf9IcumohLHEKfH
tz3S2E92w09h+z/TpKY=
=o2Cq
-----END PGP SIGNATURE-----
Merge tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
- add MT8183 support to mutex driver
MMSYS:
- use per SoC array to describe the possible routing
- add support for MT8183
Power management domains:
- fix the case of a domain fails to get added
- add names for each power domain to make debugging easier
PMIC wrapper:
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873
* tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pm-domains: Add a power domain names for mt8167
soc: mediatek: pm-domains: Add a power domain names for mt8192
soc: mediatek: pm-domains: Add a power domain names for mt8183
soc: mediatek: pm-domains: Add a meaningful power domain name
soc: mediatek: Make symbol 'mtk_mutex_driver' static
soc: mediatek: mmsys: Add mt8183 mmsys routing table
soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
soc: mediatek: pwrap: add arbiter capability
soc: mediatek: pwrap: use BIT() macro
soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()
soc: mediatek: mmsys: Use an array for setting the routing registers
soc: mediatek: mmsys: Create struct mtk_mmsys to store context data
soc: mediatek: add mtk mutex support for MT8183
Link: https://lore.kernel.org/r/c47d4bdd-9e05-c0de-bacb-3a262fed936d@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmBl/fETHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTEaEACrlBYT0uNJIQiBBekhSz3N9Mvy/zb+
l9NEDbhssOuwTzdNRicc+0tmzrerQ3/s4VSYYq6OQq3c84JSNLqMtZYCW2eN3qhd
v3GecBLJQrnFPSeanTeyJRPy6hxU9M/ffrX+QvQHp9TaK6suTGFnOF52tZbEEHmA
Xo5fnA6rEVxZQOs/yZ+cZSPI3olvHmmhfkBOvcdzYhsBclHP/vgkrpQezljV4Y0m
HSMHUmkgKVkLjYa3xzTBmxelP+K4CbhwIbnip70h1sEmB9/XO0Xgx7gKecFoGhcp
USllAkmTwi2NOLZHpwoZpSdEXXvUlGwiGDSntBmlTfdQ4+fzweInCfja6FfVxH5I
QjfJBhfjrB+dU7TtdTFmK3UQWst1IswMTpNPpjdqJxqqNa3T9fKKGu9bvNX3zcqc
XzH7kYR+8gvjvrA5dbBilFgge7MfcjCFZWX+F1J0GnwPChQJiGA27F9VNsRLW/Gu
FDanr3AhOSMacQrq9iDPm4rhuWpn0VaUdxHRV0LknYpQi8gMT0B+rL9YRI1hjFrf
3ni/ZcTlFJTqGLcD1pStmg8/liKkZ79m4UR4HTIMio/bc934EFnxtG6qxRtMVd0v
nH9cgRqkl0ilmLCTVljyyvEIUtEtS5lYhdR+7Ux8Bhigm2J/G4/QRHFLHgyte1H3
lhcpP63iKIY1Aw==
=yqQ7
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.13-rc1
Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.
* tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Print out domain name when reset fails to acquire
soc/tegra: pmc: Ensure that clock rates aren't too high
soc/tegra: pmc: Fix completion of power-gate toggling
soc/tegra: pmc: Fix imbalanced clock disabling in error code path
soc/tegra: regulators: Fix locking up when voltage-spread is out of range
soc/tegra: pmc: Provide USB sleepwalk register map
Link: https://lore.kernel.org/r/20210401172622.3352990-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmBj4/MUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7SzwgAp87KmLQiV43FSrMfWCiW7+W2KkKI
grCf702h9HzqjJQ8F+Ha6Fy+sNuK1PU3idERm8DOHULSAu7Z3oyzku16r8iU2sYm
wfFZNUiwQi4L+ldgaLmAgqHuDJThS4vclk5TxS8WwGa4q5Wqm5Rle8Lj76/YFDFq
vwILI/pFUnXSRC7lXb8mhcJ8+gytWgh9Vle6ZWe6roCfvGKnwTsK2n7lq5FUFvV+
7a5mRtjTigXeVYWdNan98W3M9B0pKZSOOrOiBhRxgB2wI3f+4SIQHj/ojc2nMsXm
eQKPLOm+1BMSRrLz6lqioUcmP72O/lMB3m+Z20fiyPdsmE5qoAdpOW1qRg==
=75HC
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 5.13:
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
* tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: scu-pd: add missed ADC1 pd
firmware: imx: scu-pd: Update comments for single global power domain
firmware: imx: scu-pd: do not power off console domain
soc: imx: add i.MX51/i.MX53 unique id support
Link: https://lore.kernel.org/r/20210331041019.31345-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
changes for 5.13, please pull the following:
- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
the code to support resetting the 63138 SATA controller
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmBdAFUACgkQh9CWnEQH
BwSGZhAAoUIKar0bR9ICESdeifnNmIa2sHYdWAWg153EjRDDk9Eypc18qX3D/Q2P
ohK4dpsnU2cPQ5/kl5T0VlI3ITAk3Ng3zPWsLJXImBJkajS0qAwUuJZ939Z7QqeE
WR5d+BEt7zEfq+Uj0k8lVX+TqM9T902X+AWbwzqrrt4Zk33ZHfgbFlKetW0AZAzd
cZgzS5AESsZRMSlgmcsUdY93y3cILPWRp6WoPnSiSNa/qRCPGIL1WXLTSlekirxE
lxCqq+DF7KZWGHuhxObn0VQSTmK+e0lddzjPs6vxtuI4g64JqNKKZbwkNGrZelyl
+VUkgEVtXh3D3of6a3Om+vYMBcM3kL9XLYYO0415GKiVTnhhGk++RblmbHbLdt5b
udxMc8ni1E+IvY5gEefcJPB5qnnMyFbwijDqj8MHhr0NEeL0H38SJx6621nZRkJE
zzYZxQeDE7ouZ1etFHakg2q0MFyTaKXYk9l/b4KMaKpGHHMp+BhyK3arh///G1uw
b6n1Grzp3VdscvSsY3tkO66aXlkXWmcYq5rroOv4PXR/xLLS0MZ3oeIsiRNOi0IA
0QJfVxV3yWUA5/NDEMpYD0iWW+K4S6cOcRSKQUNyTUlGbXNhd93XbAUMypMp5HP0
3ZhNwde24FqNKCeDGRqIw8EvrK7194pz4bN96bTtBxgIVrJd2XI=
=M+kT
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:
- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
the code to support resetting the 63138 SATA controller
* tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: bcm-pmb: add BCM63138 SATA support
dt-bindings: power: bcm-pmb: add BCM63138 binding
Link: https://lore.kernel.org/r/20210330184006.1451315-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.
These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:
- ti-sysc needs iorange check improved when the interconnect target module
has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as we
now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of using
builtin_platform_driver_probe for deferred probe to work
There are also few minor non-urgent fixes:
- soc init code pdata_quirks_init_clocks should be static
- ti-sysc has few unneeded semiconon typos
- ti-sysc can use kzalloc instead of kcalloc for a single element
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBhemURHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPieBAA00Cpfk0s+vC4KASrq8pb2T9y14GOOwRe
f8z9p8CDBhDtuhdJSVq//gkv3kIxUDfEN5LkOpsUWoGvbidiX6JlWcSvsA/27paV
fzKl4xEqlqOkrZ38qGlJIKXBEvEW8yTaWXpkNnv9v83+kl3keU6Herx0RzqlCJCd
iF7/CvKhOh0IyuaDHLjE1M+KVnBh1aKSfeLXKOQakOgdeZC+dE6eyaY700iBbBmu
Za/Ug4XoZUJ8bn6i3S6wa3p3MhUOlXGoW4zFCDC2GeK+Mqf2iyIEbotMDsNSncL2
uPa/CIiu4FjFuhlwLh23nXciGndEWYR7DCZRntwGs5ZJNNXqFYaE3hNKJ/WsVNj9
lx5M5CqY5mFjJ7WMySPp7YCi3D2W7fyEcnwUl4Ptah1inYuNgF31CXWy/Xy6VbJN
yMDFM3EBlP3DXG7t8I9O4lr8H9PzQNvJ7OdFaNLZq9Qp+wzRZ4uW2jVpriB9pSP+
TmOmjlZI3emY852KnWeTqerERB/THmpb7J71Md9KbztXIT5LSBknzmqGW57ie6EC
EM3ZktjV82dYzv7/OGEJVcctSVSB50tNZoCXwnVpzXagSOZYh9IiRMjPd/SMmJgt
BZINrpsQpsLk6w5zVWF0zfhG7DFDJ862tyGqJZzAJhlCEC+av0Xs90+jl0X0n8uE
fFq1RUxR7rU=
=lf62
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers
Driver changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.
These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:
- ti-sysc needs iorange check improved when the interconnect target module
has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as we
now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of using
builtin_platform_driver_probe for deferred probe to work
There are also few minor non-urgent fixes:
- soc init code pdata_quirks_init_clocks should be static
- ti-sysc has few unneeded semiconon typos
- ti-sysc can use kzalloc instead of kcalloc for a single element
* tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Use kzalloc for allocating only one thing
bus: ti-sysc: remove unneeded semicolon
ARM: OMAP2+: Make symbol 'pdata_quirks_init_clocks' static
PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
clk: ti: omap5: Add missing gpmc and ocmc clkctrl
soc: ti: omap-prm: Allow hardware supported retention when idle
ARM: OMAP2+: Init both prm and prcm nodes early for clocks
bus: ti-sysc: Check for old incomplete dtb
bus: ti-sysc: Detect more modules for debugging
bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first
bus: ti-sysc: Fix initializing module_pa for modules without sysc register
ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
bus: ti-sysc: Fix warning on unbind if reset is not deasserted
ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
ARM: dts: am33xx: add aliases for mmc interfaces
bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEErOkkGDHCg2EbPcGjlfZmHno8x/4FAmBY1LwACgkQlfZmHno8
x/6PjwgAuB0fgmN08RpGdyQWpsw7XUd56/g/92BtQ/p87khI9VP3ay8q+1AYGSxL
jMhSpTu6FOyhyc3y129dtoJDUslsUh5vrXqz3S1niEyYf3CHLjcyc/JPky5/HWJN
HlVwOowqLBKxVoX6AWGqRWc/axxtm9uMWeK2yiI4LYgDvq7DWhENSp4xwtffLt4q
Tg5dcqw5PbCWA2npkabnZjhLuDt1XRaLb455yn9P8tCRiqwf5fQ/8zjfcJLNhYTV
Fy/yrXyBg8RnUOlFviSbtVG0ey1BUdWkxbBd0Vxrh9iw/z+EVQdcN0DZGsKcWsXy
bK7R2sdCHmV9hjgfc4+mLPKwWhyApQ==
=bA9X
-----END PGP SIGNATURE-----
Merge tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi into arm/drivers
Raspberry Pi driver updates for v5.13:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
* tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi:
pwm: Add Raspberry Pi Firmware based PWM bus
dt-bindings: pwm: Add binding for RPi firmware PWM bus
input: raspberrypi-ts: Release firmware handle when not needed
staging: vchiq: Release firmware handle on unbind
soc: bcm: raspberrypi-power: Release firmware handle on unbind
reset: raspberrypi: Release firmware handle on unbind
gpio: raspberrypi-exp: Release firmware handle on unbind
clk: bcm: rpi: Release firmware handle on unbind
firmware: raspberrypi: Introduce devm_rpi_firmware_get()
firmware: raspberrypi: Keep count of all consumers
Link: https://lore.kernel.org/r/20210322174232.29549-1-nsaenz@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When building with W=1, gcc points out that the __packed attribute
on struct qm_eqcr_entry conflicts with the 8-byte alignment
attribute on struct qm_fd inside it:
drivers/soc/fsl/qbman/qman.c:189:1: error: alignment 1 of 'struct qm_eqcr_entry' is less than 8 [-Werror=packed-not-aligned]
I assume that the alignment attribute is the correct one, and
that qm_eqcr_entry cannot actually be unaligned in memory,
so add the same alignment on the outer struct.
Fixes: c535e923bb ("soc/fsl: Introduce DPAA 1.x QMan device driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210323131530.2619900-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the power domains names for the mt8167 SoC.
Fixes: 207f13b419 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the power domains names for the mt8192 SoC.
Fixes: a49d5e7a89 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:
debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
Fixes: eb9fa767fb ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.
[ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
[ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
[ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
...
Fixes: 59b644b01c ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The sparse tool complains as follows:
drivers/soc/mediatek/mtk-mutex.c:464:24: warning:
symbol 'mtk_mutex_driver' was not declared. Should it be static?
This symbol is not used outside of mtk-mutex.c, so this
commit marks it static.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210210075656.1096251-1-weiyongjun1@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt8183 has different routing registers than mt8173.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210330110423.3542163-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-5-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-3-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Adding one power domain in scpsys_add_subdomain is missing to assign an
error code when it fails. Fix that assigning an error code to 'ret',
this also fixes the follwowing smatch warning.
drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret'
Fixes: dd65030295 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Actually, setting the registers for routing, use multiple 'if-else' for different
routes, but this code would be more and more complicated while we
support more and more SoCs. Change that and use a table per SoC so the
code will be more portable and clear.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210317181711.795245-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Apart from the driver data, in order to extend the driver to support more
and more SoCs, we will need to store other configuration data. So, create
a mtk_mmsys struct to encapsulate all that information.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210317181711.795245-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This reverts commit 048eb908a1 ("soc: qcom-geni-se: Add interconnect
support to fix earlycon crash")
ICC core and platforms drivers supports sync_state feature, which
ensures that the default ICC BW votes from the bootloader is not
removed until all it's consumers are probes.
The proxy votes were needed in case other QUP child drivers
I2C, SPI probes before UART, they can turn off the QUP-CORE clock
which is shared resources for all QUP driver, this causes unclocked
access to HW from earlycon.
Given above support from ICC there is no longer need to maintain
proxy votes on QUP-CORE ICC node from QUP wrapper driver for early
console usecase, the default votes won't be removed until real
console is probed.
Cc: stable@vger.kernel.org
Fixes: 266cd33b59 ("interconnect: qcom: Ensure that the floor bandwidth value is enforced")
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210324101836.25272-2-rojay@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Print out domain name when reset fails to acquire for debugging purposes
and to make formatting of GENPD errors consistent in the driver.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Switch all clocks of a power domain to a safe rate which is suitable
for all possible voltages in order to ensure that hardware constraints
aren't violated when power domain state toggles.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.
The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".
The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.
Fixes: 783807436f ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit implements a register map which grants USB (UTMI and HSIC)
sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
is in PMC hardware block but USB PHY drivers have the best knowledge
of proper programming sequence.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
BCM63138 has SATA controller that needs to be powered up using PMB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:
- Fix ocp interconnect bus access error reporting for omap_l3_noc by
setting IRQF_NO_THREAD
- Fix changed mmc slot order regression by adding mmc aliases for am335x
- Fix dra7 reboot regression caused by invalid pcie reset map
- Fix smartreflex init regression caused by dropped legacy data
- Fix ti-sysc driver warning on unbind if reset is not deasserted
- Fix flakey reset deassert for dra7 iva
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBA7/IRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNVYBAAnQJ6JQWEXPjvAQSy3udNYugKxJtnaLSh
1S3oxTkkxk/WO0iTUAX/in3sueGLk8+rR3jupVYjnHczz/tPvO3xN/KztmeEjZwE
ELwSqoqPT5hIY6WioSeVbcUMiMqAid6amSv+bfkAEkdhhNKJ8ytWDSqSW9lGcPTe
KCQYU0KkAgnkqyu+t9kI4ErH3MQWJ7krsNsSV2KxWfqETWkHB6QbtGk6KESimSBu
j1MOZsn7WPTGuMZqA6h9Ylpvs5C+/Ub78eZT8O9w1OUgdCy2EUEKOPGCXZQq/m0E
q+hU0w3ZJswp/HEjnhlU31IWoauq0JyAV4d4d5yLtzBlcK9rIogQQO/FVPKyiz69
o4r+lpf8odJCtb74y2MiY3IdA+5gG5hlvdyjPnupUPZs3D1VGYWEY2lhubMlKQby
4ix6wZrzizi3YoixGTJAhpzJ3TFALpwS7jLWgNvgHEBcWGTEI+i0vp2HnrKcV5oD
CZeVGmfdnuXIz/dwxSHiHCyf7kBdFRoPCkmz4IYv1SEdy4nDIoUFppHe3JpOlbFn
2AC3yA//g5QoP1bZrKQ0OZS1tNMttqjo3yWRX4hCKmqvmCzqZ8Jffca9B3smdP2/
R9vQl9YY4vsrU0DgVcVhCtqAtIiMrNPQUAPwQr41f2eieF3XMgBranSDHOCODObh
lM44ehpD63U=
=sZVC
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.12-rc cycle
Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:
- Fix ocp interconnect bus access error reporting for omap_l3_noc by
setting IRQF_NO_THREAD
- Fix changed mmc slot order regression by adding mmc aliases for am335x
- Fix dra7 reboot regression caused by invalid pcie reset map
- Fix smartreflex init regression caused by dropped legacy data
- Fix ti-sysc driver warning on unbind if reset is not deasserted
- Fix flakey reset deassert for dra7 iva
* tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
bus: ti-sysc: Fix warning on unbind if reset is not deasserted
ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
ARM: dts: am33xx: add aliases for mmc interfaces
bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD
Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add mtk mutex support for MT8183 SoC.
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20210129092209.2584718-8-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM,
which can be used as SoC serial number. The same feature is already
implemented for i.MX6/i.MX7, so this complements support to earlier
SoCs.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the WARN_ON() into the if condition so the compiler can see that
the branch is unlikely() and possibly optimize it better.
Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-4-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
readl() returns a u32, and BITS_PER_LONG is different on 32-bit vs.
64-bit architectures. Let's loop over the possible bits set in that type
instead of looping over more bits than we ever may need to.
Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-3-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This API does very little. Let's replace all the callsites with the
normal operations that would be done on top of the bitmap that
tcs_in_use is. This simplifies and reduces the code size.
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-2-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Currently, GENI devices like i2c-qcom-geni fails to probe in ACPI boot,
if interconnect support is enabled. That's because interconnect driver
only supports DT right now. As interconnect is not necessarily required
for basic function of GENI devices, let's shield geni_icc_get() call,
and then all other ICC calls become nop due to NULL icc_path, so that
GENI devices keep working for ACPI boot.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210114112928.11368-1-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
When moving the l4 interconnect instances to probe with simple-pm-bus and
genpd, we will have l4per and core domains stop idling unless we configure
the domain bits to allow retention when idle.
As the TI SoCs have hardware autoidle capabilities, this is safe to do.
The domains will only enter retention on WFI when none of the devices on
the domain block autoidle in the hardware. This follows what we are
already currently doing.
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently, there are two drivers binding to the R-Mobile System
Controller (SYSC):
- The rmobile-sysc driver registers PM domains from a core_initcall(),
and does not use a platform driver,
- The optional rmobile-reset driver registers a reset handler, and
does use a platform driver.
As fw_devlink only considers devices, commit bab2d712ee ("PM:
domains: Mark fwnodes when their powerdomain is added/removed") works
only for PM Domain drivers where the DT node is a real device node, and
not for PM Domain drivers using a hierarchical representation inside a
subnode. Hence if fw_devlink is enabled, probing of on-chip devices
that are part of the SYSC PM domain is deferred until the optional
rmobile-reset driver has been bound. If the rmobile-reset driver is
not available, this will never happen, and thus lead to complete system
boot failures.
Fix this by explicitly marking the fwnode initialized.
Suggested-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210216123958.3180014-1-geert+renesas@glider.be
As of commit b587288001 ("ARM: shmobile: R-Mobile: Remove legacy
PM Domain code"), the R-Mobile System Controller driver no longer
handles the adding of platform devices to PM Domains, but delegates that
to the PM Domain core code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210205132141.1920137-1-geert+renesas@glider.be
Include:
- Update for Litex SoC controller to support wider width registers as
well as reset.
- Refactor SMP code to use device tree to define possible cpus.
- Updates build including generating vmlinux.bin
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmA5bOcACgkQw7McLV5m
J+QzlBAAl3kfYayGs286Ol5XDHQynFLkfUkGIrD8T+aHjjZS2DRJOAwoGbE+htv6
Nt6rXciHi9FNSgTf+nuTm/aQ8qSgFlsYB0AQBjLA193Og/3+G0ifQHcMoDKKRwj/
u/gqD9geGrsgVRAxqNQ18wBqX+rBPajq8+Mtjg3/ikJfkFc0GqugqevpIRNC7gN4
PmttAlOhecxFrJ1H4O4qqwctooPAIZJgRXYK8FiOBvyQXOkBmPmuodh1FhdR+jEZ
/My5PQ6vYgCaXh9FuckX2xf0B3iV5+T6FFoGMPTERjz0ntglHhFLA7P18o8gsaXT
vUQfT9gtoR9OckmUUxXyXlF3oZft4KouMwp04+WWaiOX52nWLXJ4Jh3GV9UbprJl
TwlnOkUtQOttRIuIkKnbzDITY91RLPjH5hlO2Suc2nKG6ExNeHNqt+btn7KoFRy9
BDqRZKppBcz2PUSfHo+kC9MDM6/D4ZYlTlprW9b/U7Aa2xfVWa5KkxamiCT6gVec
8/y+8VnOU4JGl+KcAr61FoBCHgWqAOVe3XLO3oyvdpVDChNtcFl7d2zYiqoS+9fc
HDR2Xivr+qClAUpFo+JeLKfISl0j/5lu1+4t7bA6fMunv3ObFHIJUKKCFBIugLu6
j9nM2F2fqDmvh6xGSFp6bP9PIa6Rmk79EA75R0F4HINU1rnnPKI=
=IW6A
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://github.com/openrisc/linux
Pull OpenRISC updates from Stafford Horne:
- Update for Litex SoC controller to support wider width registers as
well as reset.
- Refactor SMP code to use device tree to define possible cpus.
- Update build including generating vmlinux.bin
* tag 'for-linus' of git://github.com/openrisc/linux:
openrisc: Use devicetree to determine present cpus
drivers/soc/litex: Add restart handler
openrisc: add arch/openrisc/Kbuild
drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
drivers/soc/litex: s/LITEX_REG_SIZE/LITEX_SUBREG_ALIGN/g
drivers/soc/litex: separate MMIO from subregister offset calculation
drivers/soc/litex: move generic accessors to litex.h
openrisc: restart: Call common handlers before hanging
openrisc: Add vmlinux.bin target
I have a handful of new RISC-V related patches for this merge window:
* A check to ensure drivers are properly using uaccess. This isn't
manifesting with any of the drivers I'm currently using, but may catch
errors in new drivers.
* Some preliminary support for the FU740, along with the HiFive
Unleashed it will appear on.
* NUMA support for RISC-V, which involves making the arm64 code generic.
* Support for kasan on the vmalloc region.
* A handful of new drivers for the Kendryte K210, along with the DT
plumbing required to boot on a handful of K210-based boards.
* Support for allocating ASIDs.
* Preliminary support for kernels larger than 128MiB.
* Various other improvements to our KASAN support, including the
utilization of huge pages when allocating the KASAN regions.
We may have already found a bug with the KASAN_VMALLOC code, but it's
passing my tests. There's a fix in the works, but that will probably
miss the merge window.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmA4hXATHHBhbG1lckBk
YWJiZWx0LmNvbQAKCRAuExnzX7sYifryD/0SfXGOfj93Cxq7I7AYhhzCN7lJ5jvv
iEQScTlPqU9nfvYodo4EDq0fp+5LIPpTL/XBHtqVjzv0FqRNa28Ea0K7kO8HuXc4
BaUd0m/DqyB4Gfgm4qjc5bDneQ1ZYxVXprYERWNQ5Fj+tdWhaQGOW64N/TVodjjj
NgJtTqbIAcjJqjUtttM8TZN5U1TgwLo+KCqw3iYW12lV1YKBBuvrwvSdD6jnFdIQ
AzG/wRGZhxLoFxgBB/NEsZxDoSd6ztiwxLhS9lX4okZVsryyIdOE70Q/MflfiTlU
xE+AdxQXTMUiiqYSmHeDD6PDb57GT/K3hnjI1yP+lIZpbInsi29JKow1qjyYjfHl
9cSSKYCIXHL7jKU6pgt34G1O5N5+fgqHQhNbfKvlrQ2UPlfs/tWdKHpFIP/z9Jlr
0vCAou7NSEB9zZGqzO63uBLXoN8yfL8FT3uRnnRvoRpfpex5dQX2QqPLQ7327D7N
GUG31nd1PHTJPdxJ1cI4SO24PqPpWDWY9uaea+0jv7ivGClVadZPco/S3ZKloguT
lazYUvyA4oRrSAyln785Rd8vg4CinqTxMtIyZbRMbNkgzVQARi9a8rjvu4n9qms2
2wlXDFi8nR8B4ih5n79dSiiLM9ay9GJDxMcf9VxIxSAYZV2fJALnpK6gV2fzRBUe
+k/uv8BIsFmlwQ==
=CutX
-----END PGP SIGNATURE-----
Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
"A handful of new RISC-V related patches for this merge window:
- A check to ensure drivers are properly using uaccess. This isn't
manifesting with any of the drivers I'm currently using, but may
catch errors in new drivers.
- Some preliminary support for the FU740, along with the HiFive
Unleashed it will appear on.
- NUMA support for RISC-V, which involves making the arm64 code
generic.
- Support for kasan on the vmalloc region.
- A handful of new drivers for the Kendryte K210, along with the DT
plumbing required to boot on a handful of K210-based boards.
- Support for allocating ASIDs.
- Preliminary support for kernels larger than 128MiB.
- Various other improvements to our KASAN support, including the
utilization of huge pages when allocating the KASAN regions.
We may have already found a bug with the KASAN_VMALLOC code, but it's
passing my tests. There's a fix in the works, but that will probably
miss the merge window.
* tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits)
riscv: Improve kasan population by using hugepages when possible
riscv: Improve kasan population function
riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization
riscv: Improve kasan definitions
riscv: Get rid of MAX_EARLY_MAPPING_SIZE
soc: canaan: Sort the Makefile alphabetically
riscv: Disable KSAN_SANITIZE for vDSO
riscv: Remove unnecessary declaration
riscv: Add Canaan Kendryte K210 SD card defconfig
riscv: Update Canaan Kendryte K210 defconfig
riscv: Add Kendryte KD233 board device tree
riscv: Add SiPeed MAIXDUINO board device tree
riscv: Add SiPeed MAIX GO board device tree
riscv: Add SiPeed MAIX DOCK board device tree
riscv: Add SiPeed MAIX BiT board device tree
riscv: Update Canaan Kendryte K210 device tree
dt-bindings: add resets property to dw-apb-timer
dt-bindings: fix sifive gpio properties
dt-bindings: update sifive uart compatible string
dt-bindings: update sifive clint compatible string
...
The rest of these are alphabetically sorted, and leaving it this way
causes a merge conflict.
Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC.
This new driver with the compatible string "canaan,k210-clk" implements
support for the full clock structure of the K210 SoC. Since it is
required for the correct operation of the SoC, this driver is
selected by default for compilation when the SOC_CANAAN option is
selected.
With this change, the k210-sysctl driver is turned into a simple
platform driver which enables its power bus clock and triggers
populating its child nodes. The sysctl driver retains the SOC early
initialization code, but the implementation now relies on the new
function k210_clk_early_init() provided by the new clk-k210 driver.
The clock structure implemented and many of the coding ideas for the
driver come from the work by Sean Anderson on the K210 support for the
U-Boot project.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
clk drivers that dominate the diffstat because we add support for six SoCs from
that particular vendor. The other big change is the removal of various clk
drivers that are no longer used now that the kernel is dropping support for
those SoCs. Beyond that there's the usual non-critical fixes for existing
drivers and a good number of patches from Lee Jones that cleanup a bunch of W=1
enabled builds.
Removed Drivers:
- Remove efm32 clk driver
- Remove tango4 clk driver
- Remove zte zx clk driver
- Remove sirf prima2/atlast clk drivers
- Remove u300 clk driver
New Drivers:
- PLL support on MStar/SigmaStar ARMv7 SoCs
- CPU clks for Qualcomm SDX55
- GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
- GCC clks for Qualcomm SM8350
- GPU clks for Qualcomm SDM660/SDM630
Updates:
- Video clk fixups on Qualcomm SM8250
- Improvements for multimedia clks on Qualcomm MSM8998
- Fix many warnings with W=1 enabled builds under drivers/clk/
- Support crystal load capacitance for Versaclock VC5
- Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot
- Convert Xilinx VCU clk driver to a proper clk provider driver
- Expose Xilinx ZynqMP clk driver to more platforms
- Amlogic pll driver fixup
- Amlogic meson8b clock controller dt support clean up
- Remove mipi clk from the Amlogic axg clock controller
- New Rockchip rk3368 clock ids related to camera input
- Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk reparenting
- A series from Liu Ying that adds some SCU clocks support for i.MX8qxp
DC0/MIPI-LVDS subsystems
- A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ, and
clkout1/2 support for i.MX8MM/MN
- Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
- Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
- Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
(HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
(SYS-DMAC) clocks on Renesas R-Car V3U
- Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
- Allwinner H616 SoC clk support
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmAwFu8RHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSXiWQ/+LbMeJF5zSvK240XcWomyS+kmImqKPT6e
+l9Lt5xEPc+KzfMFHGAv+b6vMZCYevMIjBYCleiQ3oSh3sICFJmcCI8AkwQ62aQC
32VL0z8U956SxmlCcgIgHK3yKUDSZcNC9FtfGRIRzR6srx+Eu/8TK007RpAYn2bQ
PZYzOjiueSjOpjTRry2WGiCvpwRaJ7XrGj7P4rshO5eKpML1hYAv84vm12QrkoTR
j7B73x1bOYf4NUBGGzYH5kw6tDO4mZvR+0TdyjI2Yg+SvHSdkpv9pxgRSAFus6rv
sY/EjUCmCgp+y/MuMRvMA7vk6+THTqF9v4HqE0+izUI+dIoeDmsFVPr3UXGhqmtm
wmdsMuG/cMhj1rIFz+1aNXQjdbitwmTCyqbiyt+6fOH3NkrP4vQACzQlxeBS2n6o
E02lMwvMEoLcBMQyWLG+IWasIYWp7L2FlTOGOHxlAkZxJwNmynfaWYafoaIfOtBk
qtk3ZjNFo3av94AWuKieeWdOj3CY3LGhQqwVuJudOzfvcBu3UybCfceHIwXuIWk1
msUOh2RA7CTXn7XYPszwEbOlWugKvUc46rTfDBXsmgir7sIIgVXK65SO9xPWd7Bz
b7MDtrQwSTNYecxjI6uUPRrzKM6xSnL8I69lxaUWT1ScXFcOjqOgc6iwSfLNj4lh
FFCMY5koKMw=
=dDCt
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is all driver updates, the majority of which is a bunch of new
Qualcomm clk drivers that dominate the diffstat because we add support
for six SoCs from that particular vendor.
The other big change is the removal of various clk drivers that are no
longer used now that the kernel is dropping support for those SoCs.
Beyond that there's the usual non-critical fixes for existing drivers
and a good number of patches from Lee Jones that cleanup a bunch of
W=1 enabled builds.
Removed Drivers:
- Remove efm32 clk driver
- Remove tango4 clk driver
- Remove zte zx clk driver
- Remove sirf prima2/atlast clk drivers
- Remove u300 clk driver
New Drivers:
- PLL support on MStar/SigmaStar ARMv7 SoCs
- CPU clks for Qualcomm SDX55
- GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
- GCC clks for Qualcomm SM8350
- GPU clks for Qualcomm SDM660/SDM630
Updates:
- Video clk fixups on Qualcomm SM8250
- Improvements for multimedia clks on Qualcomm MSM8998
- Fix many warnings with W=1 enabled builds under drivers/clk/
- Support crystal load capacitance for Versaclock VC5
- Add a "skip recall" DT binding for Silicon Labs' si570 to avoid
glitches at boot
- Convert Xilinx VCU clk driver to a proper clk provider driver
- Expose Xilinx ZynqMP clk driver to more platforms
- Amlogic pll driver fixup
- Amlogic meson8b clock controller dt support clean up
- Remove mipi clk from the Amlogic axg clock controller
- New Rockchip rk3368 clock ids related to camera input
- Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk
reparenting
- A series from Liu Ying that adds some SCU clocks support for
i.MX8qxp DC0/MIPI-LVDS subsystems
- A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ,
and clkout1/2 support for i.MX8MM/MN
- Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
- Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
- Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
(HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
(SYS-DMAC) clocks on Renesas R-Car V3U
- Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
- Allwinner H616 SoC clk support"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (171 commits)
clk: mstar: msc313-mpll: Fix format specifier
clk: mstar: Allow MStar clk drivers to be compile tested
clk: qoriq: use macros to generate pll_mask
clk: qcom: Add Global Clock controller (GCC) driver for SC7280
dt-bindings: clock: Add SC7280 GCC clock binding
clk: qcom: rpmh: Add support for RPMH clocks on SC7280
dt-bindings: clock: Add RPMHCC bindings for SC7280
clk: qcom: gcc-sm8350: add gdsc
dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver
clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d
clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers
dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc
clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver
clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical
clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical
clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc
clk: qcom: gdsc: Implement NO_RET_PERIPH flag
clk: mstar: MStar/SigmaStar MPLL driver
...
Updates for SoC specific drivers include a few subsystems that
have their own maintainers but send them through the soc tree:
SCMI firmware:
- add support for a completion interrupt
Reset controllers:
- new driver for BCM4908
- new devm_reset_control_get_optional_exclusive_released()
function
Memory controllers:
- Renesas RZ/G2 support
- Tegra124 interconnect support
- Allow more drivers to be loadable modules
TEE/optee firmware:
- minor code cleanup
The other half of this is SoC specific drivers that do not
belong into any other subsystem, most of them living in
drivers/soc:
- Allwinner/sunxi power management work
- Allwinner H616 support
- ASpeed AST2600 system identification support
- AT91 SAMA7G5 SoC ID driver
- AT91 SoC driver cleanups
- Broadcom BCM4908 power management bus support
- Marvell mbus cleanups
- Mediatek MT8167 power domain support
- Qualcomm socinfo driver support for PMIC
- Qualcomm SoC identification for many more products
- TI Keystone driver cleanups for PRUSS and elsewhere
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApjS8ACgkQYKtH/8kJ
UidDyw/6ArE2RWN1qk3GJbQKdCYQdqH4Ig/Nc9LA977ul2BX/BohYoEGCoveH5cG
16FaYK8tYDCSoTfS0+w1Y8r6TgZKcV6GCM0xLSVtaihk2CO81sUfDFBIppJd614a
2lGx9DW7205ql4vGcQsK31ncr0hVviHG2e8lOEbFc9SkQpmYuLF1dxW2JK9oWGe2
rLXHKb20N7AvgN8Y6V0YAOGNpu9MOnx0TbTGn6SMgzIKMkpYaSs/oZY11d9jrn7Y
m/iIahRWzLFR/lYdrD7Jowpy2A/lcwPdQlRkOiuF1s6FFCqxe1yQsrpcbt/7fXes
UzOyE494GZFtO0zjFuwglsmiAZDMwO/fQVrIzSGV0SXF8LJpiYYTG1b3Yv5SY5Hr
r7EF4A7GlmNmd6K1HrXTYJz9tr4oxLDw+9LZGx74JV8x0iK3cd1hRTXb1SbspA6h
S/KRQsuEjpAyQ6xXWVp2fp6VxZkrjIpPavbcQw2RsoBnbNdrcXahTk96JfpWYGjH
iyJkEKmCF6/w/s5+xQfy+DYepxFDO0YsPbM7kL5qhaY83KBMOHKJFCUZVWj7md5w
QIVTeeiSewIlT5bG9XyjIfmsImq1acqTW+QCaxCnvMSsZDBbdhTMK48GwyN9U9+x
jdQCPQye3TKL2WU6U40FPNIr08QcNy4vmJp4fMqwK5xO3+P+Zhs=
=I2Zn
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Updates for SoC specific drivers include a few subsystems that have
their own maintainers but send them through the soc tree:
SCMI firmware:
- add support for a completion interrupt
Reset controllers:
- new driver for BCM4908
- new devm_reset_control_get_optional_exclusive_released() function
Memory controllers:
- Renesas RZ/G2 support
- Tegra124 interconnect support
- Allow more drivers to be loadable modules
TEE/optee firmware:
- minor code cleanup
The other half of this is SoC specific drivers that do not belong into
any other subsystem, most of them living in drivers/soc:
- Allwinner/sunxi power management work
- Allwinner H616 support
- ASpeed AST2600 system identification support
- AT91 SAMA7G5 SoC ID driver
- AT91 SoC driver cleanups
- Broadcom BCM4908 power management bus support
- Marvell mbus cleanups
- Mediatek MT8167 power domain support
- Qualcomm socinfo driver support for PMIC
- Qualcomm SoC identification for many more products
- TI Keystone driver cleanups for PRUSS and elsewhere"
* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
soc: aspeed: socinfo: Add new systems
soc: aspeed: snoop: Add clock control logic
memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
optee: simplify i2c access
drivers: soc: atmel: fix type for same7
tee: optee: remove need_resched() before cond_resched()
soc: qcom: ocmem: don't return NULL in of_get_ocmem
optee: sync OP-TEE headers
tee: optee: fix 'physical' typos
drivers: optee: use flexible-array member instead of zero-length array
tee: fix some comment typos in header files
soc: ti: k3-ringacc: Use of_device_get_match_data()
soc: ti: pruss: Refactor the CFG sub-module init
soc: mediatek: pm-domains: Don't print an error if child domain is deferred
soc: mediatek: pm-domains: Add domain regulator supply
dt-bindings: power: Add domain regulator supply
soc: mediatek: cmdq: Remove cmdq_pkt_flush()
soc: mediatek: pm-domains: Add support for mt8167
...
This is mostly 32-bit code for SoC platforms, and looks smaller
than any such branch I remember from previous kernels, as most
of this is now handled in other subsystems for modern platforms:
- Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
Renesas, and Samsung
- Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
- Samsung SoC driver updates to make them loadable modules
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApkHsACgkQYKtH/8kJ
UidKTRAA4nFode+U/cvcfDoA4HoUseDTzEHL7WmEjnQk48lEbNI3B2rONFkzXtFC
Wa8dvZw8EQ/bx/Sfe2WHUCVPEK6iVzb8AaaYPx06Xg6yFQjSEc4qdeeBtWFaRZoC
tmGQWMNjB3IzxhrKGwCwhbuUuVdIWN7DlKcyx+5sMjg9oPO7Ptb557VtR5f1vjQC
UR1KB1IBag2hNuE2BRPpmbOn/Jhq0ADQRrIm0sjvWN9CmArL7Og9WiuU0pwkmbqn
AGnzsylJ8+kR70F4O+s20SOC+NkAK1uA80+QeNDX9IeCyI2mz5ubg1tkXLb9nIQQ
qLYoMI7tUWTnROhcO10nSLz4wqcWWLKgf+6Wsod6lhUS8DNSYC5/bDf13UYHzGu0
fQZZxp7hEabKcD/Ub8IpY4hUfeUfpWts/h0iUVkpQfCYAreRxUG8C7ZHjIWycdg9
cOl6GyPLe397ONfX4XER0htICjUSrSCB09EpmoFfdBDBlbw/E1eZoKjTI0emEu2J
bvA1x7orDdlCJcQn5dPpP1L2HTh1gLC8/LFFuAHtMozuxGqp7f5pHXn+6OhiHLcA
l5+T/+53iVGxvfC4g3/Pk+SQAEjF0RpL/cA8EZ5kA0MmxuwQPt35yo2RobCTEfRi
7yC0dD4HavvDK1gfAJ7Af7v4lBtX3MidvY5el+dNjuGKvBJTqGg=
=2ehx
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"This is mostly 32-bit code for SoC platforms, and looks smaller than
any such branch I remember from previous kernels, as most of this is
now handled in other subsystems for modern platforms:
- Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
Renesas, and Samsung
- Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
- Samsung SoC driver updates to make them loadable modules"
* tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: arm: samsung: include S3C headers in platform entry
MAINTAINERS: Add linux-actions ML for Actions Semi Arch
ARM: s3c: irq-s3c24xx: staticize local functions
ARM: s3c: irq-s3c24xx: include headers for missing declarations
ARM: s3c: fix fiq for clang IAS
ARM: imx: Remove unused IMX_GPIO_NR() macro
soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
ARM: OMAP2+: fix spellint typo
MAINTAINERS: Update address for OMAP GPMC driver
soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
ARM: brcmstb: Add debug UART entry for 72116
ARM: tegra: Don't enable unused PLLs on resume from suspend
soc: samsung: pm_domains: Convert to regular platform driver
soc: samsung: exynos-chipid: correct helpers __init annotation
ARM: mach-imx: imx6ul: Print SOC revision on boot
ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
soc: samsung: exynos-asv: handle reading revision register error
soc: samsung: exynos-asv: don't defer early on not-supported SoCs
There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use [1], and
received confirmation about six ARM platforms and the TI C6x architecture
that have all reached the end of their life upstream, with no known
users remaining:
- efm32 -- added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell -- added in 2011, abandoned after 2012 acquisition
- prima2 -- added in 20111, no notable changes since 2015
- tango -- added in 2015, sporadic changes until 2017, but abandoned
- u300 -- added in 2009, no notable changes since 2013
- zx --added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x -- added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users
that plan to contribute them in the future, in other cases the code
is complete and works reliably.
[1] https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApiR8ACgkQYKtH/8kJ
Uifl7A//RZVyxUSlbD/StS6oEOmkZH8j0L7yeYOKkSHGZI+6Dqxo6rooKymbeflk
jJvDVQqLcrclT/7rWsKesdN8aW+ilfWrby5nDsWivsROrTw3DdvZgkjh7KYz7tA/
OxygKQu4W9I+ywJltR4ykTUxXohjU+duHPuZJawQk64xE3Q0MWxJlQQ2kHJYVJRu
/rWgNDQaI2d8HFhhEVsn4PC0RLWfUuBevKEuRYqZwM/oB/HuYjY+uTUGe2RhlgWb
sbcoD93JP2MghSypq33/UtEl4Uk7Wpdv2bshTTv8DL5ToltY7wD8qIIh+aSJk9hP
0FG3NTia7e9dqQQR2bskspGxP73iIuSN1exAbm/Ten5sysy6IsESmzqZRxXv+7Z1
q1Oyc4wYaotJPAxMOE00RMLiRa5domI8V6Y10I5uyOcmpRvwWK2WfCOE7D3WSQ5M
i1JiqLnC5JtJ0vyVBeRKo99zZImeXXrmS0n+fcARGtcKwAqKSvKxFcLTmkj3KqHv
L4Xgy5f83QrMZWmldX7IiwWjTar2geBM7pFgG/z3R6JqkaxWiDHxyok6j1WUCE7b
MViRZ8wT7JC5sIkHuwXZ4jvAXPqHq6J1rmJreU6N/jzmv/PTQoUnQ3C/MbDNhuv8
NDVSRgrPcd/T0BrBkzIWk3t+Oh6ikDgflWsWkqIRFG0vCNx+KdM=
=pf3b
-----END PGP SIGNATURE-----
Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform removals from Arnd Bergmann:
"There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use, and
received confirmation about six ARM platforms and the TI C6x
architecture that have all reached the end of their life upstream,
with no known users remaining:
- efm32 - added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell - added in 2011, abandoned after 2012 acquisition
- prima2 - added in 20111, no notable changes since 2015
- tango - added in 2015, sporadic changes until 2017, but abandoned
- u300 - added in 2009, no notable changes since 2013
- zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x - added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users that
plan to contribute them in the future, in other cases the code is
complete and works reliably"
Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
* tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: remove u300 platform
ARM: remove tango platform
ARM: remove zte zx platform
ARM: remove sirf prima2/atlas platforms
c6x: remove architecture
MAINTAINERS: Remove deleted platform efm32
ARM: drop efm32 platform
ARM: Remove PicoXcell platform support
ARM: dts: Remove PicoXcell platforms
On reset deassert, we must wait a bit after the rstst bit change before
we allow clockdomain autoidle again. Otherwise we get the following oops
sometimes on dra7 with iva:
Unhandled fault: imprecise external abort (0x1406) at 0x00000000
44000000.ocp:L3 Standard Error: MASTER MPU TARGET IVA_CONFIG (Read Link):
At Address: 0x0005A410 : Data Access in User mode during Functional access
Internal error: : 1406 [#1] SMP ARM
...
(sysc_write_sysconfig) from [<c0782cb0>] (sysc_enable_module+0xcc/0x260)
(sysc_enable_module) from [<c0782f0c>] (sysc_runtime_resume+0xc8/0x174)
(sysc_runtime_resume) from [<c0a3e1ac>] (genpd_runtime_resume+0x94/0x224)
(genpd_runtime_resume) from [<c0a33f0c>] (__rpm_callback+0xd8/0x180)
It is unclear what all devices this might affect, but presumably other
devices with the rstst bit too can be affected. So let's just enable the
delay for all the devices with rstst bit for now. Later on we may want to
limit the list to the know affected devices if needed.
Fixes: d30cd83f68 ("soc: ti: omap-prm: add support for denying idle for reset clockdomain")
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Yongqin Liu <yongqin.liu@linaro.org> reported an issue where reboot hangs
on beagleboard-x15. This started happening after commit 7078a5ba7a
("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1").
We now assert any 012 type resets on init to prevent unconfigured
accelerator MMUs getting enabled on init depending on the bootloader or
kexec configured state.
Turns out that we now also wrongly assert dra7 l3init domain PCIe reset
bits causing a hang during reboot. Let's fix the l3init reset bits to
use a 01 map instead of 012 map. There are only two rstctrl bits and not
three. This is documented in TRM "Table 3-1647. RM_PCIESS_RSTCTRL".
Fixes: 5a68c87afd ("soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances")
Fixes: 7078a5ba7a ("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1")
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Clock control logic for LPC snoop driver
- New system ids for AST2600 variants
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmAjy7UACgkQa3ZZB4FH
cJ4/2g/+OxqvJsTbgVAhkuZfCOsB/xY/2tWMuxcmaylD7QJxpxGTC4/u3WYQZyXL
vN3jTPETJ52GomVgBlKLG/AkHjXNJ82EwnwNBk48lGgOYIYFuI4JWJOLcKtsXkFj
hq/iQoQqOhhanYsp3jav7fssFUOgg1IYpwNCBP31hpy3P8fAjWKtJBO/v7lI/aNX
AivLWDAQzZy+bW2E9OouyD8WMLrEcQ7bAaWza1hCmk/pakILqvhxU9ukluDcuFGc
JRHArIXmc3h1MzfXFPRj6kVII0E1c8YA+8e4eEyPJK2YnI28CQzBej6LhotwnqH9
KfYPVCNqJSiQjzUhW3KcqJFwooCoRhhrPFmKoi1uHhoTbhKi3koboQwsdqjcReM8
vQ3BQuGoJfR5bJiwDP3KIrRPBRpuzcL9dgOHwhhYTZEEdJO4rXNGXVO50JsgL5Re
mzSGsyYvs2HS9KAjctRbBfLso7SGq8tuLckQ/J2t2xJukTnpMOv1ofg6BNDUvtzs
EzIwVuy9LoofS6sdgKSNv795RRXUC4EmFu/zcGtZ98J5ZiUwEqpC06qdwBBPwIxv
b93ZkmLusi8+UJ/Bp9cKVSkjjwWXq0VWKb7mYiqfGSCqXGuFOUXCYxltCn4CJcob
+/FgGf2M3uW8XOU3jTLj6JWJV1Ovu2yzUxK2y7wd9G6YsOGN9Bg=
=1Yka
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers
ASPEED soc driver updates for 5.12
- Clock control logic for LPC snoop driver
- New system ids for AST2600 variants
* tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
soc: aspeed: socinfo: Add new systems
soc: aspeed: snoop: Add clock control logic
Link: https://lore.kernel.org/r/CACPK8Xf+4VkWC6rkHhsWdwhaLjy2Az=GAHaEe=SvOiUc_OGKSQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Aspeed's u-boot sdk has been updated with the SoC IDs for the AST2605
variant, as well as A2 and A3 variants of the 2600 family.
>From u-boot's arch/arm/mach-aspeed/ast2600/scu_info.c:
SOC_ID("AST2600-A0", 0x0500030305000303),
SOC_ID("AST2600-A1", 0x0501030305010303),
SOC_ID("AST2620-A1", 0x0501020305010203),
SOC_ID("AST2600-A2", 0x0502030305010303),
SOC_ID("AST2620-A2", 0x0502020305010203),
SOC_ID("AST2605-A2", 0x0502010305010103),
SOC_ID("AST2600-A3", 0x0503030305030303),
SOC_ID("AST2620-A3", 0x0503020305030203),
SOC_ID("AST2605-A3", 0x0503010305030103),
Fixes: e0218dca57 ("soc: aspeed: Add soc info driver")
Link: https://lore.kernel.org/r/20210210114651.334324-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
If LPC SNOOP driver is registered ahead of lpc-ctrl module, LPC
SNOOP block will be enabled without heart beating of LCLK until
lpc-ctrl enables the LCLK. This issue causes improper handling on
host interrupts when the host sends interrupt in that time frame.
Then kernel eventually forcibly disables the interrupt with
dumping stack and printing a 'nobody cared this irq' message out.
To prevent this issue, all LPC sub-nodes should enable LCLK
individually so this patch adds clock control logic into the LPC
SNOOP driver.
Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201208091748.1920-1-wangzhiqiang.bj@bytedance.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
- Change soc-imx8m to use platform driver, so that defer probe can be
used to resolve dependency on OCOTP clock.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmAbi2AUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM4ahggAngVquybPfRbER44ivcaV0WHDbCRF
bw48jEGhfaud61K6pdmnl15IzsY/RPzxWHpZ3cP+JcGFr35j7mRozr3d5J6brFgX
xDIeKoUjnNEMGZwju24RQi8X83YU4DKI0KaRUZMmIjFrpTOtm2Vlas3J8yM9fIPh
wH2WpHs1hrzVEPkZzHfM+TmP6bAJXfZtsApV5YyD/aStRJtaQj0V5oEf0uS6yL+P
CLH6nQRcot+H+BV72izbKEga8505H82rOuXnrekmkyXR8ipZTk9KlJKRxpfVVRXM
P/uAPXv+35txx1zYBlNTicu2wSmtLv1ni3OtAOfzQssohxXXPb1cKX5UjQ==
=Dmwh
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 5.12:
- Change soc-imx8m to use platform driver, so that defer probe can be
used to resolve dependency on OCOTP clock.
* tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8m: change to use platform driver
Link: https://lore.kernel.org/r/20210204120150.26186-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmAbg1wbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FYYEP/R2zxLPj1ntJmyLV/MWX
bioEGJWXKk60b2k5lAai2nwD/iswPqMyRtI3eXub7YVoYPRVMDHVl7nuGE83hHES
r3OUCTisiM5VCOIYjzs9ZJJx4ceGzicsXoV2eEZUabQ4pg2/VHzdbh3DmH+Yh7hL
PTgEiAYqQRSpRlFTf7ByccuqjAMyhs1GJ3Ajrl9dACsXIrT8ktPqk1UZ6JDl7w+3
iox86p6EzpcnzgMY1APNgAoMDqHNOMbZky5zvgWEdMXGnpBZGjY8l1XXzIG9ZjE2
o9u9DnxnCyBJoaxqbsBeHmFux2QCNTggQc4k5fd4BI0vFLR5X4sTyhcG2rEy12st
LUaSKP9hb4M4JTkbMCvKAgae1FrMArLXAExhsoXopa2QwV0JwbtlE1onaOE4hsGT
9YmBuJD6auegplIroGbOEihoNrOhPWEiNCX8N9I0daPewY/ulzxqn57Blq1RVXmV
xs3ifBVyiFTbTD/cFvyDKnLDbgPuaT1bUReG6QHZYzOO/vzshe6JkduNY/RRgRd/
l/ENBkZ70yQRvImIcbzRgmq767u7zGa7VWrwTmLOe8+5VxxosxZD1sYBioO9N2uL
pZ5kfAeEAfhn70SX+12SMYIMKxNuvVSCesQNNoBHyMAQX6Y0pbuAyEEyrRdcgodO
lT1qpN+V2lkjlmzWEiokI3V0
=rWBX
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 5.12
The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.
* tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: ocmem: don't return NULL in of_get_ocmem
soc: qcom: socinfo: Remove unwanted le32_to_cpu()
soc: qcom: aoss: Add SM8350 compatible
drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
soc: qcom: socinfo: Fix off-by-one array index bounds check
soc: qcom: socinfo: Add MDM9607 IDs
soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
soc: qcom: socinfo: Add SoC IDs for 630 family
soc: qcom: socinfo: Open read access to all for debugfs
soc: qcom: socinfo: add info from PMIC models array
soc: qcom: socinfo: add several PMIC IDs
soc: qcom: socinfo: add qrb5165 SoC ID
soc: qcom: rpmh: Remove serialization of TCS commands
soc: qcom: smem: use %*ph to print small buffer
dt-bindings: soc: qcom: convert qcom,smem bindings to yaml
drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
soc: qcom: llcc-qcom: Add support for SM8250 SoC
soc: qcom: llcc-qcom: Extract major hardware version
dt-bindings: msm: Add LLCC for SM8250
Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The xlnx_vcu driver is actually a clock controller driver which provides
clocks that can be used by a driver for the encoder/decoder units. There
is no reason to keep this driver in soc. Move the driver to clk.
NOTE: The register mapping actually contains registers for AXI
performance monitoring, but these are not used by the driver.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-16-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Fixes the following checkpatch check:
CHECK: Alignment should match open parenthesis
#610: FILE: drivers/soc/xilinx/xlnx_vcu.c:610:
+ xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-15-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Fixes the following checkpatch warning:
WARNING: Possible repeated word: 'the'
#703: FILE: drivers/soc/xilinx/xlnx_vcu.c:703:
+ /* Add the the Gasket isolation and put the VCU in reset. */
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-14-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This makes the register accesses more readable and is closer to what is
usually used in the kernel.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-13-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
As the consumers are now responsible for setting the clock rate via
clock framework, the clock rate is now calculated using round_rate and
the driver does not need to calculate the clock rate beforehand.
Remove the code that calculates the PLL configuration.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-12-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Do not configure the PLL when probing the driver, but register the clock
in the clock framework and do the configuration based on the respective
callbacks.
This is necessary to allow the consumers, i.e., encoder and decoder
drivers, of the xlnx_vcu clock provider to set the clock rate and
actually enable the clocks without relying on some pre-configuration.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-11-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
According to the downstream driver documentation due to timing
constraints the output divider of the PLL has to be set to 1/2. Add a
helper function for that check instead of burying the code in one large
setup function.
The bit is undocumented and marked as reserved in the register
reference.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-10-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The VCU System-Level Control uses an internal PLL to drive the core and
MCU clock for the allegro encoder and decoder based on an external PL
clock.
In order be able to ensure that the clocks are enabled and to get their
rate from other drivers, the module must implement a clock provider and
register the clocks at the common clock framework. Other drivers are
then able to access the clock via devicetree bindings.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-9-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Currently, xvcu_pll_set_rate configures the PLL to a clock rate that is
pre-calculated when probing the driver. To still make the clock
framework aware of the PLL and to allow to configure other clocks based
on the PLL rate, register the PLL as a fixed rate clock.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-8-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The disabling of the PLL is not fully implemented, because according to
the ZynqMP register reference the RESET, POR_IN and PWR_POR bits have to
be set to bring the PLL into reset.
Set the bits to disable the PLL.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-7-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The xvcu_set_vcu_pll_info function sets the rate of the PLL and enables
it, which makes it difficult to cleanly convert the driver to the common
clock framework.
Split the function and add separate functions for setting the rate,
enabling the clock and disabling the clock.
Also move the enable of the reference clock from probe to the helper
that enables the PLL.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-6-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Extract a helper function to wait until the PLL is locked. Also,
disabling the bypass was buried in the exit path on the wait loop.
Separate the different steps and add a helper function to make the code
more readable.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-5-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The coreclk field is newer read after being written to xlnx_vcu. Remove
the coreclk field from the xlnx_vcu and use a function local variable
instead.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-4-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1. Decouple Mediatek DRM sub driver
2. Share mtk mutex driver for both DRM and MDP
3. Add support for SoC MT8183
-----BEGIN PGP SIGNATURE-----
iQJMBAABCgA2FiEEACwLKSDmq+9RDv5P4cpzo8lZTiQFAmAcDQgYHGNodW5rdWFu
Zy5odUBrZXJuZWwub3JnAAoJEOHKc6PJWU4kE48P/jSb7PhZYvEiPdjsPHxIEHa7
01Qc2gNDXkYkt+circ0NtDu3CH1DB5U2b5lITUy8McMM486N4vBNisPM3oId18ik
lCinMehSGvlVxHmxOBEJAj6G/rLrw4lBflDHnV38WrzWgPU/DFXQQy0kjI92T5R5
YswWYG2skAU5GX3r8i8p8PibwlA3aH9aVpgE/iDsCbpljmpJktqVYkfijAuK8phP
WVxBHQaa7N6KNxQmaVZtylz2GhtSwhx4omV/TNbJYFniLqzpTnFfxmkp161V1dL7
eUteuXwwmBpQAb/jYIilYEkLKBff6XTsl5wGzeIn2o/eAiD2jPUp6BOrxl87OXBM
yd61mNP56aF1mgJ3bH6Qbs/qenSP5ptVKVSl983crzLCHpDOHX4ToG39TIGX6m9M
o7vHYEZQznLKWcAJmV40oPDKuIaKbL9I0ZxTVSjK8Lw75kOfOssbztHQlJkMJHiG
/2FF08Klk5oMP7SsUjVgasGqrVEamv1kkmtmK218tz2QJ6cksJsydvlwhxbIVvE6
mgH2WSVI+CRKakB4+bhCg5v1zl7tM4s5aUtoqz2cHxlMABt0mtvunoB9wt4LIIks
z6V7myU05q5nGhD1ClmKU5F1Fnw1J6IIECb1lmrJSCOrl0mAWqlezVDSTu8v+7Yi
7rgviHqtdRoAdZSb1u6w
=s8K8
-----END PGP SIGNATURE-----
Merge tag 'mediatek-drm-next-5.12' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next
Mediatek DRM Next for Linux 5.12
1. Decouple Mediatek DRM sub driver
2. Share mtk mutex driver for both DRM and MDP
3. Add support for SoC MT8183
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210204151750.7550-1-chunkuang.hu@kernel.org
A missing comma caused a build failure:
drivers/soc/atmel/soc.c:196:24: error: too few arguments provided to function-like macro invocation
Fixes: af3a10513c ("drivers: soc: atmel: add per soc id and version match masks")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
The code fixes in this round are all for the Texas Instruments OMAP
platform, addressing several regressions related to the ti-sysc
interconnect changes that was merged in linux-5.11 and one recently
introduced RCU usage warning.
Tero Kristo updates his maintainer file entries as he is changing
to a new employer.
The other changes are for devicetree files across eight different
platforms:
TI OMAP:
- multiple gpio related one-line fixes
Allwinner/sunxi:
- ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
- soc: sunxi: mbus: Remove DE2 display engine compatibles
NXP lpc32xx:
- ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
STMicroelectronics stm32
- multiple minor fixes for DHCOM/DHCOR boards
NXP Layerscape:
- Fix DCFG address range on LS1046A SoC
Amlogic meson:
- fix reboot issue on odroid C4
- revert an ethernet change that caused a regression
- meson-g12: Set FL-adj property value
Rockchip:
- multiple minor fixes on 64-bit rockchip machines
Qualcomm:
- Regression fixes for Lenovo Yoga touchpad and for
interconnect configuration
- Boot fixes for 'LPASS' clock configuration on two machines
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAamF8ACgkQmmx57+YA
GNmc+g//f7QiGC7f4Ora6StjJEzRoFHff5n6W5BlpyldHcEjo1exDr6V/e/ASaGL
XAVqqjvd6lI6I788PZyEu+qJ9Ekm2mUDAtCKvrKA63yuPhm540eQLF8f1tX0vziu
TpYJIYm/g+DtBVM0EvxyNx9fTDAmcnzq+fqnOjqIOufKOFJyr0L1eJDp1nvAaNUo
a+jILSDa8/FMkd6/W6HSBWWRyGH/p3gme+Uaz5jOj4vHkwNRnuRwFb0q64KiHBBg
10Aehujt70LD6pKo4W90yBYUEL6w+19mkV2s01jtZZUfZjIEyyX9V5lujfRC4v4G
DyKO5nJSvlTqBOpbUcF8kbq9FRLbo977jc29aIig4mq5dhOIZ9Xj+XwfnPG4riQp
fDsxeqGzP73jhI3fwadEnEep7JA5Hopwj0sSW07ZjE3oqKJruvMFs+d18SHeHyOe
IhBlrwcWXdgA1+k+5MNaTgr91cK4LmUPC5D1ZqO2Hr7qqhIy4yzIWk3cwxCO80T5
AQC02G2awIKglYqpj4reTR0EVPutvzKiblDKMtTf2WY7l6mQlr8eeQ9jXS+U5pID
hZ/iWCrNzQWMGUsM1L5DvA/8h+H0AEF3DknnxKS0dh6W3oYuLGrEc1Khs6bQ0c/e
pxgqGEpAxpbxyhsO0CJhIHEgZ4q4ZDzxJMA41ho7YJNFvVCsqPc=
=dXiS
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"The code fixes in this round are all for the Texas Instruments OMAP
platform, addressing several regressions related to the ti-sysc
interconnect changes that was merged in linux-5.11 and one recently
introduced RCU usage warning.
Tero Kristo updates his maintainer file entries as he is changing to a
new employer.
The other changes are for devicetree files across eight different
platforms:
TI OMAP:
- multiple gpio related one-line fixes
Allwinner/sunxi:
- ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
- soc: sunxi: mbus: Remove DE2 display engine compatibles
NXP lpc32xx:
- ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
STMicroelectronics stm32
- multiple minor fixes for DHCOM/DHCOR boards
NXP Layerscape:
- Fix DCFG address range on LS1046A SoC
Amlogic meson:
- fix reboot issue on odroid C4
- revert an ethernet change that caused a regression
- meson-g12: Set FL-adj property value
Rockchip:
- multiple minor fixes on 64-bit rockchip machines
Qualcomm:
- Regression fixes for Lenovo Yoga touchpad and for interconnect
configuration
- Boot fixes for 'LPASS' clock configuration on two machines"
* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
arm64: dts: ls1046a: fix dcfg address range
soc: sunxi: mbus: Remove DE2 display engine compatibles
arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
Revert "arm64: dts: amlogic: add missing ethernet reset ID"
arm64: dts: rockchip: Disable display for NanoPi R2S
ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
ARM: dts: stm32: Fix GPIO hog names on DHCOM
ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
ARM: dts: stm32: Disable WP on DHCOM uSD slot
ARM: dts: stm32: Connect card-detect signal on DHCOM
ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
...
SoCs with the Display Engine 2
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBp2xgAKCRDj7w1vZxhR
xTzSAQD93OPoQ46cIrk3g2zSdCUKNiorllwwsCmJ64A5Y4RrqwEA46aerSUprOVS
93zKBYrFnbqvQUWbaZgs8CYUFxD/GQU=
=dvMb
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes
One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
soc: sunxi: mbus: Remove DE2 display engine compatibles
Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better
cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmAXyLMXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH685BAAstjxiMulWYTm1NlmPYvsCnXA
vV0e8AzvuuD4SNlicBg++XvpWpLY4cbyrKSwAv0xzF+2gct/NenGpnwS2rNIiiLI
vAi5s9bkBjqA1TYq5IbK2c9aEsfsl/AUXE3mREV6F/nupmbu8QQGBakH9HaBhCdY
Cg5ExURFLIQqzREESKnvnPGbofwBvKJmEOm0ExiD9i3yI+e1vQXXFEjzoXBGOXYg
f0dOukgjHaBnYr3U6K75tDtn7zl6+1QQaQpyLnSLdbT2EAJUdwsNdzAkDX1OCCMm
99oWDPAfwMLsSqxV/06wpxQR3ZMd9NktMndotX1zd6ck27Yfoqgwb2kOws/DMTxU
MDLHHcUWN/io21cREPGDwkLH7PEaoyG9Dn59ru3UEmJm1btO1gb7WBXimycwbebY
3qNKcUvwwXHW5LNVddRXZnfIYMcinYWyklZcVfNEb4+Axp9j+1CVl2QqruaAT30S
3UCbmNM1v/ALlfxDTlI8ZBa8W3cUAjHCaSepPtsqsmaXmNEmZ80k1DHM2fqjNKNB
RqG47rBZgObVS+jzx/H28HjK3lFMBEP+UPVjxbb8BLfpJPHENa+BPTTMsw+SZktT
8gSRu18PiQ6JQouR7T70GRu2F0goi065+S+ygiTLYDkPfd5xScSUJdjLGgkgdBpS
GU8m3j4zUPaU4UQ0Bqk=
=RaHQ
-----END PGP SIGNATURE-----
Merge tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
pm-domains:
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better
cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead
* tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pm-domains: Don't print an error if child domain is deferred
soc: mediatek: pm-domains: Add domain regulator supply
dt-bindings: power: Add domain regulator supply
soc: mediatek: cmdq: Remove cmdq_pkt_flush()
soc: mediatek: pm-domains: Add support for mt8167
dt-bindings: power: Add MT8167 power domains
Link: https://lore.kernel.org/r/5faa52c2-0ddb-b809-7444-ce6f6ff6d8ad@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
If ocmem probe fails for whatever reason, of_get_ocmem returned NULL.
Without this, users must check for both NULL and IS_ERR on the returned
pointer - which didn't happen in drivers/gpu/drm/msm/adreno/adreno_gpu.c
leading to a NULL pointer dereference.
Reviewed-by: Brian Masney <masneyb@onstation.org>
Fixes: 88c1e9404f ("soc: qcom: add OCMEM driver")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210130142349.53335-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Updates include:
- Navigator refcount correction
- probe fix in pm driver
- fix clock init for PRUSS
- PRUSS binding doc update
- of_device_get_match_data() use in ringacc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJgF4wmAAoJEHJsHOdBp5c/wpIP/R/1Rhro+9FXCF1i9RdjUebT
uklxB/VDM/G4TKmyGKHvEyyroa1U/fL5wxKY67Ey3sGlOjWTe+DgoXHJ97Saw2ya
5M/wWe453DwD3JVMrzKR7GnciEf8t/QqVdoOsSLDKVFteXLWqET1Jw4hEGJ+cc3y
EfjTQ8q+CtdJ0eEpigsNaY146WZzHCugRGhwwQORy4XKNJbrzPneQ1/BAabyfcca
h6bDZXl4Bf9Tej7tJWq083LwS+MEPaeq+8gbmquyrrFxaOXE7nOT5BZCuJbCweGs
/e4TT8q3iLK0l+QjcxzR0QzHzr5sSAVW6UShFHIrr+EfBkfHnn2qKJBQQ7HGqkFG
fYn1h1O2A/60Licgn9Km1/czCf6wSsKk+AjXeadRneIeZmAgi2ZPJvxLGM02ejHC
KixsIQLsZEsxUV5FDcjMWcAmXewmd+QiJKeg6+DSj8JWGxwWunAaFfVqAGFZjQeb
ChRwP/k/qmHlZZP/a8lnfmFykEKr5Mm28XNLRrXo/LNr/LA95fS7lb26AwMzpH/Z
eD8elo73TZxR0LFx7eJ+VCzlh/Yt/WHbX6dqei5iBTXgW91yqjVvh1gqoen+3xlE
iwFt+XBlc7wROpcHp7P8KdEScM4M4zDLiU9+sGN89PJnbm11Cps6aKZFAVHDtYf2
IVbvsyaAo+N8WT7aEb6y
=aMV2
-----END PGP SIGNATURE-----
Merge tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
drivers: soc: Keystone update for v5.12
Updates include:
- Navigator refcount correction
- probe fix in pm driver
- fix clock init for PRUSS
- PRUSS binding doc update
- of_device_get_match_data() use in ringacc
* tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: k3-ringacc: Use of_device_get_match_data()
soc: ti: pruss: Refactor the CFG sub-module init
dt-bindings: soc: ti: Update TI PRUSS bindings about schemas to include
soc: ti: pruss: Correct the pruss_clk_init error trace text
soc: ti: pm33xx: Fix some resource leak in the error handling paths of the probe function
soc: ti: knav_qmss: Put refcount for dev node in failure case
Link: https://lore.kernel.org/r/1612156854-10929-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
please pull the following:
- Rafal adds support for the Power Management Bus (PMB) which is used in
a variety of DSL/Cable modem/STB SoCs with a primary target being the
4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
get the chip identification (family and revision) to permit the
Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB
- Florian removes an unused function and its header
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmAXKTQACgkQh9CWnEQH
BwSyvxAAsOVmytMHBHxe4i8Pad0Yv9sUsV0AvfvJmi0lhd0a1L7HLWBhoYq+fNFO
R6ycuVjUb9RCA5O9nps6qnWbslEar3h5of/Ku4ovev3I5xQYiGFLOPe75ivoi+sl
I4T9PwVuWV3WDjK8upA3naUwNzEv30Zw0uFULw5J0RFZAB3W3ObITO3mF8a3aOGc
uVNWfD+Ro/2l1hrPfO74Qm0r36XQmvRNNOFH3gpKdBZAG2nHkQpfOsoNNUGjBjYm
amFqm/zfc7Ydxg2WzQwUUaslyq+yIKtn919rFnudR48iHpzpotVuFKgGt3CppCl5
oF4/1+C6bRzKErPYzn3B6JGFOYwSZwg9+TleDEv7eElIo04FBSOa6pNoHNDEfPXr
LI9U7CL0/zf8vbkoK3txQg7fdcYvwED9/ip5u2IJ8KZvhoCu175FIZbrXIO+woPC
gTk28bSBWH4mqGh7fPOmX3fBc2zow7xd/DlTnT1SNy6IVDZL9S82czAS/b2ImBzp
sfK0fDFrO3cPfrE2/CrKwT/OiMOUsrc0Al7g0rmpPkFHgnrh/ZCV+zQT7RSEvL1P
Gp3ZFkSjTbrXIZwkJ04i73sJUpC8F8F8XeoFItPs3VGXxJxsapB+b6TuW09qhkvU
WJXD3gFUL34IXI6luB1ZWNG4/fJBHgWXIrKsBnf9kpZENfHEdKs=
=43Gr
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom SoCs drivers changes for 5.12,
please pull the following:
- Rafal adds support for the Power Management Bus (PMB) which is used in
a variety of DSL/Cable modem/STB SoCs with a primary target being the
4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
get the chip identification (family and revision) to permit the
Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB
- Florian removes an unused function and its header
* tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: Remove soc_is_brcmstb()
soc: bcm: brcmstb: add stubs for getting platform IDs
soc: bcm: add PM driver for Broadcom's PMB
dt-bindings: power: document Broadcom's PMB binding
Link: https://lore.kernel.org/r/20210131221721.685974-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
suspend / resume support for our RSB bus, and support for the H616
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBbvvwAKCRDj7w1vZxhR
xR+qAP47qmg1qUkp4I91zWoK1h2iLme3zusGI/8hRp7la5ldxQD/dEShzw9OsTBh
cuCmbtaPXCLJw/GRiRNnBdUv/+JQRww=
=F2ck
-----END PGP SIGNATURE-----
Merge tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers
Some new drivers changes for the Allwinner SoCs, but mostly runtime_pm and
suspend / resume support for our RSB bus, and support for the H616
* tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: bus: rsb: Add H616 compatible string
soc: sunxi: sram: Add support for more than one EMAC clock
dt-bindings: sram: sunxi-sram: Add H616 compatible string
mfd/bus: sunxi-rsb: Make .remove() callback return void
bus: sunxi-rsb: Implement runtime power management
bus: sunxi-rsb: Implement suspend/resume/shutdown callbacks
bus: sunxi-rsb: Split out controller init/exit functions
bus: sunxi-rsb: Move OF match table
Link: https://lore.kernel.org/r/91f2980f-266f-41f2-ba10-5a395625498c.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Simplify the retrieval of getting the match data in the probe
function by directly using of_device_get_match_data() instead
of using of_match_node() and getting data.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The CFG sub-module is not present on some earlier SoCs like the
DA850/OMAPL-138 in the TI Davinci family. Refactor out the CFG
sub-module parse and initialization logic into a separate function
to make it easier to add logic for the PRUSS IP on the above legacy
SoC families.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Child domains can be deferred by the core because one of its resources
is not available yet, in such case, it will print an error, but
later it will succeed to probe. Fix that using the dev_err_probe()
function so it only prints an error on a real error.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Some power domains (eg. mfg) needs to turn on power supply before power
on.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the needed board data to support mt8167 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The LiteX SOC controller driver makes use of IOMEM functions like
devm_platform_ioremap_resource(), which are only available if
CONFIG_HAS_IOMEM is defined.
This causes the driver to be enable under make ARCH=um allyesconfig,
even though it won't build.
By adding a dependency on HAS_IOMEM, the driver will not be enabled on
architectures which don't support it.
Fixes: 22447a99c9 ("drivers/soc/litex: add LiteX SoC Controller driver")
Signed-off-by: David Gow <davidgow@google.com>
[shorne@gmail.com: Fix typo in commit message pointed out in review]
Signed-off-by: Stafford Horne <shorne@gmail.com>
The R-Car System Controller (SYSC) driver registers PM domains from an
early_initcall(). It does not use a platform driver, as secondary CPU
startup on R-Car H1 needs to control the CPU power domains, before
initialization of the driver framework.
As fw_devlink only considers devices, it does not know that the System
Controller is ready. Hence probing of on-chip devices that are part of
the SYSC PM domain fails if fw_devlink is enabled:
probe deferral - supplier e6180000.system-controller not ready
Fix this by setting the OF_POPULATED flag for the SYSC device node after
successful initialization. This will make of_link_to_phandle() ignore
the SYSC device node as a dependency, and consumer devices will be
probed again.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210128082847.2205950-1-geert+renesas@glider.be
drivers/net/can/dev.c
b552766c87 ("can: dev: prevent potential information leak in can_fill_info()")
3e77f70e73 ("can: dev: move driver related infrastructure into separate subdir")
0a042c6ec9 ("can: dev: move netlink related code into seperate file")
Code move.
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
57ac4a31c4 ("net/mlx5e: Correctly handle changing the number of queues when the interface is down")
214baf2287 ("net/mlx5e: Support HTB offload")
Adjacent code changes
net/switchdev/switchdev.c
20776b465c ("net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP")
ffb68fc58e ("net: switchdev: remove the transaction structure from port object notifiers")
bae33f2b5a ("net: switchdev: remove the transaction structure from port attributes")
Transaction parameter gets dropped otherwise keep the fix.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
These are the current arm-soc bug fixes for linux-5.11. I already merged
a larger set that just came in during the past three days but has not
had much exposure in linux-next, so these are the ones I merged last week.
Most of these are for the NXP i.MX platform (descriptions from their
pull request):
- Fix pcf2127 reset for imx7d-flex-concentrator board.
- Fix i.MX6 suspend with Thumb-2 kernel.
- Fix ethernet-phy address issue on imx6qdl-sr-som board.
- Fix GPIO3 `gpio-ranges` on i.MX8MP.
- Select SOC_BUS for IMX_SCU driver to fix build issue.
- Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from
#pwm-cells conversion.
- Fix duplicated bus node name for i.MX8MN SoC.
- Fix reset register offset on LS1028A SoC.
- Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device
index consistent with previous kernel version.
- Selecting ARM_GIC_V3 on non-CP15 processors to fix one build failure
with i.MX8M SoC driver.
- Fix typos with status property on imx6qdl-kontron-samx6i board.
- Fix duplicated regulator-name on imx6qdl-gw52xx board.
Aside from i.MX, the bugfixes are all over the place:
- Coccinelle found a refcount imbalance on integrator
- defconfig fix for TI K3
- A boot regression fix for ST ux500
- A code preemption fix for the optee driver
- USB DMA regression on Broadcom Stingray
- A bogus boot time warning fix for at91 code
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAS0A0ACgkQmmx57+YA
GNmk7w/9GCdeyLysp1ZdYdTlysfuqh2wR31/9t3rIv6E+xDH/m9yYVRWKqVMqN00
FtgYABfjsobOLdaiO/Bpl6bK6B5WXmLrmBXptgSXJCjV147r/orlIH3BCtqBR1ez
3anH0zqwklOHtTMDfz012VsdNSk81yqEnl4kFYcLDOJ6wtg4cl8ks4GIkYopT4XX
Yov+iUKO2xzTdl7XSBgqNjNUntZcLndffnuu+tdb4Ehz6H6qeODW2BMCZJNvd0BB
h8bFiYo6fNkywFDevO7Tbyufzkuz7CNH2EiOL5zzfbOxBZ3fyOf0zBfFe+ldlcYq
2qYid7rpLPF4Hn4HzTiwh2jPj4jef3F0XpBq8YrUJK5p7BoOp9QkMNqoJfpidWoa
ROkgbPPaiVanOiTpDA6++IOxjGP+0I01LXhiP5SwfN6ua4UYinS9f2MgoPgT70mT
Doq9EIucORBi0ZbzUzl5EESCya4ByRTu7EYrENeWy3Y9HsGZ921l/vmIsAHWo9P9
8pEgm9ttPErZlpmABPiEkJcF8IsxaLtcQuSFpLsFUweIDi65mMkF5fXQ+K3OicdT
mMAu9EaNEUBUwWRK2Cq9xIV/8/DwFHVSg40FqatDgvhihtZZA6GgoSDZvGJO34oo
NjqLxgqFVMq6HDFC36+Rn1/iP6mpQsvgobs+Qaa357wFT/DUqCg=
=Vneq
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-fixes-v5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"These are the current arm-soc bug fixes for linux-5.11. I already
merged a larger set that just came in during the past three days but
has not had much exposure in linux-next, but this is the subset I
merged last week.
Most of these are for the NXP i.MX platform (descriptions from their
pull request):
- Fix pcf2127 reset for imx7d-flex-concentrator board.
- Fix i.MX6 suspend with Thumb-2 kernel.
- Fix ethernet-phy address issue on imx6qdl-sr-som board.
- Fix GPIO3 `gpio-ranges` on i.MX8MP.
- Select SOC_BUS for IMX_SCU driver to fix build issue.
- Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from
#pwm-cells conversion.
- Fix duplicated bus node name for i.MX8MN SoC.
- Fix reset register offset on LS1028A SoC.
- Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device
index consistent with previous kernel version.
- Selecting ARM_GIC_V3 on non-CP15 processors to fix one build
failure with i.MX8M SoC driver.
- Fix typos with status property on imx6qdl-kontron-samx6i board.
- Fix duplicated regulator-name on imx6qdl-gw52xx board.
Aside from i.MX, the bugfixes are all over the place:
- Coccinelle found a refcount imbalance on integrator
- defconfig fix for TI K3
- A boot regression fix for ST ux500
- A code preemption fix for the optee driver
- USB DMA regression on Broadcom Stingray
- A bogus boot time warning fix for at91 code"
* tag 'arm-soc-fixes-v5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: Include bcm2835 subsequents into search
arm64: dts: broadcom: Fix USB DMA address translation for Stingray
drivers: soc: atmel: add null entry at the end of at91_soc_allowed_list[]
drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs
tee: optee: replace might_sleep with cond_resched
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
ARM: dts: ux500: Reserve memory carveouts
arm64: defconfig: Drop unused K3 SoC specific options
bus: arm-integrator-lm: Add of_node_put() before return statement
ARM: dts: imx6qdl-gw52xx: fix duplicate regulator naming
ARM: dts: imx6qdl-kontron-samx6i: fix i2c_lcd/cam default status
ARM: imx: fix imx8m dependencies
ARM: dts: tbs2910: rename MMC node aliases
arm64: dts: ls1028a: fix the offset of the reset register
arm64: dts: imx8mn: Fix duplicate node name
ARM: dts: imx6qdl-kontron-samx6i: fix pwms for lcd-backlight
The recent changes to switch SoCs to boot with ti-sysc interconnect
target module driver and genpd caused few regressions:
- The omap_prm reset driver needs to clear any reset bits deasserted by
the bootloader or kexec boot for the three reset bit cases. Otherwise
we can have an oops with accelerators starting to boot with potentially
unconfigured MMU for example
- Custom kernel configs are not automatically selecting simple-pm-bus
driver that we now need to probe interconnects so we need to select it
always
- We are not passing legacy platform data in auxdata with simple-pm-bus
like we do for simple-bus. We need to pass auxdata to simple-pm-bus so
it can pass it to of_platform_populate()
Then recent RCU changes started causing splats for cpuidle44xx that now
need RCU_NONIDLE added to the calls in several places
And then we have few device specific fixes:
- We need to remove legacy spi-cs-hig for gta04 display to work, and
set the gpio to active low
- Omap1 specific ohci-omap needs to call gpio_free()
- Droid4 needs to use padconf interrupt for the slider as the edge
gpio interrupts may be lost for deeper idle states
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmASZqMRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXO7Mw/+NeWn3pX/qrikfnHEnRLCnfaqQcb8BRm+
mbUmTQMKhncIOhL3quiktXwgP2sdWsoZNeZ2GzEe/OnIl17Q77YDgxaf5npd31lg
3JRC/rb3zvcr/dQzOogFXQak2P+eZaUIZKRfIh6KY/okX1SQ4dx4WZBdeaypgP0p
qzrbaUUJ11c+kWgvOnPmzPKCL/oEAG88lAWoSuLxkvVjtTa8UMxUfYWYKZjypM55
a1WZGXNAEj1HZxH5lxvCYfPf6U8nYyU567uiBKOsJHaVQSWDVzFVHfgE1QcExbtL
Ujz3IEoquWLzVOaLppokuu4IIUoGm2T18+FthCO5NUsr32YkapVNccfhOlQHPVZB
7gtkGjUt1s8zahVMM1NctHxH1pti6/03Vin7hzxYIu4mJfYSnW7wOHrl/1b3j5Z0
h9yUETborMtdT9BSgvJfzEndpi6Tml9ICSvduMTM7fCvJPLFSCF1ElzH506YkbMt
R66iEfRYZUo6YIsrXLPDsLp+/Ywen5OvbOVO0rJ0q6Kdz0QGKJ+iNxbjjJxM8IXN
mT4h3rwPQfSJUjhRAAVzIx7ybbNqUwq0IxISemqsYiTzqMngsrvCE357mQ+lFBRW
PasdMIonMhS2ZWkZDe48hblM2SafCGfdbnUUAULUyJH3emDYrnVzLPhJiNsnyHUy
WTmYpIi68SM=
=KgUu
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.11/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.11-rc cycle
The recent changes to switch SoCs to boot with ti-sysc interconnect
target module driver and genpd caused few regressions:
- The omap_prm reset driver needs to clear any reset bits deasserted by
the bootloader or kexec boot for the three reset bit cases. Otherwise
we can have an oops with accelerators starting to boot with potentially
unconfigured MMU for example
- Custom kernel configs are not automatically selecting simple-pm-bus
driver that we now need to probe interconnects so we need to select it
always
- We are not passing legacy platform data in auxdata with simple-pm-bus
like we do for simple-bus. We need to pass auxdata to simple-pm-bus so
it can pass it to of_platform_populate()
Then recent RCU changes started causing splats for cpuidle44xx that now
need RCU_NONIDLE added to the calls in several places
And then we have few device specific fixes:
- We need to remove legacy spi-cs-hig for gta04 display to work, and
set the gpio to active low
- Omap1 specific ohci-omap needs to call gpio_free()
- Droid4 needs to use padconf interrupt for the slider as the edge
gpio interrupts may be lost for deeper idle states
* tag 'omap-for-v5.11/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
ARM: dts; gta04: SPI panel chip select is active low
soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1
ARM: OMAP1: OSK: fix ohci-omap breakage
DTS: ARM: gta04: remove legacy spi-cs-high to make display work again
Link: https://lore.kernel.org/r/pull-1611818709-243493@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The DE2 display engine hardware takes physical addresses that do not
need PHYS_BASE subtracted. As a result, they should not be present
on the mbus driver match list. Remove them.
This was tested on the A83T, along with the patch allowing the DMA
range map to be non-NULL and restores a working display.
Fixes: b4bdc4fbf8 ("soc: sunxi: Deal with the MBUS DMA offsets in a central place")
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210115175831.1184260-2-paul.kocialkowski@bootlin.com
The Allwinner H616 adds a second EMAC clock register at offset 0x34, for
controlling the second EMAC in this chip.
Allow to extend the regmap in this case, to cover more than the current
4 bytes exported.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210127172500.13356-9-andre.przywara@arm.com
Remove extra le32_to_cpu() conversion, data is already converted from
le32 to cpu endianness. This fixes two following warnings:
drivers/soc/qcom/socinfo.c:322:36: sparse: sparse: cast to restricted __le32
drivers/soc/qcom/socinfo.c:323:36: sparse: sparse: cast to restricted __le32
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 734c78e7fe ("soc: qcom: socinfo: add info from PMIC models array")
Link: https://lore.kernel.org/r/20210118152236.514776-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We have no in tree or out of tree users of this function, remove it and
the header providing its prototype.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
SAMA7G5 has different masks for chip ID and chip version on CIDR
register compared to previous AT91 SoCs. For this the commit adapts
the code for SAMA7G5 addition by introducing 2 new members in
struct at91_soc and fill them properly and also preparing the
parsing of proper DT binding.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-6-git-send-email-claudiu.beznea@microchip.com
of_match_node() calls __of_match_node() which loops though the entries of
matches array. It stops when condition:
(matches->name[0] || matches->type[0] || matches->compatible[0]) is
false. Thus, add a null entry at the end of at91_soc_allowed_list[]
array.
Fixes: caab13b496 ("drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs")
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
MSM8994 uses similar to MSM8996, legacy-style voltage
control, but does not include a VDD_SC_CX line.
This setup is also correct for MSM8992.
Do note that there exist some boards that use a tertiary PMIC
(most likely pm8004), where SMPB on VDDGFX becomes SMPC. I
cannot test this configuration though.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118161943.105733-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The pruss_clk_init() function can register more than one clock.
Correct the existing misleading error trace upon a failure within
this function.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
'am33xx_pm_rtc_setup()' allocates some resources that must be freed on the
error. Commit 2152fbbd47 ("soc: ti: pm33xx: Simplify RTC usage to prepare
to drop platform data") has introduced the use of these resources but has
only updated the remove function.
Fix the error handling path of the probe function now.
Fixes: 2152fbbd47 ("soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
for_each_child_of_node increases refcount for each device_node and decreases previous one
in a loop, but in case jump out of a loop current node refcount has no chnase for decreases
so requires an of_node_put for jupm out cases.
Fix based on raport from
scripts/coccinelle/iterators/for_each_child.cocci
Signed-off-by: Vasyl Gomonovych <gomonovych@gmail.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Pickup fixes that went upstream already in order to resolve conflicts in
litex_soc_ctrl.c between 5.11 fixes that went upstream and the
or1k-5.12-updates linux-next queue.
Signed-off-by: Stafford Horne <shorne@gmail.com>
of_match_node() calls __of_match_node() which loops though the entries of
matches array. It stops when condition:
(matches->name[0] || matches->type[0] || matches->compatible[0]) is
false. Thus, add a null entry at the end of at91_soc_allowed_list[]
array.
Fixes: caab13b496 ("drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs")
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Since at91_soc_init is called unconditionally from atmel_soc_device_init,
we get the following warning on all non AT91 SoCs:
" AT91: Could not find identification node"
Fix the same by filtering with allowed AT91 SoC list.
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201211135846.1334322-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a helper that takes a virtual address rather than the muram
offset. This will be used in a couple of places to avoid having to
store both the offset and the virtual address, as well as removing
NULL checks from the callers.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The two functions cpm_muram_offset() and cpm_muram_dma() both need a
cast currently, one casts muram_vbase to do the pointer arithmetic on
void pointers, the other casts the passed-in address u8*.
It's simpler and more consistent to just always use void* and drop all
the casting.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Allow passing const-qualified pointers without requiring a cast in the
caller.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Let the LiteX SoC Controller register a restart handler, which resets
the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>
These need to be < ARRAY_SIZE() instead of <= ARRAY_SIZE() to prevent
accessing one element beyond the end of the array.
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: e9247e2ce5 ("soc: qcom: socinfo: fix printing of pmic_model")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YAf+o85Z9lgkq3Nw@mwanda
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
There is an off-by-one array index bounds check on array
pmic_models. Fix this by checking using < rather than <= on
the array size.
Addresses-Coverity: ("Out-of-bounds read")
Fixes: 734c78e7fe ("soc: qcom: socinfo: add info from PMIC models array")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210118113651.71955-1-colin.king@canonical.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with
Baoyou Xie and Shawn Guo subsequently becoming maintainers after the
addition of the 64-bit variant.
However, the only machines that were ever supported upstream are the
reference designs, not actual set-top-box devices that would benefit
from this support. All ZTE set-top-boxes from the past few years seem
to be based on third-party SoCs. While there is very little information
about zx296702 and zx296718 on the web, I found some references to other
chips from the same family, such as zx296716 and zx296719, which were
never submitted for upstream support. Finally, there is no support for
the GPU on either of them, with the lima and panfrost device drivers
having been added after work on the zx platform had stopped.
Shawn confirmed that he has not seen any interest in this platform for
the past four years, and that it can be removed.
Thanks to Jun and Shawn for maintaining this platform over the past
five years.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When Exynos power domain driver was introduced, the only way to ensure
that power domains will be instantiated before the devices which belongs
to them was to initialize them early enough, before the devices are
instantiated in the system. This in turn required not to use any platform
device infrastructure at all, as there have been no way to ensure proper
probe order between devices.
This has been finally changed and upcomming patch "driver core: Set
fw_devlink=on by default" ensures that each device will be probbed only
when its resource providers are ready. This allows to convert Exynos
power domain driver to regular platform driver.
This is also required by the mentioned commit to enable probing any
device which belongs to the Exynos power domains, as otherwise the core
won't notice that the power domains are in fact available.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20210113110320.13149-1-m.szyprowski@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There doesn't seem to be any reason to limit this to only root user
readable. Let's make it readable by all so that random programs can
read the debugfs files in here instead of just root. The information is
just that, informational, so this is fine.
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20201216071926.3147108-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Introduce the header file include/soc/canaan/k210-sysctl.h to have a
common definition of the Canaan Kendryte K210 SoC system controller
registers. Simplify the k210 system controller driver code by removing
unused register bits definition. The MAINTAINERS file is updated,
adding the entry "CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER"
with myself listed as maintainer for this driver.
This is a preparatory patch for introducing the K210 clock driver. No
functional changes are introduced.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Rename configuration options and directories related to the Kendryte
K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte"
branding name.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
The 'litex_[set|get]_reg()' methods use the 'reg_size' parameter to
specify the width of the LiteX CSR (MMIO) register being accessed.
Since 'u64' is the widest data being supported, the value of 'reg_size'
MUST be between 1 and sizeof(u64), which SHOULD be checked at runtime
if these methods are publicly available for use by other LiteX device
drivers.
At the same time, none of the existing (or foreseeable) LiteX device
drivers have a need to access registers whose size is unknown during
compilation. As such, all LiteX device drivers should use fixed-width
accessor methods such as 'litex_[write|read][8|16|32|64]()'.
This patch renames 'litex_[set|get]_reg()' to '_litex_[set|get]_reg()',
indicating that they should NOT be directly called from outside of
the 'include/linux/litex.h' header file.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Upstream LiteX now defaults to using 32-bit CSR subregisters
(see https://github.com/enjoy-digital/litex/commit/a2b71fde).
This patch expands on commit 22447a99c9 ("drivers/soc/litex: add
LiteX SoC Controller driver"), adding support for handling both 8-
and 32-bit LiteX CSR (MMIO) subregisters, as determined by the
LITEX_SUBREG_SIZE Kconfig option.
NOTE that while LITEX_SUBREG_SIZE could theoretically be a device
tree property, defining it as a compile-time constant allows for
much better optimization of the resulting code. This is further
supported by the low expected usefulness of deploying the same
kernel across LiteX SoCs built with different CSR-Bus data widths.
Finally, the litex_[read|write][8|16|32|64]() accessors are
redefined in terms of litex_[get|set]_reg(), which, after compiler
optimization, will result in code as efficient as hardcoded shifts,
but with the added benefit of automatically matching the appropriate
LITEX_SUBREG_SIZE.
NOTE that litex_[get|set]_reg() nominally operate on 64-bit data,
but that will also be optimized by the compiler in situations where
narrower data is used from a call site.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Move generic LiteX CSR (MMIO) register accessors to litex.h and
declare them as "static inline", in preparation for supporting
32-bit CSR subregisters and 64-bit CPUs.
NOTE: this is a non-functional change.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
The test robot reported:
drivers/soc/litex/litex_soc_ctrl.c:143:34: warning: unused variable 'litex_soc_ctrl_of_match' [-Wunused-const-variable]
static const struct of_device_id litex_soc_ctrl_of_match[] = {
^
1 warning generated.
As per the random config device tree is not configured causing the
litex_soc_ctrl_of_match match list to not be used. This would usually
mean that we cannot even use this driver as it depends on device tree,
but as we also have COMPILE_TEST configured we allow it.
Fix the warning by surrounding the unused variable with an ifdef
CONFIG_OF.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
PMB originally comes from BCM63138 but can be also found on many other
chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like
PCIe, SATA, USB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Directly reading ocotp register depends on that bootloader enables ocotp
clk, which is not always effective, so change to use nvmem API. Using
nvmem API requires to support driver defer probe and thus change
soc-imx8m.c to use platform driver.
The other reason is that directly reading ocotp register causes kexec
kernel hang because the 1st kernel running will disable unused clks
after kernel boots up, and then ocotp clk will be disabled even if
bootloader enables it. When kexec kernel, ocotp clk needs to be enabled
before reading ocotp registers, and nvmem API with platform driver
supported can accomplish this.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Selecting ARM_GIC_V3 on non-CP15 processors leads to build failures
like
arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R3_EL1':
arch/arm/include/asm/arch_gicv3.h:36:40: error: 'c12' undeclared (first use in this function)
36 | #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x)
| ^~~
Add a dependency to only enable the gic driver when building for
at an ARMv7 target, which is the closes approximation to the ARMv8
processor that is actually in this chip.
Fixes: fc40200ebf ("soc: imx: increase build coverage for imx8m soc driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
After converting to builtin driver, the probe function should not call
__init functions anymore:
>> WARNING: modpost: vmlinux.o(.text+0x8884d4):
Section mismatch in reference from the function exynos_chipid_probe() to the function .init.text:product_id_to_soc_id()
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 352bfbb3e0 ("soc: samsung: exynos-chipid: convert to driver and merge exynos-asv")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20210105174440.120041-1-krzk@kernel.org
All SiPeed K210 MAIX boards have the exact same vendor, arch and
implementation IDs, preventing differentiation to select the correct
device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This
result in this macro to be useless and mandates changing the code of
the sysctl driver to change the builtin device tree suitable for the
target board.
Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since
it is used only for the K210 support. The code searching the builtin
DTBs using the vendor, arch an implementation IDs is also removed.
Support for builtin DTB falls back to the simpler and more traditional
handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly
to other architectures.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Requests sent to RPMH can be sent as fire-n-forget or response required,
with the latter ensuring the command has been completed by the hardware
accelerator. Commands in a request with tcs_cmd::wait set, would ensure
that those select commands are sent as response required, even though
the actual TCS request may be fire-n-forget.
Also, commands with .wait flag were also guaranteed to be complete
before the following command in the TCS is sent. This means that the
next command of the same request blocked until the current request is
completed. This could mean waiting for a voltage to settle or series of
NOCs be configured before the next command is sent. But drivers using
this feature have never cared about the serialization aspect. By not
enforcing the serialization we can allow the hardware to run in parallel
improving the performance.
Let's clarify the usage of this member in the tcs_cmd structure to mean
only completion and not serialization. This should also improve the
performance of bus requests where changes could happen in parallel.
Also, CPU resume from deep idle may see benefits from certain wake
requests.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1610008770-13891-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The Exynos Chip ID driver on Exynos SoCs has so far only informational
purpose - to expose the SoC device in sysfs. No other drivers depend on
it so there is really no benefit of initializing it early.
The code would be the most flexible if converted to a regular driver.
However there is already another driver - Exynos ASV (Adaptive Supply
Voltage) - which binds to the device node of Chip ID.
The solution is to convert the Exynos Chip ID to a built in driver and
merge the Exynos ASV into it.
This has several benefits:
1. Although the Exynos ASV driver binds to a device node present in all
Exynos DTS (generic compatible), it fails to probe except on the
supported ones (only Exynos5422). This means that the regular boot
process has a planned/normal device probe failure.
Merging the ASV into Chip ID will remove this probe failure because
the final driver will always bind, just with disabled ASV features.
2. Allows to use dev_info() as the SoC bus is present (since
core_initcall).
3. Could speed things up because of execution of Chip ID code in a SMP
environment (after bringing up secondary CPUs, unlike early_initcall),
This reduces the amount of work to be done early, when the kernel has
to bring up critical devices.
5. Makes the Chip ID code defer-probe friendly,
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201207190517.262051-5-krzk@kernel.org
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
If regmap_read() fails, the product_id local variable will contain
random value from the stack. Do not try to parse such value and fail
the ASV driver probe.
Fixes: 5ea428595c ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Link: https://lore.kernel.org/r/20201207190517.262051-3-krzk@kernel.org
Check if the SoC is really supported before gathering the needed
resources. This fixes endless deferred probe on some SoCs other than
Exynos5422 (like Exynos5410).
Fixes: 5ea428595c ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Link: https://lore.kernel.org/r/20201207190517.262051-2-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
We have rst_map_012 used for various accelerators like dsp, ipu and iva.
For these use cases, we have rstctrl bit 2 control the subsystem module
reset, and have and bits 0 and 1 control the accelerator specific
features.
If the bootloader, or kexec boot, has left any accelerator specific
reset bits deasserted, deasserting bit 2 reset will potentially enable
an accelerator with unconfigured MMU and no firmware. And we may get
spammed with a lot by warnings on boot with "Data Access in User mode
during Functional access", or depending on the accelerator, the system
can also just hang.
This issue can be quite easily reproduced by setting a rst_map_012 type
rstctrl register to 0 or 4 in the bootloader, and booting the system.
Let's just assert all reset bits for rst_map_012 type resets. So far
it looks like the other rstctrl types don't need this. If it turns out
that the other type rstctrl bits also need reset on init, we need to
add an instance specific reset mask for the bits to avoid resetting
unwanted bits.
Reported-by: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When triggering a TCS to send its contents, reading back the trigger
value may return an incorrect value. That is because, writing the
trigger may raise an interrupt which could be handled immediately and
the trigger value could be reset in the interrupt handler.
A write_tcs_reg_sync() would read back the value that is written and try
to match it to the value written to ensure that the value is written,
but if that value is different, we may see false error for same.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1606211610-15168-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The major hardware version of the LLCC IP is encoded in its
LLCC_COMMON_HW_INFO register. Extract the version and cache it in the
driver data so that it can be used to implement version specific
functionality like enabling Write sub cache for given SCID.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
[mani: splitted the version extract as a single patch and few cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Since at91_soc_init is called unconditionally from atmel_soc_device_init,
we get the following warning on all non AT91 SoCs:
" AT91: Could not find identification node"
Fix the same by filtering with allowed AT91 SoC list.
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201211135846.1334322-1-sudeep.holla@arm.com
This series adds:
* New drivers and OpenRISC support for the LiteX platform
* A bug fix to support userspace gdb debugging
* Fixes one compile issue with blk-iocost
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAl/bwHkACgkQw7McLV5m
J+TPbw/9FK3FQwhAuC1Uw3XeNLsjMwUJzctsLvp37W0QKmqhSYLHXc0of1nprM12
OvZbghT42hNfkO3oUqxz645wp91Eisfudr86B8V77eVyyjKrRyr8LuNqdkeIZtKu
sKkIz57Wxe1AEF+bwwkM3N7GWaIVxWHZ5Jy3lKsjqazce5uFyXmUKkQYsTX2q1Nd
vpnV95RsssEKuXJKmxsRUIJ2Ts6c0MGBM6kxEWD8tmm1Mrmy0HPeWZDbfoTTJcl8
A4pz3vMTY/CpXmcxNwCxP7esjWuV14Fwdz+HFvPhfULvxSNAB+ubh1WTc6m0f6OU
Cap88NHjPJjJu5eLPjsBeDyWD4SZOTxu1IkZkQhb7ddN235d2r9Gye0ajYxaIx+o
zaC8Y8UX1p8aYyS/wlzi0P85sNvAqhHz3g/JWD5IuCe5mBg8f6FlbT+MLTl7Z9jy
GkGVS2vOC6SxWqDoknh8S59g720DOg6j7xpLuuL8taiOMdIP7udCHLiTT6dLBr5K
bchpzWO7YZCqQxn6PeZ3qu40GB1T0+oiq9jvamwIUHi67bgfwGZfu9884v2rDxae
W/U/vxKTro4tOmoo79mNAlsYVnHSJv8fq7KVj/jhq0AREfiRmo4OI/IhRdOTG4Cd
0+XXIqgkYYDrWpdHPLCpGGpyP3APUMRmIVY/Vhoxqj+Ru0djmJ8=
=zTkl
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://github.com/openrisc/linux
Pull OpenRISC updates from Stafford Horne:
- New drivers and OpenRISC support for the LiteX platform
- A bug fix to support userspace gdb debugging
- Fixes one compile issue with blk-iocost
* tag 'for-linus' of git://github.com/openrisc/linux:
openrisc: add local64.h to fix blk-iocost build
openrisc: fix trap for debugger breakpoint signalling
openrisc: add support for LiteX
drivers/tty/serial: add LiteUART driver
dt-bindings: serial: document LiteUART bindings
drivers/soc/litex: add LiteX SoC Controller driver
dt-bindings: soc: document LiteX SoC Controller bindings
dt-bindings: vendor: add vendor prefix for LiteX
New drivers/devices
- Qualcomm ADM driver
- Qualcomm GPI driver
- Allwinner A100 DMA support
- Microchip Sama7g5 support
- Mediatek MT8516 apdma
- Updates:
- more updates to idxd driver and support for IAX config
- runtime PM support for dw driver
- TI keystone drivers for 5.11 included here due to dependency for TI
drivers
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl/bkxEACgkQfBQHDyUj
g0dxNA//WzpVy9QJnj6OgXIjM+9sBjqls0iPVfy1JeeMmVW8cgCwLyBNZcssKRye
mJ9+VnTx4JQBj4KD2cFBdpr46GvBFbSbcWNSCdm179NtHI4G6tjtynOcWaI9Clu2
0KHoa/EHIj8/jD3Hsbm+WZ1zCoY4VKBXsEq6x1Sj2tpp0/ocDhH4XLAsWTHE9OAD
sc+0OtHr1wU4EdV6TKNTT0jXsdtzxOPPsvRsoaKncnR+Mkrgv0FvMBfBLhOb3a+m
wUHEkwrEP1pT4Xcew6ZkYs4RYwJI3pllu2gUTs5qtidc723ol/C4kJ27q55N4azb
j5buA8AhEwqIDH8qNuV07qaIu2VTdTdbYid3xgAeFygwM1npecZvOf8k6rTjxR/6
XN8jaDuhc2uISY7Gt5c6tOe8rG3ffNhYrmEuGD5HI0hcglpALiE4NcgalaaQS9J1
suQ6AUtCslReD+6M/lfarn9Zd3UAKGbxU8vCNPq0EcSAGUz9u9VK2VwKiGnAZ8bb
ED3QDUzZYjTDWpiVodsuJlONgaMLsRCQecZWMDRNpzmf1rCXnkY0eDGiSMz+IiXZ
87IdD66u3d/Mkm6jVdwp6+tKZ/ohj+dtIWKhMd8cKXv5zTzS+4IokxpkxdjBsHPx
z+G73IMHjQo8xl/P0IhhwZw+7cBrkntLq8lRSbYxjSTP09QerNE=
=uNBn
-----END PGP SIGNATURE-----
Merge tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul:
"The last dmaengine updates for this year :)
This contains couple of new drivers, new device support and updates to
bunch of drivers.
New drivers/devices:
- Qualcomm ADM driver
- Qualcomm GPI driver
- Allwinner A100 DMA support
- Microchip Sama7g5 support
- Mediatek MT8516 apdma
Updates:
- more updates to idxd driver and support for IAX config
- runtime PM support for dw driver
- TI drivers"
* tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (75 commits)
soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init
dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
dmaengine: ti: k3-udma: Initial support for K3 PKTDMA
dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
dmaengine: ti: k3-udma: Initial support for K3 BCDMA
soc: ti: k3-ringacc: add AM64 DMA rings support.
dmaengine: ti: Add support for k3 event routers
dmaengine: ti: k3-psil: Add initial map for AM64
dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA
dt-bindings: dma: ti: Add document for K3 PKTDMA
dt-bindings: dma: ti: Add document for K3 BCDMA
dmaengine: dmatest: Use dmaengine_get_dma_device
dmaengine: doc: client: Update for dmaengine_get_dma_device() usage
dmaengine: Add support for per channel coherency handling
dmaengine: of-dma: Add support for optional router configuration callback
dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings
dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev
dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API
dmaengine: ti: k3-udma: Add support for second resource range from sysfw
dmaengine: ti: k3-udma: Wait for peer teardown completion if supported
...
These are additional updates for the power domain support on OMAP,
moving to an implementation based on device tree information instead of
SoC specific code. This is the latest step in the ongoing process for
moving code out of arch/arm/mach-omap2.
I kept this separate from the other driver changes since it touches
code in multiple areas.
There is one conflict in the dra7.dts file, which adds another node
in a different branch. Watch out for adding the trailing '};'
both times.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/akk0ACgkQmmx57+YA
GNlrvBAAsCH24zvoXDbKVHg+QMbjt2WAWdRCKrJ0kidAI+JACDAGpfOQcoS5wbdF
SnU3o5GtjGKfQL3UmiMA2ADIFZFWTLCTimAks/pqQRBgF4Mrh32W2YqAWP206f1U
CxsnC6pl7+C/OEoKnVgbYMusvEBp7xaA1mmeNsCudtWg4g6VjKEf232P3AqGguKb
ZGmf7g0GHvzd7Euc/71EnO9n35C9lG2d6sJx3GmJejSndEA7LhOruX94+SxUD3mz
tVcCPH2HgWOPkmZdDcu7/6lxBnzRLigB+3NXTXktynw0urZOKN5XCy5dd7MiyKEV
+R3R0YPa6cIp/K8Wt3v2azPgfXzjbHpGPTX+Ud8rHBE0wvEUYgfvU/2xLSs3rV6N
qAmOxDH3W0vdIkQaED1F1JT3YtxYM3D40z2ORp0XqR+AXvA3Yw7NOnfYu+YSMeWA
2FgAGary0QGGyCDC62M7gZiz1mDDU214PK3hxeFGTTNy3DSP6b31MlwQwyeIxL/i
rgZBwcM2BKcdmyGk3zXDud9ib4n8/S9gVaaJPbwNPPcCa2m2zUZnSyree3ATLxev
3fqNRnOthtNL7T9aUim+ae/qlbeYmU1v0iSmL+ND7GxpdL54zXRGwzllNQj5h++U
1oRiPeMpt9T47olU5sB1CQZxegq/0qJX5pn4ea9pBtnmN7wqpsM=
=0mXx
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC OMAP GenPD updates from Arnd Bergmann:
"These are additional updates for the power domain support on OMAP,
moving to an implementation based on device tree information instead
of SoC specific code. This is the latest step in the ongoing process
for moving code out of arch/arm/mach-omap2.
I kept this separate from the other driver changes since it touches
code in multiple areas"
* tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
ARM: OMAP2+: Fix am4 only build after genpd changes
ARM: dts: Configure power domain for omap5 dss
ARM: dts: omap5: add remaining PRM instances
soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
ARM: dts: Configure interconnect target module for dra7 iva
ARM: dts: dra7: add remaining PRM instances
soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
ARM: OMAP2+: Drop legacy platform data for omap4 iva
ARM: dts: Configure power domain for omap4 dsp
ARM: dts: Configure power domain for omap4 dss
ARM: dts: omap4: add remaining PRM instances
soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks
ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
ARM: dts: Use simple-pm-bus for genpd for am4 l3
ARM: dts: Move am4 l3 noc to a separate node
ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
...
There are a couple of subsystems maintained by other people that
merge their drivers through the SoC tree, those changes include:
- The SCMI firmware framework gains support for sensor notifications
and for controlling voltage domains.
- A large update for the Tegra memory controller driver, integrating
it better with the interconnect framework
- The memory controller subsystem gains support for Mediatek MT8192
- The reset controller framework gains support for sharing pulsed
resets
For Soc specific drivers in drivers/soc, the main changes are
- The Allwinner/sunxi MBUS gets a rework for the way it handles
dma_map_ops and offsets between physical and dma address spaces.
- An errata fix plus some cleanups for Freescale Layerscape SoCs
- A cleanup for renesas drivers regarding MMIO accesses.
- New SoC specific drivers for Mediatek MT8192 and MT8183 power domains
- New SoC specific drivers for Aspeed AST2600 LPC bus control
and SoC identification.
- Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660
and SDX55.
- A rework of the TI AM33xx 'genpd' power domain support to use
information from DT instead of platform data
- Support for TI AM64x SoCs
- Allow building some Amlogic drivers as modules instead of built-in
Finally, there are numerous cleanups and smaller bug fixes for
Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
Renesas, and Xilinx SoCs.
There is a trivial conflict in the cedrus driver, with two branches
adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial
remove/remove conflict in linux/dma-mapping.h.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/alSUACgkQmmx57+YA
GNm7GRAAlNMVi7F0f4Ixf1bEh+J2QUonYIpZfrdxOLFwISGQ+nstGrFW2He/OeQv
KAi027tZLl6Sdzjy809cLDPA4Z2IKwjVWhEbBHybvy1+irPYjnixtLd0x3YvPhjH
iadlcjQ3uaGue8PvubK6CVnBEy82A+Pp29n9i4A4wX/8w+BVIhVsxwQWUBF8pFXE
3La2UZYZMVMvVZMrpTOqwCgdmLDCk+RLMVZ1IiRqBEBq5/DVq03uIXgjGEOrq8tl
PXC89w7K510Is891mbBdBThQf+pZkU1vwORuknDcEJKWs9ngbEha7ebVgp32kbFl
pi8DEK205d106WQgfn0Zxkpbsp8XD058wDILwkhBcteXlBaUEL6btGVLDTUCJZuv
/pkH8tL4lNGpThQFbCEXC8oHZBp2xk55P+SW9RRZOoA5tAp+sz7hlf3y3YKdCSxv
4xybeeVOAgjl01WtbEC7CuIkqcKVSQ7njhLhC8r5ASteNywDThqxLT6nd0VegcQc
YH3Eu9QRXpvFwQ35zMkTMWa27bMG5d60fp90bWT0R5amXZpxJJot87w8trFCxv74
mE5KvCbefCRNsTt8GOBA/WR7hVaG369g07qOvs7g4LjJEM3Nl2h/A4/zVFef9O0t
yq3Nm4YCGfDSAQXzGR2SJ3nxiqbDknzJTAtZPf4BmbaMuPOIJ5k=
=BjJf
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"There are a couple of subsystems maintained by other people that merge
their drivers through the SoC tree, those changes include:
- The SCMI firmware framework gains support for sensor notifications
and for controlling voltage domains.
- A large update for the Tegra memory controller driver, integrating
it better with the interconnect framework
- The memory controller subsystem gains support for Mediatek MT8192
- The reset controller framework gains support for sharing pulsed
resets
For Soc specific drivers in drivers/soc, the main changes are
- The Allwinner/sunxi MBUS gets a rework for the way it handles
dma_map_ops and offsets between physical and dma address spaces.
- An errata fix plus some cleanups for Freescale Layerscape SoCs
- A cleanup for renesas drivers regarding MMIO accesses.
- New SoC specific drivers for Mediatek MT8192 and MT8183 power
domains
- New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
identification.
- Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
SDX55.
- A rework of the TI AM33xx 'genpd' power domain support to use
information from DT instead of platform data
- Support for TI AM64x SoCs
- Allow building some Amlogic drivers as modules instead of built-in
Finally, there are numerous cleanups and smaller bug fixes for
Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
Renesas, and Xilinx SoCs"
* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
firmware: xilinx: Properly align function parameter
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Remove additional newline
firmware: xilinx: Fix kernel-doc warnings
firmware: xlnx-zynqmp: fix compilation warning
soc: xilinx: vcu: add missing register NUM_CORE
soc: xilinx: vcu: use vcu-settings syscon registers
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: drop useless success message
clk: samsung: mark PM functions as __maybe_unused
soc: samsung: exynos-chipid: initialize later - with arch_initcall
soc: samsung: exynos-chipid: order list of SoCs by name
memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
memory: ti-emif-sram: only build for ARMv7
memory: tegra30: Support interconnect framework
memory: tegra20: Support hardware versioning and clean up OPP table initialization
dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
reset-controller: ti: force the write operation when assert or deassert
...
- Use local_clock() instead of jiffies in the cpufreq statistics to
improve accuracy (Viresh Kumar).
- Fix up OPP usage in the cpufreq-dt and qcom-cpufreq-nvmem cpufreq
drivers (Viresh Kumar).
- Clean up the cpufreq core, the intel_pstate driver and the
schedutil cpufreq governor (Rafael Wysocki).
- Fix up error code paths in the sti-cpufreq and mediatek cpufreq
drivers (Yangtao Li, Qinglang Miao).
- Fix cpufreq_online() to return error codes instead of success (0)
in all cases when it fails (Wang ShaoBo).
- Add mt8167 support to the mediatek cpufreq driver and blacklist
mt8516 in the cpufreq-dt-platdev driver (Fabien Parent).
- Modify the tegra194 cpufreq driver to always return values from
the frequency table as the current frequency and clean up that
driver (Sumit Gupta, Jon Hunter).
- Modify the arm_scmi cpufreq driver to allow it to discover the
power scale present in the performance protocol and provide this
information to the Energy Model (Lukasz Luba).
- Add missing MODULE_DEVICE_TABLE to several cpufreq drivers (Pali
Rohár).
- Clean up the CPPC cpufreq driver (Ionela Voinescu).
- Fix NVMEM_IMX_OCOTP dependency in the imx cpufreq driver (Arnd
Bergmann).
- Rework the poling interval selection for the polling state in
cpuidle (Mel Gorman).
- Enable suspend-to-idle for PSCI OSI mode in the PSCI cpuidle
driver (Ulf Hansson).
- Modify the OPP framework to support empty (node-less) OPP tables
in DT for passing dependency information (Nicola Mazzucato).
- Fix potential lockdep issue in the OPP core and clean up the OPP
core (Viresh Kumar).
- Modify dev_pm_opp_put_regulators() to accept a NULL argument and
update its users accordingly (Viresh Kumar).
- Add frequency changes tracepoint to devfreq (Matthias Kaehlcke).
- Add support for governor feature flags to devfreq, make devfreq
sysfs file permissions depend on the governor and clean up the
devfreq core (Chanwoo Choi).
- Clean up the tegra20 devfreq driver and deprecate it to allow
another driver based on EMC_STAT to be used instead of it (Dmitry
Osipenko).
- Add interconnect support to the tegra30 devfreq driver, allow it
to take the interconnect and OPP information from DT and clean it
up ((Dmitry Osipenko).
- Add interconnect support to the exynos-bus devfreq driver along
with interconnect properties documentation (Sylwester Nawrocki).
- Add suport for AMD Fam17h and Fam19h processors to the RAPL power
capping driver (Victor Ding, Kim Phillips).
- Fix handling of overly long constraint names in the powercap
framework (Lukasz Luba).
- Fix the wakeup configuration handling for bridges in the ACPI
device power management core (Rafael Wysocki).
- Add support for using an abstract scale for power units in the
Energy Model (EM) and document it (Lukasz Luba).
- Add em_cpu_energy() micro-optimization to the EM (Pavankumar
Kondeti).
- Modify the generic power domains (genpd) framwework to support
suspend-to-idle (Ulf Hansson).
- Fix creation of debugfs nodes in genpd (Thierry Strudel).
- Clean up genpd (Lina Iyer).
- Clean up the core system-wide suspend code and make it print
driver flags for devices with debug enabled (Alex Shi, Patrice
Chotard, Chen Yu).
- Modify the ACPI system reboot code to make it prepare for system
power off to avoid confusing the platform firmware (Kai-Heng Feng).
- Update the pm-graph (multiple changes, mostly usability-related)
and cpupower (online and offline CPU information support) PM
utilities (Todd Brandt, Brahadambal Srinivasan).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl/Y8mcSHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRxjY4QAKsNFJeEtjGCxq7MxQIML3QLAsdJM9of
9kkY9skMEw4v1TRmyy7sW9jZW2pLSRcLJwWRKWu4143qUS3YUp2DQ0lqX4WyXoWu
BhnkhkMUl6iCeBO8CWnt8zsTuqSa20A13sL9LyqN1+7OZKHD8StbT4hKjBncdNNN
4aDj+1uAPyOgj2iCUZuHQ8DtpBvOLjgTh367vbhbufjeJ//8/9+R7s4Xzrj7wtmv
JlE0LDgvge9QeGTpjhxQJzn0q2/H5fg9jbmjPXUfbHJNuyKhrqnmjGyrN5m256JI
8DqGqQtJpmFp7Ihrur3uKTk3gWO05YwJ1FdeEooAKEjEMObm5xuYhKVRoDhmlJAu
G6ui+OAUvNR0FffJtbzvWe/pLovLGOEOHdvTrZxUF8Abo6br3untTm8rKTi1fhaF
wWndSMw0apGsPzCx5T+bE7AbJz2QHFpLhaVAutenuCzNI8xoMlxNKEzsaVz/+FqL
Pq/PdFaM4vNlMbv7hkb/fujkCs/v3EcX2ihzvt7I2o8dBS0D1X8A4mnuWJmiGslw
1ftbJ6M9XacwkPBTHPgeXxJh2C1yxxe5VQ9Z5fWWi7sPOUeJnUwxKaluv+coFndQ
sO6JxsPQ4hQihg8yOxLEkL6Wn68sZlmp+u2Oj+TPFAsAGANIA8rJlBPo1ppJWvdQ
j1OCIc/qzwpH
=BVdX
-----END PGP SIGNATURE-----
Merge tag 'pm-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"These update cpufreq (core and drivers), cpuidle (polling state
implementation and the PSCI driver), the OPP (operating performance
points) framework, devfreq (core and drivers), the power capping RAPL
(Running Average Power Limit) driver, the Energy Model support, the
generic power domains (genpd) framework, the ACPI device power
management, the core system-wide suspend code and power management
utilities.
Specifics:
- Use local_clock() instead of jiffies in the cpufreq statistics to
improve accuracy (Viresh Kumar).
- Fix up OPP usage in the cpufreq-dt and qcom-cpufreq-nvmem cpufreq
drivers (Viresh Kumar).
- Clean up the cpufreq core, the intel_pstate driver and the
schedutil cpufreq governor (Rafael Wysocki).
- Fix up error code paths in the sti-cpufreq and mediatek cpufreq
drivers (Yangtao Li, Qinglang Miao).
- Fix cpufreq_online() to return error codes instead of success (0)
in all cases when it fails (Wang ShaoBo).
- Add mt8167 support to the mediatek cpufreq driver and blacklist
mt8516 in the cpufreq-dt-platdev driver (Fabien Parent).
- Modify the tegra194 cpufreq driver to always return values from the
frequency table as the current frequency and clean up that driver
(Sumit Gupta, Jon Hunter).
- Modify the arm_scmi cpufreq driver to allow it to discover the
power scale present in the performance protocol and provide this
information to the Energy Model (Lukasz Luba).
- Add missing MODULE_DEVICE_TABLE to several cpufreq drivers (Pali
Rohár).
- Clean up the CPPC cpufreq driver (Ionela Voinescu).
- Fix NVMEM_IMX_OCOTP dependency in the imx cpufreq driver (Arnd
Bergmann).
- Rework the poling interval selection for the polling state in
cpuidle (Mel Gorman).
- Enable suspend-to-idle for PSCI OSI mode in the PSCI cpuidle driver
(Ulf Hansson).
- Modify the OPP framework to support empty (node-less) OPP tables in
DT for passing dependency information (Nicola Mazzucato).
- Fix potential lockdep issue in the OPP core and clean up the OPP
core (Viresh Kumar).
- Modify dev_pm_opp_put_regulators() to accept a NULL argument and
update its users accordingly (Viresh Kumar).
- Add frequency changes tracepoint to devfreq (Matthias Kaehlcke).
- Add support for governor feature flags to devfreq, make devfreq
sysfs file permissions depend on the governor and clean up the
devfreq core (Chanwoo Choi).
- Clean up the tegra20 devfreq driver and deprecate it to allow
another driver based on EMC_STAT to be used instead of it (Dmitry
Osipenko).
- Add interconnect support to the tegra30 devfreq driver, allow it to
take the interconnect and OPP information from DT and clean it up
(Dmitry Osipenko).
- Add interconnect support to the exynos-bus devfreq driver along
with interconnect properties documentation (Sylwester Nawrocki).
- Add suport for AMD Fam17h and Fam19h processors to the RAPL power
capping driver (Victor Ding, Kim Phillips).
- Fix handling of overly long constraint names in the powercap
framework (Lukasz Luba).
- Fix the wakeup configuration handling for bridges in the ACPI
device power management core (Rafael Wysocki).
- Add support for using an abstract scale for power units in the
Energy Model (EM) and document it (Lukasz Luba).
- Add em_cpu_energy() micro-optimization to the EM (Pavankumar
Kondeti).
- Modify the generic power domains (genpd) framwework to support
suspend-to-idle (Ulf Hansson).
- Fix creation of debugfs nodes in genpd (Thierry Strudel).
- Clean up genpd (Lina Iyer).
- Clean up the core system-wide suspend code and make it print driver
flags for devices with debug enabled (Alex Shi, Patrice Chotard,
Chen Yu).
- Modify the ACPI system reboot code to make it prepare for system
power off to avoid confusing the platform firmware (Kai-Heng Feng).
- Update the pm-graph (multiple changes, mostly usability-related)
and cpupower (online and offline CPU information support) PM
utilities (Todd Brandt, Brahadambal Srinivasan)"
* tag 'pm-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (86 commits)
cpufreq: Fix cpufreq_online() return value on errors
cpufreq: Fix up several kerneldoc comments
cpufreq: stats: Use local_clock() instead of jiffies
cpufreq: schedutil: Simplify sugov_update_next_freq()
cpufreq: intel_pstate: Simplify intel_cpufreq_update_pstate()
PM: domains: create debugfs nodes when adding power domains
opp: of: Allow empty opp-table with opp-shared
dt-bindings: opp: Allow empty OPP tables
media: venus: dev_pm_opp_put_*() accepts NULL argument
drm/panfrost: dev_pm_opp_put_*() accepts NULL argument
drm/lima: dev_pm_opp_put_*() accepts NULL argument
PM / devfreq: exynos: dev_pm_opp_put_*() accepts NULL argument
cpufreq: qcom-cpufreq-nvmem: dev_pm_opp_put_*() accepts NULL argument
cpufreq: dt: dev_pm_opp_put_regulators() accepts NULL argument
opp: Allow dev_pm_opp_put_*() APIs to accept NULL opp_table
opp: Don't create an OPP table from dev_pm_opp_get_opp_table()
cpufreq: dt: Don't (ab)use dev_pm_opp_get_opp_table() to create OPP table
opp: Reduce the size of critical section in _opp_kref_release()
PM / EM: Micro optimization in em_cpu_energy
cpufreq: arm_scmi: Discover the power scale in performance protocol
...
Pull i2c updates from Wolfram Sang:
"A bit smaller this time with mostly usual driver updates. Slave
support for imx stands out a little"
* 'i2c/for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (30 commits)
i2c: remove check that can never be true
i2c: Warn when device removing fails
dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC
dt-bindings: i2c: Add compatible string for AM64 SoC
i2c: designware: Make register offsets all of the same width
i2c: designware: Switch header to use BIT() and GENMASK()
i2c: pxa: move to generic GPIO recovery
i2c: sh_mobile: Mark adapter suspended during suspend
i2c: owl: Add compatible for the Actions Semi S500 I2C controller
dt-bindings: i2c: owl: Convert Actions Semi Owl binding to a schema
i2c: imx: support slave mode for imx I2C driver
i2c: ismt: Adding support for I2C_SMBUS_BLOCK_PROC_CALL
i2c: ocores: Avoid false-positive error log message.
Revert "i2c: qcom-geni: Disable DMA processing on the Lenovo Yoga C630"
i2c: mxs: Remove unneeded platform_device_id
i2c: pca-platform: drop two members from driver data that are assigned to only
i2c: imx: Remove unused .id_table support
i2c: nvidia-gpu: drop empty stub for runtime pm
dt-bindings: i2c: mellanox,i2c-mlxbf: convert txt to YAML schema
i2c: mv64xxx: Add bus error recovery
...
Detailed description for this pull request:
1. Update devfreq core
- Add new devfreq_frequency tracepoint to show the frequency change
information.
- Add governor feature flag. The devfreq governor is able to
have the specific flag in order to contain the non-common feature.
For example, if governor contains the 'immutable' feature, don't allow
user to change the governor via sysfs.
- Add governor sysfs attribute flag for each sysfs file. Prior to that
devfreq subsystem show the all sysfs files regardless of governor type.
But, some sysfs fils are not supported on the specific devfreq governor.
In order to show the only supported sysfs files according to the governor,
clarify the access permission of sysfs attributes according to governor.
When adding the devfreq governor, can specify the available attribute
information by using DEVFREQ_GOV_ATTR_* constant variable. The user can
read or write the sysfs attributes in accordance to the specified attributes.
- Clean-up the code to remove the duplicate code for the devfreq tracepoint
and to remove redundant governor_name field from struct devfreq
2. Update exynos-bus.c devfreq driver
- Add interconnect API support for the Samsung Exynos Bus Frequency driver
of exynos-bus.c. Complementing the devfreq driver with an interconnect
functionality allows to ensure the QoS requirements of devices accessing
the system memory (e.g. video processing devices) are fulfilled
and allows to avoid issues like the DMA underrun.
3. Update tegra devfreq driver
- Add interconnect support and OPP interface for tegra30-devfreq.c.
Also, it is to guarantee the QoS requirement of some devices like
display controller.
- Move tegra20-devfreq.c from drivers/devfreq/ into driver/memory/tegra/
in order to use the more proper monitoring feature such as EMC_STAT
which is based in driver/memory/tegra/.
- Separate the configuration information for different SoC on
tegra30-devfrqe.c. The tegra30-devfreq.c had been supported both
tegra30-actmon and tegra124-actmon devices. In order to use
the more correct configuration data, separate them.
- Use dev_err_probe() to handle the deferred probe error on tegra30-devfreq.c.
4. Pull the request of 'Tegra SoC and clock controller changes for v5.11'
sent by Krzysztof Kozlowski <krzk@kernel.org> in order to prevent the
build error.
-----BEGIN PGP SIGNATURE-----
iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAl/TI+UWHGN3MDAuY2hv
aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU8M/EAClq1DatrIsc6eysfvUUYhZgGD4
QC3WrIQ858y9/rZT1If+uZeif6DonOSIYBetCa0Wo5kiuN3BvSCZEnAsndqRPjk1
NyvRbThXUCMrtlgah/rsVPRCgwS8UidTeCqhO1n2kvHlIINgyvqS8EVpDbrOjf8s
0MFAmsh/PK0bIQC53yHs24XhLm4ddk+K1Gw2xlyd+c2E/+6MGeKbtc1nfqSy337K
3GJe9IwC0JHQGC1tPi4wnA+/S+gK0/tP3RGPlF9fk+fnccWSDhIu6tQQh1hjaLwC
5hbjwavEcr67/E0/zkQs+Bm7mEHtHFERAOPKv3C4UzPCL5wg/Z6hVphaKb+hjFDE
kD2JRCyNHwSFemu78+ooef2Af745AH9OJ6Z1ADwTyyI6wPS0qUm0/m3Eu33kJdPb
f7v+DMkqEnzEGn6gMJ2/WAEXmGi7vjwp6W6bqf5Ft13te7K8OKK8jNiFcgDPXznN
7km9gG8/j/nS9J5s01VhxU9QmwD65RsKR8upBhIpkPoMktBoH7Q4P2Ab9XlZbliG
F0p1S6dnwxQI3BIP+BwkGVwgSINPd6bd7PyTCQJx2d3VqF5JVW3jEfXouWw6h8zO
pW+lgUBr8+M5K99UYj8wktROtt5kKQQ0yd85XBdIqSZWZJ2J/D71XxcDjvZdvF3L
4vAeDY224dRuy+PP7g==
=t1gj
-----END PGP SIGNATURE-----
Merge tag 'devfreq-next-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux
Pull devfreq updates for 5.11 from Chanwoo Choi:
1. Update devfreq core
- Add new devfreq_frequency tracepoint to show the frequency change
information.
- Add governor feature flag. The devfreq governor is able to set the
specific flag in order to support a non-common feature. For
example, if the governor supports the 'immutable' feature, don't
allow user space to change the governor via sysfs.
- Add governor sysfs attribute flag for each sysfs file. Prior to that
the devfreq subsystem allowed all of the sysfs files to be accessed
regardless of the governor type. But some sysfs fils are not
supported by specific devfreq governors. In order to only allow the
sysfs files supported by the governor to be accessed, clarify the
access permissions of sysfs attributes according to the governor.
When adding the devfreq governor, specify the available attribute
information by using DEVFREQ_GOV_ATTR_* symbols. The user can read
or write the sysfs attributes in accordance to the specified
access permissions.
- Clean-up the code to reduce duplication for the devfreq tracepoint
and to remove redundant governor_name field from struct devfreq.
2. Update exynos-bus.c devfreq driver
- Add interconnect API support to the Samsung Exynos Bus Frequency
driver, exynos-bus.c. Complementing the devfreq driver with
interconnect functionality allows to ensure that the QoS
requirements regarding devices accessing the system memory (e.g.
video processing devices) will be met and allows to avoid issues
like DMA underrun.
3. Update tegra devfreq driver
- Add interconnect support and OPP interface to tegra30-devfreq.c.
Also, it is to guarantee the QoS requirement of some devices like
the display controller.
- Move tegra20-devfreq.c from drivers/devfreq/ into drivers/memory/tegra/
in order to use the more proper monitoring feature such as EMC_STAT
which is located in drivers/memory/tegra/.
- Separate the configuration information for different SoCs in
tegra30-devfrqe.c. The tegra30-devfreq.c had been supporting both
tegra30-actmon and tegra124-actmon devices. In order to use the
more correct configuration data, separate them.
- Use dev_err_probe() to handle the deferred probe error in
tegra30-devfreq.c.
4. Pull the request of 'Tegra SoC and clock controller changes for
v5.11' sent by Krzysztof Kozlowski <krzk@kernel.org> in order to
avoid a build error."
* tag 'devfreq-next-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
PM / devfreq: tegra30: Separate configurations per-SoC generation
PM / devfreq: tegra30: Support interconnect and OPPs from device-tree
PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver
PM / devfreq: exynos-bus: Add registration of interconnect child device
dt-bindings: devfreq: Add documentation for the interconnect properties
soc/tegra: fuse: Add stub for tegra_sku_info
soc/tegra: fuse: Export tegra_read_ram_code()
clk: tegra: Export Tegra20 EMC kernel symbols
PM / devfreq: tegra30: Silence deferred probe error
PM / devfreq: tegra20: Relax Kconfig dependency
PM / devfreq: tegra20: Silence deferred probe error
PM / devfreq: Remove redundant governor_name from struct devfreq
PM / devfreq: Add governor attribute flag for specifc sysfs nodes
PM / devfreq: Add governor feature flag
PM / devfreq: Add tracepoint for frequency changes
PM / devfreq: Unify frequency change to devfreq_update_target func
trace: events: devfreq: Use fixed indentation size to improve readability
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.
The ring SW interface is similar to ringacc with some major architectural
differences, like
They are part of the DMA (BCDMA or PKTDMA).
They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).
The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.
AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201208090440.31792-17-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Because mtk-mmsys uses the 'devm_platform_ioremap_resource' function, it
should depend on HAS_IOMEM.
Fixes: cc6576029a ("soc: mediatek: mmsys: Use devm_platform_ioremap_resource()")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20201203121447.3366406-1-enric.balletbo@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Mark PM functions of newly added clkout module as unused to silence
!CONFIG_PM warnings.
2. Initialize ChipID driver later - in arch initcall.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl/N3LYQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1ypgEACCrGfUogzHx4fnqx6C4awccW6zm+ZfZFOv
XkPu42tj5GaxpHUn0X4ICTsyEjOnZRp0DSKLwyUQuxTY9Y7jftceo59fiG1jZjtE
tabhwGfqC63KSftVkgNa0vvmvn6D4z99/ogbAG7O6X+X68g+ha6nIOba0tKpWMMZ
MXa9zdKxJmUBvo80glYmsJuA+GtPWNDEnVvM3LLvZo8j+9v1EdCCMMjrX2rl3V7q
RRuvyzmAiVTM6K5WZ4KNvnFUCU6qGPBRVATp1WVDO3cpHrfvw91//Hv7+p/df2KG
hyhq5N6is0WYJnKEcPuqtBNUzFwjt2xN5LSCJu8dCGzn+VdXkT5WTrc14cLq4QAS
LsclYkaKz/nEwwR9lfM6ELLM+Mj76T8/t0ZC+XV/fJo4kocDCeDSWlDkNmPJ6yqe
1+T/Zda/MED9DFVbmPnYqgbVDLXLpt+2S1OD0AGeVyrcWAPvRVMEXvcM21Vej0OB
KeLKX5HLm1JRNkMbNN6h//pgxL//8c3Z4AE4272nP7I5ZvodUNg/LIHrapOha92j
EJYE40ek4925OwLBtp2tjE9M0IqLSDCPcjGlGtQXYU440Sjz+3MUbQQimbLAKBv/
d67OuLsXTu+9JTA8U/8y+OxS55gBKbk/HdCNNehUGRg3YDjtQ3ih9NC2jUycAjY3
zlU56B20tw==
=VCRg
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.11, part two
1. Mark PM functions of newly added clkout module as unused to silence
!CONFIG_PM warnings.
2. Initialize ChipID driver later - in arch initcall.
* tag 'samsung-drivers-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
clk: samsung: mark PM functions as __maybe_unused
soc: samsung: exynos-chipid: initialize later - with arch_initcall
soc: samsung: exynos-chipid: order list of SoCs by name
Link: https://lore.kernel.org/r/20201207074528.4475-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Switch the "logicoreip" registers to the new xlnx,vcu-settings binding
to be able to read the settings if the settings are specified in a
separate device tree node that is shared with other drivers.
If the driver is not able to find a node with the new binding, fall back
to check for the logicore register bank to be backwards compatible.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Link: https://lore.kernel.org/r/20201109134818.4159342-4-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The message that the driver was successfully probed only adds useless
noise. Drop the message.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Link: https://lore.kernel.org/r/20201109134818.4159342-2-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Minor fixes for the io-domain soc-driver
* tag 'v5.11-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
soc: rockchip: io-domain: Remove incorrect and incomplete comment header
Link: https://lore.kernel.org/r/2045618.irdbgypaU6@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
soc: amlogic: driver updates for v5.11
- enable building as modules
- reset API updates
* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
soc: amlogic: replace devm_reset_control_array_get()
soc: amlogic: canvas: add missing put_device() call in meson_canvas_get()
firmware: meson-sm: enable build as module
soc: meson: enable building drivers as modules
soc: amlogic: socinfo: build for specific arch
Link: https://lore.kernel.org/r/7him9ljgtr.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
drivers: soc: TI SOC changes for 5.11
- ti_sci changes towards DMSS support
- Static warning fixes
- Kconfig update for Keystone ARM64 socs
- AM64X SOC family support
* tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits)
drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe
soc: ti: Fix reference imbalance in knav_dma_probe
soc: ti: pruss: Remove wrong check against *get_match_data return value
soc: ti: Kconfig: Drop ARM64 SoC specific configs
soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state'
soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
soc: ti: pm33xx: Remove set but unused variable 'ret'
soc: ti: knav_dma: Fix a kernel function doc formatting issue
soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
soc: ti: knav_qmss: fix reference leak in knav_queue_probe
soc: ti: k3-socinfo: Add entry for AM64X SoC family
soc: ti: k3-ringacc: Use correct device for allocation in RING mode
firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
firmware: ti_sci: rm: Add new ops for ring configuration
firmware: ti_sci: rm: Remove ring_get_config support
firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
...
Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Driver changes for omaps for genpd for v5.11 merge window
This series of changes allows booting am335x with genpd and
device tree data without the legacy platform data. Also at
least am437x can be booted with gendp with power domain and
dts data. The SoC specific dts changes will be a separate
pull request.
We need the following driver changes merged before the dts
changes can be done:
- platform code needs a few improvments to probe l4_wkup first
for clocks, and to bail out when there is no platform data
- ti-sysc driver needs a non-urgent fix for asserting rstctrl
reset only after disabling the clocks, to probe modules with
no known control registers, and added quirk handling for gpmc
devices
- omap-prm driver needs a non-urgent fix for reset status bit,
support added for pm_clk, and then we add the rest of am335x
power domain data
- clock driver for am335x needs to keep l3_main clock enabled
with genpd for suspend and resume to work
- wkup_m3 remoteproc driver needs support added for reset
control if available instead of the legacy pdata callbacks
- pm33xx driver needs PM runtime support added for genpd
The am335x specific driver changes for the clock, wkup_m3,
pm33xx and remoteproc drivers are quite trivial and have not
caused merge conflicts in Linux next. I did not get acks for
these changes except from Santosh but had already pushed out
the branch already at that point. So I've added the related
driver maintainers to Cc.
* tag 'omap-for-v5.11/genpd-drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
remoteproc/wkup_m3: Use reset control driver if available
soc: ti: pm33xx: Enable basic PM runtime support for genpd
soc: ti: omap-prm: am3: add genpd support for remaining PRM instances
soc: ti: omap-prm: Add pm_clk for genpd
clk: ti: am33xx: Keep am3 l3 main clock always on for genpd
bus: ti-sysc: Implement GPMC debug quirk to drop platform data
bus: ti-sysc: Support modules without control registers
ARM: OMAP2+: Probe PRCM first to probe l4_wkup with simple-pm-bus
ARM: OMAP2+: Check for inited flag
bus: ti-sysc: Assert reset only after disabling clocks
soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
bus: ti-sysc: Fix reset status check for modules with quirks
ARM: OMAP2+: Fix missing select PM_GENERIC_DOMAINS_OF
ARM: OMAP2+: Fix location for select PM_GENERIC_DOMAINS
Link: https://lore.kernel.org/r/pull-1606806458-694517@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Qualcomm driver updates for v5.11
This adds support for the core power domains on MSM8916, MSM8939, SDM660
and SDX55. It adds SM8150 support to the last-level cache controller
driver and it makes it possible to build the Command DB and RPMh drivers
as modules.
It also contains a slew of smaller cleanups, style and bug fixes
throughout the various drivers.
* tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
soc: qcom: rpmhpd: Add SDX55 power domains
dt-bindings: power: Add rpm power domain bindings for sdx55
soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
samples: qmi: Constify static qmi ops
soc: qcom: pdr: Constify static qmi structs
soc: qcom: initialize local variable
soc: qcom: socinfo: add soc ids for msm8953 variants
soc: qcom: geni: Remove "iova" check
soc: qcom: llcc: Add configuration data for SM8150
dt-bindings: msm: Add LLCC for SM8150
soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header
soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'
soc: qcom: rpmhpd: Provide some missing struct member descriptions
soc: qcom: llcc-qcom: Fix expected kernel-doc formatting
soc: qcom: smp2p: Remove unused struct attribute provide another
soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers
soc: qcom: smsm: Fix some kernel-doc formatting and naming problems
soc: qcom: smem: Fix formatting and missing documentation issues
soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'
soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'
...
Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Exynos ChipID driver on Exynos SoCs has only informational
purpose - to expose the SoC device in sysfs. No other drivers
depend on it so there is really no benefit of initializing it early.
Instead, initialize everything with arch_initcall which:
1. Allows to use dev_info() as the SoC bus is present (since
core_initcall),
2. Could speed things up because of execution in a SMP environment
(after bringing up secondary CPUs, unlike early_initcall),
3. Reduces the amount of work to be done early, when the kernel has to
bring up critical devices.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201202195955.128633-2-krzk@kernel.org
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.
Fixes: e943c43b32 ("PM: AVS: rockchip-io: Move the driver to the rockchip specific drivers")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhang Changzhong <zhangchangzhong@huawei.com>
Link: https://lore.kernel.org/r/1607070805-33038-1-git-send-email-zhangchangzhong@huawei.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
devm_reset_control_array_get_exclusive() looks more readable
Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/1605667700-16681-1-git-send-email-yejune.deng@gmail.com
if of_find_device_by_node() succeed, meson_canvas_get() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.
Fixes: 382f8be045 ("soc: amlogic: canvas: Fix meson_canvas_get when probe failed")
Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201117011322.522477-1-yukuai3@huawei.com
New drivers:
- SoC info driver to expose revision information
New features:
- AST2600 support for the LPC control driver. This includes
setting the LPC2AHB bridge up in a backwards compatible manner.
Cleanups:
- LPC control
- Kconfig
- Bindings updates for AST2600 strings
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl/Ekp8ACgkQa3ZZB4FH
cJ5CkA/+OqPM3CmJlxqgzy496suswaEeMlyuSECSmpQ6Z6jHIvKybzBXlf8zQXsW
IFObgwqYdGBGOPG4HmvwJ307f2FjIgscEFJGr5kuZli47HTr288xRoAqDH7Oa5xu
S8UcgxcpkSnAqUVErn9JplpCpKEt2Qzb4VoMZ2s5NtQDpkQUwybkO5siuG7Ck265
9mzrQgSZ05zD+VSLA5EknQqsrtcTun7fQuBh3DW+4SUCAkzeGCTqkgT2jdvZ+TSu
jcOMvBGu+gQ2cV2FewQroJ072cIDt6JbPiFDlg+16DoB6N4c4hLypSY62UIDk4Lt
Y3QRrh7KKAzZ0Ofi1Hlj98/eMClK5h/W0ry3AyQtP3lwtAEVmMYiSm8xyU3lxTEi
Ohhnwlmm+Ak00fmEKgHlTf9brIYncq3ErAjVOhDvlXBdEMXQGySoON/q81NqVWSA
TXQXNrAUKkGMO6kHt8x8+8k07tBhqg170Wm10flQrgpP7rnsKgYxdSsQZ7dJvURI
Ydh+E2DO2d15JDoQii+1RPalcB1AZZCC4hr4Qw0U884DM0uK0M3309vGnUy3nPHS
vIy6QdW9QGnvsdldFeYMGVF0WAeBwIKvIFVf95hqhmqYjdUkPhomaqtWydVrpjNq
VbF0zKKgOyDOIDpeS1k4YJ3uwps/D1rgCrer+ausclaQJJOreEw=
=KcaK
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers
ASPEED soc driver updates for 5.11
New drivers:
- SoC info driver to expose revision information
New features:
- AST2600 support for the LPC control driver. This includes
setting the LPC2AHB bridge up in a backwards compatible manner.
Cleanups:
- LPC control
- Kconfig
- Bindings updates for AST2600 strings
* tag 'aspeed-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
soc: aspeed: Enable drivers with ARCH_ASPEED
soc: aspeed: Fix a reference leak in aspeed_socinfo_init()
soc: aspeed: remove unneeded semicolon
soc: aspeed-lpc-ctrl: Fix driver name
soc: aspeed-lpc-ctrl: Fix whitespace
soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600
soc: aspeed-lpc-ctrl: Fail probe of lpc-ctrl if reserved memory is not aligned
soc: aspeed: lpc: Add AST2600 compatible strings
dt-bindings: aspeed-lpc: Add AST2600 compatible strings
ARM: dts: aspeed: Add silicon id node
soc: aspeed: Add soc info driver
dt-bindings: aspeed: Add silicon id node to SCU
soc: aspeed: Improve kconfig
Link: https://lore.kernel.org/r/CACPK8Xe=9ezhyWRMqVOEQr7SU1YoYfVBGGdGzjmE4SiBr--vJQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add support for new power domain driver.
- add support for mt8183 and mt8192
devapc:
- add support for the devapc device found on mt6779 to identify of
malicious bus accesses from a controller to a device
mmsys:
- move DDP routing IDs into the driver
cmdq:
- drop timeout handler support as not usefull
scpsys:
- print warning on theoretical error
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl/EDZoXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7zEw/8DW7/eqjvP71tJG7qvlhASy1R
S6YYrnmx8R/A41um3tAYcfgPCm+xPGeqIsBRFWOxmLmw71ebu/EQyuuvGFx6qY2c
p4pZdafkM7IrNYD0JLpLIpFZAqikPtz2WefzPqHD8WTaGKqQ+neoNWS2twVIpiTz
N0wpkl3BuFTcjirDaeME8BY31UxhP2E9LK+IMSZmfnhfIJjgw4/A5/pbAVM+EUhC
LqqSRn1uGmvibAQXVFDyhk/tLZJCe4X3OLkgXwlTKCIcd0qpVCWT+2xoxIV7r30G
Ldddt8LwVVuebSaY5NTtQQy4t0ZBx79a+17eTDt/+cIc6k3F5Bucnl/dKssWS9dO
/lXs5jpJvcmeWNgvYhbGhXj42CrekY3I3aZpZnJDCl6dG74NWbWSe+xAxxH417s0
9t5cNDLW9L21NhkMGXFX+a8LbMiT1s+UeM4UXHnCGHX2Mx2cQoP/ATr7d5ED+Jr6
3xdKO6r7YnJANZ4UAvIVhbbak2pMT5BUhU/jM1LAMZ/JkEscfjyvdOyorAMFR5Ka
hUFcfaJJ0hcVkfSEbF0LPsoNI8XHIY1i0bar4ZIKYr6asTgtVyHHh/BHfO25LW+4
T4Vpr3ugj7znuomFuPCYXfy/3NN1TlFWfTtI8GwGCAdX6gihdoJ/We8KRqoCWrdp
bEefKIDJxFWMNMA48j0=
=mQNT
-----END PGP SIGNATURE-----
Merge tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
power-domains:
- add support for new power domain driver.
- add support for mt8183 and mt8192
devapc:
- add support for the devapc device found on mt6779 to identify of
malicious bus accesses from a controller to a device
mmsys:
- move DDP routing IDs into the driver
cmdq:
- drop timeout handler support as not usefull
scpsys:
- print warning on theoretical error
* tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
soc: mediatek: mmsys: Use devm_platform_ioremap_resource()
soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
soc: mediatek: add mt6779 devapc driver
dt-bindings: devapc: add bindings for mtk-devapc
soc / drm: mediatek: cmdq: Remove timeout handler in helper function
soc: mediatek: pm-domains: Add support for mt8192
soc: mediatek: pm-domains: Add default power off flag
soc: mediatek: pm-domains: Add support for mt8183
soc: mediatek: pm-domains: Allow bus protection to ignore clear ack
soc: mediatek: pm-domains: Add subsystem clocks
soc: mediatek: pm-domains: Add extra sram control
soc: mediatek: pm-domains: Add SMI block as bus protection block
soc: mediatek: pm_domains: Make bus protection generic
soc: mediatek: pm-domains: Add bus protection protocol
soc: mediatek: Add MediaTek SCPSYS power domains
dt-bindings: power: Add MT8192 power domains
dt-bindings: power: Add MT8183 power domains
dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller
mfd: syscon: Add syscon_regmap_lookup_by_phandle_optional() function.
MAINTAINERS: change mediatek wiki page
...
Link: https://lore.kernel.org/r/b03fe343-e183-c6f3-f2dc-4c58aae3146b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>