Commit Graph

20 Commits

Author SHA1 Message Date
Thomas Gleixner c942fddf87 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Based on 3 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [kishon] [vijay] [abraham]
  [i] [kishon]@[ti] [com] this program is distributed in the hope that
  it will be useful but without any warranty without even the implied
  warranty of merchantability or fitness for a particular purpose see
  the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [graeme] [gregory]
  [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
  [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
  [hk] [hemahk]@[ti] [com] this program is distributed in the hope
  that it will be useful but without any warranty without even the
  implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00
Kunihiko Hayashi 6b39fd590a reset: uniphier: add reset control support for SPI
Add reset control for SPI controller on UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-19 11:19:47 +02:00
Katsuhiro Suzuki d7bab65b1f reset: uniphier: add LD11/LD20 stream demux system reset control
Add reset lines for MPEG2 transport stream I/O and demux system (HSC)
on UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-04-27 11:59:05 +02:00
Kunihiko Hayashi 786367176d reset: uniphier: add SATA reset control support and change SATA-PHY ID
Add reset lines for SATA controller on UniPhier SoCs.
This adds support for Pro4 and PXs3 in addition to PXs2.

And this changes the ID of the reset line for SATA-PHY on PXs2.
Since some SoCs have two controller instances with a common PHY, this moves
the ID of SATA-PHY for consistency.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-04-27 11:55:59 +02:00
Kunihiko Hayashi fdc0f235d1 reset: uniphier: add PCIe reset control support
Add reset lines for PCIe controller on UniPhier SoCs. This adds support for
Pro5, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-04-27 11:55:59 +02:00
Masahiro Yamada e6914365fd reset: uniphier: fix USB clock line for LD20
For LD20, the bit 5 of the offset 0x200c turned out to be a USB3
reset.  The hardware document says it is the GIO reset despite LD20
has no GIO bus, confusingly.

Also, fix confusing comments for PXs3.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-04-27 11:51:12 +02:00
Kunihiko Hayashi 5573fe85c7 reset: uniphier: add ethernet reset control support for PXs3
Add reset lines for ethernet controller on PXs3 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-03-27 10:44:04 +02:00
Katsuhiro Suzuki b06b631c8b reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
Add reset lines for audio subsystem (AIO) on UniPhier
Pro4/Pro5/PXs2 SoCs.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-03-27 10:44:03 +02:00
Masahiro Yamada 2a158f8888 reset: uniphier: add PXs3 reset data
Add basic reset data for Socionext's new SoC PXs3.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-10-05 10:24:14 +02:00
Kunihiko Hayashi 4c05c4a5ee reset: uniphier: add ethernet reset control support
Add reset lines for ethernet controller on Pro4, PXs2, LD11 and
LD20 SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-10-04 10:36:02 +02:00
Katsuhiro Suzuki ac0c735ac3 reset: uniphier: add analog amplifiers reset control
Add a reset line for analog signal amplifier core (ADAMV) on
UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-08-14 09:29:47 +02:00
Katsuhiro Suzuki 0f1954355d reset: uniphier: add video input subsystem reset control
Add a reset line for video input subsystem (EXIV) on
UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-08-14 09:29:26 +02:00
Katsuhiro Suzuki 94e10c221e reset: uniphier: add audio systems reset control
Add reset lines for audio subsystem (AIO) and
SoC internal audio codec (EVEA) on UniPhier LD11/LD20 SoCs.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-08-14 09:29:07 +02:00
Masahiro Yamada dec173ccbc reset: uniphier: do not use per-SoC macro for system reset block
This macro turned out not so useful as I had expected.

Hardware engineers said they would change reset bit assignments for
every SoC going forward.  This means we can not share the macros
among SoCs.  Just use primitive macros.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-08-11 09:40:54 +02:00
Masahiro Yamada 5281036a05 reset: uniphier: remove sLD3 SoC support
This SoC is too old.  It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-08-11 09:40:38 +02:00
Masahiro Yamada 23ade398c7 reset: uniphier: add NAND and eMMC reset control
Add reset lines for the Denali NAND controller on all UniPhier SoCs,
for the Cadence eMMC controller on LD11/LD20 SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-28 18:45:35 +02:00
Wei Yongjun 716adfe3f0 reset: uniphier: fix non static symbol warnings
Fixes the following sparse warnings:

drivers/reset/reset-uniphier.c:68:34: warning:
 symbol 'uniphier_sld3_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:73:34: warning:
 symbol 'uniphier_pro4_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:81:34: warning:
 symbol 'uniphier_pro5_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:89:34: warning:
 symbol 'uniphier_pxs2_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:103:34: warning:
 symbol 'uniphier_ld11_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:108:34: warning:
 symbol 'uniphier_ld20_sys_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:137:34: warning:
 symbol 'uniphier_sld3_mio_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:157:34: warning:
 symbol 'uniphier_pro5_sd_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:174:34: warning:
 symbol 'uniphier_ld4_peri_reset_data' was not declared. Should it be static?
drivers/reset/reset-uniphier.c:187:34: warning:
 symbol 'uniphier_pro4_peri_reset_data' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-08 09:36:45 +01:00
Masahiro Yamada 88a7f5237d reset: uniphier: add compatible string for LD11 SD-reset block
The LD11 SoC is equipped with not only MIO-reset but also SD-reset
for controlling RST_n pin of the eMMC device.

Update the binding document and remove unneeded "." from each line
in itemization.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-01-20 10:36:13 +01:00
Masahiro Yamada 19eb4a4722 reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs
I made a mistake as for naming for this block.  The MIO block is not
implemented for these 3 SoCs in the first place.  The current naming
will be a trouble if an SoC with both MIO and SD-ctrl blocks appear
in the future.

This driver has just been merged in the previous merge window.
Rename it before the release.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-10-22 18:31:42 +09:00
Masahiro Yamada 54e991b566 reset: uniphier: add reset controller driver for UniPhier SoCs
This is the initial commit for UniPhier reset controller driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-24 15:21:35 +02:00