afc3bca4cf
dt-bindings: Use lower case hex in unit-addresses
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DT unit addresses should be lower case hex. Fix all the
binding examples.
Converted with the following command from Krzysztof Kozlowski:
sed -e 's/@\([a-fA-F0-9_-]*\) {/@\L\1 {/' -i $(find Documentation/devicetree/bindings -name '*.txt')
Signed-off-by: Rob Herring <robh@kernel.org>
2017-12-26 10:37:05 -06:00
e9adb336d0
pinctrl: pistachio: fix mfio84-89 function description and pinmux.
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mfio 84 to 89 are described wrongly, fix it to describe
the right pin and add them to right pin-mux group.
The correct order is:
pll1_lock => mips_pll -- MFIO_83
pll2_lock => audio_pll -- MFIO_84
pll3_lock => rpu_v_pll -- MFIO_85
pll4_lock => rpu_l_pll -- MFIO_86
pll5_lock => sys_pll -- MFIO_87
pll6_lock => wifi_pll -- MFIO_88
pll7_lock => bt_pll -- MFIO_89
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: James Hartley <James.Hartley@imgtec.com>
Cc: <stable@vger.kernel.org> # v4.2+
Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver")
Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-30 10:57:51 +02:00
abbc48e1c2
pinctrl: Add Pistachio SoC pin control binding document
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Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-06 14:45:18 +02:00
Rob Herring