Commit Graph

932767 Commits

Author SHA1 Message Date
Jiaxun Yang b91aff3b84 MIPS: Loongson64: Add ISA node for LS7A PCH
Although currently we're not enabling any ISA device in devicetree,
but this node is required to express the ranges of address reserved
for ISA.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:49:54 +02:00
Jiaxun Yang 99b02abbcd MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH
Ranges should express the actual physical address on bus.
Also enlarge the PCI I/O size to the actual hardware limit.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:49:53 +02:00
Jiaxun Yang 21a379a8cf MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
It can be very big on LS7A PCH systems.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:49:53 +02:00
Jiaxun Yang 6d0068ad15 MIPS: Loongson64: Process ISA Node in DeviceTree
Previously, we're hardcoding reserved ISA I/O Space in, now
we're processing it I/O via DeviceTree directly.
The ranges property if ISA node is used to determine the size and address
of reserved I/O space.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:49:52 +02:00
Jiaxun Yang 2f96593ecc of_address: Add bus type match for pci ranges parser
So the parser can be used to parse range property of ISA bus.

As they're all using PCI-like method of range property, there is no need
start a new parser.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:49:52 +02:00
Krzysztof Kozlowski aa35a5eee5 memory: jz4780-nemc: Do not build by default
Enabling the JZ4780_NEMC driver makes sense only for specific hardware -
the Ingenic SoC architecture.  It is not an essential driver for the SoC
support so do not enable it by default.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:44:42 +02:00
Krzysztof Kozlowski 6bc9c1619d MIPS: ingenic: Enable JZ4780_NEMC manually
The CONFIG_JZ4780_NEMC was previously a default on MIPS but now it has
to be enabled manually.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 22:44:27 +02:00
Paul Cercueil 0889a67a9e MIPS: qi_lb60: Fix routing to audio amplifier
The ROUT (right channel output of audio codec) was connected to INL
(left channel of audio amplifier) instead of INR (right channel of audio
amplifier).

Fixes: 8ddebad15e ("MIPS: qi_lb60: Migrate to devicetree")
Cc: stable@vger.kernel.org # v5.3
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 10:21:40 +02:00
Paul Cercueil a4aec0f3f5 MIPS: Remove legacy MIPS_MACHINE option
The CONFIG_MIPS_MACHINE option is dead code that hasn't been used in
years. The Kconfig option is not selected anywhere, and the
<asm/mips_machine.h> is not included anywhere either.

To make things worse, for years it co-existed with a separate MIPS
machine implementation as <asm/machine.h>. The two defined the
'mips_machine' structure with different fields, and the 'MIPS_MACHINE'
macro with different parameters. The two used the same memory area
(defined by the linker script) to store data, and you could totally use
the two at the same time for all kinds of funny results.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 10:21:17 +02:00
Paul Cercueil 64aa9fd014 MIPS: ath79: Remove unused include <asm/mips_machine.h>
Since commit 3a77e0d75e ("MIPS: ath79: drop machfiles"), this header
is not used anymore.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 10:20:44 +02:00
Thomas Bogendoerfer 75afbf4917 MIPS: cpu-feature-overrides: Remove not needed overrides
Clean up cpu-feature-overrides, which only repeat the default.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28 10:20:11 +02:00
Jinyang He b1ce9716f3 MIPS: Fix unable to reserve memory for Crash kernel
Use 0 as the align parameter in memblock_find_in_range() is
incorrect when we reserve memory for Crash kernel.

The environment as follows:
[    0.000000] MIPS: machine is loongson,loongson64c-4core-rs780e
...
[    1.951016]     crashkernel=64M@128M

The warning as follows:
[    0.000000] Invalid memory region reserved for crash kernel

And the iomem as follows:
00200000-0effffff : System RAM
  04000000-0484009f : Kernel code
  048400a0-04ad7fff : Kernel data
  04b40000-05c4c6bf : Kernel bss
1a000000-1bffffff : pci@1a000000
...

The align parameter may be finally used by round_down() or round_up().
Like the following call tree:

mips-next: mm/memblock.c

memblock_find_in_range
└── memblock_find_in_range_node
    ├── __memblock_find_range_bottom_up
    │   └── round_up
    └── __memblock_find_range_top_down
        └── round_down
\#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
\#define round_down(x, y) ((x) & ~__round_mask(x, y))
\#define __round_mask(x, y) ((__typeof__(x))((y)-1))

The round_down(or round_up)'s second parameter must be a power of 2.
If the second parameter is 0, it both will return 0.

Use 1 as the parameter to fix the bug and the iomem as follows:
00200000-0effffff : System RAM
  04000000-0484009f : Kernel code
  048400a0-04ad7fff : Kernel data
  04b40000-05c4c6bf : Kernel bss
  08000000-0bffffff : Crash kernel
1a000000-1bffffff : pci@1a000000
...

Signed-off-by: Jinyang He <hejinyang@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 13:55:51 +02:00
Huacai Chen 9cce844abf MIPS: CPU#0 is not hotpluggable
Now CPU#0 is not hotpluggable on MIPS, so prevent to create /sys/devices
/system/cpu/cpu0/online which confuses some user-space tools.

Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:18:35 +02:00
Paul Cercueil d8727385f4 MIPS: ingenic: JZ4725B: Add IPU node
Add a devicetree node for the Image Processing Unit (IPU) found in the
JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver
will expect the IPU node to be accessed through graph port #8, as stated
in the bindings documentation.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:41 +02:00
Randy Dunlap 0bfdf92a97 mips: octeon: octeon.h: delete duplicated word
Delete the repeated word "as".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:19 +02:00
Randy Dunlap c7e3370942 mips: octeon: cvmx-pow.h: fix duplicated words
Delete the repeated words "Returns" and convert to kernel-doc
notation by adding a ':'.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:04 +02:00
Randy Dunlap 37cbd2b3cb mips: octeon: cvmx-pkoh: fix duplicated words
Delete the repeated word "command".
Delete the repeated words "returns" and convert to kernel-doc notation
by adding a ':'.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:50 +02:00
Randy Dunlap 0390de410d mips: octeon: cvmx-pip.h: delete duplicated word
Delete the repeated word "the".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:28 +02:00
Randy Dunlap 108cff579b mips: octeon: cvmx-l2c.h: delete duplicated word
Delete the repeated word "Returns".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:19 +02:00
Randy Dunlap f2790db134 mips: io.h: delete duplicated word
Delete the repeated word "on".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:14:58 +02:00
Jiri Slaby a2eec1099b mips: traps, add __init to parity_protection_init
It references __initdata and is called only from an __init function:
trap_init. This avoids section mismatches (which I am seeing with gcc
10).

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 12:07:36 +02:00
Álvaro Fernández Rojas e27e1cc9d3 MIPS: BCM63xx: improve CFE version detection
There are some CFE variants that start with 'cfe-vd' instead of 'cfe-v', such
as the one used in the Huawei HG556a: "cfe-vd081.5003". In this case, the CFE
version is stored as is (string vs number bytes).

Some newer devices have an additional version number, such as the Comtrend
VR-3032u: "1.0.38-112.118-11".

Finally, print the string as is if the version doesn't start with "cfe-v" or
"cfe-vd", but starts with "cfe-".

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 12:02:46 +02:00
周琰杰 (Zhou Yanjie) 0d10d17bac MIPS: X2000: Add X2000 system type.
1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000.
2.Add X2000 system type for cat /proc/cpuinfo to give out X2000.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 11:13:57 +02:00
Yu Kuai e8b9fc10f2 MIPS: OCTEON: add missing put_device() call in dwc3_octeon_device_init()
if of_find_device_by_node() succeed, dwc3_octeon_device_init() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.

Fixes: 93e502b3c2 ("MIPS: OCTEON: Platform support for OCTEON III USB controller")
Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 11:06:58 +02:00
Jiaxun Yang 35546aeede MIPS: Retire kvm paravirt
paravirt machine was introduced for Cavium's partial virtualization
technology, however, it's host side support and QEMU support never
landed in upstream.

As Cavium was acquired by Marvel and they have no intention to maintain
their MIPS product line, also paravirt is unlikely to be utilized by
community users, it's time to retire it if nobody steps in to maintain
it.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 10:53:23 +02:00
Serge Semin 4e4fcc9e6f MAINTAINERS: Add maintainers for MIPS core drivers
Add Thomas and myself as maintainers of the MIPS CPU and GIC IRQchip, MIPS
GIC timer and MIPS CPS CPUidle drivers.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:26:06 +02:00
Serge Semin 16274e58c4 bus: cdmm: Add MIPS R5 arch support
CDMM may be available not only on MIPS R2 architectures, but also on
newer MIPS R5 chips. For instance our P5600 chip has one. Let's mark
the CDMM bus being supported for that MIPS arch too.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:25:42 +02:00
Serge Semin 2121aa3e23 mips: cdmm: Add mti,mips-cdmm dtb node support
Since having and mapping the CDMM block is platform specific, then
instead of just returning a zero-address, lets make the default CDMM
base address search method (mips_cdmm_phys_base()) to do something
useful. For instance to find the address in a dedicated dtb-node in
order to support of-based platforms by default.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:25:15 +02:00
Serge Semin c9a56aa972 dt-bindings: bus: Add MIPS CDMM controller
It's a Common Device Memory Map controller embedded into the MIPS IP
cores, which dts node is supposed to have compatible and reg properties.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:24:46 +02:00
Serge Semin e4fd970752 dt-bindings: interrupt-controller: Convert mti,gic to DT schema
Modern device tree bindings are supposed to be created as YAML-files
in accordance with DT schema. This commit replaces MIPS GIC legacy bare
text binding with YAML file. As before the binding file states that the
corresponding dts node is supposed to be compatible with MIPS Global
Interrupt Controller indicated by the "mti,gic" compatible string and
to provide a mandatory interrupt-controller and '#interrupt-cells'
properties. There might be optional registers memory range,
"mti,reserved-cpu-vectors" and "mti,reserved-ipi-vectors" properties
specified.

MIPS GIC also includes a free-running global timer, per-CPU count/compare
timers, and a watchdog. Since currently the GIC Timer is only supported the
DT schema expects an IRQ and clock-phandler charged timer sub-node with
"mti,mips-gic-timer" compatible string.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:24:30 +02:00
Serge Semin 29cf195d33 dt-bindings: power: Convert mti,mips-cpc to DT schema
It's a Cluster Power Controller embedded into the MIPS IP cores.
Currently the corresponding dts node is supposed to have compatible
and reg properties.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-21 10:24:04 +02:00
Tiezhu Yang 67d0662ce9 MIPS: Prevent READ_IMPLIES_EXEC propagation
In the MIPS architecture, we should clear the security-relevant
flag READ_IMPLIES_EXEC in the function SET_PERSONALITY2() of the
file arch/mips/include/asm/elf.h.

Otherwise, with this flag set, PROT_READ implies PROT_EXEC for
mmap to make memory executable that is not safe, because this
condition allows an attacker to simply jump to and execute bytes
that are considered to be just data [1].

In mm/mmap.c:
unsigned long do_mmap(struct file *file, unsigned long addr,
			unsigned long len, unsigned long prot,
			unsigned long flags, vm_flags_t vm_flags,
			unsigned long pgoff, unsigned long *populate,
			struct list_head *uf)
{
	[...]
	if ((prot & PROT_READ) && (current->personality & READ_IMPLIES_EXEC))
		if (!(file && path_noexec(&file->f_path)))
			prot |= PROT_EXEC;
	[...]
}

By the way, x86 and ARM64 have done the similar thing.

After commit 250c22777f ("x86_64: move kernel"), in the file
arch/x86/kernel/process_64.c:
void set_personality_64bit(void)
{
	[...]
	current->personality &= ~READ_IMPLIES_EXEC;
}

After commit 48f99c8ec0 ("arm64: Preventing READ_IMPLIES_EXEC
propagation"), in the file arch/arm64/include/asm/elf.h:
#define SET_PERSONALITY(ex)						\
({									\
	clear_thread_flag(TIF_32BIT);					\
	current->personality &= ~READ_IMPLIES_EXEC;			\
})

[1] https://insights.sei.cmu.edu/cert/2014/02/feeling-insecure-blame-your-parent.html

Reported-by: Juxin Gao <gaojuxin@loongson.cn>
Co-developed-by: Juxin Gao <gaojuxin@loongson.cn>
Signed-off-by: Juxin Gao <gaojuxin@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 13:18:19 +02:00
Peng Fan a859647b4e mips/vdso: Fix resource leaks in genvdso.c
Close "fd" before the return of map_vdso() and close "out_file"
in main().

Signed-off-by: Peng Fan <fanpeng@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 11:05:37 +02:00
周琰杰 (Zhou Yanjie) c8353fbdfc MIPS: CU1000-Neo: Refresh defconfig to support LED.
Refresh CU1000-Neo's defconfig to support LED.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:58:26 +02:00
周琰杰 (Zhou Yanjie) 233ed6f31a MIPS: Ingenic: Fix bugs and add missing LED node for X1000.
1.The CU1000-Neo board actually uses X1000E instead of X1000,
  so the wrongly written "ingenic,x1000" in compatible should
  be changed to "ingenic,x1000e".
2.Adjust the order of nodes according to the corresponding
  address value.
3.Drop unnecessary node in "wlan_pwrseq".
4.Add the leds node to "cu1000-neo.dts".

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:58:12 +02:00
周琰杰 (Zhou Yanjie) 56d47fbbb7 MIPS: Ingenic: Add YSH & ATIL CU Neo board support.
Add a device tree and a defconfig for the Ingenic X1830 based
YSH & ATIL CU Neo board.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:57:44 +02:00
周琰杰 (Zhou Yanjie) 1c3dea3537 dt-bindings: MIPS: Add X1830 based CU1830-Neo and fix bug in CU1000-Neo.
1.Add bindings for Ingenic X1830 based board, prepare for later dts.
2.The CU1000-Neo board actually uses X1000E instead of X1000, so
  the wrongly written "ingenic,x1000" in bindings should be changed
  to "ingenic,x1000e", the corresponding dts file modification will
  be made in a patch later in this series.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:54:52 +02:00
周琰杰 (Zhou Yanjie) 63970c291d MIPS: Ingenic: Add Ingenic X1830 support.
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1830 based board is
added in a later commit.

Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:54:26 +02:00
Sunguoyun c7c101df0a MIPS: fix vdso different address spaces
sparse report build warning as follows:
arch/mips/vdso/vdso-n32-image.c:13:35:
incorrect type in assignment (different address spaces) @@
expected void *[usertype] vdso @@     got void [noderef] <asn:1> * @@

Reported-by: kernel test robot <lkp@intel.com>

Signed-off-by: Sunguoyun <sunguoyun@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:53:46 +02:00
Alexander A. Klimov ef054ad388 mips: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:52:35 +02:00
Jiaxun Yang 770a697c45 MIPS: Loongson64: Load LS7A dtbs
Load correct devicetree according to PRID and PCH type.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:51:00 +02:00
Jiaxun Yang 24af105962 MIPS: Loongson64: DeviceTree for LS7A PCH
Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and
Generic Loongson64 Quad Core + LS7A boards.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:50:45 +02:00
Huacai Chen a6aa35e30a MIPS: Loongson64: Fix machine naming
From previous commits, the machine names with "loongson3-" prefix have
renamed to "loongson64c-" prefix in documents, but the .dts files have
not been updated as well. So fix it.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:50:31 +02:00
Zhi Li f59dc51191 MIPS: Loongson: Fix boot warning about hwmon_device_register()
Replace hwmon_device_register() with hwmon_device_register_with_info()
to fix the following boot warning :

[    9.029924] Loongson Hwmon Enter...
[    9.106850] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().

Signed-off-by: Zhi Li <lizhi01@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:49:55 +02:00
Tiezhu Yang 17cbb0702e MIPS: Loongson: Reduce possible loop times and add log in do_thermal_timer()
Once the temperature of any CPUs is too high, it can power off immediately,
no need to check the rest of CPUs, and it is better to print a log before
power off, this is useful when analysis the abnormal issues.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Zhi Li <lizhi01@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:49:36 +02:00
Tiezhu Yang f17d3f218d MIPS: Loongson: Cleanup cpu_hwmon.c
Fix the following checkpatch warnings and errors:

ERROR: do not initialise statics to 0
+static int csr_temp_enable = 0;

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(name, S_IRUGO, get_hwmon_name, NULL, 0);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, get_cpu_temp, NULL, 1);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, cpu_temp_label, NULL, 1);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, get_cpu_temp, NULL, 2);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, cpu_temp_label, NULL, 2);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, get_cpu_temp, NULL, 3);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp3_label, S_IRUGO, cpu_temp_label, NULL, 3);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, get_cpu_temp, NULL, 4);

WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
+static SENSOR_DEVICE_ATTR(temp4_label, S_IRUGO, cpu_temp_label, NULL, 4);

WARNING: Missing a blank line after declarations
+	int id = (to_sensor_dev_attr(attr))->index - 1;
+	return sprintf(buf, "CPU %d Temperature\n", id);

WARNING: Missing a blank line after declarations
+	int value = loongson3_cpu_temp(id);
+	return sprintf(buf, "%d\n", value);

ERROR: spaces required around that '=' (ctx:VxV)
+	for (i=0; i<nr_packages; i++)
 	      ^

ERROR: spaces required around that '<' (ctx:VxV)
+	for (i=0; i<nr_packages; i++)
 	           ^

ERROR: spaces required around that '=' (ctx:VxV)
+	for (i=0; i<nr_packages; i++)
 	      ^

ERROR: spaces required around that '<' (ctx:VxV)
+	for (i=0; i<nr_packages; i++)
 	           ^

ERROR: spaces required around that '=' (ctx:VxV)
+	for (i=0; i<nr_packages; i++) {
 	      ^

ERROR: spaces required around that '<' (ctx:VxV)
+	for (i=0; i<nr_packages; i++) {
 	           ^

WARNING: line over 80 characters
+		csr_temp_enable = csr_readl(LOONGSON_CSR_FEATURES) & LOONGSON_CSRF_TEMP;

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Zhi Li <lizhi01@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:49:19 +02:00
Paul Cercueil 7a98c066e9 MIPS: ingenic: RS90: Added defconfig
Add a basic default config for the RS-90 RetroMini board.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:48:26 +02:00
Paul Cercueil ac6b13814f MIPS: ingenic: Add support for the RS90 board
The RS-90, better known as RetroMini, is a small and pocketable handheld
gaming console from YLMChina. It has little more than a JZ4725B SoC, a
NAND, a screen, some buttons and a speaker.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:48:09 +02:00
Paul Cercueil c211ab5f5e MIPS: ingenic: Add support for the JZ4725B SoC
Add preliminary support for boards based on the JZ4725B SoC from
Ingenic.

The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its
internals are much closer to what can be found on the JZ4750 and newer
SoCs.

It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:47:50 +02:00
Paul Cercueil 68c48f7ce9 MIPS: ingenic: Use enum instead of macros for Ingenic SoCs
Use an enum instead of macros to represent the various versions of the
Ingenic SoCs, and add some of the SoC versions that were previously
missing.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16 10:47:30 +02:00