NanoPi M1 is the Allwinner H3 based board.
This patch enables UART for debug console, LEDs, GPIO key switch, 3 USB
host ports, a micro SD slot and related power and pin controls by using
NanoPi common dtsi file.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
NanoPi common dtsi supports all components of NEO SBC, so just include it.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch provides a common file for NanoPi M1 and Neo SBC.
Those have common features below.
* UART0
* 2 LEDs
* USB host (EHCI3, OHCI3) and PHY
* MicroSD
* GPIO key switch
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the A80, mmc1 is available on pingroup G. Designs mostly use this
to connect to an SDIO WiFi chip.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.
Add them to the DTS with the muxing already set, but keep them disabled.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Some boards use the LCD in RGB565. Enable the pin muxing option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the
DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename
the A10s only bank so that it doesn't confuse people on the other SoCs
whose indexing would start at b.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The WiFi chip is powered through a GPIO and two regulators in parallel.
Since that case is not supported yet, just set them as always on before we
rework the regulator framework to deal with those.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The CHIP Pro is a small embeddable board. It features a GR8, an AXP209
PMIC, a 512MB SLC NAND and a WiFi/BT chip.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The UART3 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The UART2 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The PWM controller has two different channels, but only the first pin was
exposed in the DTSI. Add the other one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
There was a dumb copy and paste mistake here, fix it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The GR8 has access to the UART3 controller, which was missing in the
DTSI. Add it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sun7i-a20-olimex-som-evb.dts doesn't contain cpu-supply needed for
voltage-scaling with cpufreq-dt so define it.
The default voltages are defined in sun7i-a20.dtsi.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have support for the VGA bridges using our DRM driver, enable
the display engine for the Olimex A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The pinmux setting nodes for the A31 were added out of alphabetical
order. Sort them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviews have found that sun5i was a better prefix after all for the GR8.
Rename the relevant device trees before it's too late.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is good for consistency even if there is no difference in compiled
code. LTO might rely on this eventually. No need to preserve the extern
attribute as it is the default with function prototypes.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a sysfs cpu_capacity attribute with which it is possible to read and
write (thus over-writing default values) CPUs capacity. This might be
useful in situations where values needs changing after boot.
The new attribute shows up as:
/sys/devices/system/cpu/cpu*/cpu_capacity
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the introduction of cpu capacity-dmips-mhz bindings, CPU capacities
can now be calculated from values extracted from DT and information
coming from cpufreq. Add parsing of DT information at boot time, and
complement it with cpufreq information. We keep code that can produce
same information, based on different DT properties and hard-coded
values, as fall-back for backward compatibility.
Caveat: the information provided by this patch will start to be used in
the future. We need to #define arch_scale_cpu_capacity to something
provided in arch, so that scheduler's default implementation (which gets
used if arch_scale_cpu_capacity is not defined) is overwritten.
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The polarity of the card detect pin is inverted.
Change it to reflect the right polarity for the board
which is ACTIVE_LOW.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
cleanups, GPIO line naming, and the node for the new thermal driver.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCgAGBQJYL0nQAAoJELXWKTbR/J7oJa0QALtJl30nHY6SXtzllHOP0ie2
zMhbmGmILYNF4EwGR4j/zOifXCt0jhlAQW6n9YgEIZwowJLRMkmVnwJovJ/AQynE
5X7WND5SuQTfG9ihv9iC92VyYYPA9NZNgquXCNX2g+/E5AXFXpO7PeueSmbBeVeh
RG8DjG1jkJEz7ddKoBFeAF8pPQV3y1YPm74oDt175flEAIC13F72NeHHbDCaHgzA
Ww4GKwWKBr8mtuDBapn+IXZ1GyhTxoUC/F0YcP4XUgTBD2ECCJnTFnHZPYzpyeLl
XSQhnKvcfYUBwDk4fcVXUTBSfaR4XLF2IeNy5kVO8MZmodpcgwaLR/c1Gvksm1mZ
kpDB79ASM6JY0lAbWNNh+YHhUIlhqqd6z8bjZh/znmrkYx2Yb9Ss633wkVFw0Nvj
lnF7uOBrLrok79CibysbIl+v4hcFraMwQ9YS8bUSDZlHUIg9nBDzDc3sQ7T7pAIV
4h3rVCiOeVG6bLa3/rnhUUvxB8pO5hcoJw77NXxStJEcN2QKEYszH8BdCmxcHoun
B7IxMKzck0u38qdidPr3ffS4r0vT5+NgDlG9uqpUBOc8nyuJ4pOeyxWmwhP81eaa
Btr89wR19D//151ZGM0/9ycV5fIOQw/c5no9OITrtDpaiekSG+762szIS61v5M1y
9PboNStFl0SDCAjveVoG
=CBTE
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYM9GkAAoJEIfQlpxEBwcEb4QP/1S/78PWF2hhbQQSD5X3yeuy
lro3aRqz48YNcJdi8kGpNpFpbE2tde9j7Pw7dh5dF+6JMZhKfDiQQpNI+v/wne9E
9FZ+HcZxPa4eHWTbP4dvvDmUV01/DlyFEljXI+gMCxDi+XMI/p6qJ+ffzvVWDbax
fk6gY7uLms8UgXeZm96tbpE7FTikatR3DPW4JGSSBzXy6ratTEjBeq2WCtyN0Sv4
qt2QsOLbKEXpt9fWRoEPbSuqFDMWIHGNifC5StHjkoGiywXjVqmJ5PmvXGk9vT5y
fnpxlKpYmKOGXRhKY317LTq6cQ/b+vnjwtOcmiTWxYj9RBJm3VwofezfltSMMUC2
WITdb0gRapRSq7AT+5Jz4vQ+RTRW/rPycOhEKCKjCibl0zEZjBki727OJ6wxm7sC
3DY+xJSMrFpVnsbFRdaeJ0jvkzkjVpj8oKwc36/ecXaFqBGQkhGxmGkb0KvUqC0r
Efr1vL3oJa7FCQ4NPoRBqutPwRxiA7lZj4yIVppbT7vfPGKRTIWN4h0qqM7l8L16
iwbr/KHWMhosEvgC+50E51C3breR7pgAmitSdgRga+hZOPb8EaNq4guOidIMRKid
iiOcVtmYg3d+2Jk1wkuY8LwVnYQwb5D2TxNf7gc8vBXUVQF9/84m3kmzxFJ9XKBO
jXdjhQByelJHqVm5rGO4
=pDtt
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-dt-next-2016-11-18' into devicetree/next
This pull request brings in DT changes for BCM2835: pinctrl setup
cleanups, GPIO line naming, and the node for the new thermal driver.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The Kconfig and file naming for the PM8xxx driver is totally
confusing:
- Kconfig options MFD_PM8XXX and MFD_PM8921_CORE, some in-kernel
users depending on or selecting either at random.
- A driver file named pm8921-core.c even if it is indeed
used by the whole PM8xxx family of chips.
- An irqchip named pm8xxx since it was (I guess) realized that
the driver was generic for all pm8xxx PMICs.
As I may want to add support for PM8901 this is starting to get
really messy. Fix this situation by:
- Remove the MFD_PM8921_CORE symbol and rely solely on MFD_PM8XXX
and convert all users, including LEDs Kconfig and ARM defconfigs
for qcom and multi_v7 to use that single symbol.
- Renaming the driver to qcom-pm8xxx.c to fit along the two
other qcom* prefixed drivers.
- Rename functions withing the driver from 8921 to 8xxx to
indicate it is generic.
- Just drop the =m config from the pxa_defconfig, I have no clue
why it is even there, it is not a Qualcomm platform. (Possibly
older Kconfig noise from saveconfig.)
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Pull ARM fixes from Russell King:
"A few more ARM fixes:
- the assembly backtrace code suffers problems with the new printk()
implementation which assumes that kernel messages without KERN_CONT
should have newlines inserted between them. Fix this.
- fix a section naming error - ".init.text" rather than ".text.init"
- preallocate DMA debug memory at core_initcall() time rather than
fs_initcall(), as we have some core drivers that need to use DMA
mapping - and that triggers a kernel warning from the DMA debug
code.
- fix XIP kernels after the ro_after_init changes made this data
permanently read-only"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: Fix XIP kernels
ARM: 8628/1: dma-mapping: preallocate DMA-debug hash tables in core_initcall
ARM: 8624/1: proc-v7m.S: fix init section name
ARM: fix backtrace
This enables the usb otg controller for the lcdk board.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Currently, suspend/resume support is only available on da850 platforms,
and the platform PM code has dependencies on da850 functions. However,
CONFIG_SUSPEND might be enabled even when da850 support is not, causing
build failure:
arch/arm/mach-davinci/built-in.o: In function `davinci_pm_init':
pm_domain.c:(.init.text+0x1fb8): undefined reference to `da8xx_get_mem_ctlr'
pm_domain.c:(.init.text+0x20b0): undefined reference to `da8xx_syscfg1_base'
Fix this by only building the PM core when da850 is enabled.
Reported-by: Sekhar Nori <nsekhar@ti.com>
Fixes: aa9aa1ec2d ("ARM: davinci: PM: rework init, remove platform device")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Child of mvpp2 ethernet do not have a reg property so the unit name
should not contain an address: remove them.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As it was previously done for kirkwood and for aramda 370/XP, this adds
missing node labels to Armada 375 and SoC specific nodes to allow to
reference them more easily.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The gpio-key nodes do not have a reg property, so remove the address from
the unit name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The dsa node does not have a reg property, so remove the address from the
unit name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
l2-cache which is either an aurora-outer-cache or an aurora-system-cache
has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
These also applies to ARM and it will also allow to get rid of the
following DTC warnings in the future:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a ranges property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
PCIe has a range property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
MDIO has a reg property so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Use the node label when possible. As a result it flattens the device tree
and it makes more visible the IP blocks specific to each SoC variant.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
As it was previously done for kirkwood, this adds missing node labels to
Armada 370 and XP common and SoC specific nodes to allow to reference
them more easily.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cpurst nodes are identical in armada-370.dtsi and armada-xp.dtsi
files, so move it in the common armada-370-xp.dtsi file.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In the dts for the Marvell Armada XP Matrix board the pcie-controller was
located under the internal-regs node whereas it belongs to the soc node.
It means that, until this fix, the pcie could not work for this board
because it didn't match the definition of the pcie-controller node in the
dtsi file. If we had a look on the decompiled dtb file we saw two
different instances of the pcie-controller node: one with the all the
resource set but disabled and the other without any resource but enabled.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fix a spelling mistake in arch/arm/boot/dts/kirkwood-topkick.dts.
The manufacturer's name is Univer*s*al Scientific Industrial...
Compare with footer of page here:
http://www.usish.com/english/products_topkick1281p2.php
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch removes the legacy support of ls-chl which is converted to the
device tree.
[gregory.clement@free-electrons.com: removal extracted from a wider patch]
Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch converts my orion5x ls-chl Linkstation device to device tree.
[gregory.clement@free-electrons.com: fix title, add back the commit log,
move the removal of the platform in an other patch]
Signed-off-by: Ashley Hughes <ashley.hughes@blueyonder.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The SMSC9112 ethernet controller is connected to chip select 2
on the EBI2 bus on the APQ8060 Dragonboard. We set this up by
activating EBI2, creating a chipselect entry as a subnode, and then
putting the ethernet controller in a subnode of the chipselect.
After the chipselect is configured, the SMSC device will be
instantiated.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the external bus interface EBI2 to the MSM8660 device
tree, albeit with status = "disabled" so that devices actually
using EBI2 can turn it on if needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add pstore support for the nexus7. This was useful in debugging
a crash where the cpus were getting stuck with irqs off and
serial output wasn't reliably working.
Cc: Kees Cook <keescook@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Vinay Simha <vinaysimha@inforcecomputing.com>
Cc: Archit Taneja <architt@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add DSI and panel nodes to get graphics up and running
on the Nexus7.
This still depends on the panel driver being present
along with the rpmclk code.
Feedback would be greatly appreciated!
Cc: Archit Taneja <architt@codeaurora.org>
Cc: vinay simha <vinaysimha@inforcecomputing.com>
Cc: andy.gross@linaro.org
Cc: robdclark@gmail.com
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Adds the core gpu, and dsi nodes for the apq8064 needed
to get graphics working on the nexus7 and other devices.
These apply on top of Archit's patch set that enables HDMI for IFC6410
Feedback would be greatly appreciated!
Cc: Archit Taneja <architt@codeaurora.org>
Cc: vinay simha <vinaysimha@inforcecomputing.com>
Cc: andy.gross@linaro.org
Cc: robdclark@gmail.com
Cc: linux-arm-msm@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add HDMI support on IFC6410. Populate the regulators required by HDMI-TX
and PHY. Establish the link between the MDP4 DTV encoder and HDMI. Create
a generic micro HDMI connector DT node. The msm drm driver doesn't parse
for HDMI connectors in DT, but it will do so later.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS
and 2 DSI outputs.
Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display
blocks have a flat device hierarchy.
Nodes for other outputs will be added later.
Cc: devicetree@vger.kernel.org
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This introduces the eMMC sdhci node and its pinctrl state
Signed-off-by: Bhushan Shah <bshah@kde.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add support for the Sierra Wireless MangOH Green board with the
Sierra Wireless WP8548 Module.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In order to support the Sierra Wireless WP8548 module based on the
Qualcomm MDM9615 SoC, add a dtsi file.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Enable audio support for various Toradex devices as well as the GMI.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLydjExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6Hv
jA//UWlxr5gDOQdoTZKqWMaBY2IM84fLgHjWBiMHuvI8JUUiQZ8iAUB3hEb1NKyz
QVXpd/7HTd4gMbTl2k+0uHkINn8EZ2KkyZkb+Utcd/dHAfeKDKadO2ZHA0S1oLJy
2tSBSqdMeKPsq+C3UZRxWehKz3KFFooMr2gcx+HuveG8XAlfYgXrAxPMgqhDG1Zr
KBlbuidRLBA4DBLZTZlcJaRsMVUheE4NOe3mpmSKAANl5FhAcFLxLvZU9fbciLjR
qqLQyRDXq7aaCJ2LpEQOr4I5lVWFgBBTUFTQUEZVX2tPY+XQvJeitcVntjqpMNKK
yZnRAryx3B4rJ+wO6qrnfkmk23l8WPMZZb8/qMw07GRywI8byOgDd0sLOT3LgIPh
OiGCDOirF4zU2WJWDvpPKVKBnDQUaaTdNSyGhPDJcXUYgJAvTNVyDzQSMbJyyNBF
VPJ0jpKtWiKOMVM5/sx0dhHyyFiZCkDYctjiVVREdMFPXtreT00ktfcfuNI4wmqs
QjmWQgKD57X/j7I5vikr3HGbRi2yfsojW1c6DlYT2tahuo36U7yS2wZoIRzVFpiB
6NL77ldhaRL0wMYG9LSrswDjmFMzoG8CtWghIOF19VjS13ihx/2PzFI8rp2FgHQ0
3/XH1HQZfKegpLfJkW2Q2eB5T9/bnYKM743c8Ty+OoWJbXs=
=zelz
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
ARM: tegra: Default configuration updates for v4.10-rc1
Enable audio support for various Toradex devices as well as the GMI.
* tag 'tegra-for-4.10-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable GMI driver in default configuration
ARM: tegra: Enable SGTL5000 audio
ARM: tegra: Update default configuration for v4.9-rc1
Signed-off-by: Olof Johansson <olof@lixom.net>
Adds support for GMI on Tegra20 and Tegra30 and enables the GPU on Nyan
Chromebooks. It also enables sound support on various Toradex devices.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyczExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6G3
WxAAos+oFvb2YFW0TNbJHCH/AW17U8kepXhmf8SEScRiiYP3sMgcN6kLK/pCvfBr
49FAHt/enDol3tw73nov0OOTyfXgcDEX/+i42irKwj0GSWeJHbaVqLpqP+ugrfg9
v0UGuycofbmvQyXWd8zF1yE7FtFwwExJHv+t7Rwu8y0Rwh55Q094P+ct5nRZbmpU
yUxw01xgguCAISaHVAp4h6l5NXi3m0dzYC2NUISO32wNYLGlV/u0vy8PLWYUEqHf
tcISM4sJwQbvl0P8kUvvvrQNRfD55pCXweprEeOzoesPZJOCrClBnRK3sCiXhANw
iVt6cpY9BN5xtbTrVNvtQZTKbqECnshRLyX450ZHwD+hIIVRI01W+aZB29WuO3GC
3J+82+TUZrt/BXAXlnpaNmMbzN9OKJs6eqOgs4CTjpFv/CCbnpQsEMOiWgFNoYfg
Lz3iz5xcKS9XJ8ImhIJvCLzTzvLuRsSRGcdAGp3BWp330qEZAe/MA2U4sT8dE24W
necF/FqJ3qLtVF1b5I6lOK3FPMfSNzQJHDgu469QXRxZKcyJoxuRyKXW0sP4zKp0
mZbuawOMLEIEvt8PCLSZN6MzgNsHXH3eA0sYfriXpdsUBD2/l1AO1GhkuD2MG9p9
24W8av2cpLNmVR7/wsarMX8429mUo1N7rSpHwsvtlTww2bg=
=w7VH
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.10-rc1
Adds support for GMI on Tegra20 and Tegra30 and enables the GPU on Nyan
Chromebooks. It also enables sound support on various Toradex devices.
* tag 'tegra-for-4.10-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: apalis-tk1: Drop leading 0 from unit-address
ARM: tegra: apalis/colibri t30: Integrate audio
ARM: tegra: nyan: Enable GPU node and related supply
ARM: tegra: Add Tegra30 GMI support
ARM: tegra: Add Tegra20 GMI support
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYLvYLAAoJEME3ZuaGi4PX7FYP/RUWX+IGk5xZg9xsi/VBN5wg
IDOseVLPTiz5VxgU1CvCMAxAbdshlPrrn6jgfmj0IRmF5g+9RfjpS6y3X+YIELUA
hD7altzN75JzY9rV4BhnHeFaRBK53gTeno+4O2hDarew6dRN4A2UtMTFpgGav9S/
T3vgIrsAXq7vrtnT9dePja0WISzl7l0JgzByTKEtu3egoy6wl20hrslGSJI+sWmt
Mu969g50RJsbrinzhv2qAYqN9AYuDSHUo8KVUJ2mg0ow9zkeJ/AeHlB4zuUK8dUf
dPW9tVtQDrcl6sA4wqG4Tno2JjJHqnJNBvE3KOnxqWd/ed7Mz7Pddrc4AaqB5o5l
GDZxzAx2xb+rX+dWwURVXAtS54RUnD8e1S7Jp8X2+eCL8OUKXvfO6p/XA45/8V/S
9VJNP/gUL594Zyyj5LuAhqyOfbtcrW2VaZntts68NVjhtYfRcHF8UrxGtj6RxZnH
mOZC5HNBNIxrpzI+YfSiTCk0ec1CRFtbqC0sMIJoC2DJ+IGint2UPz8VOFMJrZlw
0zVXCr0NKHCgvJqPIV24udyzPq79REfdsElZQYyl6GDYGXAqTJLR+OP6/Sc/MNv5
c1uObjQLd/Yi7e9BhqHF60t9s+y3whmqnvOibTEsnRX145VaPBnfwomc1XU9PVIn
YdK2ml1FgIGdZNZ5dPxy
=lyeE
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Topic branch with DT changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5440
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5260
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos4
ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos3250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5260
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5410/exynos542x
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4x12
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210
ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4
Signed-off-by: Olof Johansson <olof@lixom.net>
Clean-up on thegpio driver for old SoCs(non DT)
-----BEGIN PGP SIGNATURE-----
iGoEABECACoFAlguI2sjHGdyZWdvcnkuY2xlbWVudEBmcmVlLWVsZWN0cm9ucy5j
b20ACgkQCwYYjhRyO9UpBQCfXuXP07OSFdUosB4EmN7dsXpwof0An0WBl7vez4zP
MyLYA9BpkD8FwfUs
=Aa7L
-----END PGP SIGNATURE-----
Merge tag 'mvebu-drivers-4.10-1' of git://git.infradead.org/linux-mvebu into next/soc
mvebu drivers for 4.10 (part 1)
Clean-up on thegpio driver for old SoCs(non DT)
* tag 'mvebu-drivers-4.10-1' of git://git.infradead.org/linux-mvebu:
ARM/orion/gpio: Replace three seq_printf() calls by seq_puts() in orion_gpio_dbg_show()
Signed-off-by: Olof Johansson <olof@lixom.net>
* Basic support for r8a7745 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYLajWAAoJENfPZGlqN0++fhMQAIcaavnq8O1sHtkgtyzwyEc4
lw89CFPhJC2asRXUleOocwH94RI5U+kSUCzwChlXdG+jKwrxeELUI91xAxuDyRFN
ejVner0ewIZzbM39fcRrzUn1B8RYzkb2mawzpm4BQvX650dxEMiNzUmYS4I1taAH
ibGuWUlOSuTZs103XFN00KbOcfHegeiBqlQPZJVLjX/c+tFXFkqOWPhPrMqyqhek
GxKKvyrvWUjVX7PsOXHRxxU+TevIiy0rnABo2pZI1WaDrRMaBfYVLqYilyWy91P/
GmtV2YyajIIzUIkJFAz77TBiuT6DyUd9NT+3Cu2X1JJndT9i52oFTIuDEy+TCkmw
z/G+3w8WWh+YPayPyK7S84t0S1DIBhjngq4/v8gR5UOjiSaGQW/zAQXPt9Bsf5r+
CWP81wIizon2adluwW5LB/Hqa1T+RBo1EEub96jkbl51lFZFO9zhUorfRS6qCVQm
5rko2nZvigAoQjnX5WWaJbvOaUtITZfUEdKGU5c6UCyecsXtmBNIH2FKVmCvYy4w
M103I4gEubBcyK1sqYhUC65Xm2Emin/oPNpGasqeSKuXWnSTGT6Hwp2adTFqgL95
6PC123hPLlmn2YSN9kSrWRhlc17RrSozdo14tV88T/Mh+ViZNsLTcZDAU8cMe444
kBO7E/qXUMMGrIs6qSF3
=tBnV
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.10
* Basic support for r8a7745 SoC
* tag 'renesas-soc2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: document SK-RZG1E board
ARM: shmobile: r8a7745: basic SoC support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable tsc2004 touchscreen as a loadable module
- Enable REGULATOR_GPIO, dra71-evm needs this for MMC voltage
- Enable LP873x PMICs for dra71x-evm
- Run make savedefconfig to save some space and make it
easier to generate minimal patches against it
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1zHERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzNZ4P
/i6Vg1P29djr+7Y7A7sq+LO5QuZF2nIVmgCujAcRwbAAYtGeMeNpyv5/fVlim1R1
kpZNHWzNhunAsh+iqSB6L4h0HLpzsvm9DWJDc6JBqxgWeU5zqIE80vAX32iqd5NH
WEnSu9kz+4r0nG8UebTmX40APEohkkwhhLbdu+IpWixPJ6YrflM9E5t9OCXVfkmC
41vZ/zfuA/dIzyRFtKtInoRz8TSC4uBbCM5QuGLUPn9H4PYK06HNhtNIRVnNOVMX
1zat7gn0MtTPDMdKlDo8ZjuskLTIlhsEk7k51OPhK1Cem9LrhYFMhdECGavtZfPk
iSyNQLG8c3kZFXIkRZAZrQXFd60mBwNILhtljzsc/8u/mhveEugR7XsLhj4td+iH
NvPPtO6ISmU7dKpqYWVCCqPpUHQ4DUgoMMPWZkZFszSgslAU7GeA5MBV8CJgqYfu
7GE4sjYypX9iTdKPUT3GIiyfgVbtSPTiNhoPtWXHMOA4iGng9nZK5vMfHGDDUKmA
+55Qcpq4QIC2PvZDfboU9HcO4n/wyEz8HwKxU6NBsD3n5d2+hK/X+g8+8vd5HA8q
YQgVK+y3Rd7BkWbB5K7RrX6RMy8dLH3dg+59xyxgpBfO0k3jdRkefiQ2bAAdZMAR
l6aoRJ5gkkVAQJO7sxx2JUVLHtPrfxWZ3aPW01p2zypM
=h0e5
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Defconfig changes for omaps for v4.10 merge window:
- Enable tsc2004 touchscreen as a loadable module
- Enable REGULATOR_GPIO, dra71-evm needs this for MMC voltage
- Enable LP873x PMICs for dra71x-evm
- Run make savedefconfig to save some space and make it
easier to generate minimal patches against it
* tag 'omap-for-v4.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Run make savedefconfig to save some space
ARM: omap2plus_defconfig: Enable LP873X support
ARM: omap2plus_defconfig: Enable REGULATOR_GPIO
ARM: omap2plus_defconfig: Enable TOUCHSCREEN_TSC2004
Signed-off-by: Olof Johansson <olof@lixom.net>
We've dropped the last legacy boot board-*.c files for mach-omap2
for v4.9 so now we can start removing the unused platform_data.
All of the below has been unused since v4.9 merge window:
- Drop legacy pmic init code
- Apply seq_puts() fixes for legacy mux code, then drop it
- Drop legacy serial init
- Drop legacy i2c init
- Drop legacy PM init
- Drop legacy twl4030 platform init
- Drop legacy USB host init
- Drop legacy muxing for tusb6010, n8x0 is still using it's
platform init via pdata-quirks.c
- Drop legacy musb init
- Drop hwmod related legacy mux code
- Drop legacy hwmod data for omap3
- Drop legacy smsc911x and smc91x init
- Drop legacy board flash init
- Drop legacy ads7846 init
- Drop legacy sdram timings
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1nqERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vzt9MP
/0mUByIMqhtrJYcb8tpFyzoyM6j4YGbWYLVTD4wzJ+r+CXR3khNHZ+FznbDF3u5U
YPTa/l4T8XNg9LVHavEBP6fj2dcM7nEwiL4b8JvtrAx6QCnpImkQCGxUVrmP/t1f
WdMzUw6I5T2paMRLAA0uR7rOSrNxKn/sx45LHr3+702lL/sjlfrkQxFwv1C/K8rf
Znf3Te4qC+JW4/gZvI+Y0Rgq6KmlIljhYPB/xvbQhjxdOM8gYmnbZizL1LkgMv15
wvRs/S6lJN0fVQp0cAJzTb8G/r0eTgDYsfHZKJWu37l2wfNu42gBvBCb7GFU4hW3
7TVJjDhaDRXxB9z2RvqGJXyt/MjNN1eghDE3u7xgL2+/KdM4SkrMbjWYr6ZeMCVq
u/neLGlIAh4gsWs5FKL3uZbJ+e/ElJzB3EKVXxbU8sRvkYyfvIE5jGR8nMcs74X8
x5JnbLh29z82QoTFt+QNSChXN4RA7P9WegtahwAfiTtHkWMZHCn799P1Yo4yW23s
r/Ka7kpAt8VfNFUB6EKHBKSQYjM7U0+jyJz1M7wqEZZJMKDcE0gf1WEik/Bw5pqQ
YckYsB4SXNEneXQxD17aoSqI2SYsZmfbP9dA9SF5/lSn9JmJrvyCCZbOxZC6i+69
MdnDN7fcfZGz1OTVla+87g/7AQ2Nem8BD77umhvEd8jF
=GbYF
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Legacy platform_data removal for omaps for v4.10 merge window.
We've dropped the last legacy boot board-*.c files for mach-omap2
for v4.9 so now we can start removing the unused platform_data.
All of the below has been unused since v4.9 merge window:
- Drop legacy pmic init code
- Apply seq_puts() fixes for legacy mux code, then drop it
- Drop legacy serial init
- Drop legacy i2c init
- Drop legacy PM init
- Drop legacy twl4030 platform init
- Drop legacy USB host init
- Drop legacy muxing for tusb6010, n8x0 is still using it's
platform init via pdata-quirks.c
- Drop legacy musb init
- Drop hwmod related legacy mux code
- Drop legacy hwmod data for omap3
- Drop legacy smsc911x and smc91x init
- Drop legacy board flash init
- Drop legacy ads7846 init
- Drop legacy sdram timings
* tag 'omap-for-v4.10/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: OMAP2+: Drop legacy sdram timings
ARM: OMAP2+: Drop legacy ads7846 init
ARM: OMAP2+: Remove legacy board-flash.c
ARM: OMAP2+: Remove legacy smsc911x and smc91x GPMC support
ARM: OMAP2+: Remove legacy data from hwmod for omap3
ARM: OMAP2+: Remove legacy mux code
ARM: OMAP2+: Remove legacy hwmod mux code
ARM: OMAP2+: Remove legacy usb-musb.c platform init code
ARM: OMAP2+: Remove legacy muxing for usb-tusb6010.c
ARM: OMAP2+: Remove legacy usb-host.c platform init code
ARM: OMAP2+: Remove legacy twl4030 platform init code
ARM: OMAP2+: Remove legacy PM init
ARM: OMAP2+: Remove legacy i2c.c platform init code
ARM: OMAP2+: Remove legacy serial.c
ARM: OMAP2+: mux: Use seq_putc() in omap_mux_dbg_signal_show()
ARM: OMAP2+: mux: Replace three seq_printf() calls by seq_puts()
ARM: OMAP: kill omap_pmic_init
ARM: OMAP2: kill omap2_pmic_init
ARM: OMAP3: kill omap3_pmic_init
ARM: OMAP3: kill omap3_pmic_get_config and twl_{get,set}_voltage
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1YKERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vzd9AQ
ANr+2RtDJw9vVf8SIhzwaZBCYJ9qifO1nUqTxGYDKVFYwkemrbYWQF9UnT7U+L4q
DaVh4+5TJMB3EZz7lVHv28NJ3+dU4aFuRPGb/sOy5aAWxrVKJ361BmEcEiWDFuuM
SxdqxucShKNmU848ehG1J6W5P1ESsBbYlSy7s1HRQ3n6Q9C1cu9z5RpoT5gU5/aR
DQy0Wv9k+g8vzW/z5ovaqBTvtmDvROOUYE1Cbjfe2kLSmBgRTiyMBNSEPGAuRxq+
e+ASMStTzmWotXTiLANa2RDz/xTaiKNzdG2YyUscKhhAeN9di23HcGlwk2JQszC6
CtI/Pl0vsky647B9jwJdrjXD2i6zqrqVau6wR/Gm7zufiejSFnDONft7byD2EYlc
o06XUHA+vl4UdGCS3Ik8pvDuclpqTNGHuAPumMovv9Q8mBlMdfyUxMWt4ZlZBpgl
1oz4+ZNkDPl6ZMqc/RSe+PxT+iT55tTs6BIPSJ5+ooFunx2SzOsMPO9r785w54yp
eP0scopmek8fpsFOWevJh1lyUbXB4o9t0joaxsPyDQd2zYvsomds+Lu7r0Bp8ocY
ekCnU2fizKI8uo1WYJRhBwqk+p9qbAWOXQtLWXCNuuejxZya2iUwO900k/0tqxVt
Yy5LQ+nuv7FKb0jVgptXYlWglOg1PUDSfpq4Zq/i8Awk
=GYpd
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: Add minimal support for motorola droid 4 xt894
ARM: dts: Add support for dra718-evm
ARM: dts: dra72: Add separate dtsi for tps65917
ARM: dts: dra72-evm: Fix modelling of regulators
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dts: am335x-baltos: don't reset gpio3 block
ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
ARM: dts: am4372: add DMA properties for tscadc
ARM: dts: am33xx: add DMA properties for tscadc
ARM: dts: omap5 uevm: add USR1 button
ARM: dts: omap5 uevm: add LEDs
ARM: dts: omap5 uevm: add EEPROM
ARM: dts: am335x: Add the power button interrupt
ARM: dts: am335x: Add the charger interrupt
dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
ARM: dts: am335x: Support the PMIC interrupt
ARM: dts: tps65217: Add the power button device
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1fbERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzjuQP
/iul0s0YHTgcm9XlWLriEMpq3YDuzeY50eCBI6EjjiiP6rqJBew7GG/6/x2RFo+7
X+X/crnI42fzLDvo7WI5tbN5e4aFtIR3rqn3+2oVEnAfXqtWsqRmDEaQ2u4OUQ39
jucL1sCjoNUyBNYS43JOG+XV6zJViIxMFL9yy9ZTGUHMFMergtTolBThp/wpgf4u
pdkauLgabtZkiD/lLmNcLVaTl2lyKkf/hMtbL1xO5zHWgD2Bz8dQeS1k4tY2NzF4
SuiAcpRwlPaChnm4gPdnoSHFtjWtFmjgLRo5PAsHaubKVi6xcRrWYqq9Y3E6POu7
0uYxU05faSkxc3WMYCuM9bwjsU9EXzh7A22WgECckhIDgJej+xLw0yZOBGbEufSN
0JO20HVFTa+OR0KtnjKhs0x8nuFciSIzgmVExJn2lceqxHzZnWKo8tR1yr2iwk2n
jWU4NrMy+CzGAKV1lH0cgkph5cAnDSMR1J99tZqES7tHNMGeEgzd3RaIR1ENyiTU
JfROO654zJx6N6yLzOEUxtbXy1DcwOrs9SV+mBkiJV3nuj74E9jGqDnifjJuukXp
JNdoqOvU2ccA8vuKCTd2HRY2RHAx2N1oLJb8L4mKwxQTYofON6fKJ9Fig6muW3nP
7rd3jy0CQ/WbNYlZFUmuyYqfrGR6IMO72N9dvqYGrptO
=hUTI
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omaps for v4.10 merge window:
- Add hwmod interconnect target wrapper module data for crypto
accelerators for am3xxx, am43xx and dra7
- Add support for dra71x family of SoCs
- PM fixes for omap4/5 needed for omap5 cpuidle
* tag 'omap-for-v4.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Do not register RTC on DRA71
ARM: OMAP2+: board-generic: add support for DRA71x family
ARM: AMx3xx: hwmod: Add data for RNG
ARM: AM43xx: hwmod: Add data for DES
ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only
ARM: DRA7: hwmod: Add data for RNG IP
ARM: DRA7: hwmod: Add data for SHA IP
ARM: DRA7: hwmod: Add data for AES IP
ARM: DRA7: hwmod: Add data for DES IP
ARM: OMAP5: Add basic cpuidle MPU CSWR support
ARM: OMAP4+: Fix bad fallthrough for cpuidle
ARM: OMAP5: Fix mpuss_early_init
ARM: OMAP5: Fix build for PM code
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix mismatched interrupt numbers for tps65217, these are not yet
used
- Remove unused omapdss_early_init_of()
- Use seq_putc() for pm-debug.c
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYK1bEERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzX9EQ
AL7rLfFsVY39z2pu/QEdkiBfypIcJx1TE9jMR/9j4rJUxewhTkVvyK0fqHnUv7ZP
znXM/v0ZGE7q4AoyaV2mBsrk+Gty8pkzW50swUxmKK6XwJSjmKAeX1RkzmmNmPYW
xXC1h77GmbmGnxFJIqQrvbuJse2ItKUIq3ks7+ZELlAwe51SSM3CHHuEVKcPNcJS
2gmwmaWEi8WaSLBEmlI4OverVlzZrAWYxGyG+QArY9RKRuzCeIKjyk4y+L6RVk6F
J0Y6Wqbmd9LAwKGwkxBjhpOMTJnM9cHbje7w4wvKWOZ4PVNfneCQXGSwhI9CZIU9
WqDCeTDkx42ElV7KQSrxSBOuXRv6uIoLYLQIVTQeSHf+EeN4v74CSPMNdgpMWoVu
AvLgq0pUth4c2hEn8nl2M77jxdqtG7IbtrrOHhBI5TG6s4wPXOco7JKcZOQ7cKkN
GG4RnvXPH4zFuX0pn9ONn3IAAQXXRP1fXolmMBewYOpaOhrNURasq/y75dPFohHx
P7Frv/f6B5MUKciHe1nENJhL/BCubSHhqNGy2fyNXi3yHH3Z9LK0sfad6D938Kl8
xSqLE1LUrp2rj3jvalj7masywssxpQMsyO26JtMqXUQxHXme5DR+m8pHOkz4/MKe
rGaMSvE5lp84taz8/T8LHEybWog96ky2efsuTIcmMgWy
=tMf4
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Non-urgent fixes for omaps for v4.10 merge window:
- Fix mismatched interrupt numbers for tps65217, these are not yet
used
- Remove unused omapdss_early_init_of()
- Use seq_putc() for pm-debug.c
* tag 'omap-for-v4.10/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
ARM: OMAP2+: Remove the omapdss_early_init_of() function
mfd: tps65217: Fix mismatched interrupt number
Signed-off-by: Olof Johansson <olof@lixom.net>
Two patches to enable the dumb VGA bridges in the multi_v7 and sunxi
defconfig.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYK3fVAAoJEBx+YmzsjxAgxQsQAJ5nxCMARLnLKaSuIu8OuusQ
eZLogAq5TDTirkgHupOM1eEAsTwwsH/I2EtkR86Cl0cE4nhAEJfaCh5DnlG5rcaV
wi1jeyDy5mEaxyD1eom1YZYnXdBbmiSK5f6snJV4Uhu915sgDA28JYtSNhVvTtMA
igoPhGMFzmyOZY4LD2BgYk/BjTxpJEMnI4uqKv7mlp1noqwY67bl5/h204vUsmqt
n3vZPg4h7IWZWMVlG+xMjfZ8o+xSJtQ7G2o84GDtdQ7f3dbpcxHfUrd7MK07ogCP
vLLHgAvXDwKx3RaY/E8sJ9Qa4awASxFMEHGfPoFhSwEmm72LVr1JStvmstvLlmmC
pdzhzQNRguiSX4VTJWwcl6ne1WI9Y/e+s3+OPXQQuNoAwqoS3waRqw9BUZQydNTu
lcL0bMZZSO8a3MJdlIenISjt8LCWZLF/K9w+/nxf6HQigSF8GTfLTTbLu6/ew37H
XfneT/zJN+cw7Fw5J/Q9Xn8tawF8CVqPxKzhCz5YFr/R2EznVgfdVfALQ2mkJqhS
m0c+rFSCIKmAd+Txx3eabyoAoJlCwDFmanoohR5QFvNLxSRfeYP28Vkyrx5MKVMa
Uw5l3rQ/3613GYTiMSEDqhuMbHklZ1ZVEWCDlih6+pO08nGIzv8F9CSWJV5yNYGM
XQPblI7HJ1ExwoOiIqlS
=P4mc
-----END PGP SIGNATURE-----
Merge tag 'sunxi-defconfig-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Allwinner defconfig changes for 4.10
Two patches to enable the dumb VGA bridges in the multi_v7 and sunxi
defconfig.
* tag 'sunxi-defconfig-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: multi_v7: enable VGA bridge
ARM: sunxi: Enable VGA bridge
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
-----BEGIN PGP SIGNATURE-----
iQJMBAABCAA2FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlgrXr8YHHBoaWxpcHAu
emFiZWxAZ21haWwuY29tAAoJEFDCiBxwnmDrP7UQAIVZfUCBUfc5PF6u/pWrUOtn
Eg7SWvo1TYcJPJKoICwlRwKXmzLVfmivCsxW8my5Ddb66JQ5hMkoqsXALQl0sAZK
U2xXiy76z+EsL9tvvJ2b9Yqx3BIbzPkZyv419RWMVldqUtdbtHe70xLjF7DVfaTs
f9BTh0OAN55yWhYS7HQDQKm2bvUe3jy0XDzXlbPXgdy/roAReBFSFO4r80cbbAfv
DZwhrzmGSAGF0fE/TQA65wkkuZMM/rE3cjOjieVC4ZaeX7OQ+eqIMwph25uHCEnS
61g1J8GcwKvtP1iXAg5VdLAW2TTGTHztBR8UchrxZfySnKWR0rGee3LkQX8LVfih
mVI2jtzpq6fGYSask9B/fGnObfjWF0kHcgy525kdcNbo8HVZ0vdgZI/yoCh3ZViT
RHpuXk5cHYM6t7aNGOBvVvdKOL3wtuFUrJKYEpOL3BB//SLZXxCDCawMt7H2XHX5
3EbLfKikQQbMNs8XzeSfTOQi9ITcdwnLdTqjBunAbf0aMiF+SOtDS/yb6BsG7zjv
muz4LUtcMq5YfXnZbB11ngz+DSN/g7MHIjl9MXG8kMO9JsVb1R9VtmbxNQ87EU92
oKGy4ix0vSIRl7/gmmFZt4iV8RQOvffkB4iIkOXlWXdnsUrqIj3V/YwEr+8leoWk
MHr75XggJOUH9VaMUP/2
=e7kp
-----END PGP SIGNATURE-----
Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
reset: allow using reset_control_reset with shared reset
reset: lpc18xx: make it explicitly non-modular
reset: zynq: make it explicitly non-modular
reset: sunxi: make it explicitly non-modular
reset: socfpga: make it explicitly non-modular
reset: berlin: make it explicitly non-modular
dt-bindings: reset: oxnas: Update for OX820
dt-bindings: reset: oxnas: Add include file with reset indexes
reset: oxnas: Add OX820 support
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
reset: sti: Remove STiH415/6 reset support
Signed-off-by: Olof Johansson <olof@lixom.net>
Recently added audio block of Exynos5410 missed global fixup of GIC
interrupt flags. Interrupt of type IRQ_TYPE_NONE is not allowed for GIC
interrupts so use level high.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
- Increase CMA size to 64 MiB, so that we can use etnaviv driver with
1920x1080 display devices.
- Enable ES8328 codec driver support, which is required by Kosagi
Novena boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKrrAAAoJEFBXWFqHsHzOj4EH/2hdhqbgnOXkYfxU1vp+Pic1
n3CAeRwtgIkfVWRxPn0ljx3XUppqnkGbTtn0JcgNDiPJnmiwhdPdVzUaekw+HVXL
kGp3O7gxnop7txSsCuMy6jFJxIpPPO0eiH8j0NfYv1WqjFo/6lJJmCaowxoEEKXn
T51/e7+W76WR294JruYDTgtDYHXphX58gI1vqAs/2r/wDFxThkxGSDQlNq8edrA7
dtP1urqDR6Q99eeA4gBNl/xqkN0NOKImf7wM05Pvyf5uRzVtHiYBhl3/3x2wgcsF
u9sehmu8vFPaifYbCoczxcRmiJew1ZAg0LdrFh1BJMnKRxbTVOl4NGPKYxALRT8=
=vMwU
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig updates for 4.10:
- Increase CMA size to 64 MiB, so that we can use etnaviv driver with
1920x1080 display devices.
- Enable ES8328 codec driver support, which is required by Kosagi
Novena boards.
* tag 'imx-defconfig-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select the es8328 codec driver
ARM: imx_v6_v7_defconfig: Increase CMA size
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: i.MX6SX UDOO Neo, Boundary Devices Nitrogen6_SOM2,
Engicam i.CoreM6, Grinn i.MX6UL liteSOM/liteBoard, Toradex Colibri
iMX6 module, i.MX6ULL and EVK board.
- Remove skeleton.dtsi inclusion from all i.MX SoC dts files, as it's
been deprecated, since commit 9c0da3cc61 ("ARM: dts: explicitly
mark skeleton.dtsi as deprecated").
- Misc device addition and enabling: OCOTP for Vybrid, MMDC for i.MX6QP,
TMU for LS1021A, FEC for imx6qdl-icore, DMA for Vybrid DSPI.
- A few cleanups: use hyphens for node names, fix white spaces, move
imx-weim parameters into SoC dtsi, replace gpio-key,wakeup with
wakeup-source, remove pwm-leds from imx6q-apalis-ixora, remove I2C3
from vf610-zii-dev-rev-b.
- Other small random changes: calibrate USB PHY for b650v3 board,
update TX D_CAL for USBPHY, use enable-gpios for backlight on
imx6qdl-apalis, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKrEtAAoJEFBXWFqHsHzOpnIH/j4Ot/09VQR7IddDY4PkOX53
7zsYkzVLvUIlAkylICfyjoz8XeiyLl9rM4jg8ubnWBOiKDl1lMxeUfvAmAeX+D5U
9bgLgNxok7ugUZZKNt6h3+4Q6eAsXBltXBwIMiFEVsHa6sDFro2S4xq74DytEpZR
Czg6inH9GHix7urlNn5YWvxHDCJMRx3AUQtYlUCb7dd3MrNegvddE3osF49KCdzA
yKwdN+BdAKL0avWS9BurmXYCVl7OcReIuCIEKA9235V7o5HnBPHbDrxBUO9shqOp
KcIpTM6rUMRNdzs7CcvkOco2nDkHnOt0u5v4ON29GVq8w2jX+lmbVZCSkCVk44I=
=+GDb
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree updates for 4.10:
- New boards support: i.MX6SX UDOO Neo, Boundary Devices Nitrogen6_SOM2,
Engicam i.CoreM6, Grinn i.MX6UL liteSOM/liteBoard, Toradex Colibri
iMX6 module, i.MX6ULL and EVK board.
- Remove skeleton.dtsi inclusion from all i.MX SoC dts files, as it's
been deprecated, since commit 9c0da3cc61 ("ARM: dts: explicitly
mark skeleton.dtsi as deprecated").
- Misc device addition and enabling: OCOTP for Vybrid, MMDC for i.MX6QP,
TMU for LS1021A, FEC for imx6qdl-icore, DMA for Vybrid DSPI.
- A few cleanups: use hyphens for node names, fix white spaces, move
imx-weim parameters into SoC dtsi, replace gpio-key,wakeup with
wakeup-source, remove pwm-leds from imx6q-apalis-ixora, remove I2C3
from vf610-zii-dev-rev-b.
- Other small random changes: calibrate USB PHY for b650v3 board,
update TX D_CAL for USBPHY, use enable-gpios for backlight on
imx6qdl-apalis, etc.
* tag 'imx-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (38 commits)
ARM: dts: imx6ull: add imx6ull support
ARM: dts: imx6q: replace gpio-key,wakeup with wakeup-source for Utilite Pro
ARM: dts: vfxxx: Enable DMA for DSPI2 and DSPI3
ARM: dts: imx: Remove skeleton.dtsi
ARM: dts: imx6q-utilite-pro: i2c1 is muxed
ARM: dts: add new compatible string for i.MX6QP mmdc
ARM: dts: imx6sx-udoo: Add board specific compatible strings
ARM: dts: mx5: Add new M53EVK manufacturer compat
ARM: dts: mxs: Add new M28EVK manufacturer compat
ARM: dts: imx6ul-14x14-evk: update TX D_CAL for USBPHY
ARM: dts: imx6sx-sdb: update TX D_CAL for USBPHY
ARM: dts: imx6: Add imx-weim parameters to dtsi's
ARM: dts: imx: Fix "ERROR: code indent should use tabs where possible"
ARM: dts: imx6qdl-nitrogen6_max: use hyphens for nodes name
ARM: dts: imx6qdl-nit6xlite: use hyphens for nodes name
ARM: dts: imx6qdl-nitrogen6x: use hyphens for nodes name
ARM: dts: imx6qdl-sabrelite: use hyphens for nodes name
ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support
ARM: dts: imx6qdl-icore: Add FEC support
ARM: dts: imx6q: Add Engicam i.CoreM6 DualLite/Solo initial support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Drop PL310_ERRATA_769419 for Vybrid, as it turns out that the SoC
integrates revision r3p2 of the L2C-310, which is not affected by
errata 769419.
- Support perf for i.MX6 Multi-Mode DDR Controller (MMDC), so that we
can profile memory access performance.
- Support i.MX6ULL SoC using i.MX6UL base, since it's a derivative of
i.MX6UL and pin-to-pin compatible with i.MX6UL.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKqdtAAoJEFBXWFqHsHzOzOwIAKwTOHmA90KHhG1P0CX2B/aL
0v5WKJM/gxHda51AivVncH63ozQ6E3MdHf0MgszYre+AIDwaKNTt6MnPTb2DYIo5
C0YCzP43r5wiDMczdcXsYVuq376OwpyDV1lzbUwNpSLaX80i1fZyxU+9SH3zEd5G
XF2DtGzZR5nWJJ4eATXA6FXjGIzN4/k0xORLdppOfD2WHd45xXwcd0kUWo1IKba/
jCKPchfkd34vJXqdxM2dfb2SrFclkLm+ew9uaNNs9uTUNF5zclO57wLhQcbtnjR8
rKBP3eiH9j5o1KckjA9DxijKmOMiJ5YAqYh6bZy6y6lwDB7ov+wNOUIFpA3yVc8=
=YJDd
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC changes for 4.10:
- Drop PL310_ERRATA_769419 for Vybrid, as it turns out that the SoC
integrates revision r3p2 of the L2C-310, which is not affected by
errata 769419.
- Support perf for i.MX6 Multi-Mode DDR Controller (MMDC), so that we
can profile memory access performance.
- Support i.MX6ULL SoC using i.MX6UL base, since it's a derivative of
i.MX6UL and pin-to-pin compatible with i.MX6UL.
* tag 'imx-soc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: mach-imx6ul: add imx6ull support
ARM: imx: Drop errata 769419 for Vybrid
ARM: imx: mmdc perf function support i.MX6QP
ARM: imx: Added perf functionality to mmdc driver
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKoTwAAoJEFBXWFqHsHzOGyMH/03fFizPHl+LQYilR8hKbFLg
amAhmqVEM0gRv/yvBwi/I0FXUyoBY4rhhAzvjy+1eF23wlipXt+2FozlXLW3jy2w
YP1bTnSy3qN5+eZakfeARFDh7Q1ab/19ZBJYFyQaRB2yY3CRDz3xeY5mOeVHdnUb
jI1+GpDAr37acGlGVOrsYJlpNlzX8HjAfRhPvlEqMH1Xp/1O5EgkzHyICKR9ysaB
f7fDTAhVsxivdCF/XU6TpyOUtWshu0v4ji+JtvRkz0p+9gHgWGKzu9ixQTr1FFxZ
YHPnxpDf4jtygLtrrzT4qBww/84PemAfQ3Rhpl1aG9331VB962UZ3R+JDoSSwnE=
=Xqw0
-----END PGP SIGNATURE-----
Merge tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/fixes-non-critical
i.MX non-critical fixes for 4.10:
- A series from Vladimir to fix broken i.MX31 DT clock initialization.
As i.MX31 DT support is still not quite complete, the changes are
tested on qemu kzm target and mx31lite board with simple written DTS
files.
- A fix for CompuLab's sbc-fx6 baseboard to remove wrong fec pinctrl
setting.
- A DTS correction for i.MX6QP to reflect the change that the gate of
LDB clock has been moved before the divider.
- An imx7d-pinfunc fix for UART pinmux defines
* tag 'imx-fix-nc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
ARM: dts: imx31: move CCM device node to AIPS2 bus devices
ARM: dts: imx31: fix clock control module interrupts description
Signed-off-by: Olof Johansson <olof@lixom.net>
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYKlcwERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6Vz/GQP
/2+QScOal19fL4GL2IQRZA7k6BqNIwig2Rn1Kc1y6ONDeXRcVBFLP7Rbe2LFjygJ
y+XcRcZePtspqQXCxESNxM+IClNHqFf/zY3055GAIkXCmWgKjs12CXU+u23ApUwx
uSTzPGCBp7aSakX+U1h4sBB/2vCyQbUyiyxQ3rEijnZAfNgAOvxj+Tk1YaZQzltA
/FJ06Nko9Os3jWHbEFudjTsYiFJyCa9x6MquupQKT9TF+P28Mb/+SFv05OLLITOV
eUEpuca2ml1KBgyRDnBZdhbfzzsHDwcP26JWEsejeOn5FIXMKdK7Ayo/lcZgHYn9
4hsQoarIrTI9F/7DSZIS4W9tOYCM+5cEensRo6yajaKGmeCGHtFveNftcXSloKSN
SrIc47l+XEXC+BFRrcurm9nf61HbmlozVpiURCtuw8vANLLtenWWzew12QFuBsDU
D2yNVg7e9rHg5cJzS3oq3rkb7/XGg2EnwQvV+xUuLorWtp7Eo5YWy4aBu/9UVVQX
kx3lj2PsGrrKofwyP711vUMqO8uEwZbx3SDW+S7WpSC6JoxObCh0kd+3YP1P2+8+
i7ltGDbI4gm+zAzUcB27CUOuLbx720DTUTbfHhi50KLjkWM/FEKTW+9MeJ9VChD4
t/JZSUYPGHR7DS+9a3qVew04Rjl4GsSthHNidahj4izj
=qXyV
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Add #pinctrl-cells for pinctrl-single using dts files. This allows
us to use generic parser later on. Note that the driver supports
handling the legacy binding also with no #pinctrl-cells so these
changes can be queued separately from the driver changes.
* tag 'omap-for-v4.10/pinctrl-cells-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add #pinctrl-cells for pinctrl-single instances
Signed-off-by: Olof Johansson <olof@lixom.net>
The Integrators are now migrated to handle the CPUfreq
scaling using the generic devicetree CPUfreq driver using the
common clock framework and have the required device tree
modifications, so turn off the old driver and turn on the new
generic driver.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the cpus node to the Integrator/AP device tree so
that we have a proper placeholder to put in the DT-defined
operating points for the generic DT/OPP cpufreq driver,
along with the proper operating points.
The old Integrator cpufreq driver would resolve the max
frequency to 71MHz, and the min frequency to 12 MHz, but
the clock driver can actually handle any frequency inbetween
so I picked a few select frequencies as OPPs. The cpufreq
framework doesn't seem to deal with sliding frequency scales,
only fixed points so 7 OPPs is better than 2 atleast.
We define a CPU node since this is required for cpufreq-dt,
however we do not define any compatible string for the CPU
since this architecture has pluggable CPU modules and we
do not know which one will be used. If necessary, the CPU
compatible can be filled in by the boot loader, but for
just cpufreq-dt it is not required.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the cpus node to the Integrator/CP device tree so
that we have a proper placeholder to put in the DT-defined
operating points for the generic DT/OPP cpufreq driver,
along with two working operating points.
I have only put in 48 and 50 MHz because going to e.g. 36
MHz hangs the system when CLCD graphics are active.
Presumably the memory bus gets to slow to feed the display
and the systems hangs for this reason. The ideal solution
would be for the display controller to put constraints on
the memory bus frequency, but that need to be a separate
longer-term project.
We define a CPU node since this is required for cpufreq-dt,
however we do not define any compatible string for the CPU
since this architecture has pluggable CPU modules and we
do not know which one will be used. If necessary, the CPU
compatible can be filled in by the boot loader, but for
just cpufreq-dt it is not required.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the relevant data taken from the PXA27x Electrical, Mechanical, and
Thermal Specfication. This will be input data for cpufreq-dt driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Add the relevant data taken from the PXA 25x Electrical, Mechanical, and
Thermal Specfication. This will be input data for cpufreq-dt driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Since gpio-pxa was redesigned to differenciate gpio0, gpio1 and the
gpio-mux interrupt as in the hardware IP, the device-tree description
should be amended so that interrupts from gpio0 and gpio1 can be mapped
to consumers.
This is especially true on lubbock and mainstone devices where gpio0 is
multiplexed on pxa_cplds for ethernet, sa1111, usb udc, and other
devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This file describes pxa25x SoCs. Not all devices are listed yet, only
the subset which was already tested with a lubbock board.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The TPIC2810 is available on both the AM571x and the AM572x IDKs and
is attached to I2C1. Output is attached to the I/O header and 10 LEDs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on both the AM572x and AM571x IDKs and is
attached to SPI1. Input is attached to the I/O header. The load trigger
is attached to GPIO3_19 on the AM572x IDK.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The TPIC2810 is available on the AM437x IDK and is attached to I2C1.
Output is attached to the I/O header and 10 LEDs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on the AM437x IDK and is attached to SPI1.
Input is attached to the I/O header.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
7 of the 8 ADC inputs on the am335x are connected to the Industrial I/O
header, add this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LEDs tied to the Industrial I/O output pins are meant for providing
status feed-back and are not the primary use for the pins. Disable
this use by default. Also unify the LED naming across IDK platforms.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The SN65HVS882 is available on the AM335x-ICEv2 and is attached to SPI0.
Input is attached to the I/O header.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCAA7FiEElLzh7wn96CXwjh2IzL64meEamQYFAlgu7+gdHGZlbGlwZS5i
YWxiaUBsaW51eC5pbnRlbC5jb20ACgkQzL64meEamQaDbxAAsgDPAp8QTx8D1d70
hSGyPZ55rmqlzBNbUUOQyk/AeN5xM3XVbjZNOxWn4c386iaDrngcqOrxjCbBRsje
b9yMESMiZsTPVlKXE45yXt//NHg1KUfpHON7rybaiFq0uqjUhnQf95DeYPgJVxit
7F9B+05XcNMyxYRoz6bGkRTU+lcJ6g3/orgKfp4t/hs8WUNXH6+71keMF+IdLYNH
mcPmJ8MXpfLzv8eweRwV0s/3flxCuFx1ksZ8cW6qHR5vX303X2sGTlinBmhfQapr
t0a+OBtLpZdNmjw/yB2odc/1jjLNRHpYU5xGqwouMx9Ca2PocFT2xFbmUWR23xp1
X0rkICRxcLPjZql2Uld5QHO9dPnF/FbX0Njuvxo+2r8ENE5/eG4C/RcYcRDmYPsu
u8k2rKFs0+yCOAU91rD8mayJVBWBJ4trqZFT0TcocCGsMTk8fTYpF1Iskj9Z4FKz
yo+lgyCCtp673ykGZ1ezsL6YWOmdrQv/PurKZqrXAmdhi6+mImLI/nAHtAdOZx0X
zK9MwPnwDxrPiqhrZ46+Bm/EjZI50TM44M1ldmCwKi/6/Nvy54DHMtjPI5/9205R
bjftW3DkVWAC//29RNcGEHtwiJFPEU/kdoRFOPhKGJ7ocCzFVSTFBgo02kDsC6De
Wouv2QTFuZN9s17o29YVD3bGJZM=
=5WN9
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v4.10 merge window
One big merge this time with a total of 166 non-merge commits.
Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.
The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.
In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.
Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
Odroid-X, -X2, -XU3 and -XU4 have SOC-ADC routed to an external connector.
Enable the ADC for use as iio-device.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This is not needed as the gadget now fully supports DMA and it can
autodetect it. This was initially added because gadget DMA mode was only
partially implemented so could not be automatically enabled.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
ARCH_MEDIATEK is enabled
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYJdNtAAoJELQ5Ylss8dND7QYQAKWFXsk/2sYV4UUDQ3ZxeSd+
DjyXJpxuRaNafYhBbRY1J93+GfhqCl4s4l3qSTSiYUOHOAuNx5p2jMNAurwJFArH
LC4PeiluoLUnRsAe3I0urYz7KKKAUUVr+J5izgQbKyuBSnn+fToATbJrVI/kS27F
1KRM99Hgt6ZYUWRb0PC5cKW8yGgsQa2Jhakocr9JLRVJsjfrZvceGcuaKRstDTYi
wocFxoJ8pk1YUCtIX6iVPY3i6MKYZY6aupTC8CwO8+GfSpq0KoPB0UWEBtN0BxRH
rHRn+Bu2k6/jmROlIPjtxgvcO7unVvZWrO/tO7TICocCa8TpJ19EJMNeiqvm5auM
z1m81i1LvfgMcU9FPDtzGp+UlVe1fFNwwLTMJkQjAFRodiBDXqqsEE7OZY1eT0hM
zGdo2JXuDzeo8cuWfADSKK3tM/TjIN/J7cEs3/OqkA3+pQtUJi+LS6CdyShmUBHD
oETxMN78loT3tcsSfXUMkD/PGp1/hDuAGe1uW8pj+/i8ZZb6kA5kqA+X6NK3ZBwX
80j2jS6IaMY3tpvMjukz5CVzf3sfztS0x1Bse61YYYmjDeVe9phxZ/NNwz1YTZbm
7e1GFGaNYlvFf701g1uGiWDq/YwkCrM1B4/9t/dmzD0vRppectt4DPnqAcoezv78
XMph+g3Ebz7Mplbe/Itd
=pzZG
-----END PGP SIGNATURE-----
Merge tag 'v4.9-next-kconfig' of https://github.com/mbgg/linux-mediatek into next/soc
- clean up mach-mediatek Makefile as kbuild only descends into the folder if
ARCH_MEDIATEK is enabled
* tag 'v4.9-next-kconfig' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: clean up mach-mediatek/Makefile
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYJdcrAAoJELQ5Ylss8dNDoJcP/2q1LuStbojWMWxFKexQBCIk
8VEPzY8fyEckshbmgnz36qqp2MnecTLjb1ETesFIEGZWbEBnoAJC9hyIg6fFVZQi
mFZC8/0I7uvaFZHa+a3fQZb3tCmLMcWbAaGvA0p28kNRKnRhTMVHhLa7Z0WmMrG+
lQLlBBTP/xHErOakFJagkFIWYmmmMReS7x+X/tnVPienxkwODjpLYJQLL1wVmoqV
lpSj/nSRRDg8CeeG8/x+Odtr77L56glDMwwieXVpBe2sd+CpRk3QSTTcuYLkUp46
JBBKrr7TLLD6KEw6FgPjvjWDR3TH7S2wkbZVJN4B+8tmdEhpQhnle2MpJ6TYLKQb
ENwZ9JP70UD8o6mWb5e/g9R82WxUq1KDpdlU71OeBsnqfJRn1sge8bsO6+qs4+6Z
JapDW+Zwsewp9VZS12k4VdsCsYR0MZgX6XXj/NOOseJOMUXBFAoHj7vaC5Gj0UIT
VFKndrzWjIaVbaLHA/2KyVvOpJsEVTwSURyEko6XnTRLg+E85SSx+r6Bp3rlSlCV
Javet8M9YTLhPa1IeFMvf/1V4C4poX5tE4tvCiSZC1Wvxto5FSEgeGarq59Pgyi3
UWnxao8FHBHi3NU8khTI+rnIYtw5WxkEpqU5UUTYMUwsQ3x83VnU0WzpCSKQSNdD
Od24wmc/rrNKeU098abr
=wFjD
-----END PGP SIGNATURE-----
Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: mt2701: Use real clock for UARTs
arm: dts: mt2701: Add clock controller device nodes
arm64: dts: mt8173: Fix auxadc node
soc: mediatek: Add MT2701 power dt-bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYJzNfEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYGsQQf/
WWYA4/oR4pT8HMns5coctc2zOyNU8KYmaeRl7TViUna+HA6/m2SGMqomTFV2AK0v
Ha3M6A35dDUGJNmAbEB5oolGOwHh82gZKYxYIQiNX+zCxeb5JxKCXWSqAjC9Ndwu
h600H1K/Qb26OzaVE/ICtlveduN+9BWrlzNseHsm99Z93FNsRLN0Z8s2Mn3jra6P
2Pf1sJkOPuh47i/Y/gTDVcFSf6Srb4SM/26fiZjrRa8LaaO/0I2Ku34ne9FygGzi
0GBHWh2SILM297MZMcrCDoJvTTqLT05tUrX1PDGmdunqP8vnsOAgvL9291G8d4sw
PbYE3onlyoxHmeOSffAe5g==
=AXPK
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
ARM: dts: rockchip: Add rk3066 MK808 board
devicetree: Add vendor prefix for Rikomagic
ARM: dts: rockchip: initialize rk3066 PLL clock rate
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
ARM: dts: rockchip: update compatible strings for Rockchip efuse
ARM: dts: rockchip: add rockchip PX3 Evaluation board
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYJiljAAoJEBmUBAuBoyj0ySQP/Arwy1gmyK/mQ9/W/WSPdm0h
aqcRuSjMTlmL+R6myWTpNyDIysbCROYzJFapK4YiGQProIWvgR9Z/kjuDDsSqHmI
IV01euJvPFMklwL1MwhhlDrBPJtSkOZtL912C03NBQSfCc6rcmfWTBmGOOJtlSkd
V1nxL+uOu0bGRxsrRy9z4iGXy7DfeqyIIIZ0PHuUqbHaEX0HldID1vX5vS0ymuv8
EwZXvf/nPrqO/pY+sOJ3QTb4sMcUwwOqcliXJ3d/U/qWz5OS9NEl4ROiKOjyhPX4
hUkr7Hymftd/33fkDYaiVyHZaCz/7QZQ6G+69VHLu0zKMiTMc2afNTJ6EDJJ+uS2
PIk+6AWtSGucFqytmfcqLUWgVHJUhXDJmuvGs7ibYAuw+jnAz/gr8H9l7QClm+V1
Z5LYApPDDC/khRwlvh8Ce356WxeL5n1zbw0Mq6Avz9TrC7bw2vGmw37UWA9TlA5T
elsLjmjdAEo0UNajGUy/oSrDmR3iZAgtraxSM07QDzPYg3zKxJpSiM9eWtMFTo/i
RVkkxYEXLP5skbW1Mh5KGaDGecwhfYQwV58WvXpu+hA+Lv1MKo+QuENA2H2vf46J
AGe/77KFVjrjeqoYbN4dVVZ+uhVccsO7VGE3lZ7MBKE/fEb2Ici1JfaJb7ABc4Rj
liho+hmnwVbWQeQc+Je7
=clFU
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS update for v4.10, part 2
- Add specific compatible strings for variants of Cyclone5 boards
- Add QSPI node on Arria10
- Enable QSPI on Arria5 and Arria10 devkit, and Cyclone5 SoCKit
- Add NAND controller node on Cyclone5
* tag 'socfpga_dts_for_v4.10_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add nand controller nodes
ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
ARM: dts: socfpga: Enable QSPI in Arria10 devkit
ARM: dts: socfpga: Add QSPI node for the Arria10
ARM: dts: socfpga: enable qspi on the Cyclone5 devkit
ARM: dts: socfpga: add specific compatible strings for boards
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'sti-defconfig-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: multi_v7_defconfig: Remove ST_THERMAL_SYSCFG Kconfig symbol
Signed-off-by: Olof Johansson <olof@lixom.net>
The EBI lookup is not longer in use: this has been moved to the
NAND chip driver. The syscon node is better accessed indirectly
using the regmap like the NAND chip driver does, so let's use
the syscon to set the modem control signals RTS/CTS through the
dedicated syscon register.
We also migrate the decoder status "SC_DEC" register that
enumerate the logic modules using syscon.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This cycle is covering :
- some clock fixes common with sa1100 architecture
- the consequence of the pxa_camera conversion to v4l2
- a small irq related fix for pxa25x device-tree only
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYIkw2AAoJEAP2et0duMsSAVMP/1nQWA24IXAFMEVBroGHz1r/
/RXS3eJ5sfGxVcvCMPTPiE18+jqGHtNgnZH2sFkwUqByTq5SkSZOS13q2gN6iUBs
M2zSqYS6FKQvEdzMzqOq5acyRR02fyrvn4SoaUBNUUzqJ93G7ITJjLnUm4EJ1RdU
rQ76MuHr/QB7q7L2OJtHwgoZt+CmxpioCRu+yW2UEhFNaJ6zRVrPyKtQNLzze7UB
BSgS8pKR1a8lMRwkt8ciw40Pz5YDKOI7ZYgEwms50fu0GliFTt0RrbE7H5Gm9ur4
mDR7m9puhLssAFIXIQc7mSMNI88CsUFhRmqeKfBOtWQ/1IKXSCZiAQrUY+DRH+fo
xAOJlzF88V7nKpnkmN+fvZeOnUusPS2Avree0dZT8VyNa2FvdvBXOJmdZXAA81FG
YIwpVV3ZLud5rT3eHWzpCInDUbjw0wBrDYcdHenJTmdtAb5oRVJtWlWmZuk3f3iG
q9ILDAcVoWwI1orozbCcXS98hE74EPdUtkMzBnXCBYaplqsw2aAjbX5Usn30YEZz
SkE2bMh0yyv2J3yUNUgFWgDYsbgT8zRLOvUoy9g6OlisL3ZOT4QLghRzbAiW7bXG
UaK6ezzvK/oTABIS5gaWgRxR9oM2xNCST1CBBLX8g9o9NNj60AxSfVfh/i+iHp1B
Y03pa/bFqOWeeK1shPmD
=1WrE
-----END PGP SIGNATURE-----
Merge tag 'pxa-for-4.10' of https://github.com/rjarzmik/linux into next/soc
This is the pxa changes for v4.10 cycle.
This cycle is covering :
- some clock fixes common with sa1100 architecture
- the consequence of the pxa_camera conversion to v4l2
- a small irq related fix for pxa25x device-tree only
* tag 'pxa-for-4.10' of https://github.com/rjarzmik/linux:
ARM: pxa: fix pxa25x interrupt init
ARM: pxa: remove duplicated include from spitz.c
ARM: pxa: em-x270: use the new pxa_camera platform_data
ARM: pxa: ezx: use the new pxa_camera platform_data
ARM: pxa: mioa701: use the new pxa_camera platform_data
ARM: pxa: pxa_cplds: honor probe deferral
ARM: sa11x0/pxa: get rid of get_clock_tick_rate
watchdog: sa11x0/pxa: get rid of get_clock_tick_rate
ARM: sa11x0/pxa: acquire timer rate from the clock rate
clk: pxa25x: OSTIMER0 clocks from the main oscillator
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add TOPEET itop core and Elite boards, based on Exynos4412.
2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
using it. I am also not aware of any popular out-of-tree boards using it.
3. Add Snoop Control Unit node for Exynos4.
4. Minor cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYIhWlAAoJEME3ZuaGi4PXB5UP+QGT9d61jwD9uX1fe5v6OZkg
Cwy8HxFBeYXge8T4brCW0t48G6fARFHyVwZwJU/AA/nsDuvolaoZYJ8Ovp0gD4eH
Qoa2K9xd1wtzBHkasJk8CSpDNm48Nr1sgwt1k6H/qmOy90eBbVekIUHES+73K5DJ
8RaT3F/lAMOXztkb8RddoNt4GTNA/2ikdnGdvkvd4+cjGMvdkmUhBcY+28m7n9u8
r6Xir9rG5RWgrtZHh6Y6vZ0gnZaM27DjCl/MxmZjpGwwKjn0zm7AlMxLP6C+26rr
duSkuJZq7rL4vVOk7FlqDkmG4LZXwT+C4ZEryTZ7KMuCqWVP3dSzF4Flw4x8Cif3
cFiVuRHSiaIcq0aE1c6PNKg8N7+pqJxtRKu4sK/ce1vr5cADsZY/0sWdlZAdDJCQ
nm9U9XYXPiiRhaZFaa3slwd0gFqNd1zL/MjKKWGBfEk8PBydyy/F6YjDwbfyURTb
0tWCfgcLvPg0v2xw8pbsaA7vn4/PIjHD9YqraEFBJXUouZJpC+uU+5EyHiM9Rxil
vEvvRKjmTN5vBDR913p3G+XA6L5wOts8sgjl0HZiM+6lsMkcZ4xD8xHO3kpvZwL3
VXOWLjD0hzwo7L/Nw2ucEFF/2ToggxJC0Fnbxn0i8lU6tOnjkOp/xa4Y/Xo4UMTW
+6o++VlUs7k6kg1+kY8F
=qzwE
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.10:
1. Add TOPEET itop core and Elite boards, based on Exynos4412.
2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
using it. I am also not aware of any popular out-of-tree boards using it.
3. Add Snoop Control Unit node for Exynos4.
4. Minor cleanups.
* tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add SCU device node to exynos4.dtsi
ARM: dts: exynos: Remove exynos4415.dtsi
ARM: dts: exynos: Document eMMC/SD/SDIO devices in Snow and Peach boards
ARM: dts: exynos: Add TOPEET itop elite based board
ARM: dts: exynos: Add TOPEET itop core board SCP package version
ARM: dts: exynos: Add entries for sound support on Odroid-XU board
ARM: dts: exynos: Remove "simple-bus" compatible from fimc-is node
Signed-off-by: Olof Johansson <olof@lixom.net>
This includes a single functional change:
* set default parent clock for PWM1 & PWM2.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.14 (GNU/Linux)
iQIcBAABAgAGBQJYIcwQAAoJEJw94nR8/maC8t8QALZZmPEUuT6EUTGOP/3pZcws
GrXqajDjK4U3ot0cJkmmQ07VVNYilz1zpl2DiRmSKepSyhrG64dP9G5thYBamPom
nbkzlh3U02rjjyEgvidzbd+RisAMU5JJzIUAXROaghmhoC+SF87xFnttEU4PCRTg
iqLNJfp/6FmnRH1kccT4KwzAQhNjzcQYxqc1FY8DekRl1etHZLSHdqc5I6j2a4qO
BNKSEbv+xSbWqu0pMm5NFSwqkxTgSW7CgCOiezhHd2x3sLpKztXrZ0Y9S2Sis1rC
VfTEQ/FBhCvnyUF1B/Qjmz9iOM3WMrQyHBE5y5rqoVS4rf9E/8BDk0mSLmq7Keeu
ABZzlo6qa8wez1iAXhcHww6WDT4X3wRxxerZELADhU5orubch7R5hWJzL3wUp5N0
Zsxs5nhJjCAIPx5rI8vVz12EFu1XMpbc8cGX1Ah6nD5eVLE3YiMjQ+w8cJ+LI5bU
YTx4Co0CuyJItp2GUOzeXzTBzN/0vz1TZN4csLd5r6OVfSFXW0tG9CwYrnT8R1mA
E4DISdwWbbn3aAN/19g2Z0PwQzAl8QlQb2VWz16zzs4Ob0vl+jjU5PD70br17XiS
8CPKci0POBwRpx9K9j/uny5SWfmBpldvtlvicHCtmSeniuKkewtQhjJOZwgVCygQ
2dVGfgpXVYY1DjLNvLtf
=9l30
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx into next/dt
NXP LPC32xx ARM SoC device tree updates for v4.10
This includes a single functional change:
* set default parent clock for PWM1 & PWM2.
* tag 'lpc32xx-dt-v4.10' of https://github.com/sylemieux/linux-lpc32xx:
ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add OPP tables to support generic cpufreq driver
- Use more clocks/resets properties
- Misc fixes and cleanups
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYHfI6AAoJED2LAQed4NsGJr8P/iz2m4XuefXZj8GAuIScD1D3
CWSbsr9qG0w77AT+tae4yND9G5QSI6qHWZMmCWsv7GLnjKXzOzjRs0nlfflhOFaC
JrZAJrrPfpIuqITMgSPkljQ1uwW5hpJ0oS49y2LI6r2vwfTII/TezgVJ3ix43i0r
Ngx9/wX9sQWZBJYi54hsVMgNv3JzN3LXdYjGMDvLBCNLwo437m/yLF6z2ApzGj03
kEozI7jiw61jwdu9nPnvfsjxTADiIdW8114+ldzK5jGIgU7IvLIDIqa6QSbkIM0W
KnzFXOlyMofd7Gkyj0BZd4GGdrsWgK2MbXjSZA3XiwrU81G28E+2ANaQKiaod+kO
5tRgBf7pWfKS+21laQmKjxqTAtDVw3fjwkF8anJ5e482lB4r6T/DWh6vIc27grtP
N1eJ7WkgrErOhVZVNZ6AqvMLsZdDkHS9R1ZCk3rwCSptX0raJhtScqWqTFH7erWa
MFjT+8znHDF4fXX+i+fxWPMWoyJvZYIAevr0wtPpp+VbBl1GyAjAt5sntorFBXSy
35l4TgI11PCbTI6DCc/uV9CihJjZP2UGo1YC92SAIuvUqArfvsHby/yVjQlcsnzC
BAJZn1dnItkgzOb7np1vbl3YYRRJcN8eGkanSZ+DNaerhGKnk/KKzxUj09RfEUDp
51MOA2r2+w+SLUHurn1a
=DdcH
-----END PGP SIGNATURE-----
Merge tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.10
- Add OPP tables to support generic cpufreq driver
- Use more clocks/resets properties
- Misc fixes and cleanups
* tag 'uniphier-dt-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: make compatible of syscon nodes SoC-specific
ARM: dts: uniphier: add clocks/resets to EHCI nodes of sLD3 SoC
ARM: dts: uniphier: remove redundant serial fifo-size properties
ARM: dts: uniphier: make 32bit SoC DTSI linear
ARM: dts: uniphier: add CPU clocks and OPP table for PXs2 SoC
ARM: dts: uniphier: add CPU clocks and OPP table for Pro5 SoC
ARM: dts: uniphier: increase register region size of sysctrl node
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJYFQwAAAoJEHm+PkMAQRiGr8YH/0urDFZm/RFu752rSawF7iVM
nx9Ck03YkRiMRZfdzPARbHJts7lhLG1rvsT50VQNMK1sVv0BXcrnJnDu49xV+dLj
DqXWvYGtdTCpAd34Am37pX/rrRl11vdJgS2VgprmbytkM8FD0xEe+aDKxnnmuALo
bggYDhMrJik3/UXG0zVfefKZJFLNAJiZv9AgWgkCR+bo861bu3UFn47tN1jGXOOl
QyFl5t7ggesojA5Q1U9hTrk1gS9Ia9it3Elyzfqb66lUdyf001I1nbUA/hNYyDXD
HU9dj3agvVXjvnDjyDR4/k86FA+EEEwSgk5CBTCVe30dLKnojFyb7FWZg72utg4=
=CHER
-----END PGP SIGNATURE-----
Merge tag 'v4.9-rc3' into next/dt
Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores
Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions
Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYHFSAAAoJENfPZGlqN0++i1gQAJvDzERhzjIl8ukWmnnVflIk
EtlT3PaoFtmstecrvMY5W8Hm7ViRUlBGbBDrE+c7WH4IHkEVbFTUef6nzAhXmSp6
ZgIOx3J1dYz1uWMCi5lBU6vZirut7VvyqWfIlMceSsq2WMS5TobM/rORvh4N0yQ1
MuhsxIuuuwJe0neMAs0lFeKFUoWm7RxFen6G6vXZWVg9INxKSKGKvh8+8IbhWP2H
WjMTUYASneLmZ5nIlyL8LTauOczsJitgHgYtoCCUMDFCcDKMth6HiMvZztny5sTs
Sk+SH/MKDo9fZWXWxHh0mS/bFIbdiY4/BfK0S2LlRo8MQMS0d3pKPIvD4gRT7Wyq
2JTuf4kuehI9+VEY0NNZH1HJnsFGN7ZB2C99eOkcvVsm324yhxy9MgxioyBYEgsY
ckr9/nbxvkYGI326AN4pvE6JF9oqnRdQiHQrRHg5sIuL2hpusALWlOeQnnnrKGQE
Xo+F9+DfhFTLosxqjq6abCwJ8t97uake0+ZRFUiJpjAHjc5se9qIN9njmanTCUhd
UwMHVgTs5zYLPCGjmbY+jw8NwLp5UWHTgfOewUA0399mcj/KRo06uB8pUYkVEVZz
s5FUnsOAhE7A2aNfAJWu4ecKIf5rvnE+ErIW/nYRp/sbTc9+zZkEVSAiMGQFlXcu
BOS+An3C04D6m1CY+tOv
=CqVV
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.10
Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores
Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions
Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board
* tag 'renesas-soc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings
ARM: shmobile: select errata 798181 for SoCs with CA15 cores
ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions
ARM: shmobile: r8a7793/gose: Add board part number to DT bindings
ARM: shmobile: r8a7794/alt: Add board part number to DT bindings
ARM: shmobile: document SK-RZG1M board
ARM: shmobile: r8a7743: basic SoC support
ARM: shmobile: only call rcar_gen2_clocks_init() if present
ARM: shmobile: Sort Kconfig selections
Signed-off-by: Olof Johansson <olof@lixom.net>
Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers
Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYHFcMAAoJENfPZGlqN0++0YQQAKxHY52/hFqQAwUnfnFvOT0z
r3lb+MxTvLCi3xf1mM0JlnrughuvHAsQV0zv6DVo8eU9lKefSw9p/3/ROmfk1qU4
HR2pYE/1lAbDpnUBQEIO19XXerlrQQoN6bgAoGdHo+U4w+v4P3kG0RCqcIjelSPt
w9IUW9E9Tf24ZtS9Rn2N58JTOcvpPOP8TYvP8TL6Jp5eyngiWNcj0rOwKeiAmYd+
OsRhQ2FJjzdwYdQFdTSf3R5XeiUhg8HuCKiOLTIn/2o3AfVPxtC3p4b9NxCArvOv
+Y1um0y2VWClPTeDpbBC9whFx0hvqDF+rftiu1hZfr5vRGR0FYjEu7z2bvWAvIOT
qhN+BCBIfhsV1TDxqAmdaKSaBlxFLk+Z4LAMtvKrzVKf0f2XZQ7NoycIOoqmh57T
ARdcAwYRiPZvw3UUZKMqbL6U5rhlW9JJmnNC3EQfluR3R/SmGi2ZGdmqlLlfbKjp
U28OuzaSIP7Iou/8KmLHRUQvuBacaBB9fqDn6gDpgEVTSZTDOpvt0r1t0ovFC+F7
q/9loxKxva+I+rE1lAA7ejZ2VXb5d3AUY1Sfsw+aw0fv8q6rfU+HEM5/ppEPijDQ
YRsp4tRH17/lM9Go4VVH2Txl/ZK5tX/trXNJPFToG2/fJc5EWvCug6pF+p6QKIuf
BnqbAZFe9DWRBXpyLb/A
=Tkdc
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.10
Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers
Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards
* tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: dts: r8a7794: remove Z clock
ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock
ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
ARM: dts: emev2: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Fix DU reg property
ARM: dts: r8a7793: Enable VIN0-VIN2
ARM: dts: koelsch: add HDMI input
ARM: dts: lager: Add entries for VIN HDMI input support
ARM: dts: rskrza1: add sdhi1 DT support
ARM: dts: r7s72100: add sdhi to device tree
ARM: dts: r8a7794: Fix W=1 dtc warnings
ARM: dts: gose: use generic pinctrl properties in SDHI nodes
ARM: dts: r7s72100: add sdhi clock to device tree
ARM: dts: r7s72100: add mmcif to device tree
ARM: dts: r8a7792: add MSIOF support
ARM: dts: r8a7792: add MSIOF clocks
ARM: dts: wheat: add DU support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add blue-and-red-wiring -property to LCDC node. Also adds comments on
how to get support 24 bit RGB mode. After this patch am335x-boneblack
support RGB565, BGR888, and XBGR8888 color formats. See details in
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt.
The BBB has straight color wiring from am335x to tda19988, however the
tda19988 can be configured to cross the blue and red wires. The
comments show how to do that with video-ports property of tda19988
node and how to tell LCDC that blue and red wires are crossed, with
blue-and-red-wiring LCDC node property. This changes supported color
formats from 16 bit RGB and 24 bit BGR to 16 bit BGR and 24 bit RGB.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A fix to reintroduce missing pinmux options that turned out not to be
optional.
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJYK3mGAAoJEBx+YmzsjxAg2nEQAK/mc4R4yram78qXD5B+tbji
o04PuC2xvST0xI7N4fnNxueZQOYoqKEvbUlGa32kQ4Zs20qCrnRntlfjjNvs+UQc
O9EOTJnH1T+sABY+LOq3rcoK8zswl7ka+dsQ3STaL+OFVfox+Bw2IjCZ1KBOLjgU
4joOeuOTrmSTS5i6IxvGPmGZBb5hbq9TaYsQyIKUozaLjDGgDgZ1GKjJhN9LdjM5
n7K8Bf87YQhuxKgQv2H3rxseooe95IVmfc8zv+CnLSrC63oJwpiAemVuaPKOq7dt
gTxkYIBBtHMwY/OHpXRI0FNxuhaPUn8Nxo9QxTij9aH44lfZr2RS/0f/KHIe2KrM
Nh8mUMTotgSfdmD5OrShgJV28B6MxzJMhUisi+GGglR0N4GNeXZ5dtNOgY35Rmjw
geJNPjnL7ALkXcrLPxGyPttcw8p/wtSgDnbOINWZ0aJ7NfTgqCsi4uYkOJSm4NII
unthkLr/y5uwWMkPNoGtoqGOF0kMTcXy5gf/S45mdKzU2c8dKi6POph7kVeVxC1F
OBIQ+s2H0E4D6rOz9g7R7lwO/tFVltXz1lhvQ+CebM5/NH1vjVuKDe0+SrvDfQBm
6IYzepW3tVjJTWJr09xUfzwtkm5ii6lEvChllnmrInhpgDCnKv9qDgbnJCnLlUYs
D7JrBkNV+976JqdOlX5l
=WBs5
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.9
A fix to reintroduce missing pinmux options that turned out not to be
optional.
* tag 'sunxi-fixes-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: fix the pinmux for UART1
Signed-off-by: Olof Johansson <olof@lixom.net>
It fixes a boot failure on imx53-qsb board with a DA9053 PMIC, which is
caused by the regulator core change, commit fa93fd4ecc ("regulator:
core: Ensure we are at least in bounds for our constraints").
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYKnQ1AAoJEFBXWFqHsHzOyEYH/0F1TKtmJwLeDBKBinmeG0wx
IX/0mXCV0E72T7W6PuifofG7H9jax9UY8qGyDl9+h/dMBQCaKPfXDo6wg5FoXaBe
UAQVHbRbEuazI2xW0UWeiywt6soGBe1/iNpt+OXXfmJY77vS5nuGfFCLGey6+uTe
WeGi3J6g2Oxa65FndvfTm5dNj6vCa3VHs5UKQKCId3KoTjuLZu4EUrN81e47tkmJ
pmzaGBfAUyvACfwkITzc6rAbBp29FtxMK52ieuh+w4L3DWa3kpCabHPMIAeP8C9P
GQ80PTyfs/F163yYM6dWRipwhz/XJhjtT8SWBG/hnYBJDEHOua4uqW3YcoNdm7E=
=xunY
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.9, 2nd round:
It fixes a boot failure on imx53-qsb board with a DA9053 PMIC, which is
caused by the regulator core change, commit fa93fd4ecc ("regulator:
core: Ensure we are at least in bounds for our constraints").
* tag 'imx-fixes-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx53-qsb: Fix regulator constraints
Signed-off-by: Olof Johansson <olof@lixom.net>
features printed, all these are quite trivial and tiny. The omap5 jack
detection and gpadc patches are not strictly fixes, but I wanted to get
binding document typo fixed before it pops up on other boards. The
gpadc one liner was in the same series and I applied and pushed it out
already before noticing it could have waited. The list of changes is:
- Fix omap3 SoC features printed
- Make sure OMAP_INTERCONNECT is selected for am43xx only configurations
- Add missing memory node for torpedo
- Initialize uart4_mask properly to avoid writing garbage to PRM registers
- Fix NULL pointer dereference for omap4 volt_data
- Add alias for omap5 gpadc needed by iio drivers
- Enable omap5 jack headset jack detection and fix it's binding typo
- Add missing memory node for logicpd-som-lv
- Fix wrong SMPS6 voltage for VDD-DDR3 for omap5
-----BEGIN PGP SIGNATURE-----
iQIuBAABCAAYBQJYKlYvERx0b255QGF0b21pZGUuY29tAAoJEBvUPslcq6VzT50Q
AJEsYX1dYwMyVeditzSWb65ajT53uhxPw51vIfA/bV3FUsMTaD5aZ9fsxYMt/3Eo
ayEzDFM74FM9nMGB4gXW4wryta4r5NT/lBg6vvwJfivVjTUkhQUKmH6C94dg3t2d
bHr9isM7ONJ5wxx02olg9vHyNXXgWEwPLhWKtxZKanKpoxKJajSA5dJuZR9T39X5
ZuhPFFmpMEh+IsnqYs4C1+215cFkRf21aEhMqwKRySTcHf35zitPfiuYF4Gft6Vb
Cor9JXlZGUN+dfhG48qcn+1NBEgha5r7JT2u7w+dPCXKvEn6OmpyAziUT3CYHMAc
IGeZLmBznhSZhJUvYjBmiy88YLORpWvPuGCE19AKJoi+VOGv8bSc2bnp+JCw+Ven
DB0GDWJgI2FVPNrRrLRW+dOdKwH/R8b9vE3ZtVHK8x7vowViDoGyFpndv30sL0HA
ssRvC24wAyRAcpXtAqQrFc2I8BMLzVsLzHLHriR9EnhMAspk4IJV5zkFv52ZtlxO
N6NabaD7se2ww7q3MSGuIe3+u9u3KcfKf1dsaq/E8cWFxvcJ07xnCCCYJ8DlGmZh
mS+Fkbof7NO0gbSiapzgjVtb+sfrkKqYTiIMldTzIGzmEcpK6SKXC6mAcrFAPojK
ecBq9BrLuAte4u6W1ohQoAW6rwjfz6yrAqIdzhzufGsN
=LgIW
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.9/fixes-for-rc-cycle' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.9-rc cycle. Except for the omap3 fix for the SoC
features printed, all these are quite trivial and tiny. The omap5 jack
detection and gpadc patches are not strictly fixes, but I wanted to get
binding document typo fixed before it pops up on other boards. The
gpadc one liner was in the same series and I applied and pushed it out
already before noticing it could have waited. The list of changes is:
- Fix omap3 SoC features printed
- Make sure OMAP_INTERCONNECT is selected for am43xx only configurations
- Add missing memory node for torpedo
- Initialize uart4_mask properly to avoid writing garbage to PRM registers
- Fix NULL pointer dereference for omap4 volt_data
- Add alias for omap5 gpadc needed by iio drivers
- Enable omap5 jack headset jack detection and fix it's binding typo
- Add missing memory node for logicpd-som-lv
- Fix wrong SMPS6 voltage for VDD-DDR3 for omap5
* tag 'omap-for-v4.9/fixes-for-rc-cycle' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5: board-common: fix wrong SMPS6 (VDD-DDR3) voltage
ARM: omap3: Add missing memory node in SOM-LV
ASoC: omap-abe-twl6040: fix typo in bindings documentation
dts: omap5: board-common: enable twl6040 headset jack detection
dts: omap5: board-common: add phandle to reference Palmas gpadc
ARM: OMAP2+: avoid NULL pointer dereference
ARM: OMAP2+: PRM: initialize en_uart4_mask and grpsel_uart4_mask
ARM: dts: omap3: Fix memory node in Torpedo board
ARM: AM43XX: Select OMAP_INTERCONNECT in Kconfig
ARM: OMAP3: Fix formatting of features printed
Signed-off-by: Olof Johansson <olof@lixom.net>
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There is no drivers using those fields so remove them and
the remaining initializations.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This patch adds DMA slave map tables to the pl080 devices's
platform_data in order to support the new channel request API.
A few devices for which there was no DMA support with current
code are omitted in the tables.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
No need to duplicate the same define everywhere. Since
the only user is stop-machine and the only provider is
s390, we can use a default implementation of cpu_relax_yield()
in sched.h.
Suggested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: kvm@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-s390 <linux-s390@vger.kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/1479298985-191589-1-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Commit 7619751f8c ("ARM: 8595/2: apply more __ro_after_init") caused
a regression with XIP kernels by moving the __ro_after_init data into
the read-only section. With XIP kernels, the read-only section is
located in read-only memory from the very beginning.
Work around this by moving the __ro_after_init data back into the .data
section, which will be in RAM, and hence will be writable.
It should be noted that in doing so, this remains writable after init.
Fixes: 7619751f8c ("ARM: 8595/2: apply more __ro_after_init")
Reported-by: Andrea Merello <andrea.merello@gmail.com>
Tested-by: Andrea Merello <andrea.merello@gmail.com> [ XIP stm32 ]
Tested-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This adds the GPIO names for the Raspberry Pi Zero. The GPIO lines
of the RPi Zero are almost identical to the Model A+ except:
* GPIO 35, 38, 40 and 45 are not connected
* Status LED is active low
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
There are some differences between the schematics and the official firmware
DTS [1]. So based on these additional information the following has been
changed:
* use consistent "CAM_GPIO1" for camera LED
* use consistent "CAM_GPIO0" for camera shutdown
* add "USB_LIMIT" for USB current limit (0=600mA, 1=1200mA)
[1] - https://github.com/raspberrypi/firmware/blob/master/extra/dt-blob.dts
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
This enables the GPIO-b support for Broadcom NSP SoC
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It's BCM4709A0 based device with 16 MiB flash, 128 MiB of RAM and two
PCIe based on-PCB BCM4360 chipsets.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since early BCM5301X days we got abort handler that was removed by
commit 937b12306e ("ARM: BCM5301X: remove workaround imprecise abort
fault handler"). It assumed we need to deal only with pending aborts
left by the bootloader. Unfortunately this isn't true for BCM5301X.
When probing PCI config space (device enumeration) it is expected to
have master aborts on the PCI bus. Most bridges don't forward (or they
allow disabling it) these errors onto the AXI/AMBA bus but not the
Northstar (BCM5301X) one.
iProc PCIe controller on Northstar seems to be some older one, without
a control register for errors forwarding. It means we need to workaround
this at platform level. All newer platforms are not affected by this
issue.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The M0 processor handles interrupts for the always-on CRMU GPIO
controller. Setting the CRMU GPIO driver with the mailbox controller as
the interrupt parent allows the mailbox controller to forward interrupts
from the M0 to the GPIO driver for processing.
Reviewed-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Shreesha Rajashekar <shreesha.rajashekar@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
RK1108 EVB is designed by Rockchip for CVR field.
This patch add basic support for it, which can boot with
initramfs into shell.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
RK1108 is embedded with an ARM Cortex-A7 single core and a DSP core.
It is designed for varies application scenario such as car DVR, sports
DV, secure camera and UAV camera.
This patch add basic support for it with DMAC / UART / CRU / pinctrl / MMC
enabled.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Tested-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As there are no users left, we can remove cpu_relax_lowlatency()
implementations from every architecture.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Cc: <linux-arch@vger.kernel.org>
Link: http://lkml.kernel.org/r/1477386195-32736-6-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
For spinning loops people do often use barrier() or cpu_relax().
For most architectures cpu_relax and barrier are the same, but on
some architectures cpu_relax can add some latency.
For example on power,sparc64 and arc, cpu_relax can shift the CPU
towards other hardware threads in an SMT environment.
On s390 cpu_relax does even more, it uses an hypercall to the
hypervisor to give up the timeslice.
In contrast to the SMT yielding this can result in larger latencies.
In some places this latency is unwanted, so another variant
"cpu_relax_lowlatency" was introduced. Before this is used in more
and more places, lets revert the logic and provide a cpu_relax_yield
that can be called in places where yielding is more important than
latency. By default this is the same as cpu_relax on all architectures.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Noam Camus <noamc@ezchip.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: virtualization@lists.linux-foundation.org
Cc: xen-devel@lists.xenproject.org
Link: http://lkml.kernel.org/r/1477386195-32736-2-git-send-email-borntraeger@de.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Since the PM core code is no longer using a fake platform_device or
platform_data, remove references to 'pdata'.
No functional changes.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove fake platform device used for PM init. Move pdata values which
are common across all current platforms into pm.c.
Also, since PM is only used on da8xx, remove davinci_pm_init() from
common init code, and only use in da850/omapl138 board files that are
currently creating the fake platform_device.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.
Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: arm-soc
Series-cc: julia@ni.com
The patch removes these warnings reported by dtc 1.4:
Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Julia Cartwright <julia@ni.com>
Series-to: arm-soc
Based on
"ARM: dts: explicitly mark skeleton.dtsi as deprecated"
(sha1: 9c0da3cc61)
skeleton.dtsi is deprecated.
Move address and size-cells directly to zynq-7000.dtsi.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Julia Cartwright <julia@ni.com>
This shrinks down omap2plus_defconfig a bit and makes it easier for
people to generate minimal patches against it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's add minimal support for droid 4 with MMC and WLAN working.
It can be booted with appended dtb using kexec to a state where
MMC and WLAN work with currently no support for it's PMIC or
display.
Note that we are currently using fixed regulators as we don't
have support for it's cpcap PMIC. I'll be posting regmap_spi
based minimal cpcap patches later on for USB and the debug
UART on droid 4 multiplexed with the USB connector.
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The UniPhier outer cache (arch/arm/mm/cache-uniphier.c) has 128 byte
line length and its tags are also managed per 128 byte line. This
is very unfortunate, but the current 64 byte alignment for kmalloc()
causes sharing problems on DMA if used with this outer cache.
This commit adds ARM_L1_CACHE_SHIFT_7 to increase the DMA minimum
alignment to 128 byte if CACHE_UNIPHIER is enabled. There are
several drivers that assume aligning to L1_CACHE_BYTES will be DMA
safe, so this commit also changes the L1_CACHE_BYTES for safety.
Having said that, I hesitate to align all the other SoCs in Multi
platform to the UniPhier's requirement. So, I am disabling the
CONFIG_CACHE_UNIPHIER by default, so that multi_v7_defconfig will
still stay with CONFIG_ARM_L1_CACHE_SHIFT=6. With this commit,
UniPhier SoCs will become slower, but it is much better than system
crash. If desired, the outer-cache can be enabled by merge_config
or something.
Note:
The UniPhier PH1-Pro5 SoC is equipped also with L3 cache with 256
byte line size but its tags are managed per 128 byte sub-line.
So, ARM_L1_CACHE_SHIFT_7 should be fine for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
fs_initcall is definitely too late to initialize DMA-debug hash tables,
because some drivers might get probed and use DMA mapping framework
already in core_initcall. Late initialization of DMA-debug results in
false warning about accessing memory, that was not allocated, like this
one:
------------[ cut here ]------------
WARNING: CPU: 5 PID: 1 at lib/dma-debug.c:1104 check_unmap+0xa1c/0xe50
exynos-sysmmu 10a60000.sysmmu: DMA-API: device driver tries to free DMA memory it has not allocated [device
address=0x000000006ebd0000] [size=16384 bytes]
Modules linked in:
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 4.9.0-rc5-00028-g39dde3d-dirty #44
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[<c0119dd4>] (unwind_backtrace) from [<c01122bc>] (show_stack+0x20/0x24)
[<c01122bc>] (show_stack) from [<c062714c>] (dump_stack+0x84/0xa0)
[<c062714c>] (dump_stack) from [<c0132560>] (__warn+0x14c/0x180)
[<c0132560>] (__warn) from [<c01325dc>] (warn_slowpath_fmt+0x48/0x50)
[<c01325dc>] (warn_slowpath_fmt) from [<c06814f8>] (check_unmap+0xa1c/0xe50)
[<c06814f8>] (check_unmap) from [<c06819c4>] (debug_dma_unmap_page+0x98/0xc8)
[<c06819c4>] (debug_dma_unmap_page) from [<c076c3e8>] (exynos_iommu_domain_free+0x158/0x380)
[<c076c3e8>] (exynos_iommu_domain_free) from [<c0764a30>] (iommu_domain_free+0x34/0x60)
[<c0764a30>] (iommu_domain_free) from [<c011f168>] (release_iommu_mapping+0x30/0xb8)
[<c011f168>] (release_iommu_mapping) from [<c011f23c>] (arm_iommu_release_mapping+0x4c/0x50)
[<c011f23c>] (arm_iommu_release_mapping) from [<c0b061ac>] (s5p_mfc_probe+0x640/0x80c)
[<c0b061ac>] (s5p_mfc_probe) from [<c07e6750>] (platform_drv_probe+0x70/0x148)
[<c07e6750>] (platform_drv_probe) from [<c07e25c0>] (driver_probe_device+0x12c/0x6b0)
[<c07e25c0>] (driver_probe_device) from [<c07e2c6c>] (__driver_attach+0x128/0x17c)
[<c07e2c6c>] (__driver_attach) from [<c07df74c>] (bus_for_each_dev+0x88/0xc8)
[<c07df74c>] (bus_for_each_dev) from [<c07e1b6c>] (driver_attach+0x34/0x58)
[<c07e1b6c>] (driver_attach) from [<c07e1350>] (bus_add_driver+0x18c/0x32c)
[<c07e1350>] (bus_add_driver) from [<c07e4198>] (driver_register+0x98/0x148)
[<c07e4198>] (driver_register) from [<c07e5cb0>] (__platform_driver_register+0x58/0x74)
[<c07e5cb0>] (__platform_driver_register) from [<c174cb30>] (s5p_mfc_driver_init+0x1c/0x20)
[<c174cb30>] (s5p_mfc_driver_init) from [<c0102690>] (do_one_initcall+0x64/0x258)
[<c0102690>] (do_one_initcall) from [<c17014c0>] (kernel_init_freeable+0x3d0/0x4d0)
[<c17014c0>] (kernel_init_freeable) from [<c116eeb4>] (kernel_init+0x18/0x134)
[<c116eeb4>] (kernel_init) from [<c010bbd8>] (ret_from_fork+0x14/0x3c)
---[ end trace dc54c54bd3581296 ]---
This patch moves initialization of DMA-debug to core_initcall. This is
safe from the initialization perspective. dma_debug_do_init() internally calls
debugfs functions and debugfs also gets initialised at core_initcall(), and
that is earlier than arch code in the link order, so it will get initialized
just before the DMA-debug.
Reported-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Recent kernels have changed their behaviour to be more inconsistent
when handling printk continuations. With todays kernels, the output
looks sane on the console, but dmesg splits individual printk()s which
do not have the KERN_CONT prefix into separate lines.
Since the assembly code is not trivial to add the KERN_CONT, and we
ideally want to avoid using KERN_CONT (as multiple printk()s can race
between different threads), convert the assembly dumping the register
values to C code, and have the C code build the output a line at a
time before dumping to the console.
This avoids the KERN_CONT issue, and also avoids situations where the
output is intermixed with other console activity.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
controller drivers to da850.dtsi.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Trivial fix to spelling mistake "Mananger" to "Manager"
in error message
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This patch adds the QSPI clock for stm32f469 discovery board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
The STMicrolectornics's STM32F746 MCU has the following main features:
- Cortex-M7 core running up to @216MHz
- 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)
- FMC controller to connect SDRAM, NOR and NAND memories
- Dual mode QSPI
- SD/MMC/SDIO support
- Ethernet controller
- USB OTFG FS & HS controllers
- I2C, SPI, CAN busses support
- Several 16 & 32 bits general purpose timers
- Serial Audio interface
- LCD controller
- HDMI-CEC
- SPDIFRX
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
This patch introduces the MACH_STM32F746 to make possible to only select
STM32F746 pinctrl driver
By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Some kernel configuration options required for systemd
support are missing in davinci_all_defconfig. Add them.
This is based on recommendations in:
http://cgit.freedesktop.org/systemd/systemd/tree/README
Options which kernel enables by default (and will thus be removed
upon next savedefconfig update) are not included.
Tested on OMAP-L138 LCDK board with fully up to date armv5
archlinux filesystem.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
With the da8xx memory controller and master peripheral priority
drivers merged and corresponding device tree changes in place we can
now enable appropriate options by default.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add minimal support for the RZ/G1E (R8A7745) SoC.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
It is the 10th processor in the well-known imx6 series, and derived
from imx6ul but cost optimized. The more information about imx6ull
can be found at:
http://www.nxp.com/products/microcontrollers-and-processors/
arm-processors/i.mx-applications-processors/i.mx-6-processors
/i.mx6qp/i.mx-6ull-single-core-processor-with-arm-cortex-a7-core
:i.MX6ULL
imx6ul.dtsi is the SoC common stuff for both imx6ul and imx6ull;
imx6ul-14x14-evk.dts is the board common stuff for both imx6ul
and imx6ull 14x14 evk. In this patch, for SoC part, the
imx6ull.dtsi includes imx6ul.dtsi; for board part, imx6ull-14x14-evk.dts
includes imx6ul-14x14-evk.dts.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
DDR3L is usually specified as
JEDEC standard 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
Therefore setting smps6 regulator to 1.2V is definitively below
minimum. It appears that real world chips are more forgiving than
data sheets indicate, but let's set the regulator right.
Note: a board that uses other voltages (DDR with 1.5V) can
overwrite by referencing &smps6_reg.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
On Zynq, we haven't been reserving the correct amount of DMA-incapable
RAM to keep DMA away from it (per the Zynq TRM Section 4.1, it should be
the first 512k). In older kernels, this was masked by the
memblock_reserve call in arm_memblock_init(). Now, reserve the correct
amount excplicitly rather than relying on swapper_pg_dir, which is an
address and not a size anyway.
Fixes: 46f5b96 ("ARM: zynq: Reserve not DMAable space in front of the
kernel")
Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com>
Tested-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch allows to build and use vGICv3 ITS in 32-bit mode.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
DMA controller driver is in good shape these days on rockchip platforms.
So lets enable DMA for uart and mmc.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As explained by commit 9c0da3cc61 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated.
This fixes the following warning with W=1:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It turns out that the i2c1 adapter is connected to a multiplexer
controlled by a gpio line. The first (default) mux option connects
i2c1 to a bus connected to the already known peripherals. The other
one connects the adapter to the ddc pins of the DVI port.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the schematics of CompuLab's sbc-fx6 baseboard and the
vendor devicetree GPIO_16 is *not* muxed to ENET_REF_CLK but to SPDIF_IN.
Remove the wrong pinctrl setting.
Fixes: 682d055e6a ("ARM: dts: Add initial support for cm-fx6.")
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The UART pinmux defines for the pins which are part of the LPSR
pinmux controller are wrong: Output signals configure the input
sel value and the pinmux defines allow not to distinguish between
DCE/DTE mode. Follow the usual pattern using DTE/DCE as part of
the define to denote the two UART configuration options.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6QP the LDB clock tree has changed to move the clk gate
before the divider, to prevent clock glitches propagating downstream.
A consequence of this change is that the clk divider is now the
parent of the LDB inputs. Reflect this change in the devicetree
to allow the LDB driver to properly configure the display clocks.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the datasheet, VF610 uses revision r3p2 of the L2C-310
block, same as i.MX6Q+, which does not require a software workaround for
ARM errata 769419.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
MMDC has a slightly different programming model between imx6q and imx6qp
in terms of perf support, it's exactly same for suspend support, so we
have fsl,imx6q-mmdc here to save patching suspend driver with the new
compatible.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6QP added new register bit PROFILE_SEL in MADPCR0.
need set it at perf start.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a compatible entry for the specific board versions.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board is now manufactured by Aries Embedded GmbH, update compat string.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board is now manufactured by Aries Embedded GmbH, update compat string.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We already have a macro to invoke boot services which on x86 adapts
automatically to the bitness of the EFI firmware: efi_call_early().
The macro allows sharing of functions across arches and bitness variants
as long as those functions only call boot services. However in practice
functions in the EFI stub contain a mix of boot services calls and
protocol calls.
Add an efi_call_proto() macro for bitness-agnostic protocol calls to
allow sharing more code across arches as well as deduplicating 32 bit
and 64 bit code paths.
On x86, implement it using a new efi_table_attr() macro for bitness-
agnostic table lookups. Refactor efi_call_early() to make use of the
same macro. (The resulting object code remains identical.)
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Andreas Noever <andreas.noever@gmail.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20161112213237.8804-8-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The idea is to give useful names to GPIO lines that an implementer
will be using from userspace, e.g. for maker type projects. These are
user-visible using tools/gpio/lsgpio.c
v2: Major rewrite by anholt: Flatten each GPIO line to a line in the
file for better diffing, prefix all expansion header pins with
"P<number>" or "P5HEADER_P<number>" and drop the mostly-unused
GPIO_GEN<smallnumber> names in favor of GPIO<socgpionumber>, fix
extra '[]' on a couple of lines, fix locations of SD_CARD_DETECT,
CAM_GPIO and STATUS_LED, fix HDMI_HPD polarities, rewrite A+ using
unreleased schematics.
v3: More changes by anholt: Drop P<number> / P5HEADER<number>
prefixes. I had been skeptical about adding them, and was
convinced to drop them by Gottfried (who probably has more
experience with GPIOs in educational contexts than the rest of
us). Also drop [] brackets for "is pinmuxed", which didn't seem
to clarify, and were ambiguous for things like the SPI_*-labeled
pins which may or may not actually be pinmuxed to SPI.
v4: Rename B+'s SDA0/SCL0 to match the other boards, despite the
naming on its schematic.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Add the thermal driver to list of compiled modules in the default
config for bcm2835.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
Add the node for the thermal sensor of the bcm2835-soc
to the device tree.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Changelog:
V1 -> V5: generic settings is shared in bcm283x.dtsi, but disabled
moved the compatible string to the SOC specific dtsi
for arm and arm64
V5 -> V6: fix remove 0x prefix from thermal@0x7e212000
Note: there is no arm/boot/dts/bcm2837.dtsi as of now,
so the 32-bit rpi3 dt is not modified.
Signed-off-by: Eric Anholt <eric@anholt.net>
We used to use a fixed rate clock for the UARTs. Now that we have clock
support we can associate the correct clocks to the UARTs and drop the
26MHz fixed rate UART clock.
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add clock controller nodes for MT2701, include topckgen, infracfg,
pericfg and apmixedsys. This patch also add two oscillators that
provide clocks for MT2701.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
- Kick the vcpu when a pending interrupt becomes pending again
- Prevent access to invalid interrupt registers
- Invalid TLBs when two vcpus from the same VM share a CPU
-----BEGIN PGP SIGNATURE-----
iQIyBAABCAAcBQJYHNMTFRxtYXJjLnp5bmdpZXJAYXJtLmNvbQAKCRAj0NC60T16
Q1WDD/9d5KfQ3dWiLtBXbeD3w2K0gXknwLAMsCCAdhgkCdLenxSBjlB7lmVYi1lZ
pTnshnR4HC0P3yW3bA78J7LZnUzJg72pq/S5K/om9KylVUdXz9WzQ3u+XyB3KTFW
b+viTUK3mqose67UcBSKGfFEWpIOmJ/nZVvWAIaUTg49btxnetKjyhv2Ux744Hm/
Jba3trcA4m8RPJ8Vu6mIfd6gkTXzSkQaN2wGVaEFhCFHOPDCQHjcdspe20Ig9fmY
kTXEBe4r0sC+8fXoymEM6TDQFWB8WthIIqfeIJ3FgfoETKrwmyJ23YfLAh49m1cB
nFpyy/lr9PNsOjJKXFi84pzx6l8U/CDslnBm5klYTT2kFc3stKbyDtIILvUOwKl8
n9UZSO8NGhOpKscGXLzO/CmIO+wgL15LTsxYsOh3HK7KjzocspQpxyD7pPWN8CUI
M2IGLvYMzCaBAOzs6WO4P9xlJRNtUMK8lvAthnBiCeE2Nnu3Oajf8krR4DZmBcQh
Q/GOACa1kuBMfqmWNrCVq3UNiFLxxAseShgxq9/E/dNe20daXOnxSaRGdRzTvAQF
dRBEtHXdY0qDgLz3tVzBdTTmx3M2k4B4/t+VxnsFFVlvbr0OyOozvFH42tGeTw5t
IBoXP9x87+Rpl6P6wW+ICketXQMRmdl40JXNjR96sXN94Y/Z4A==
=vj/s
-----END PGP SIGNATURE-----
Merge tag 'kvm-arm-for-v4.9-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/ARM updates for v4.9-rc4
- Kick the vcpu when a pending interrupt becomes pending again
- Prevent access to invalid interrupt registers
- Invalid TLBs when two vcpus from the same VM share a CPU
These are no longer used. If somebody needs to configure
memory timings for various idle modes, they should be
implemented as a device driver callbacks from the PM
code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Legacy board files in mach-omap2 used the helper functions
board_{nor,nand,onenand}_init() to initialize the flash
devices attached to the GPMC.
With Device Tree booting the initialization is handled by
the GPMC driver gpmc_probe_*_child() functions so this
code is not needed anymore now that OMAP2+ is DT-only.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When connecting an ethernet chip to the GPMC, such as smc91x
or smsc911x, a GPIO has to be requested to be used as an IRQ
and also the IO memory for a GPMC chip-select.
When booting with DT the chip-select allocation is handled
in a generic manner in the GPMC driver and the GPIO to IRQ
mapping is made by the DT core so this code is not needed
anymore now that mach-omap2 related boards are DT-only.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This data is now coming from device tree so we can remove the
duplicate data. Let's keep the DSS and DMA related things for now
until those have been converted to device tree completely.
While at it, let's also add the trailing commas to data structures
so further processing with scripts will be a bit easier.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All the boards booting with device tree use
drivers/pinctrl-single.c instead.
Note that mach-omap1 is still using the legacy mux,
so let's move the related Kconfig options from plat-omap
to mach-omap1.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is no longer needed when booted with device tree.
And let's replace cpu_is with soc_is for the PM code to
avoid confusion, they do the same thing.
Note that omap_pmic_late_init() now just calls
omap3_twl_init() and omap4_twl_init() to initialize the
voltage layer so we can remove the remaining references
to twl-common code and remove it in the following patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now initialize I2C for mach-omap2 using device tree. And we
can move the remaining code in plat-omap/i2c.c into mach-omap1/i2c.c.
Note that we cannot remove some of the I2C bus reset functions
as they are being used by hwmod code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rename sound card to differentiate B2120 and B2260 sound card.
Sound card name is used by alsa-lib to load associated card
configuration file.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Lots of platforms contain clocks which if turned off would prove fatal.
The only way to recover is to restart the board(s). This driver takes
references to clocks which are required to be always-on. The Common
Clk Framework will then take references to them. This way they will
not be turned off during the clk_disabled_unused() procedure.
In this patch we are identifying clocks, which if gated would render
the STiH407 development board unserviceable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
The DRA718-evm is a board based on TI's DRA718 processor targeting
BOM-optimized entry infotainment systems and is a reduced pin and
software compatible derivative of the DRA72 ES2.0 processor.
This platform features:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- uSD
- 8GB eMMC
- CAN
- PCIe
- USB3.0
- Video Input Port
- LP873x PMIC
More information can be found here[1].
Adding support for this board while reusing the data available in
dra72-evm-common.dtsi.
[1] http://www.ti.com/product/dra718
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra72-evm-common.dtsi consolidates dra72-evm.dts and dra72-evm-revc.dts
which also include tps65917 pmic support as both the evms uses the same
pmic. But, dra71-evm has mostly similar features with a different pmic.
In order to exploit dra72-evm-common.dtsi, creating a separate dtsi
for tps65915 support and including it in respective board files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
RTC is not available on DRA71x, so accessing any of the RTC
register or clkctrl register will lead to a crash. So, do not
register RTC hwmod for DRA71x.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA71x processor family is a derivative of DRA722 ES2.0 targetted for
infotainment systems.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
LP873X family of PMICs are used in dra71x-evm, So enable the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO regulator is used on dra71-evm platform to control MMCSD IO
voltage
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add proper description of input voltage regulators and update the voltage
rail map for all the regulators.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
isolation as part of initial bootloader executed from SRAM. This is
done as part of iodelay configuration sequence and is required due
to the limitations introduced by erratum ID: i869[1] (IO Glitches
can occur when changing IO settings) and elaborated in the Technical
Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
Only peripheral that is permitted for dynamic pin mux configuration
is MMC and DCAN. MMC is permitted to change to accommodate the
requirements for varied speeds (which require IO-delay support in
kernel as well). DCAN is a result of i893[1] (DCAN initialization
sequence). With the exception of DCAN and MMC, all other pin mux
configurations are removed from the dts.
[1] http://www.ti.com/lit/er/sprz436a/sprz436a.pdf
[2] http://www.ti.com/lit/ug/spruhz7c/spruhz7c.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This change is needed in order to enable some hardware components
from bootloader.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
rtc can either be supplied from internal 32k clock or external crystal
generated 32k clock. Internal clock is SoC specific and the external
clock is board dependent. Assigning the corresponding clocks.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
rtc can either be supplied from internal 32k clock or external crystal
generated 32k clock. Internal clock is SoC specific and the external
clock is board dependent. Assigning the corresponding clocks.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
rtc can either be supplied from internal 32k clock or external crystal
generated 32k clock. Internal clock is SoC specific and the external
clock is board dependent. Assigning the corresponding clocks.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The skeleton.dtsi file was removed in ARM64 for different reasons as
explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi").
commit ("766a1fe78fc3 ARM: omap3: Add missing memory node") had
fixes for Torpedo and Overo boards, but this SOM-LV was missed.
This should help prevent the DTC warning:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hardware random number generator is present in both AM33xx and AM43xx
SoC's. So moving the hwmod data to common data.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM43xx SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Using HWSUP for l4sec clock domain is causing warnings in HWMOD code for
DRA7. Based on some observations, once the clock domain goes into an IDLE
state (because of no activity etc), the IDLEST for the module goes to '0x2'
value which means Interface IDLE condition. So far so go, however once the
MODULEMODE is set to disabled for the particular IP, the IDLEST for the
module should go to '0x3', per the HW AUTO IDLE protocol. However this is
not observed and there is no reason per the protocl for the transition to
not happen. This could potentially be a bug in the HW AUTO state-machine.
Work around for this is to use SWSUP only for the particular clockdomain.
With this all the transitions of IDLEST happen correctly and warnings
don't occur.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC contains hardware random number generator. Add hwmod data for
this IP so that it can be utilized.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed the RNG hwmod IP flag fixes from Lokesh,
squashed the HS chip fix from Daniel Allred]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC contains SHA crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC contains AES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squash in support for both AES1 and AES2 cores]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A single character (line break) should be put into a sequence.
Thus use the corresponding function "seq_putc".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A single character (line break) should be put into a sequence at the end.
Thus use the corresponding function "seq_putc".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Strings which did not contain data format specification should be put into
a sequence. Thus use the corresponding function "seq_puts".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LogicPD DM3730 Torpedo and SOM-LV devices have the TI
TSC2004 touchscreen controller. Enable the related driver as
a module.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Milo Kim