Commit Graph

6 Commits

Author SHA1 Message Date
Rahul Sharma a55622570d drm/exynos: add support for hdmiphy power control for exynos5
This patch adds support for controlling power of hdmi phy for
exynos5 soc. A special bit is provided in exynos5 for directly
switching of PHY while in exynos4, phy power needs to be controlled
through i2c settings. I2C configuration may affect the suspend to
resume and wake-up time requirements hence not added.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2012-12-14 15:40:49 +09:00
Rahul Sharma a144c2e9f1 drm/exynos: sending AVI and AUI info frames
This patch adds code for composing AVI and AUI info frames
and send them every VSYNC.

This patch is important for hdmi certification.

v3:
- Moved enums, macros to exynos_hdmi.c.
- Corrected hex format.
- Added static to hdmi_reg_infoframe.

v2:
- Added few blank lines.
- Corrected comments format.
- Added comments for 2's Complement calculation for check sum.

v1:
- Remove un-necessary blank lines.
- Change the case of hex constants.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Fahad Kunnathadi <fahad.k@samsung.com>
Signed-off-by: Shirish S <s.shirish@samsung.com>
Acked-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-05 14:39:23 +09:00
Seung-Woo Kim 872d20d66c drm/exynos: enable dvi mode for dvi monitor
Hdmi monitor and dvi monitor can be distinguished with edid.
This patch enables dvi mode if dvi monitor is connected and does
not enable audio feature for dvi mode because dvi has no audio
feature.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2012-05-17 20:14:25 +09:00
Seung-Woo Kim 3e148baf46 drm/exynos: enable hdmi audio feature
This patch adds hdmi audio feature for exynos drm.
With this patch, i2s channel feeds audio data in hdmi when hdmi is connected.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-20 09:41:46 +00:00
Joonyoung Shim 3ecd70b18c drm/exynos: add HDMI version 1.4 support
Later Exynos series from Exynos4X12 support HDMI version 1.4. We will
distinguish to use which version via platform data. This patch supports
only default features of HDMI version 1.4(The 3D, sound and etc don't
support yet)

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-20 09:40:20 +00:00
Seung-Woo Kim d84083268b drm/exynos: added hdmi display support
This patch is hdmi display support for exynos drm driver.

There is already v4l2 based exynos hdmi driver in drivers/media/video/s5p-tv
and some low level code is already in s5p-tv and even headers for register
define are almost same. but in this patch, we decide not to consider separated
common code with s5p-tv.

Exynos HDMI is composed of 5 blocks, mixer, vp, hdmi, hdmiphy and ddc.

1. mixer. The piece of hardware responsible for mixing and blending multiple
data inputs before passing it to an output device.  The mixer is capable of
handling up to three image layers. One is the output of VP.  Other two are
images in RGB format.  The blending factor, and layers' priority are controlled
by mixer's registers. The output is passed to HDMI.

2. vp (video processor). It is used for processing of NV12/NV21 data.  An image
stored in RAM is accessed by DMA. The output in YCbCr444 format is send to
mixer.

3. hdmi. The piece of HW responsible for generation of HDMI packets. It takes
pixel data from mixer and transforms it into data frames. The output is send
to HDMIPHY interface.

4. hdmiphy. Physical interface for HDMI. Its duties are sending HDMI packets to
HDMI connector. Basically, it contains a PLL that produces source clock for
mixer, vp and hdmi.

5. ddc (display data channel). It is dedicated i2c channel to exchange display
information as edid with display monitor.

With plane support, exynos hdmi driver fully supports two mixer layes and vp
layer. Also vp layer supports multi buffer plane pixel formats having non
contigus memory spaces.

In exynos drm driver, common drm_hdmi driver to interface with drm framework
has opertion pointers for mixer and hdmi. this drm_hdmi driver is registered as
sub driver of exynos_drm. hdmi has hdmiphy and ddc i2c clients and controls
them. mixer controls all overlay layers in both mixer and vp.

Vblank interrupts for hdmi are handled by mixer internally because drm
framework cannot support multiple irq id. And pipe number is used to check
which display device irq happens.

History
v2: this version
 - drm plane feature support to handle overlay layers.
 - multi buffer plane pixel format support for vp layer.
 - vp layer support

RFCv1: original
 - at https://lkml.org/lkml/2011/11/4/164

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-12-29 11:21:42 +09:00