The serial driver sets up port function manually in early platform probe stage
if the ADI GPIO2 driver is used. Remove the bfin_sport_uart early platform
devices.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Remove gpio driver for new gpio controller on BF54x and BF60x.
Build the bfin_gpio driver only when other BF5xx processors are selected.
Replace the prefix of some gpio and peripheral functions with adi.
add portmux platform data in machine portmux.h
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Steven Miao <realmz6@gmail.com>
- Enable GMAC
- Set propler DMA PBL
- Disable DMA store and forward mode
- Select PTP input clock from MII
clock.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Steven Miao <realmz6@gmail.com>
If SCB exists in select blackfin cpu, developer can change the SCB
priority in kernel configuration.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Steven Miao <realmz6@gmail.com>
The bf5xx-i2s driver now has support for TDM mode and the bf5xx-tdm driver is
going to be removed soon, so switch the driver over to bf5xx-i2s.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The use of V4L2_IN/OUT_CAP_CUSTOM_TIMINGS is obsolete, use DV_TIMINGS instead.
Note that V4L2_IN/OUT_CAP_CUSTOM_TIMINGS is just a #define for
V4L2_IN/OUT_CAP_DV_TIMINGS.
At some point in the future these CUSTOM_TIMINGS defines might be removed.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Append the SEC IRQ after the IVG6, which is consistent to BF5xx SIC.
Exclude SIC irqchip fucntions from SEC code.
Call handle_fasteoi_irq in SEC error and fault handler.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Pull blackfin update from Bob Liu.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
Blackfin: smp: add smp_mb() to keep coherency
Blackfin: drop irq enable in init_arch_irq()
Blackfin: fix wrong place disabled irq
Blackfin: update defconfig for bf609-ezkit
Blackfin: add bf548 v0.4 revision
Blackfin: bf60x: Add bf608 and bf609 specific perpheral MMRs
Blackfin: cpufreq: fix dpm_state_table
Blackfin: bfin_gpio: proc: fix return value
Blackfin: CM-BF537E: Update SPORT support in board file.
Blackfin: bf537: fix lq035 platform device name
Blackfin: bf533-ezkit: enable flash drivers by default
Change ce pin to PE4 according to new adaptor board and re-define ppi for vs6624
to avoid gpio conflict.
Signed-off-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Customize the SEC interrupt priority array in machine ints-priority.c.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Turn SEC related macro CONFIG_BF60x into SEC_GCTL.
Move machine specific GPIO_PINT macros to machine gpio header.
Split SEC init_arch_irq() and vec_to_irq() from old SIC.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
PPI driver has changed blank units from clocks to pixels.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
save and restore pint sec CTL
save and restore pint registers
add pint suspend and resume when suspend to mem
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Pass wake up source mask and wakeup source polarity to deepsleep and
hibernate.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Add add deepsleep for bf60x.
1. Call DMC init functions to enter and exit DDR self refresh mode.
2. Wait till CGU PLL is locked after wake up and exit DDR self refresh mode.
3. Make asessembly function enter_deepsleep comply with C funtion ABI in
order to call other C functions.
4. Switch kernel stack by register EX_SCRATCH_REG.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Extend chip select number supported by spi master as well
because we can accept SPISEL1-SPISEL7 and all GPIO.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Sonic Zhang