Presumably we want to use this match table so add a module device table
and set the driver match pointer appropriately.
Reported-by: kernel test robot <lkp@intel.com>
Cc: Liam Beguin <lvb@xiphos.com>
Fixes: 3bc61cfd6f ("clk: add support for the lmk04832")
Link: https://lore.kernel.org/r/20210629060751.3119453-2-sboyd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The digital delay allows outputs to be delayed from 8 to 1023 VCO
cycles. The delay step can be as small as half the period of the clock
distribution path. For example, a 3.2-GHz VCO frequency results in
156.25-ps steps. The digital delay value takes effect on the clock
output phase after a SYNC event.
This is required to support JESD204B subclass 1.
Signed-off-by: Liam Beguin <lvb@xiphos.com>
Link: https://lore.kernel.org/r/20210423004057.283926-3-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The LMK04832 is an ultra-high performance clock conditioner with JEDEC
JESD204B support and is also pin compatible with the LMK0482x family of
devices.
Signed-off-by: Liam Beguin <lvb@xiphos.com>
Link: https://lore.kernel.org/r/20210423004057.283926-2-liambeguin@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd