Commit Graph

4724 Commits

Author SHA1 Message Date
Florian Fainelli 920fecc1aa pinctrl: bcm2835: Add support for wake-up interrupts
Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to
specifically treat the GPIO interrupts during suspend and resume, and
simply implement an irq_set_wake() callback that is responsible for
enabling the parent wake-up interrupt as a wake-up interrupt.

To avoid allocating unnecessary resources for other chips, the wake-up
interrupts are only initialized if we have a brcm,bcm7211-gpio
compatibility string.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20200531001101.24945-5-f.fainelli@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-06-03 14:16:38 +02:00
Florian Fainelli 562c856f96 pinctrl: bcm2835: Match BCM7211 compatible string
The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
BCM2711 SoC, match the compatible string and use the correct set of
options.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20200531001101.24945-4-f.fainelli@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-06-03 14:16:38 +02:00
Tiezhu Yang e682fcc769 pinctrl: at91-pio4: Add COMPILE_TEST support
Add COMPILE_TEST support to the AT91 PIO4 pinctrl driver for better compile
testing coverage.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1590234326-2194-2-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-25 13:40:48 +02:00
Tiezhu Yang b5d9ff10dc pinctrl: Fix return value about devm_platform_ioremap_resource()
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.

Fixes: 4b024225c4 ("pinctrl: use devm_platform_ioremap_resource() to simplify code")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1590234326-2194-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-25 13:40:47 +02:00
Linus Walleij 6fe7c07a9a pinctrl: sh-pfc: Updates for v5.8 (take two)
- Add support for the new RZ/G1H (r8a7742) SoC,
   - Minor fixes and improvements.
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Merge tag 'sh-pfc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.8 (take two)

  - Add support for the new RZ/G1H (r8a7742) SoC,
  - Minor fixes and improvements.
2020-05-25 11:19:44 +02:00
Linus Walleij d04996eac5 Samsung pinctrl drivers changes for v5.8
Two fixes for S5Pv210 pinctrl driver: setting proper external interrupt
 wakeup mask and restoring external interrupt mask value after system
 suspend.
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Merge tag 'samsung-pinctrl-5.8' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel

Samsung pinctrl drivers changes for v5.8

Two fixes for S5Pv210 pinctrl driver: setting proper external interrupt
wakeup mask and restoring external interrupt mask value after system
suspend.
2020-05-19 10:45:50 +02:00
Lars Povlsen 0b47afc654 pinctrl: ocelot: Fix GPIO interrupt decoding on Jaguar2
This fixes a problem with using the GPIO as an interrupt on Jaguar2
(and similar), as the register layout of the platforms with 64 GPIO's
are pairwise, such that the original offset must be multiplied with
the platform stride.

Fixes: da801ab56a pinctrl: ocelot: add MSCC Jaguar2 support.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-4-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-18 09:31:27 +02:00
Lars Povlsen edc7254664 pinctrl: ocelot: Remove instance number from pin functions
This patch removes the instance number from the "miim", "reco_clk" and
"sfp" pin function.

The change needed is to prepare the driver for adding new platforms
with more of these instances. The instance number is also redundant,
as this is implicit for each pin.

Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-3-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-18 09:30:35 +02:00
Lars Povlsen 550713e33f pinctrl: ocelot: Always register GPIO driver
This fixes the situation where the GPIO controller is not
used as an interrupt controller as well.

Previously, the driver would silently fail to register even the
GPIO's. With this change, the driver will only register as an
interrupt controller if a parent interrupt is provided.

Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200513125532.24585-2-lars.povlsen@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-18 09:28:51 +02:00
Geert Uytterhoeven 47fa5c971b pinctrl: amd: Add ACPI dependency
Currently the AMD pin controller driver supports ACPI platform only.
Make the PINCTRL_AMD config symbol depend on ACPI, to avoid asking the
user about it when configuring a kernel without ACPI support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507113751.24213-1-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16 11:23:11 +02:00
Geert Uytterhoeven 80691a8ac7 pinctrl: equilibrium: Add architecture dependency
The Equilibrium pin controller is only present on Intel Lightning
Mountain SoCs.  Add an architecture dependency to the
PINCTRL_EQUILIBRIUM config symbol, to avoid asking the user about it
when configuring a kernel for a non-x86 architecture.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200507113626.24026-2-geert+renesas@glider.be
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-16 11:21:25 +02:00
Linus Walleij 98a09fb4cb intel-pinctrl for v5.8-1
* Introduce GPIO driver for Jasper Lake
 * Fix long standing bug in Sunrisepoint-H PAD locking code
 * Enable pin configuration setting for GPIO chip for Baytrail
 * Work around race condition in Cherriview hardware when handle IRQ
 * Clean up Cherryview code to be closer to other drivers
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Use platform_get_irq_optional() explicitly
  -  Enable pin configuration setting for GPIO chip
 
 cannonlake:
  -  Use generic flag for special GPIO base treatment
 
 cherryview:
  -  Add missing spinlock usage in chv_gpio_irq_handler
  -  Use GENMASK() consistently
  -  Re-use data structures from pinctrl-intel.h (part 2)
 
 icelake:
  -  Use generic flag for special GPIO base treatment
 
 intel:
  -  Move npins closer to pin_base in struct intel_community
  -  Update description in struct intel_community
  -  Add Intel Jasper Lake pin controller support
  -  Introduce new flag to force GPIO base to be 0
  -  Introduce common flags for GPIO mapping scheme
 
 lynxpoint:
  -  Use platform_get_irq_optional() explicitly
 
 sunrisepoint:
  -  Fix PAD lock register offset for SPT-H
 
 tigerlake:
  -  Use generic flag for special GPIO base treatment
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Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v5.8-1

* Introduce GPIO driver for Jasper Lake
* Fix long standing bug in Sunrisepoint-H PAD locking code
* Enable pin configuration setting for GPIO chip for Baytrail
* Work around race condition in Cherriview hardware when handle IRQ
* Clean up Cherryview code to be closer to other drivers

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Use platform_get_irq_optional() explicitly
 -  Enable pin configuration setting for GPIO chip

cannonlake:
 -  Use generic flag for special GPIO base treatment

cherryview:
 -  Add missing spinlock usage in chv_gpio_irq_handler
 -  Use GENMASK() consistently
 -  Re-use data structures from pinctrl-intel.h (part 2)

icelake:
 -  Use generic flag for special GPIO base treatment

intel:
 -  Move npins closer to pin_base in struct intel_community
 -  Update description in struct intel_community
 -  Add Intel Jasper Lake pin controller support
 -  Introduce new flag to force GPIO base to be 0
 -  Introduce common flags for GPIO mapping scheme

lynxpoint:
 -  Use platform_get_irq_optional() explicitly

sunrisepoint:
 -  Fix PAD lock register offset for SPT-H

tigerlake:
 -  Use generic flag for special GPIO base treatment
2020-05-15 15:06:00 +02:00
Geert Uytterhoeven 7227797a4e pinctrl: rza1: Fix flag name in comment
rza1_swio_pin relates to the swio flag instead of the bidir flag.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200507074516.29903-1-geert+renesas@glider.be
2020-05-15 10:47:06 +02:00
Lad Prabhakar 4ecc7ff82e pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support
Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790),
however it doesn't have several automotive specific peripherals. Add
automotive-specific pin groups/functions along with common pin
groups/functions for supporting both r8a7790 and r8a7742 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-15 10:47:06 +02:00
Dafna Hirschfeld d7faa8ffb6 pinctrl: rockchip: fix memleak in rockchip_dt_node_to_map
In function rockchip_dt_node_to_map, a new_map variable is
allocated by:

new_map = devm_kcalloc(pctldev->dev, map_num, sizeof(*new_map),
		       GFP_KERNEL);

This uses devres and attaches new_map to the pinctrl driver.
This cause a leak since new_map is not released when the probed
driver is removed. Fix it by using kcalloc to allocate new_map
and free it in `rockchip_dt_free_map`

Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20200506100903.15420-1-dafna.hirschfeld@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 19:45:33 +02:00
Dafna Hirschfeld c4f333b758 pinctrl: rockchip: return ENOMEM instead of EINVAL if allocation fails
The function rockchip_pinctrl_parse_dt returns -EINVAL if
allocation fails. Change the return error to -ENOMEM

Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20200506101424.15691-1-dafna.hirschfeld@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:19:07 +02:00
Arnd Bergmann c7acd6fe8a pinctrl: mediatek: add pinctrl-mtk-common-v2 module license
Kbuild warns when this file is built as a loadable module:

WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.o
see include/linux/module.h for more information

Add the missing license/author/description tags.

Fixes: 8174a8512e ("pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200505140848.554957-1-arnd@arndb.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:10:36 +02:00
Paul Cercueil 9a0f1341df pinctrl: ingenic: Add irq_{request,release}_resources callbacks
These are called when a GPIO is to be used as IRQ.

Without these custom callbacks, when an interrupt is requested directly
and not through gpiod_to_irq(), the request fails because the GPIO is
not necesarily in input mode. These callbacks simply enforce that the
requested GPIO is in input mode.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20200503164549.163884-1-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 15:05:02 +02:00
Venkata Narendra Kumar Gutta dca4f40742 pinctrl: qcom: Add affinity callbacks to msmgpio IRQ chip
Wakeup capable GPIO IRQs routed via PDC are not being migrated when a CPU
is hotplugged. Add affinity callbacks to msmgpio IRQ chip to update the
affinity of wakeup capable IRQs.

Fixes: e35a6ae0eb ("pinctrl/msm: Setup GPIO chip in hierarchy")
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
[mkshah: updated commit text and minor code fixes]
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1588314617-4556-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 14:29:29 +02:00
Rikard Falkeborn 8068071c09 pinctrl: rk805: Constify rk805_gpio_cfgs
Mark pin_cfg as const, allowing the compiler to put the struct in
.rodata instead of .data.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200425203813.6442-1-rikard.falkeborn@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-05-12 13:35:33 +02:00
Linus Walleij 7740dda5b4 pinctrl: sh-pfc: Updates for v5.8
- Fix SWIO pins on RZ/A1L,
   - Add missing bindings to MAINTAINERS.
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Merge tag 'sh-pfc-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.8

  - Fix SWIO pins on RZ/A1L,
  - Add missing bindings to MAINTAINERS.
2020-05-09 00:37:04 +02:00
Linus Walleij 32c8a94660 pinctrl: db8500: Fix some old bugs
The Hulk robot reports these build warnings:

drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:899:20: warning:
‘sbag_groups’ defined but not used [-Wunused-const-variable=]
 DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
                    ^
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:570:23: warning:
‘ipgpio6_c_2_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
                       ^~~~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:472:23: warning:
‘mc1dir_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13,
DB8500_PIN_AG12,
                       ^~~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:453:23: warning:
‘modem_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22,
DB8500_PIN_C23,
                       ^~~~~~~~~~~~~~
drivers/pinctrl/nomadik/pinctrl-nomadik-db8500.c:430:23: warning:
‘kpskaskb_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17,
DB8500_PIN_D16 };
                       ^~~~~~~~~~~~~~~~~

They are just very old bugs in seldomly used pin groups.
Fix the problem by using the pins and referencing the
function.

Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:33:08 +02:00
Linus Walleij 767972b9b4 pinctrl: ab8505: Define group for GPIO pin 50
The Hulk robot reports an usused varible:

drivers/pinctrl/nomadik/pinctrl-ab8505.c:137:23: warning:
‘gpio50_a_1_pins’ defined but not used [-Wunused-const-variable=]
 static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
                       ^~~~~~~~~~~~~~~

This variable actually should be used. Probably an oversight
by the driver author.

Cc: Patrice Chotard <patrice.chotard@st.com>
Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:32:57 +02:00
Jason Yan 0320d260a7 pinctrl: bm1880: add pwm37 to bm1880_pctrl_groups
The 'pwm37' is not added to bm1880_pctrl_groups, which triggers a gcc
build warning:

drivers/pinctrl/pinctrl-bm1880.c:263:27: warning: ‘pwm37_pins’ defined
but not used [-Wunused-const-variable=]
 static const unsigned int pwm37_pins[] = { 110 };

Signed-off-by: Jason Yan <yanaijie@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200428115543.33379-1-yanaijie@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:28:37 +02:00
Amelie Delaunay 36126f5309 pinctrl: stmfx: stmfx_pinconf_set doesn't require to get direction anymore
Pin direction is not used to set pin configuration.

Fixes: a502b343eb ("pinctrl: stmfx: update pinconf settings")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Link: https://lore.kernel.org/r/20200422072513.8352-1-amelie.delaunay@st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 14:49:11 +02:00
Dejin Zheng d71ffeb9f2 pinctrl: fix several typos
use codespell to fix lots of typos over frontends.

Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
CC: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20200421142402.9524-1-zhengdejin5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 13:26:49 +02:00
Martin Blumenstingl f8f0aa0089 pinctrl: meson: wire up the gpio_chip's set_config callback
Use gpiochip_generic_config for the gpio_chip's set_config callback so
GPIO flags like GPIO_PULL_UP or GPIO_PULL_DOWN can be used in the board
.dts descriptions.
This is required for some Meson8m2 boards where GPIO_BSD_EN provides the
"MUTE" signal and requires enabling the internal pull-up resistor.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200417183349.1283092-3-martin.blumenstingl@googlemail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 12:00:46 +02:00
Martin Blumenstingl ef1d0bce38 pinctrl: meson: implement the gpio_chip get_direction callback
Implement the get_direction callback so we read the direction from the
actual GPIO controller register. This is recommended by the gpio_chip
kernel doc.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20200417183349.1283092-2-martin.blumenstingl@googlemail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 12:00:46 +02:00
Jonathan Bakker f354157a7d pinctrl: samsung: Save/restore eint_mask over suspend for EINT_TYPE GPIOs
Currently, for EINT_TYPE GPIOs, the CON and FLTCON registers
are saved and restored over a suspend/resume cycle.  However, the
EINT_MASK registers are not.

On S5PV210 at the very least, these registers are not retained over
suspend, leading to the interrupts remaining masked upon resume and
therefore no interrupts being triggered for the device.  There should
be no effect on any SoCs that do retain these registers as theoretically
we would just be re-writing what was already there.

Fixes: 7ccbc60cd9 ("pinctrl: exynos: Handle suspend/resume of GPIO EINT registers")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-04-28 11:38:11 +02:00
Venkata Narendra Kumar Gutta 4e3ec9e407 pinctrl: qcom: Add sm8250 pinctrl driver.
Add initial Qualcomm SM8250 pinctrl driver to support pin configuration
with pinctrl framework for SM8250 SoC.

Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Link: https://lore.kernel.org/r/1586477057-7636-2-git-send-email-vnkgutta@codeaurora.org
[bjorn: Regrouped functions, upstream tiles implementation, dropped
        downstream-only features]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200417061907.1226490-3-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 11:18:05 +02:00
Andy Shevchenko 6d649fca34 pinctrl: intel: Move npins closer to pin_base in struct intel_community
It's common across the drivers to use the (pin_base, npins) pair to describe
community characteristics. Thus, move them in the struct intel_community
to be closer to each other.

While at it, add a blank line to cut driver usable fields from what core
reserves for itself.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-22 14:20:00 +03:00
Andy Shevchenko 2ccb9cc3b4 pinctrl: intel: Update description in struct intel_community
It appears that most of the drivers, that are using struct intel_community,
utilize gpps rather than gpp_size. Update comment accordingly.

While here, correct the description of gpp_size, i.e. remove double space
and drop redundant 'etc.' part.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-22 14:19:03 +03:00
Jason Yan 4b4e8e93ec pinctrl: rza1: Fix wrong array assignment of rza1l_swio_entries
The rza1l_swio_entries referred to the wrong array rza1h_swio_pins,
which was intended to be rza1l_swio_pins. So let's fix it.

This is detected by the following gcc warning:

drivers/pinctrl/pinctrl-rza1.c:401:35: warning: ‘rza1l_swio_pins’
defined but not used [-Wunused-const-variable=]
 static const struct rza1_swio_pin rza1l_swio_pins[] = {
                                   ^~~~~~~~~~~~~~~

Fixes: 039bc58e73 ("pinctrl: rza1: Add support for RZ/A1L")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200417111604.19143-1-yanaijie@huawei.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-20 10:12:55 +02:00
Linus Walleij 9cd347294b intel-pinctrl for v5.7-2
* Enable pin configuration setting for Baytrail
 * Fix interrupt handling due to hardware sighting for Cherryview
 * Fix PAD lock offset for Sunrisepoint-H
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Enable pin configuration setting for GPIO chip
 
 cherryview:
  -  Add missing spinlock usage in chv_gpio_irq_handler
 
 sunrisepoint:
  -  Fix PAD lock register offset for SPT-H
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Merge tag 'intel-pinctrl-v5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes

intel-pinctrl for v5.7-2

* Enable pin configuration setting for Baytrail
* Fix interrupt handling due to hardware sighting for Cherryview
* Fix PAD lock offset for Sunrisepoint-H

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Enable pin configuration setting for GPIO chip

cherryview:
 -  Add missing spinlock usage in chv_gpio_irq_handler

sunrisepoint:
 -  Fix PAD lock register offset for SPT-H
2020-04-17 16:36:04 +02:00
Grace Kao 69388e15f5 pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler
According to Braswell NDA Specification Update (#557593),
concurrent read accesses may result in returning 0xffffffff and write
instructions may be dropped. We have an established format for the
commit references, i.e.
cdca06e4e8 ("pinctrl: baytrail: Add missing spinlock usage in
byt_gpio_irq_handler")

Fixes: 0bd50d719b ("pinctrl: cherryview: prevent concurrent access to GPIO controllers")
Signed-off-by: Grace Kao <grace.kao@intel.com>
Reported-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-17 14:37:40 +03:00
Grace Kao 3dbf1ee6ab pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler
According to Braswell NDA Specification Update (#557593),
concurrent read accesses may result in returning 0xffffffff and write
instructions may be dropped. We have an established format for the
commit references, i.e.
cdca06e4e8 ("pinctrl: baytrail: Add missing spinlock usage in
byt_gpio_irq_handler")

Fixes: 0bd50d719b ("pinctrl: cherryview: prevent concurrent access to GPIO controllers")
Signed-off-by: Grace Kao <grace.kao@intel.com>
Reported-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-17 14:36:22 +03:00
Jason Yan 7045e673c2 pinctrl: mcp23s08: add module license
Fix the following build warning:

WARNING: modpost: missing MODULE_LICENSE() in
drivers/pinctrl/pinctrl-mcp23s08.o
see include/linux/module.h for more information

Signed-off-by: Jason Yan <yanaijie@huawei.com>
Link: https://lore.kernel.org/r/20200417092125.12513-1-yanaijie@huawei.com
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-17 12:24:59 +02:00
YueHaibing 5da42a3d25 pinctrl: qcom: Remove duplicated include from pinctrl-msm.c
Remove duplicated include.

Fixes: 13bec8d49b ("pinctrl: qcom: use scm_call to route GPIO irq to Apps")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200408070504.134847-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-17 12:24:52 +02:00
Andy Shevchenko 5f3b82a168 pinctrl: lynxpoint: Use platform_get_irq_optional() explicitly
There is no need to repeat functionality of platform_get_irq_optional()
in the driver. Replace it with explicit call to the helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 18:54:34 +03:00
Andy Shevchenko 0f04a81784 pinctrl: mcp23s08: Split to three parts: core, I²C, SPI
Split the driver to three parts: core, I²C, SPI.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 7b04aaaf66 pinctrl: mcp23s08: Use for_each_set_bit() and hweight_long()
Here is a simplification of SPI code by using for_each_set_bit() and
hweight_long() library functions.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 1ac30db20b pinctrl: mcp23s08: Make use of device properties
Device property API allows to gather device resources from different sources,
such as ACPI. Convert the drivers to unleash the power of device property API.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 88af89b52a pinctrl: mcp23s08: Propagate error code from device_property_read_u32()
Return error code from device_property_read_u32() as is in mcp23s08_probe().
While here, drop status variable in mcp23s08_irq_set_type() which always 0.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 0874758ecb pinctrl: mcp23s08: Refactor mcp23s08_spi_regmap_init()
There is a lot of duplication for one small helper function.
Refactor mcp23s08_spi_regmap_init() to prepare everything first
and then register regmap at the end.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 0521701c8d pinctrl: mcp23s08: Drop unused parameter in mcp23s08_probe_one()
The cs parameter in mcp23s08_probe_one() is never used. Drop it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko d3da29b628 pinctrl: mcp23s08: Consolidate SPI and I²C code
There are three parts of each, SPI and I²C, driver spread over the code under
ifdeffery. Consolidate them so it will be only one for SPI and one for I²C.

The code has been cosmetically changed to avoid intrusive change.
Clean up is considered in the nearest future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 84d02e785d pinctrl: mcp23s08: Deduplicate IRQ chip filling
In both cases, SPI and I²C, IRQ chip is filled in the same way.
Deduplicate this by moving common part to mcp23s08_probe_one().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Andy Shevchenko 6aba6ed879 pinctrl: mcp23s08: Get rid of legacy platform data
Platform data is a legacy interface to supply device properties
to the driver. In this case we even don't have in-kernel users
for it. Just remove it for good.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200407173849.43628-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:23 +02:00
Anson Huang f9a8744dde pinctrl: imx: Add imx8dxl driver
i.MX8DXL contains a system controller that is responsible for controlling
the pad setting of the IPs that are present. Communication between the
host processor running an OS and the system controller happens through
a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 14:21:22 +02:00
Ansuel Smith 90bcb0c3ca pinctrl: qcom: fix wrong write in update_dual_edge
Fix a typo in the readl/writel accessor conversion where val is used
instead of pol changing the behavior of the original code.

Cc: stable@vger.kernel.org
Fixes: 6c73698904 pinctrl: qcom: Introduce readl/writel accessors
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200414003726.25347-1-ansuelsmth@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 13:15:40 +02:00
Amit Singh Tomar 6a27268cde pinctrl: actions: fix function group name for i2c0_group
After commit 6f87359e8b ("pinctrl: actions: Fix functions groups names
for S700 SoC") following error has been observed while booting Linux on
Cubieboard7-lite(based on S700 SoC).

[    1.206245] pinctrl-s700 e01b0000.pinctrl: invalid group "i2c0_mfp" for function "i2c0"

This commit fixes it by using correct name for i2c0_group.

Fixes: 6f87359e8b ("pinctrl: actions: Fix functions groups names for S700 SoC")
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Link: https://lore.kernel.org/r/1586757913-5438-1-git-send-email-amittomer25@gmail.com
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 13:10:05 +02:00
Corentin Labbe 39eb3cc8ab pinctrl: sunxi: handle probe defferal
When checking the logs on my sun8i-a33-olinuxino I saw:
sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing
but this driver was working after.
This message is just here because the reset controller was still not probed.
So don't say anything if the return code say to wait.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.com
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 10:23:02 +02:00
Light Hsieh d1f7af4b4a pinctrl: mediatek: remove shadow variable declaration
Remove shadow declaration of variable 'pullup' in mtk_pinconf_get()

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Link: https://lore.kernel.org/r/1586255632-27528-1-git-send-email-light.hsieh@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 10:01:30 +02:00
Light Hsieh 9c95f7c283 pinctrl: mediatek: make MediaTek MT6765 pinctrl ready for buiding loadable module
This patch make pinctrl-mt6765 ready for building as loadable module.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/42100afe6f97d28447c153bea6b54ea556cf95ca.1586289920.git.sean.wang@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:59:11 +02:00
Light Hsieh 8174a8512e pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module
In the future we want to be able to build the MediaTek pinctrl driver,
based on paris, as kernel module. This patch allows pinctrl-paris.c, the
external interrupt controller mtk-eint.c, and pinctrl-mtk-common-v2.c to
be loadable as module.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/9feeb04805e5a406fe22a92e3f280abda39ddda4.1586289920.git.sean.wang@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:59:11 +02:00
Ding Xiang 7e23ab72e7 pinctrl: nomadik:remove unneeded variable
ret is unneeded, just return 0.

Signed-off-by: Ding Xiang <dingxiang@cmss.chinamobile.com>
Link: https://lore.kernel.org/r/1585554986-26521-1-git-send-email-dingxiang@cmss.chinamobile.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16 09:55:57 +02:00
Andy Shevchenko f86a1bb536 pinctrl: baytrail: Use platform_get_irq_optional() explicitly
There is no need to repeat functionality of platform_get_irq_optional()
in the driver. Replace it with explicit call to the helper.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-15 18:30:39 +03:00
Andy Shevchenko e278dcb704 pinctrl: intel: Add Intel Jasper Lake pin controller support
This driver adds pinctrl/GPIO support for Intel Jasper Lake SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.

Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko 9bd59157e1 pinctrl: intel: Introduce new flag to force GPIO base to be 0
In some cases not the first group would like to have GPIO base to be 0.
It's not possible right now due to 0 has special meaning already. Thus,
introduce a new flag to allow drivers to force GPIO base to be 0 on
a certain group. It's assumed that it can be only one group per device
with such flag enabled.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko d4b41f8bb2 pinctrl: tigerlake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko cf2f2c3a44 pinctrl: icelake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko 5ba092edb9 pinctrl: cannonlake: Use generic flag for special GPIO base treatment
Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:13 +03:00
Andy Shevchenko e5a4ab6a55 pinctrl: intel: Introduce common flags for GPIO mapping scheme
Few drivers are using the same flag to tell Intel pin control core
how to interpret GPIO base.

Provide a generic flags so all drivers can use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14 16:17:12 +03:00
Andy Shevchenko ccd025eadd pinctrl: baytrail: Enable pin configuration setting for GPIO chip
It appears that pin configuration for GPIO chip hasn't been enabled yet
due to absence of ->set_config() callback.

Enable it here for Intel Baytrail.

Fixes: c501d0b149 ("pinctrl: baytrail: Add pin control operations")
Depends-on: 2956b5d94a ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00
Andy Shevchenko 5707dd73c7 pinctrl: cherryview: Use GENMASK() consistently
Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00
Andy Shevchenko 6b7275c877 pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H
It appears that SPT-H variant has different offset for PAD locking registers.
Fix it here.

Fixes: 551fa5801e ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00
Andy Shevchenko 36ad7b2448 pinctrl: cherryview: Re-use data structures from pinctrl-intel.h (part 2)
We have some data structures duplicated across the drivers.
Let's deduplicate them by using ones that being provided by
pinctrl-intel.h.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13 13:14:35 +03:00
Jonathan Bakker b577a27991 pinctrl: samsung: Correct setting of eint wakeup mask on s5pv210
Commit a8be2af021 ("pinctrl: samsung: Write external wakeup interrupt
mask") started writing the eint wakeup mask from the pinctrl driver.
Unfortunately, it made the assumption that the private retention data
was always a regmap while in the case of s5pv210 it is a raw pointer
to the clock base (as the eint wakeup mask not in the PMU as with newer
Exynos platforms).

Fixes: a8be2af021 ("pinctrl: samsung: Write external wakeup interrupt mask")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-04-13 12:10:30 +02:00
Linus Torvalds 828907ef25 This is the bulk of GPIO development for the v5.7 kernel cycle.
Core and userspace API:
 
 - The userspace API KFIFOs have been imoproved with locks that
   do not block interrupts. This makes us better at getting
   events to userspace without blocking or disturbing new events
   arriving in the same time. This was reviewed by the KFIFO
   maintainer Stefani. This is a generic improvement which
   paves the road for similar improvements in other subsystems.
 
 - We provide a new ioctl() for monitoring changes in the line
   information, such as when multiple clients are taking lines
   and giving them back, possibly reconfiguring them in the
   process: we can now monitor that and not get stuck with stale
   static information.
 
 - An example tool 'gpio-watch' is provided to showcase this
   functionality.
 
 - Timestamps for events are switched to ktime_get_ns() which is
   monotonic. We previously had a 'realtime' stamp which could
   move forward and *backward* in time, which probably would just
   cause silent bugs and weird behaviour. In the long run we
   see two relevant timestamps: ktime_get_ns() or the timestamp
   sometimes provided by the GPIO hardware itself, if that
   exists.
 
 - Device Tree overlay support for GPIO hogs. On systems that
   load overlays, these overlays can now contain hogs, and will
   then be respected.
 
 - Handle pin control interaction with nonexisting pin ranges
   in the GPIO library core instead of in the individual
   drivers.
 
 New drivers:
 
 - New driver for the Mellanox BlueField 2 GPIO controller.
 
 Driver improvements:
 
 - Introduce the BGPIOF_NO_SET_ON_INPUT flag to the generic
   MMIO GPIO library and use this flag in the MT7621 driver.
 
 - Texas Instruments OMAP CPU power management improvements,
   such as blocking of idle on pending GPIO interrupts.
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Merge tag 'gpio-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO development for the v5.7 kernel cycle.

  Core and userspace API:

   - The userspace API KFIFOs have been imoproved with locks that do not
     block interrupts. This makes us better at getting events to
     userspace without blocking or disturbing new events arriving in the
     same time. This was reviewed by the KFIFO maintainer Stefani. This
     is a generic improvement which paves the road for similar
     improvements in other subsystems.

   - We provide a new ioctl() for monitoring changes in the line
     information, such as when multiple clients are taking lines and
     giving them back, possibly reconfiguring them in the process: we
     can now monitor that and not get stuck with stale static
     information.

   - An example tool 'gpio-watch' is provided to showcase this
     functionality.

   - Timestamps for events are switched to ktime_get_ns() which is
     monotonic. We previously had a 'realtime' stamp which could move
     forward and *backward* in time, which probably would just cause
     silent bugs and weird behaviour. In the long run we see two
     relevant timestamps: ktime_get_ns() or the timestamp sometimes
     provided by the GPIO hardware itself, if that exists.

   - Device Tree overlay support for GPIO hogs. On systems that load
     overlays, these overlays can now contain hogs, and will then be
     respected.

   - Handle pin control interaction with nonexisting pin ranges in the
     GPIO library core instead of in the individual drivers.

  New drivers:

   - New driver for the Mellanox BlueField 2 GPIO controller.

  Driver improvements:

   - Introduce the BGPIOF_NO_SET_ON_INPUT flag to the generic MMIO GPIO
     library and use this flag in the MT7621 driver.

   - Texas Instruments OMAP CPU power management improvements, such as
     blocking of idle on pending GPIO interrupts"

* tag 'gpio-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (59 commits)
  Revert "gpio: eic-sprd: Use devm_platform_ioremap_resource()"
  pinctrl: Unconditionally assign .request()/.free()
  gpio: Unconditionally assign .request()/.free()
  gpio: export of_pinctrl_get to modules
  pinctrl: Define of_pinctrl_get() dummy for !PINCTRL
  gpio: Rename variable in core APIs
  gpio: Avoid using pin ranges with !PINCTRL
  gpiolib: Remove unused gpio_chip parameter from gpio_set_bias()
  gpiolib: Pass gpio_desc to gpio_set_config()
  gpiolib: Introduce gpiod_set_config()
  tools: gpio: Fix out-of-tree build regression
  gpio: gpiolib: fix a doc warning
  gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1
  gpio: tegra186: Add support for pin ranges
  gpio: Support GPIO controllers without pin-ranges
  ARM: integrator: impd1: Use GPIO_LOOKUP() helper macro
  gpio: brcmstb: support gpio-line-names property
  tools: gpio: Fix typo in gpio-utils
  tools: gpio-hammer: Apply scripts/Lindent and retain good changes
  gpiolib: gpio_name_to_desc: factor out !name check
  ...
2020-04-04 10:27:00 -07:00
Linus Torvalds bc3b3f4bfb This is the bulk of pin control changes for the v5.7 kernel cycle.
There are no core changes this time, only driver developments.
 
 - New driver for the Dialog Semiconductor DA9062 Power Management
   Integrated Circuit (PMIC).
 
 - Renesas SH-PFC has improved consistency, with group and
   register checks in the configuration checker.
 
 - New subdriver for the Qualcomm IPQ6018.
 
 - Add the RGMII pin control functionality to Qualcomm IPQ8064.
 
 - Performance and code quality cleanups in the Mediatek
   driver.
 
 - Improve the Broadcom BCM2835 support to cover all the GPIOs
   that exist in it.
 
 - The Allwinner/Sunxi driver properly masks non-wakeup IRQs on
   suspend.
 
 - Add some missing groups and functions to the Ingenic driver.
 
 - Convert some of the Freescale device tree bindings to use the
   new and all improved JSON YAML markup.
 
 - Refactorings and support for the SFIO/GPIO in the Tegra194
   SoC driver.
 
 - Support high impedance mode in the Spreadtrum/Unisoc driver.
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Merge tag 'pinctrl-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.7 kernel cycle.

  There are no core changes this time, only driver developments:

   - New driver for the Dialog Semiconductor DA9062 Power Management
     Integrated Circuit (PMIC).

   - Renesas SH-PFC has improved consistency, with group and register
     checks in the configuration checker.

   - New subdriver for the Qualcomm IPQ6018.

   - Add the RGMII pin control functionality to Qualcomm IPQ8064.

   - Performance and code quality cleanups in the Mediatek driver.

   - Improve the Broadcom BCM2835 support to cover all the GPIOs that
     exist in it.

   - The Allwinner/Sunxi driver properly masks non-wakeup IRQs on
     suspend.

   - Add some missing groups and functions to the Ingenic driver.

   - Convert some of the Freescale device tree bindings to use the new
     and all improved JSON YAML markup.

   - Refactorings and support for the SFIO/GPIO in the Tegra194 SoC
     driver.

   - Support high impedance mode in the Spreadtrum/Unisoc driver"

* tag 'pinctrl-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (64 commits)
  pinctrl: qcom: fix compilation error
  pinctrl: qcom: use scm_call to route GPIO irq to Apps
  pinctrl: sprd: Add pin high impedance mode support
  pinctrl: sprd: Use the correct pin output configuration
  pinctrl: tegra: Add SFIO/GPIO programming on Tegra194
  pinctrl: tegra: Renumber the GG.0 and GG.1 pins
  pinctrl: tegra: Do not add default pin range on Tegra194
  pinctrl: tegra: Pass struct tegra_pmx for pin range check
  pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo
  pinctrl: tegra: Fix whitespace issues for improved readability
  pinctrl: mediatek: Use scnprintf() for avoiding potential buffer overflow
  pinctrl: freescale: drop the dependency on ARM64 for i.MX8M
  Revert "pinctrl: mvebu: armada-37xx: use use platform api"
  dt-bindings: pinctrl: at91: Fix a typo ("descibe")
  pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxm
  pinctrl: sprd: Fix the kconfig warning
  pinctrl: ingenic: add hdmi-ddc pin control group
  pinctrl: sirf/atlas7: Replace zero-length array with flexible-array member
  pinctrl: sprd: Allow the SPRD pinctrl driver building into a module
  pinctrl: Export some needed symbols at module load time
  ...
2020-04-02 15:47:18 -07:00
Thierry Reding d6471d6e09 pinctrl: Unconditionally assign .request()/.free()
The gpiochip_generic_request() and gpiochip_generic_free() functions can
now deal properly with chips that don't have any pin-ranges defined, so
they can be assigned unconditionally.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200401200527.2982450-2-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-02 09:17:16 +02:00
Stephen Rothwell 33dd888263 gpio: export of_pinctrl_get to modules
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Link: https://lore.kernel.org/r/20200401151904.6948af20@canb.auug.org.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-01 08:01:39 +02:00
Ansuel Smith c42f69b420 pinctrl: qcom: fix compilation error
pinctrl: qcom: use scm_call to route GPIO irq to Apps has a typo in the
patch and introduced a compilation error.

Fixes: 13bec8d4 pinctrl: qcom: use scm_call to route GPIO irq to Apps
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20200331134603.13513-1-ansuelsmth@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-31 16:43:54 +02:00
Linus Torvalds 2d385336af Updates for the interrupt subsystem:
Treewide:
 
     - Cleanup of setup_irq() which is not longer required because the
       memory allocator is available early. Most cleanup changes come
       through the various maintainer trees, so the final removal of
       setup_irq() is postponed towards the end of the merge window.
 
   Core:
 
     - Protection against unsafe invocation of interrupt handlers and unsafe
       interrupt injection including a fixup of the offending PCI/AER error
       injection mechanism.
 
       Invoking interrupt handlers from arbitrary contexts, i.e. outside of
       an actual interrupt, can cause inconsistent state on the fragile
       x86 interrupt affinity changing hardware trainwreck.
 
   Drivers:
 
     - Second wave of support for the new ARM GICv4.1
     - Multi-instance support for Xilinx and PLIC interrupt controllers
     - CPU-Hotplug support for PLIC
     - The obligatory new driver for X1000 TCU
     - Enhancements, cleanups and fixes all over the place
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Merge tag 'irq-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "Updates for the interrupt subsystem:

  Treewide:

    - Cleanup of setup_irq() which is not longer required because the
      memory allocator is available early.

      Most cleanup changes come through the various maintainer trees, so
      the final removal of setup_irq() is postponed towards the end of
      the merge window.

  Core:

    - Protection against unsafe invocation of interrupt handlers and
      unsafe interrupt injection including a fixup of the offending
      PCI/AER error injection mechanism.

      Invoking interrupt handlers from arbitrary contexts, i.e. outside
      of an actual interrupt, can cause inconsistent state on the
      fragile x86 interrupt affinity changing hardware trainwreck.

  Drivers:

    - Second wave of support for the new ARM GICv4.1

    - Multi-instance support for Xilinx and PLIC interrupt controllers

    - CPU-Hotplug support for PLIC

    - The obligatory new driver for X1000 TCU

    - Enhancements, cleanups and fixes all over the place"

* tag 'irq-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (58 commits)
  unicore32: Replace setup_irq() by request_irq()
  sh: Replace setup_irq() by request_irq()
  hexagon: Replace setup_irq() by request_irq()
  c6x: Replace setup_irq() by request_irq()
  alpha: Replace setup_irq() by request_irq()
  irqchip/gic-v4.1: Eagerly vmap vPEs
  irqchip/gic-v4.1: Add VSGI property setup
  irqchip/gic-v4.1: Add VSGI allocation/teardown
  irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer
  irqchip/gic-v4.1: Plumb set_vcpu_affinity SGI callbacks
  irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks
  irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks
  irqchip/gic-v4.1: Add initial SGI configuration
  irqchip/gic-v4.1: Plumb skeletal VSGI irqchip
  irqchip/stm32: Retrigger both in eoi and unmask callbacks
  irqchip/gic-v3: Move irq_domain_update_bus_token to after checking for NULL domain
  irqchip/xilinx: Do not call irq_set_default_host()
  irqchip/xilinx: Enable generic irq multi handler
  irqchip/xilinx: Fill error code when irq domain registration fails
  irqchip/xilinx: Add support for multiple instances
  ...
2020-03-30 17:35:14 -07:00
Linus Torvalds 59838093be Driver core patches for 5.7-rc1
Here is the "big" set of driver core changes for 5.7-rc1.
 
 Nothing huge in here, just lots of little firmware core changes and use
 of new apis, a libfs fix, a debugfs api change, and some driver core
 deferred probe rework.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg KH:
 "Here is the "big" set of driver core changes for 5.7-rc1.

  Nothing huge in here, just lots of little firmware core changes and
  use of new apis, a libfs fix, a debugfs api change, and some driver
  core deferred probe rework.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'driver-core-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (44 commits)
  Revert "driver core: Set fw_devlink to "permissive" behavior by default"
  driver core: Set fw_devlink to "permissive" behavior by default
  driver core: Replace open-coded list_last_entry()
  driver core: Read atomic counter once in driver_probe_done()
  libfs: fix infoleak in simple_attr_read()
  driver core: Add device links from fwnode only for the primary device
  platform/x86: touchscreen_dmi: Add info for the Chuwi Vi8 Plus tablet
  platform/x86: touchscreen_dmi: Add EFI embedded firmware info support
  Input: icn8505 - Switch to firmware_request_platform for retreiving the fw
  Input: silead - Switch to firmware_request_platform for retreiving the fw
  selftests: firmware: Add firmware_request_platform tests
  test_firmware: add support for firmware_request_platform
  firmware: Add new platform fallback mechanism and firmware_request_platform()
  Revert "drivers: base: power: wakeup.c: Use built-in RCU list checking"
  drivers: base: power: wakeup.c: Use built-in RCU list checking
  component: allow missing unbind callback
  debugfs: remove return value of debugfs_create_file_size()
  debugfs: Check module state before warning in {full/open}_proxy_open()
  firmware: fix a double abort case with fw_load_sysfs_fallback
  arch_topology: Fix putting invalid cpu clk
  ...
2020-03-30 13:59:52 -07:00
Ajay Kishore 13bec8d49b pinctrl: qcom: use scm_call to route GPIO irq to Apps
For IPQ806x targets, TZ protects the registers that are used to
configure the routing of interrupts to a target processor.
To resolve this, this patch uses scm call to route GPIO interrupts
to application processor. Also the scm call interface is changed.

Signed-off-by: Ajay Kishore <akisho@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20200327223209.20409-1-ansuelsmth@gmail.com
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-28 00:36:18 +01:00
Linhua Xu 1592c4b993 pinctrl: sprd: Add pin high impedance mode support
For Spreadtrum pin controller, it will be the high impedance
mode if disable input and output mode for a pin. Thus add
PIN_CONFIG_BIAS_HIGH_IMPEDANCE configuration to support it.

Signed-off-by: Linhua Xu <linhua.xu@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/3bdac4c2673b54c940e511f3fa569ee33b87b8d5.1585124562.git.baolin.wang7@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 22:08:46 +01:00
Linhua Xu bb0f472f96 pinctrl: sprd: Use the correct pin output configuration
The Spreadtrum pin controller did not supply registers to set high level
or low level for output mode, instead we should let the pin controller
current configuration drive values on the line. So we should use the
PIN_CONFIG_OUTPUT_ENABLE configuration to enable or disable the output
mode.

[Baolin Wang changes the commit message]
Fixes: 41d32cfce1 ("pinctrl: sprd: Add Spreadtrum pin control driver")
Signed-off-by: Linhua Xu <linhua.xu@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/8a6f91b49c17beb218e46b23084f59a7c7260f86.1585124562.git.baolin.wang7@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 22:07:10 +01:00
Thierry Reding 368b62f2fd pinctrl: tegra: Add SFIO/GPIO programming on Tegra194
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part
of the GPIO controller's register programming. Starting with Tegra186, a
pin is configured as GPIO or SFIO with a bit in a configuration register
of the pin controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:46:06 +01:00
Thierry Reding 103afc8e9e pinctrl: tegra: Renumber the GG.0 and GG.1 pins
There is no need to define these at a specific offset since they are the
only pins defined for this SoC generation. Begin numbering them at 0.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-9-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:44:59 +01:00
Thierry Reding f67499f8ea pinctrl: tegra: Do not add default pin range on Tegra194
On Tegra194, almost all of the pin control programming happens in early
boot firmware, so there is no use in having a pin range defined for all
the pins.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:44:30 +01:00
Thierry Reding 6e01e0c7a0 pinctrl: tegra: Pass struct tegra_pmx for pin range check
Pass the struct tegra_pmx when checking for the pin range in device
tree. This makes the call site a bit easier to read and will help keep
that readability in a subsequent patch.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-7-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:42:32 +01:00
Thierry Reding 66539e6eac pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo
Properly spell "Schmitt" in the kerneldoc for pin group definitions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-6-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:41:38 +01:00
Thierry Reding 028e45cda2 pinctrl: tegra: Fix whitespace issues for improved readability
Fix a few whitespace inconsistencies to make the code easier to read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-5-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:41:04 +01:00
Takashi Iwai 7eb42f9855 pinctrl: mediatek: Use scnprintf() for avoiding potential buffer overflow
Since snprintf() returns the would-be-output size instead of the
actual output size, the succeeding calls may go beyond the given
buffer limit.  Fix it by replacing with scnprintf().

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/r/20200311090644.20287-1-tiwai@suse.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27 11:30:24 +01:00
Peng Fan 492464cd46 pinctrl: freescale: drop the dependency on ARM64 for i.MX8M
Moving to support aarch32 mode on aarch64 hardware, need to drop
the dependency on ARM64 to make the driver could be selected for
ARM32.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/1584070036-26447-2-git-send-email-peng.fan@nxp.com
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-26 00:22:42 +01:00
Linus Walleij 4316397cbb Revert "pinctrl: mvebu: armada-37xx: use use platform api"
This reverts commit 06e26b75f5.

According to discussions, it causes a regression.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-26 00:20:38 +01:00
Marek Vasut 00760d3cd9 irqchip/stm32: Retrigger both in eoi and unmask callbacks
Sampling the IRQ line state in EOI and retriggering the interrupt to
work around missing level-triggered interrupt support only works for
non-threaded interrupts. Threaded interrupts must be retriggered the
same way in unmask callback.

Signed-off-by: Marek Vasut <marex@denx.de>
[maz: fixed missing static attribute]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200323235132.530550-1-marex@denx.de
2020-03-24 11:12:34 +00:00
Igor Vavro eaee5d9f20 pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxm
Add the tsin pinctrl definitions needed for integrated DVB hardware
support on Meson GXBB/GXL/GXM boards.

changes in v2
- fix ordering and numbering of uart_c ping flagged by Otto in [1]

[1] http://lists.infradead.org/pipermail/linux-amlogic/2020-March/015906.html

Signed-off-by: Igor Vavro <afl2001@gmail.com>
[updated commit message]
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/1583377666-13378-1-git-send-email-christianshewitt@gmail.com
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-12 11:43:52 +01:00
Linus Walleij 1cada2f307 pinctrl: qcom: Assign irq_eoi conditionally
The hierarchical parts of MSM pinctrl/GPIO is only
used when the device tree has a "wakeup-parent" as
a phandle, but the .irq_eoi is anyway assigned leading
to semantic problems on elder Qualcomm chipsets.

When the drivers/mfd/qcom-pm8xxx.c driver calls
chained_irq_exit() that call will in turn call chip->irq_eoi()
which is set to irq_chip_eoi_parent() by default on a
hierachical IRQ chip, and the parent is pinctrl-msm.c
so that will in turn unconditionally call
irq_chip_eoi_parent() again, but its parent is invalid
so we get the following crash:

 Unnable to handle kernel NULL pointer dereference at
 virtual address 00000010
 pgd = (ptrval)
 [00000010] *pgd=00000000
 Internal error: Oops: 5 [#1] PREEMPT SMP ARM
 (...)
 PC is at irq_chip_eoi_parent+0x4/0x10
 LR is at pm8xxx_irq_handler+0x1b4/0x2d8

If we solve this crash by avoiding to call up to
irq_chip_eoi_parent(), the machine will hang and get
reset by the watchdog, because of semantic issues,
probably inside irq_chip.

As a solution, just assign the .irq_eoi conditionally if
we are actually using a wakeup parent.

Cc: David Heidelberg <david@ixit.cz>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: stable@vger.kernel.org
Fixes: e35a6ae0eb ("pinctrl/msm: Setup GPIO chip in hierarchy")
Link: https://lore.kernel.org/r/20200306121221.1231296-1-linus.walleij@linaro.org
Link: https://lore.kernel.org/r/20200309125207.571840-1-linus.walleij@linaro.org
Link: https://lore.kernel.org/r/20200309152604.585112-1-linus.walleij@linaro.org
Tested-by: David Heidelberg <david@ixit.cz>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-09 16:31:34 +01:00
Mathias Kresin d62e7fbea4 pinctrl: falcon: fix syntax error
Add the missing semicolon after of_node_put to get the file compiled.

Fixes: f17d2f54d3 ("pinctrl: falcon: Add of_node_put() before return")
Cc: stable@vger.kernel.org # v5.4+
Signed-off-by: Mathias Kresin <dev@kresin.me>
Link: https://lore.kernel.org/r/20200305182245.9636-1-dev@kresin.me
Acked-by: Thomas Langer <thomas.langer@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-09 13:52:37 +01:00
Linus Walleij f98371476f pinctrl: qcom: ssbi-gpio: Fix fwspec parsing bug
We are parsing SSBI gpios as fourcell fwspecs but they are
twocell. Probably a simple copy-and-paste bug.

Tested on the APQ8060 DragonBoard and after this ethernet
and MMC card detection works again.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: stable@vger.kernel.org
Reviewed-by: Brian Masney <masneyb@onstation.org>
Fixes: ae436fe810 ("pinctrl: ssbi-gpio: convert to hierarchical IRQ helpers in gpio core")
Link: https://lore.kernel.org/r/20200306143416.1476250-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-09 13:52:37 +01:00
Alexandre Torgue 47beed513a pinctrl: stm32: Add level interrupt support to gpio irq chip
GPIO hardware block is directly linked to EXTI block but EXTI handles
external interrupts only on edge. To be able to handle GPIO interrupt on
level a "hack" is done in gpio irq chip: parent interrupt (exti irq chip)
is retriggered following interrupt type and gpio line value.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marek Vasut <marex@denx.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200219143229.18084-3-alexandre.torgue@st.com
2020-03-08 14:25:45 +00:00
John Stultz bec6c0ecb2 pinctrl: Remove use of driver_deferred_probe_check_state_continue()
With the earlier sanity fixes to
driver_deferred_probe_check_state() it should be usable for the
pinctrl logic here.

So tweak the logic to use driver_deferred_probe_check_state()
instead of driver_deferred_probe_check_state_continue()

Cc: linux-pm@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Todd Kjos <tkjos@google.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20200225050828.56458-4-john.stultz@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-04 18:11:44 +01:00
Baolin Wang 9eb81d69ad pinctrl: sprd: Fix the kconfig warning
On X86 plaform, if the CONFIG_OF is not selected, and set the
CONFIG_SPRD_SC9860 as 'm', that will cause below waring:

WARNING: unmet direct dependencies detected for PINCTRL_SPRD
  Depends on [n]: PINCTRL [=y] && OF [=n] && (ARCH_SPRD || COMPILE_TEST [=y])
  Selected by [m]:
  - PINCTRL_SPRD_SC9860 [=m] && PINCTRL [=y]

Thus move the configuration dependency under CONFIG_PINCTRL_SPRD_SC9860
to fix the warning.

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/eeb12d7843fb06f80e19f98eb25711231c3b610f.1583205650.git.baolin.wang7@gmail.com
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-03 13:46:05 +01:00
Paul Boddie a0bb89e844 pinctrl: ingenic: add hdmi-ddc pin control group
Signed-off-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/r/010d6ad3473fb4b1f1041888a071796180cdd838.1582913973.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-02 09:41:08 +01:00
Charles Keepax 3567ee83c4 pinctrl: madera: Add missing call to pinctrl_unregister_mappings
pinctrl_register_mappings is called in the pdata case, however a call to
pinctrl_unregister_mappings is missing causing the mappings to be leaked
on driver unbind. Add the missing call to correct this issue.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20200228154214.13916-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:34:23 +01:00
Charles Keepax aafd56fc79 pinctrl: core: Remove extra kref_get which blocks hogs being freed
kref_init starts with the reference count at 1, which will be balanced
by the pinctrl_put in pinctrl_unregister. The additional kref_get in
pinctrl_claim_hogs will increase this count to 2 and cause the hogs to
not get freed when pinctrl_unregister is called.

Fixes: 6118714275 ("pinctrl: core: Fix pinctrl_register_and_init() with pinctrl_enable()")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20200228154142.13860-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:32:41 +01:00
Gustavo A. R. Silva b87e4249c2 pinctrl: sirf/atlas7: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20200227185837.GA4469@embeddedor
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:30:10 +01:00
Baolin Wang 1df49cc80d pinctrl: sprd: Allow the SPRD pinctrl driver building into a module
Change the config to 'tristate' and export some symbols needed by modules
to allow the Spreadtrum pinctrl driver building into a module.

Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/d7239f3c7379e402f665fc8927f635ac56691380.1582776447.git.baolin.wang7@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:26:09 +01:00
Baolin Wang b88d145191 pinctrl: Export some needed symbols at module load time
Export the pin_get_name()/pinconf_generic_parse_dt_config() symbols needed
by the Spreadtrum pinctrl driver when building it as a module.

Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/f4e7e20afacb23e6fa7a6b33ea4319b2b3492840.1582776447.git.baolin.wang7@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-29 00:25:01 +01:00
YueHaibing 2353810dac pinctrl: da9062: Fix error gpiolib.h path
gcc 7.4.0 build fails:

drivers/pinctrl/pinctrl-da9062.c:28:10: fatal error: ../gpio/gpiolib.h: No such file or directory
 #include <../gpio/gpiolib.h>
          ^~~~~~~~~~~~~~~~~~~

Fix this wrong include path.

Fixes: 56cc3af4e8 ("pinctrl: da9062: add driver support")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200228063429.47528-1-yuehaibing@huawei.com
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-28 14:15:53 +01:00
Linus Walleij 819e8f804a pinctrl: sh-pfc: Updates for v5.7
- Improve checks for pinctrl table validation,
   - Miscellaneous cleanups.
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Merge tag 'sh-pfc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v5.7

  - Improve checks for pinctrl table validation,
  - Miscellaneous cleanups.
2020-02-26 16:08:48 +01:00
Dan Carpenter 3385ab72d9 pinctrl: mediatek: Fix some off by one bugs
These comparisons should be >= instead of > to prevent accessing one
element beyond the end of the hw->soc->pins[] array.

Fixes: 3de7deefce ("pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()")
Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20200218055247.74s2xa7veqx2do34@kili.mountain
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 17:11:40 +01:00
Leonard Crestez 4c48e549f3 pinctrl: imx: scu: Align imx sc msg structs to 4
The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have odd sizeofs.

This produces many oopses with CONFIG_KASAN=y.

Fix by marking with __aligned(4).

Fixes: b96eea718b ("pinctrl: fsl: add scu based pinctrl support")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Link: https://lore.kernel.org/r/bd7ad5fd755739a6d8d5f4f65e03b3ca4f457bd2.1582216144.git.leonard.crestez@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:33:27 +01:00
Josh Poimboeuf d6d43a9217 pinctrl: ingenic: Improve unreachable code generation
In the second loop of ingenic_pinconf_set(), it annotates the switch
default case as unreachable().  The annotation is technically correct,
because that same case would have resulted in an early function return
in the previous loop.

However, the compiled code is suboptimal.  GCC seems to work extra hard
to ensure that the unreachable code path triggers undefined behavior.
The function would fall through to start executing whatever function
happens to be next in the compilation unit.

This is problematic because:

  a) it adds unnecessary 'ensure undefined behavior' logic, and
     corresponding i-cache footprint; and

  b) it's less robust -- if a bug were to be introduced, falling through
     to the next function would be catastrophic.

Yet another issue is that, while objtool normally understands
unreachable() annotations, there's one special case where it doesn't:
when the annotation occurs immediately after a 'ret' instruction.  That
happens to be the case here because unreachable() is immediately before
the return.

Remove the unreachable() annotation and replace it with a comment.  This
simplifies the code generation and changes the unreachable error path to
just silently return instead of corrupting execution.

This fixes the following objtool warning:

  drivers/pinctrl/pinctrl-ingenic.o: warning: objtool: ingenic_pinconf_set() falls through to next function ingenic_pinconf_group_set()

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/bc20fdbcb826512cf76b7dfd0972740875931b19.1582212881.git.jpoimboe@redhat.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:30:43 +01:00
Nicolas Belin dc7a06b0db pinctrl: meson-gxl: fix GPIOX sdio pins
In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused
any issue so far because devices using these pins always take both pins
so the resulting configuration is OK.

Fixes: 0f15f500ff ("pinctrl: meson: Add GXL pinctrl definitions")
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Nicolas Belin <nbelin@baylibre.com>
Link: https://lore.kernel.org/r/1582204512-7582-1-git-send-email-nbelin@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:28:16 +01:00
Ansuel Smith 8d8cec9bf6 ipq8064: pinctrl: Fixed missing RGMII pincontrol definitions
Add missing gpio definition for mdio and rgmii2.

Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20200219175940.744-1-ansuelsmth@gmail.com
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 16:23:26 +01:00
Gustavo A. R. Silva aa0ed0d00f pinctrl: uniphier: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20200217185437.GA20901@embeddedor
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:36:24 +01:00
周琰杰 (Zhou Yanjie) b295474360 pinctrl: Ingenic: Add missing parts for X1830.
Add lcd pinctrl driver for X1830.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/1581851828-3493-3-git-send-email-zhouyanjie@wanyeetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:20:39 +01:00
Matti Vaittinen 3c82787359 pinctrl: Use new GPIO_LINE_DIRECTION
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0.

Main benefit is to make it easier to see which values mean IN and which
OUT. As a side effect this helps GPIO framework to change the direction
defines to something else if ever needed.

Please note that return value from get_direction call on
pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have
returned value 2 for direction INPUT.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:19:42 +01:00
Samuel Holland 8587b21c59 pinctrl: sunxi: Mask non-wakeup IRQs on suspend
The pin controller hardware does not distinguish IRQs intended for
wakeup from other IRQs, so we must mask non-wakeup IRQs in software to
prevent inadvertent wakeups. This is accomplished at the irqchip level
via the IRQCHIP_MASK_ON_SUSPEND flag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:16:08 +01:00
Samuel Holland a59c99d9ea pinctrl: sunxi: Forward calls to irq_set_irq_wake
The pinctrl irqchip may be connected to an irqchip that implements the
.irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs.
In order for GPIOs to be able to trigger wakeup, the IRQ from the
pinctrl to the upper irqchip must also be enabled for wakeup. Since the
kernel's IRQ core already manages the "wake_depth" of each IRQ, no
additional accounting is needed in the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-1-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-21 15:14:24 +01:00
Geert Uytterhoeven ffe9f9b051 pinctrl: sh-pfc: Remove use of ARCH_R8A7795
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112557.5924-1-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 6793baa31d pinctrl: sh-pfc: gpio: Return early in gpio_pin_to_irq()
As of commit 4adeabd042 ("pinctrl: sh-pfc: Remove hardcoded IRQ
numbers"), only a single operation needs to be performed after finding
the wanted pin.  Hence decrease the needed attention span of the casual
reader by replacing the goto by a direct return.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 92c44680c5 pinctrl: sh-pfc: checker: Add function GPIO checks
Add checks for legacy function GPIO descriptors:
  1. Function GPIOs must have a name,
  2. Names must be unique,
  3. Enum ID values must be unique.

This exposes bugs like those fixed in
  - commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
    TCLK1_B"),
  - commit 55b1cb1f03 ("pinctrl: sh-pfc: sh7264: Fix CAN function
    GPIOs"),
  - commit 02aeb2f215 ("pinctrl: sh-pfc: sh7269: Fix CAN function
    GPIOs"),
  - commit db9c07272c ("sh: sh7264: Remove bogus SSU GPIO function
    definitions"),
  - commit b4fba344a2 ("sh: sh7269: Remove bogus SSU GPIO function
    definitions").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-14-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 0e6cd847a4 pinctrl: sh-pfc: checker: Add data register checks
Add checks for data register descriptors:
  1. Register addresses must be unique.
  2. Enum ID values must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-13-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 4bd7d16a30 pinctrl: sh-pfc: checker: Add ioctrl register checks
Add checks for generic control register descriptors:
  1. Register addresses must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-12-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 8990cd297f pinctrl: sh-pfc: checker: Add bias register checks
Add checks for bias register descriptors:
  1. Pull-up and optional pull-down register addresses must be unique,
  2. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-11-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 08df16e07a pinctrl: sh-pfc: checker: Add drive strength register checks
Add checks for drive strength register descriptors:
  1. Register addresses must be unique,
  2. Register fields must be non-overlapping,
  3. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-10-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 40c8e4aad4 pinctrl: sh-pfc: checker: Improve pin group checks
Improve the checks for pin group descriptors:
  1. Introduce a local variable for the current group, to make the
     checks easier to read,
  2. Pin group names must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-9-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven a95b077db4 pinctrl: sh-pfc: checker: Improve pin function checks
Improve the checks for pin function descriptors:
  1. Merge declaration and assignment of the local variable for the
     current pin function,
  2. Pin function names must be unique.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-8-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 4ef30dc72d pinctrl: sh-pfc: checker: Improve pin checks
Improve the checks for pin descriptors:
  1. Introduce local variables for the current pin, to make the checks
     easier to read,
  2. Pins must have a name,
  3. Fix double printing of identical pin names.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-7-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 12d057bad6 pinctrl: sh-pfc: checker: Add check for enum ID conflicts
Add a helper to verify that enum IDs are unique, and use it to validate
the enum ID arrays in config register descriptors.

This exposes bugs like those fixed in:
  - commit 805f635703 ("pinctrl: sh-pfc: r8a7778: Fix duplicate
    SDSELF_B and SD1_CLK_B"),
  - commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
    TCLK1_B"),
  - commit 2a069a9281 ("pinctrl: sh-pfc: sh7264: Fix Port K I/O
    Register 0 definition").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-6-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 3c26186472 pinctrl: sh-pfc: checker: Add check for config register conflicts
Add a helper to verify that register addresses are unique, and use it to
validate config register descriptors.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-5-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven 1251887c0c pinctrl: sh-pfc: checker: Add helper for safe name comparison
Add a helper to check if two strings are identical, skipping NULL
pointers.  This simplifies callers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-4-geert+renesas@glider.be
2020-02-21 13:57:44 +01:00
Geert Uytterhoeven c3f8dcee7a pinctrl: sh-pfc: checker: Add helpers for reporting
Add helpers to report errors and warnings, and to increase the
corresponding counters.  This simplifies callers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-3-geert+renesas@glider.be
2020-02-21 13:57:40 +01:00
YueHaibing 86ecb7d685 pinctrl: mediatek: remove set but not used variable 'e'
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c: In function mtk_hw_pin_field_lookup:
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:70:39: warning:
 variable e set but not used [-Wunused-but-set-variable]

Since commit 3de7deefce ("pinctrl: mediatek: Check gpio pin
number and use binary search in mtk_hw_pin_field_lookup()"),
it is not used any more, so remove it, also remove redundant
assignment to variable c, it will be assigned a new value later
before used.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20200218023625.14324-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-20 16:13:31 +01:00
Marco Felsch 56cc3af4e8 pinctrl: da9062: add driver support
The DA9062 is a mfd pmic device which supports 5 GPIOs. The GPIOs can
be used as input, output or have a special use-case.

The patch adds the support for the normal input/output use-case.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.kernel.org/r/20200108104746.1765-4-m.felsch@pengutronix.de
Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-19 17:16:31 +01:00
Stefan Wahren b1d84a3d0a pinctrl: bcm2835: Add support for all GPIOs on BCM2711
The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1581166975-22949-4-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:49:28 +01:00
Stefan Wahren 90bfaf028d pinctrl: bcm2835: Refactor platform data
This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:48:11 +01:00
Stefan Wahren be30d5de0a pinctrl: bcm2835: Drop unused define
There is no usage for this define, so drop it.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1580148908-4863-2-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:46:47 +01:00
Matheus Castello 6f87359e8b pinctrl: actions: Fix functions groups names for S700 SoC
Group names by function do not match their respective structures and
documentation defined names.

This fixes following errors when groups names defined on documentation are used:
[    4.262778] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_d1_mfp" for function "sd0"
[    4.271394] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_d2_d3_mfp" for function "sd0"
[    4.280248] pinctrl-s700 e01b0000.pinctrl: invalid group "sd1_d0_d3_mfp" for function "sd0"
[    4.289122] pinctrl-s700 e01b0000.pinctrl: invalid group "sd0_cmd_mfp" for function "sd0"

Fixes: 81c9d563cc (pinctrl: actions: Add Actions Semi S700 pinctrl driver)
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Link: https://lore.kernel.org/r/20200124133758.10089-1-matheus@castello.eng.br
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:43:35 +01:00
Light Hsieh 184d8e13f9 pinctrl: mediatek: Add support for pin configuration dump via debugfs.
Add support for pin configuration dump via catting
/sys/kernel/debug/pinctrl/$platform_dependent_path/pinconf-pins.
pinctrl framework had already support such dump. This patch implement the
operation function pointer to fullfill this dump.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-6-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:38:26 +01:00
Light Hsieh cafe19db77 pinctrl: mediatek: Backward compatible to previous Mediatek's bias-pull usage
Refine mtk_pinconf_set()/mtk_pinconf_get() for backward compatibility to
previous MediaTek's bias-pull usage.
In PINCTRL_MTK that use pinctrl-mtk-common.c, bias-pull setting for pins
with 2 pull resistors can be specified as value for bias-pull-up and
bias-pull-down. For example:
    bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
    bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
    bias-pull-down = <MTK_PUPD_SET_R1R0_11>;

On the other hand, PINCTRL_MTK_PARIS use customized properties
"mediatek,pull-up-adv" and "mediatek,pull-down-adv" to specify bias-pull
setting for pins with 2 pull resistors.
This introduce in-compatibility in device tree and increase porting
effort to MediaTek's customer that had already used PINCTRL_MTK version.
Besides, if customers are not aware of this change and still write devicetree
for PINCTRL_MTK version, they may encounter runtime failure with pinctrl and
spent time to debug.

This patch adds backward compatible to previous MediaTek's bias-pull usage
so that Mediatek's customer need not use a new devicetree property name.
The rationale is that: changing driver implementation had better leave
interface unchanged.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-5-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:36:49 +01:00
Light Hsieh 1bea6afbc8 pinctrl: mediatek: Refine mtk_pinconf_get()
Correct cases for PIN_CONFIG_SLEW_RATE, PIN_CONFIG_INPUT_SCHMITT_ENABLE,
and PIN_CONFIG_OUTPUT_ENABLE -
Use variable ret to receive value in mtk_hw_get_value() (instead of
variable val) since pinconf_to_config_packed() at end of this function
use variable ret to pack config value.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-4-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:32:49 +01:00
Light Hsieh 3599cc5254 pinctrl: mediatek: Refine mtk_pinconf_get() and mtk_pinconf_set()
1.Refine mtk_pinconf_get():
  Use only one occurrence of return at end of this function.

2.Refine mtk_pinconf_set():
2.1 Use only one occurrence of return at end of this function.
2.2 Modify case of PIN_CONFIG_INPUT_ENABLE -
2.2.1
    Regard all non-zero setting value as enable, instead of always enable.
2.2.2
    Remove check of ies_present flag and always invoke mtk_hw_set_value()
    since mtk_hw_pin_field_lookup() invoked inside mtk_hw_set_value() has
    the same effect of checking if ies control is supported.
    [The rationale is that: available of a control is always checked
     in mtk_hw_pin_field_lookup() and no need to add ies_present flag
     specially for ies control.]
2.3 Simply code logic for case of PIN_CONFIG_INPUT_SCHMITT.
2.4 Add case for PIN_CONFIG_INPUT_SCHMITT_ENABLE and process it with the
    same code for case of PIN_CONFIG_INPUT_SCHMITT.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-3-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:31:18 +01:00
Light Hsieh 5f755e1f1e pinctrl: mediatek: Supporting driving setting without mapping current to register value
MediaTek's smartphone project actual usage does need to know current value
(in mA) in procedure of finding the best driving setting.
The steps in the procedure is like as follow:

1. set driving setting field in setting register as 0, measure waveform,
   perform test, and etc.
2. set driving setting field in setting register as 1, measure waveform,
   perform test, and etc.
...
n. set driving setting field in setting register as n-1, measure
   waveform, perform test, and etc.
Check the results of steps 1~n and adopt the setting that get best result.

This procedure does need to know the mapping between current to register
value.
Therefore, setting driving without mapping current is more practical for
MediaTek's smartphone usage.

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-2-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:29:09 +01:00
Light Hsieh 3de7deefce pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()
1. Check if gpio pin number is in valid range to prevent from get invalid
   pointer 'desc' in the following code:
	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];

2. Improve  mtk_hw_pin_field_lookup()
2.1 Modify mtk_hw_pin_field_lookup() to use binary search for accelerating
     search.
2.2 Correct message after the following check fail:
    if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) {
		rc = &hw->soc->reg_cal[field];
    The original message is:
    	"Not support field %d for pin %d (%s)\n"
    However, the check is on soc chip level, not on pin level yet.
    So the message is corrected as:
    	"Not support field %d for this soc\n"

Signed-off-by: Light Hsieh <light.hsieh@mediatek.com>
Link: https://lore.kernel.org/r/1579675994-7001-1-git-send-email-light.hsieh@mediatek.com
Acked-by: Sean Wang <sean.wang@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:26:29 +01:00
Sricharan R ef1ea54eab pinctrl: qcom: Add ipq6018 pinctrl driver
Add initial pinctrl driver to support pin configuration with
pinctrl framework for ipq6018.

Co-developed-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lore.kernel.org/r/1579439601-14810-3-git-send-email-sricharan@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-14 11:17:04 +01:00
Geert Uytterhoeven 264716935e pinctrl: sh-pfc: checker: Move data before code
Restructure the checker to move all data definitions to the top, before
the code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-2-geert+renesas@glider.be
2020-02-10 14:12:11 +01:00
Randy Dunlap 9a8c8b431b pinctrl: fix pxa2xx.c build warnings
Add #include of <linux/pinctrl/machine.h> to fix build
warnings in pinctrl-pxa2xx.c.  Fixes these warnings:

In file included from ../drivers/pinctrl/pxa/pinctrl-pxa2xx.c:24:0:
../drivers/pinctrl/pxa/../pinctrl-utils.h:36:8: warning: `enum pinctrl_map_type' declared inside parameter list [enabled by default]
   enum pinctrl_map_type type);
        ^
../drivers/pinctrl/pxa/../pinctrl-utils.h:36:8: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]

Link: http://lkml.kernel.org/r/0024542e-cba9-8f13-6c18-32d0050a6007@infradead.org
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-02-04 03:05:24 +00:00
Linus Torvalds 6ba3d7066c This is the bulk of pin control changes for the v5.6 kernel cycle:
Core changes:
 
 - Dropped the chained IRQ setup callback into GPIOLIB as we
   got rid of the last users of that in this changeset.
 
 New drivers:
 
 - New driver for Ingenic X1830.
 
 - New driver for Freescale i.MX8MP.
 
 Driver enhancements:
 
 - Fix all remaining Intel drivers to pass their IRQ chips
   along with the GPIO chips.
 
 - Intel Baytrail allocates its irqchip dynamically.
 
 - Intel Lynxpoint is thoroughly rewritten and modernized.
 
 - Aspeed AST2600 pin muxing and configuration is much
   improved.
 
 - Qualcomm SC7180 functions are updated and wakeup interrupt
   map is provided.
 
 - A whole slew of Renesas SH-PFC cleanups and improvements.
 
 - Fix up the Intel DT bindings to use the generic YAML
   DT bindings schema. (A first user of this.)
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Merge tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes, nothing too exciting about
  this.

  Some changes hit arch/sh and arch/arm but are well isolated and
  acknowledged by the respective arch maintainers.

  Core changes:

   - Dropped the chained IRQ setup callback into GPIOLIB as we got rid
     of the last users of that in this changeset.

  New drivers:

   - New driver for Ingenic X1830.

   - New driver for Freescale i.MX8MP.

  Driver enhancements:

   - Fix all remaining Intel drivers to pass their IRQ chips along with
     the GPIO chips.

   - Intel Baytrail allocates its irqchip dynamically.

   - Intel Lynxpoint is thoroughly rewritten and modernized.

   - Aspeed AST2600 pin muxing and configuration is much improved.

   - Qualcomm SC7180 functions are updated and wakeup interrupt map is
     provided.

   - A whole slew of Renesas SH-PFC cleanups and improvements.

   - Fix up the Intel DT bindings to use the generic YAML DT bindings
     schema (a first user of this)"

* tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
  pinctrl: madera: Remove extra blank line
  pinctrl: qcom: Don't lock around irq_set_irq_wake()
  pinctrl: mvebu: armada-37xx: use use platform api
  gpio: Drop the chained IRQ handler assign function
  pinctrl: freescale: Add i.MX8MP pinctrl driver support
  dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
  pinctrl: tigerlake: Tiger Lake uses _HID enumeration
  pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID
  pinctrl: iproc: Use platform_get_irq_optional() to avoid error message
  pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema
  pinctrl: intel: Pass irqchip when adding gpiochip
  pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
  pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output
  pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins
  pinctrl: sunrisepoint: Add missing Interrupt Status register offset
  pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
  pinctrl: artpec6: fix __iomem on reg in set
  pinctrl: ingenic: Use devm_platform_ioremap_resource()
  pinctrl: ingenic: Factorize irq_set_type function
  pinctrl: ingenic: Remove duplicated ingenic_chip_info structures
  ...
2020-01-29 09:51:36 -08:00
Linus Torvalds fa889d8555 This is the bulk of GPIO changes for the v5.6 kernel cycle
Core changes:
 
 - Document the usecases for the kernelspace vs userspace
   handling of GPIOs.
 
 - Handle MSI (message signalled interrupts) properly in the
   core hierarchical irqdomain code.
 
 - Fix a rare race condition while initializing the descriptor
   array.
 
 New drivers:
 
 - Xylon LogiCVC GPIO driver.
 
 - WDC934x GPIO controller driver.
 
 Driver improvements:
 
 - Implemented suspend/resume in the Tegra driver.
 
 - MPC8xx edge detection fixup.
 
 - Properly convert ThunderX to use hierarchical irqdomain
   with GPIOLIB_IRQCHIP on top of the revert of the previous
   buggy switchover. This time it works (hopefully).
 
 Misc:
 
 - Drop a FMC remnant file <linux/ipmi-fru.h>
 
 - A slew of fixes.
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Merge tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v5.6 kernel cycle.

  This is a pretty calm cycle so far, nothing special going on really.
  Some more changes will come in from the irqchip and pin control trees.

  I also deleted an orphan include file for FMC that was dangling since
  subsystem was removed.

  Core changes:

   - Document the usecases for the kernelspace vs userspace handling of
     GPIOs.

   - Handle MSI (message signalled interrupts) properly in the core
     hierarchical irqdomain code.

   - Fix a rare race condition while initializing the descriptor array.

  New drivers:

   - Xylon LogiCVC GPIO driver.

   - WDC934x GPIO controller driver.

  Driver improvements:

   - Implemented suspend/resume in the Tegra driver.

   - MPC8xx edge detection fixup.

   - Properly convert ThunderX to use hierarchical irqdomain with
     GPIOLIB_IRQCHIP on top of the revert of the previous buggy
     switchover. This time it works (hopefully).

  Misc:

   - Drop a FMC remnant file <linux/ipmi-fru.h>

   - A slew of fixes"

* tag 'gpio-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (48 commits)
  MAINTAINERS: Replace Tien Hock Loh as Altera PIO maintainer
  gpiolib: hold gpio devices lock until ->descs array is initialised
  gpio: aspeed-sgpio: fixed typos
  gpio: mvebu: clear irq in edge cause register before unmask edge irq
  gpiolib: Lower verbosity when allocating hierarchy irq
  gpiolib: Remove duplicated function gpio_do_set_config()
  gpio: Fix the no return statement warning
  gpio: wcd934x: Add support to wcd934x gpio controller
  gpiolib: remove set but not used variable 'config'
  gpio: vx855: fixed a typo
  gpio: mockup: sort headers alphabetically
  gpio: mockup: update the license tag
  gpio: Remove the unused flags
  gpiolib: Set lockdep class for hierarchical irq domains
  gpio: thunderx: Switch to GPIOLIB_IRQCHIP
  gpiolib: Add the support for the msi parent domain
  gpiolib: Add support for the irqdomain which doesn't use irq_fwspec as arg
  gpio: Add use guidance documentation
  dt-bindings: gpio: wcd934x: Add bindings for gpio
  gpio: altera: change to platform_get_irq_optional to avoid false-positive error
  ...
2020-01-29 09:43:39 -08:00
Linus Torvalds 6a1000bd27 ioremap changes for 5.6
- remove ioremap_nocache given that is is equivalent to
    ioremap everywhere
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Merge tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap

Pull ioremap updates from Christoph Hellwig:
 "Remove the ioremap_nocache API (plus wrappers) that are always
  identical to ioremap"

* tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap:
  remove ioremap_nocache and devm_ioremap_nocache
  MIPS: define ioremap_nocache to ioremap
2020-01-27 13:03:00 -08:00
Linus Torvalds 9e1af7567b MMC core:
- Convert to reasonable timeouts for all CMD6 commands (updates for BKOPS,
    CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
  - Respect f_max clock rate at card initialization
  - Add gpiod_toggle_active_low() API
  - Consolidate slot-gpio code by using gpiod_toggle_active_low()
 
 MMC host:
  - Add pinctrl_select_default_state() API
  - Consolidate pintctrl code by using pinctrl_select_default_state()
  - mmci: Support any block sizes for SDIO for some variants
  - mmci: Enable reset control for stm32_sdmmc
  - mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
  - renesas_sdhi: Add support for the r8a77961 variant
  - renesas_sdhi: A few minor improvements
  - rockchip-dw-mshc: Add support for the rk3308 variant
  - sdhci: Enable support for external DMA controllers
  - sdhci: Fixup error path when sending CMD12
  - sdhci-brcmstb: Add support for 7216b0 variant
  - sdhci-brcmstb: Add support for command queuing (CQHCI)
  - sdhci-brcmstb: Add support for eMMC HS400ES mode
  - sdhci-msm: Add support for the sc7180 variant
  - sdhci-msm: Add support for command queuing (CQHCI)
  - sdhci-of-at91: Add support for the SAM9x60 variant
  - sdhci-of-at91: Improve support for tunings
  - sdhci-of-esdhc: A few fixups for some clock related issues
  - sdhci-omap: Add support for the am335x and the am437x variants
  - sdhci-omap: Improve support for erase operations
  - sdhci-omap: Add support for external DMA
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Merge tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "There are no updates for the MEMSTICK subsystem this time. But note
  that I am also carrying a patch from the pinctrl tree, which has been
  shared through an immutable branch.

  Summary:

  MMC core:
   - Convert to reasonable timeouts for all CMD6 commands (updates for
     BKOPS, CACHE_FLUSH and INAND_CMD38_ARG_EXT_CSD) for eMMC
   - Respect f_max clock rate at card initialization
   - Add gpiod_toggle_active_low() API
   - Consolidate slot-gpio code by using gpiod_toggle_active_low()

  MMC host:
   - Add pinctrl_select_default_state() API
   - Consolidate pintctrl code by using pinctrl_select_default_state()
   - mmci: Support any block sizes for SDIO for some variants
   - mmci: Enable reset control for stm32_sdmmc
   - mmc_spi: Toggle SPI_CS_HIGH polarity rather than hard-coding it
   - renesas_sdhi: Add support for the r8a77961 variant
   - renesas_sdhi: A few minor improvements
   - rockchip-dw-mshc: Add support for the rk3308 variant
   - sdhci: Enable support for external DMA controllers
   - sdhci: Fixup error path when sending CMD12
   - sdhci-brcmstb: Add support for 7216b0 variant
   - sdhci-brcmstb: Add support for command queuing (CQHCI)
   - sdhci-brcmstb: Add support for eMMC HS400ES mode
   - sdhci-msm: Add support for the sc7180 variant
   - sdhci-msm: Add support for command queuing (CQHCI)
   - sdhci-of-at91: Add support for the SAM9x60 variant
   - sdhci-of-at91: Improve support for tunings
   - sdhci-of-esdhc: A few fixups for some clock related issues
   - sdhci-omap: Add support for the am335x and the am437x variants
   - sdhci-omap: Improve support for erase operations
   - sdhci-omap: Add support for external DMA"

* tag 'mmc-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (89 commits)
  mmc: core: Default to generic_cmd6_time as timeout in __mmc_switch()
  mmc: block: Use generic_cmd6_time when modifying INAND_CMD38_ARG_EXT_CSD
  mmc: core: Specify timeouts for BKOPS and CACHE_FLUSH for eMMC
  mmc: sdhci-cadence: remove unneeded 'inline' marker
  dt-bindings: mmc: rockchip-dw-mshc: add description for rk3308
  dt-bindings: mmc: convert rockchip dw-mshc bindings to yaml
  dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
  mmc: sdhci-msm: Add CQHCI support for sdhci-msm
  mmc: sdhci: Let a vendor driver supply and update ADMA descriptor size
  mmc: sdhci-of-esdhc: fix serious issue clock is always disabled
  mmc: sdhci-of-esdhc: fix transfer mode register reading
  mmc: sdhci-brcmstb: Fix incorrect switch to HS mode
  mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)
  mmc: sdhci-brcmstb: Add shutdown callback
  mmc: sdhci-brcmstb: Fix driver to defer on clk_get defer
  mmc: sdhci-brcmstb: Add ability to use HS400ES transfer mode
  dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 7216b0
  mmc: core: limit probe clock frequency to configured f_max
  mmc: sdhci-milbeaut: Remove redundant platform_get_irq error message
  mmc: sdhci: fix an issue of mixing different types
  ...
2020-01-27 10:30:42 -08:00
Charles Keepax 122ce22cb3 pinctrl: madera: Remove extra blank line
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20200122111150.11033-1-ckeepax@opensource.cirrus.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-24 00:31:41 +01:00
Stephen Boyd 1d44616e75 pinctrl: qcom: Don't lock around irq_set_irq_wake()
We don't need to hold the local pinctrl lock here to set irq wake on the
summary irq line. Doing so only leads to lockdep warnings instead of
protecting us from anything. Remove the locking.

 WARNING: possible circular locking dependency detected
 5.4.11 #2 Tainted: G        W
 ------------------------------------------------------
 cat/3083 is trying to acquire lock:
 ffffff81f4fa58c0 (&irq_desc_lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94

 but task is already holding lock:
 ffffff81f4880c18 (&pctrl->lock){-.-.}, at: msm_gpio_irq_set_wake+0x48/0x7c

 which lock already depends on the new lock.

 the existing dependency chain (in reverse order) is:

 -> #1 (&pctrl->lock){-.-.}:
        _raw_spin_lock_irqsave+0x64/0x80
        msm_gpio_irq_ack+0x68/0xf4
        __irq_do_set_handler+0xe0/0x180
        __irq_set_handler+0x60/0x9c
        irq_domain_set_info+0x90/0xb4
        gpiochip_hierarchy_irq_domain_alloc+0x110/0x200
        __irq_domain_alloc_irqs+0x130/0x29c
        irq_create_fwspec_mapping+0x1f0/0x300
        irq_create_of_mapping+0x70/0x98
        of_irq_get+0xa4/0xd4
        spi_drv_probe+0x4c/0xb0
        really_probe+0x138/0x3f0
        driver_probe_device+0x70/0x140
        __device_attach_driver+0x9c/0x110
        bus_for_each_drv+0x88/0xd0
        __device_attach+0xb0/0x160
        device_initial_probe+0x20/0x2c
        bus_probe_device+0x34/0x94
        device_add+0x35c/0x3f0
        spi_add_device+0xbc/0x194
        of_register_spi_devices+0x2c8/0x408
        spi_register_controller+0x57c/0x6fc
        spi_geni_probe+0x260/0x328
        platform_drv_probe+0x90/0xb0
        really_probe+0x138/0x3f0
        driver_probe_device+0x70/0x140
        device_driver_attach+0x4c/0x6c
        __driver_attach+0xcc/0x154
        bus_for_each_dev+0x84/0xcc
        driver_attach+0x2c/0x38
        bus_add_driver+0x108/0x1fc
        driver_register+0x64/0xf8
        __platform_driver_register+0x4c/0x58
        spi_geni_driver_init+0x1c/0x24
        do_one_initcall+0x1a4/0x3e8
        do_initcall_level+0xb4/0xcc
        do_basic_setup+0x30/0x48
        kernel_init_freeable+0x124/0x1a8
        kernel_init+0x14/0x100
        ret_from_fork+0x10/0x18

 -> #0 (&irq_desc_lock_class){-.-.}:
        __lock_acquire+0xeb4/0x2388
        lock_acquire+0x1cc/0x210
        _raw_spin_lock_irqsave+0x64/0x80
        __irq_get_desc_lock+0x64/0x94
        irq_set_irq_wake+0x40/0x144
        msm_gpio_irq_set_wake+0x5c/0x7c
        set_irq_wake_real+0x40/0x5c
        irq_set_irq_wake+0x70/0x144
        cros_ec_rtc_suspend+0x38/0x4c
        platform_pm_suspend+0x34/0x60
        dpm_run_callback+0x64/0xcc
        __device_suspend+0x310/0x41c
        dpm_suspend+0xf8/0x298
        dpm_suspend_start+0x84/0xb4
        suspend_devices_and_enter+0xbc/0x620
        pm_suspend+0x210/0x348
        state_store+0xb0/0x108
        kobj_attr_store+0x14/0x24
        sysfs_kf_write+0x4c/0x64
        kernfs_fop_write+0x15c/0x1fc
        __vfs_write+0x54/0x18c
        vfs_write+0xe4/0x1a4
        ksys_write+0x7c/0xe4
        __arm64_sys_write+0x20/0x2c
        el0_svc_common+0xa8/0x160
        el0_svc_handler+0x7c/0x98
        el0_svc+0x8/0xc

 other info that might help us debug this:

  Possible unsafe locking scenario:

        CPU0                    CPU1
        ----                    ----
   lock(&pctrl->lock);
                                lock(&irq_desc_lock_class);
                                lock(&pctrl->lock);
   lock(&irq_desc_lock_class);

  *** DEADLOCK ***

 7 locks held by cat/3083:
  #0: ffffff81f06d1420 (sb_writers#7){.+.+}, at: vfs_write+0xd0/0x1a4
  #1: ffffff81c8935680 (&of->mutex){+.+.}, at: kernfs_fop_write+0x12c/0x1fc
  #2: ffffff81f4c322f0 (kn->count#337){.+.+}, at: kernfs_fop_write+0x134/0x1fc
  #3: ffffffe89a641d60 (system_transition_mutex){+.+.}, at: pm_suspend+0x108/0x348
  #4: ffffff81f190e970 (&dev->mutex){....}, at: __device_suspend+0x168/0x41c
  #5: ffffff81f183d8c0 (lock_class){-.-.}, at: __irq_get_desc_lock+0x64/0x94
  #6: ffffff81f4880c18 (&pctrl->lock){-.-.}, at: msm_gpio_irq_set_wake+0x48/0x7c

 stack backtrace:
 CPU: 4 PID: 3083 Comm: cat Tainted: G        W         5.4.11 #2
 Hardware name: Google Cheza (rev3+) (DT)
 Call trace:
  dump_backtrace+0x0/0x174
  show_stack+0x20/0x2c
  dump_stack+0xc8/0x124
  print_circular_bug+0x2ac/0x2c4
  check_noncircular+0x1a0/0x1a8
  __lock_acquire+0xeb4/0x2388
  lock_acquire+0x1cc/0x210
  _raw_spin_lock_irqsave+0x64/0x80
  __irq_get_desc_lock+0x64/0x94
  irq_set_irq_wake+0x40/0x144
  msm_gpio_irq_set_wake+0x5c/0x7c
  set_irq_wake_real+0x40/0x5c
  irq_set_irq_wake+0x70/0x144
  cros_ec_rtc_suspend+0x38/0x4c
  platform_pm_suspend+0x34/0x60
  dpm_run_callback+0x64/0xcc
  __device_suspend+0x310/0x41c
  dpm_suspend+0xf8/0x298
  dpm_suspend_start+0x84/0xb4
  suspend_devices_and_enter+0xbc/0x620
  pm_suspend+0x210/0x348
  state_store+0xb0/0x108
  kobj_attr_store+0x14/0x24
  sysfs_kf_write+0x4c/0x64
  kernfs_fop_write+0x15c/0x1fc
  __vfs_write+0x54/0x18c
  vfs_write+0xe4/0x1a4
  ksys_write+0x7c/0xe4
  __arm64_sys_write+0x20/0x2c
  el0_svc_common+0xa8/0x160
  el0_svc_handler+0x7c/0x98
  el0_svc+0x8/0xc

Fixes: 6aced33f49 ("pinctrl: msm: drop wake_irqs bitmap")
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Brian Masney <masneyb@onstation.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200121180950.36959-1-swboyd@chromium.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-24 00:31:41 +01:00
Peng Fan 06e26b75f5 pinctrl: mvebu: armada-37xx: use use platform api
platform_irq_count() and platform_get_irq() is the more generic
way (independent of device trees) to determine the count of available
interrupts. So use this instead.

As platform_irq_count() might return an error code (which
of_irq_count doesn't) some additional handling is necessary.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/1576672860-14420-1-git-send-email-peng.fan@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-23 16:06:11 +01:00
Anson Huang eec6d97d6d pinctrl: freescale: Add i.MX8MP pinctrl driver support
Add the pinctrl driver support for i.MX8MP.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/1579052348-32167-2-git-send-email-Anson.Huang@nxp.com
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-23 15:49:39 +01:00