Commit Graph

19 Commits

Author SHA1 Message Date
Neil Armstrong 09992025da
spi: meson-spicc: add local pow2 clock ops to preserve rate between messages
At the end of a message, the HW gets a reset in meson_spicc_unprepare_transfer(),
this resets the SPICC_CONREG register and notably the value set by the
Common Clock Framework.

This is problematic because:
- the register value CCF can be different from the corresponding CCF cached rate
- CCF is allowed to change the clock rate whenever the HW state

This introduces:
- local pow2 clock ops checking the HW state before allowing a clock operation
- separation of legacy pow2 clock patch and new enhanced clock path
- SPICC_CONREG datarate value is now value kepts across messages

It has been checked that:
- SPICC_CONREG datarate value is kept across messages
- CCF is only allowed to change the SPICC_CONREG datarate value when busy
- SPICC_CONREG datarate value is correct for each transfer

This didn't appear before commit 3e0cf4d3fc ("spi: meson-spicc: add a linear clock divider support")
because we recalculated and wrote the rate for each xfer.

Fixes: 3e0cf4d3fc ("spi: meson-spicc: add a linear clock divider support")
Reported-by: Da Xue <da@libre.computer>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220811134445.678446-1-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-11 18:41:44 +01:00
Miaoqian Lin e937440f7f
spi: meson-spicc: add IRQ check in meson_spicc_probe
This check misses checking for  platform_get_irq()'s call and may passes
the negative error codes to devm_request_irq(), which takes unsigned IRQ #,
causing it to fail with -EINVAL, overriding an original error code.
Stop calling devm_request_irq() with invalid IRQ #s.

Fixes: 454fa271bc ("spi: Add Meson SPICC driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220126110447.24549-1-linmq006@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-26 13:32:36 +00:00
Dongliang Mu 8311ee2164
spi: meson-spicc: fix memory leak in meson_spicc_remove
In meson_spicc_probe, the error handling code needs to clean up master
by calling spi_master_put, but the remove function does not have this
function call. This will lead to memory leak of spicc->master.

Reported-by: Dongliang Mu <mudongliangabcd@gmail.com>
Fixes: 454fa271bc4e("spi: Add Meson SPICC driver")
Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com>
Link: https://lore.kernel.org/r/20210720100116.1438974-1-mudongliangabcd@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-07-22 16:02:22 +01:00
zpershuai b2d501c134
spi: meson-spicc: fix memory leak in meson_spicc_probe
when meson_spicc_clk_init returns failed, it should goto the
out_clk label.

Signed-off-by: zpershuai <zpershuai@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/1623562156-21995-1-git-send-email-zpershuai@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14 15:05:02 +01:00
zpershuai 95730d5eb7
spi: meson-spicc: fix a wrong goto jump for avoiding memory leak.
In meson_spifc_probe function, when enable the device pclk clock is
error, it should use clk_disable_unprepare to release the core clock.

Signed-off-by: zpershuai <zpershuai@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/1623562172-22056-1-git-send-email-zpershuai@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14 15:05:01 +01:00
Lee Jones d9b883aeae
spi: spi-meson-spicc: Remove set but never used variable 'data' from meson_spicc_reset_fifo()
Looks like it hasn't ever been checked.

Fixes the following W=1 kernel build warning(s):

 drivers/spi/spi-meson-spicc.c: In function ‘meson_spicc_reset_fifo’:
 drivers/spi/spi-meson-spicc.c:365:6: warning: variable ‘data’ set but not used [-Wunused-but-set-variable]
 365 | u32 data;
 | ^~~~

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-amlogic@lists.infradead.org
Link: https://lore.kernel.org/r/20200717135424.2442271-7-lee.jones@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-17 16:38:48 +01:00
Neil Armstrong 4e3d322058
spi: meson-spicc: add support for Amlogic G12A
Add support for the SPICC controllers on the Amlogic G12A SoCs family.

The G12A SPICC controllers inherit from the AXG enhanced registers but
takes an external pclk for the baud rate generator and can achieve up to
166MHz SCLK.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200312133131.26430-10-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:55 +00:00
Neil Armstrong 0eb707ac7d
spi: meson-spicc: adapt burst handling for G12A support
The G12A SPICC controller variant has a different FIFO size and doesn't
handle the RX Half interrupt the same way as GXL & AXG variants.

Thus simplify the burst management and take in account a variable FIFO
size.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200312133131.26430-8-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:54 +00:00
Neil Armstrong f27bff479e
spi: meson-spicc: setup IO line delay
Now the controller can support frequencies higher than 30MHz, we need
the setup the I/O line delays in regard of the SPI clock frequency.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200312133131.26430-7-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:53 +00:00
Neil Armstrong 8791068dab
spi: meson-spicc: add min sclk for each compatible
The G12A SPICC controller variant takes the source clock from a specific
clock instead of the bus clock.
The minimal clock calculus won't work with the G12A support, thus add the
minimal supported clock for each variant and pass this to the SPI core.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200312133131.26430-6-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:53 +00:00
Neil Armstrong 3196816ff6
spi: meson-spicc: support max 80MHz clock
The SPICC controller in Meson-AXG is capable of running at 80M clock.
The ASIC IP is improved and the clock is actually running higher than
previous old SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20200312133131.26430-5-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:52 +00:00
Sunny Luo 3e0cf4d3fc
spi: meson-spicc: add a linear clock divider support
The SPICC controller in Meson-AXG SoC is capable of using
a linear clock divider to reach a much fine tuned range of clocks,
while the old controller only use a power of two clock divider,
result at a more coarse clock range.

Also convert the clock registration into Common Clock Framework.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20200312133131.26430-4-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:51 +00:00
Sunny Luo a6cda1f905
spi: meson-spicc: enhance output enable feature
The SPICC controller in Meson-AXG is capable of driving the CLK/MOSI/SS
signal lines through the idle state (between two transmission operation),
which avoid the signals floating in unexpected state.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20200312133131.26430-3-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:50 +00:00
Neil Armstrong b9dfb20eed
spi: meson-spicc: remove unused variables
Remove unused variables from spicc data struct.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200312133131.26430-2-narmstrong@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2020-03-12 17:22:49 +00:00
Linus Walleij cd8fb859a8
spi: meson-spicc: Use GPIO descriptors
Instead of grabbing GPIOs using the legacy interface and
handling them in the setup callback, just let the core
grab and use the GPIOs using descriptors.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20191205083915.27650-1-linus.walleij@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-16 11:58:48 +00:00
YueHaibing 362385c045
spi: meson-spicc: use devm_platform_ioremap_resource() to simplify code
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20190904135918.25352-16-yuehaibing@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-04 17:18:55 +01:00
Alexey Khoroshilov ded5fa4e8b
spi: meson-spicc: Fix error handling in meson_spicc_probe()
If devm_spi_register_master() fails in meson_spicc_probe(),
spicc->core is left undisabled. The patch fixes that.

Found by Linux Driver Verification project (linuxtesting.org).

Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-05-02 05:59:21 +09:00
Sunny Luo a5db27c00d
spi: meson-axg: add SPICC driver support
Add new compatible string to support SPICC controller which
found at Amlogic Meson-AXG SoC. This is aiming at adding
a couple of enhanced feature patches.

Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-28 20:21:31 +00:00
Neil Armstrong 454fa271bc spi: Add Meson SPICC driver
The SPICC hardware block on the Amlogic SoCs is Communication oriented and
can do Full-Duplex 8- to 32-bit width SPI transfers up to 30MHz.

The current driver only supportd the PIO transfer mode since the DMA seems
broken on available hardware.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-24 18:19:25 +01:00