The current GPL only licensing on the device tree makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our device trees under a GPL/X11 dual-license.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
- kirkwood
- Add d2 Network v2 board
- mvebu
- Add Armada 375 ethernet node
- Add CA9 MPcore SoC controller node
- Add support for dynamic freq scaling on Armada XP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZ0+AAoJEP45WPkGe8ZnuS8P/A9ARBOZHfRAjWY+jFRgiDl4
eC+e6Iad1J6hQ4oWvK0KKLajvHc7GoPJIX8axFotXfoMEJJePPYM9Ye3TxtFPLU6
xhiB9yakk4/EFhx0N223P7gBCnpwxEnSTVTKrx3nRVIWlDPfw7kV33JgMiExFXZB
9idpAAHzvkSGIM4JNRc65YC+Auy3Pe++yLiMaAXwyscA7ucZZouot7MUCHnY+J6M
BoKec244nMWSk6FzWWx2EEPQ4wTUoNpYh5tM6Y7JV8mtgIKLYe0gTseMQgy7hN2Q
OnLFluK5jVbSqp0DIYR3Bf2Dw25YKrw9HjI10a4blXoJhu04naU8aVzDsMRZIgPS
hJyG/V9gPqXoWjkDiCZO4OrksJQOjabP2inthpW6mYeoc+o9Ar1y6gb8TRJMnida
EM4nf5sus1kJPLNkBhoAtbf7lzGPI0p7po2rrmH9uYzpfWGeLKzkTtudjvZTCaD7
7jF5lCp9KpOI6gwvSt6CQd0TFiU7F6NVsV7N1kJnCW3HRfgSggxefEkIuRAVMzwd
U9wvxu3o2XTVHx2DHv/9Oq+hiWiu9lX8s4nQXWBXIEcS+8hq4WbrBz5fKxzm+UQx
2Jmo/Q6bNPB2oYRVySkLJ8BzG9yG+mQFC7Gj6a/gsoAZTWw9lu/ECCYXQztec70n
o1jOJwWvn+wF2TcJgTPq
=3NU7
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: DT changes for v3.17 (round 2)" from Jason Cooper:
mvebu DT changes for v3.17 (round 2):
- kirkwood
* Add d2 Network v2 board
- mvebu
* Add Armada 375 ethernet node
* Add CA9 MPcore SoC controller node
* Add support for dynamic freq scaling on Armada XP
* tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update Armada XP DT for dynamic frequency scaling
ARM: mvebu: add CA9 MPcore SoC Controller node
ARM: mvebu: Enable the network controller in Armada 375 DB board
ARM: mvebu: Add support for the network controller in Armada 375 SoC
ARM: Kirkwood: add DT support for d2 Network v2
ARM: Kirkwood: allow to use netxbig DTSI for d2net_v2 DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
The factory bootloader on A375-DB boards expect the ECC strength to be
4 bits over 512 bytes. Hence, we need to specify this in the devicetree,
to prevent the kernel from assuming any different ECC scheme.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1400941030-2123-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As with previous release, this continues to be among the largest branches
we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy
cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5
/jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die
IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5
rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi
ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo
b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF
3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB
y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF
z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL
dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW
PUPlrVfYXzIKsh+OU1HO
=OvOG
-----END PGP SIGNATURE-----
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson:
"As with previous release, this continues to be among the largest
branches we merge, with lots of new contents.
New things for this release are among other things:
- DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
- Qualcomm APQ8064 and APQ8084 SoCs and eval boards
- Nvidia Jetson TK1 development board (Tegra T124-based)
Two new SoCs that didn't need enough new platform code to stand out
enough for me to notice when writing the SoC tag, but that adds new DT
contents are:
- TI DRA72
- Marvell Berlin 2Q"
* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
ARM: dts: add secure firmware support for exynos5420-arndale-octa
ARM: dts: add pmu sysreg node to exynos3250
ARM: dts: correct the usb phy node in exynos5800-peach-pi
ARM: dts: correct the usb phy node in exynos5420-peach-pit
ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
ARM: dts: add dts files for exynos3250 SoC
ARM: dts: add mfc node for exynos5800
ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
ARM: dts: enable fimd for exynos5800-peach-pi
ARM: dts: enable display controller for exynos5800-peach-pi
ARM: dts: enable hdmi for exynos5800-peach-pi
ARM: dts: add dts file for exynos5800-peach-pi board
ARM: dts: add dts file for exynos5800 SoC
ARM: dts: add dts file for exynos5260-xyref5260 board
ARM: dts: add dts files for exynos5260 SoC
ARM: dts: update watchdog node name in exynos5440
ARM: dts: use key code macros on Origen and Arndale boards
ARM: dts: enable RTC and WDT nodes on Origen boards
ARM: dts: qcom: Add APQ8084-MTP board support
ARM: dts: qcom: Add APQ8084 SoC support
...
The Marvell Armada 375 SoCs contains two EHCI controllers. This commit
adds the Device Tree description of these interfaces at the SoC level,
and also enables the USB2 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1400149062-32661-18-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 375 SoCs contain a xHCI controller. This commit
adds the Device Tree description of this interfaces at the SoC level,
and also enables the USB3 port on the Armada 375 DB platform.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1400149062-32661-17-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have
the proper "clocks" property in their UART controllers node, it is no
longer useful to have the clock-frequency property defined in the
board-level Device Tree files.
Therefore, this commit gets rid of all the useless 'clock-frequency'
properties.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 375 SoC has a dual-port SATA interface, which is exposed on
the Armada 375 DB board. This commit therefore enables this interface
on the Armada 375 DB board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 375 DB board is the development board from Marvell for the
Armada 375 SoC. This commit adds a Device Tree description for this
board, which enables the following features:
* I2C buses
* SDIO
* Serial port
* SPI bus, with a SPI flash. Note that the SPI bus is disabled by
default, because it conflicts with the NAND, and can only work if
the board boots out of SPI. Since most boards are shipped to boot
out of NAND, we're default to having the SPI bus disabled.
* PCIe interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>