2 Commits

Author	SHA1	Message	Date
Stephen Boyd	e0e3aca997	clk: mediatek: Use right match table, include mod_devicetable ... This is copy/pasta that breaks modular builds. Fix the match table to use the right pointer, or the right device table type. And while we're including the header, fix the order to be linux, dt-bindings, and finally local. Cc: Garmin.Chang <Garmin.Chang@mediatek.com> Cc: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Fixes: f42b9e9a43 ("clk: mediatek: Add MT8188 wpesys clock support") Fixes: 0d2f2cefba ("clk: mediatek: Add MT8188 adsp clock support") Fixes: e4aaa60eae ("clk: mediatek: Add MT8188 vdosys0 clock support") Fixes: cfa4609f9b ("clk: mediatek: Add MT8188 vdosys1 clock support") Fixes: bb87c1109c ("clk: mediatek: Add MT8188 vencsys clock support") Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304011039.UBDX1UOT-lkp@intel.com/ Link: https://lore.kernel.org/oe-kbuild-all/202304020649.QO2HlpD5-lkp@intel.com/ Link: https://lore.kernel.org/oe-kbuild-all/202304021055.WDhQPcoS-lkp@intel.com/ Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230404204553.1256263-1-sboyd@kernel.org	2023-04-04 13:47:02 -07:00
Garmin.Chang	bb87c1109c	clk: mediatek: Add MT8188 vencsys clock support ... Add MT8188 vencsys clock controllers which provide clock gate control for video encoder. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230331123621.16167-15-Garmin.Chang@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2023-03-31 11:51:21 -07:00