Commit Graph

11 Commits

Author SHA1 Message Date
Arnd Bergmann 5d6f52671e ARM: rework endianess selection
Choosing big-endian vs little-endian kernels in Kconfig has not worked
correctly since the introduction of CONFIG_ARCH_MULTIPLATFORM a long
time ago.

The problems is that CONFIG_BIG_ENDIAN depends on
ARCH_SUPPORTS_BIG_ENDIAN, which can set by any one platform
in the config, but would actually have to be supported by all
of them.

This was mostly ok for ARMv6/ARMv7 builds, since these are BE8 and
tend to just work aside from problems in nonportable device drivers.
For ARMv4/v5 machines, CONFIG_BIG_ENDIAN and CONFIG_ARCH_MULTIPLATFORM
were never set together, so this was disabled on all those machines
except for IXP4xx.

As IXP4xx can now become part of ARCH_MULTIPLATFORM, it seems better to
formalize this logic: all ARMv4/v5 platforms get an explicit dependency
on being either big-endian (ixp4xx) or little-endian (the rest). We may
want to fix ixp4xx in the future to support both, but it does not work
in LE mode at the moment.

For the ARMv6/v7 platforms, there are two ways this could be handled

 a) allow both modes only for platforms selecting
    'ARCH_SUPPORTS_BIG_ENDIAN' today, but only LE mode for the
    others, given that these were added intentionally at some
    point.

 b) allow both modes everwhere, given that it was already possible
    to build that way by e.g. selecting ARCH_VIRT, and that the
    list is not an accurate reflection of which platforms may or
    may not work.

Out of these, I picked b) because it seemed slighly more logical
to me.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08 17:20:54 +02:00
Geert Uytterhoeven 9fdba09a03 ARM: aspeed: Drop unneeded select of HAVE_SMP
Support for the 6th generation Aspeed SoCs depends on ARCH_MULTI_V7.
As the latter selects HAVE_SMP, there is no need for MACH_ASPEED_G6 to
select HAVE_SMP.

Link: https://lore.kernel.org/r/20200505150722.1575-6-geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-15 23:27:37 +02:00
Linus Torvalds cef0aa0ce8 ARM: SoC fixes
A few fixes that have trickled in through the merge window:
 
  - Video fixes for OMAP due to panel-dpi driver removal
  - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7
  - Fixing arch version on ASpeed ast2500
  - Two fixes for reset handling on ARM SCMI
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
 "A few fixes that have trickled in through the merge window:

   - Video fixes for OMAP due to panel-dpi driver removal

   - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7

   - Fixing arch version on ASpeed ast2500

   - Two fixes for reset handling on ARM SCMI"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: aspeed: ast2500 is ARMv6K
  reset: reset-scmi: add missing handle initialisation
  firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset
  bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle()
  ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux
  ARM: dts: am3517-evm: Fix missing video
  ARM: dts: logicpd-torpedo-baseboard: Fix missing video
  ARM: omap2plus_defconfig: Fix missing video
  bus: ti-sysc: Fix handling of invalid clocks
  bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-30 10:04:28 -07:00
Arnd Bergmann b74d957f63 ARM: aspeed: ast2500 is ARMv6K
Linux supports both the original ARMv6 level (early ARM1136) and ARMv6K
(later ARM1136, ARM1176 and ARM11mpcore).

ast2500 falls into the second categoy, being based on arm1176jzf-s.
This is enabled by default when using ARCH_MULTI_V6, so we should
not 'select CPU_V6'.

Removing this will lead to more efficient use of atomic instructions.

Fixes: 8c2ed9bcfb ("arm: Add Aspeed machine")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Joel Stanley <joel@jms.id.au>
2019-09-20 09:41:41 +02:00
Joel Stanley 87dfe49691 ARM: aspeed: Enable SMP boot
This brings the secondary CPU into Linux. It depends on the setup
performed by ASPEED's u-boot.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:52 +09:30
Joel Stanley 9afe2c0a37 ARM: aspeed: Add ASPEED AST2600 architecture
The AST2600 is a Cortex A7 dual core CPU that uses the ARM GIC for
interrupts and ARM timer as a clocksource.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:50 +09:30
Joel Stanley e35d7db994 ARM: aspeed: Select timer in each SoC
In preparation for adding the ast2600 which does not use this timer.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-25 23:26:48 +09:30
Thomas Gleixner ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Linus Walleij ec14ba1ec5 clocksource/drivers/fttmr010: Merge Moxa into FTTMR010
This merges the Moxa Art timer driver into the Faraday FTTMR010
driver and replaces all Kconfig symbols to use the Faraday
driver instead. We are now so similar that the drivers can
be merged by just adding a few lines to the Faraday timer.

Differences:

- The Faraday driver explicitly sets the counter to count
  upwards for the clocksource, removing the need for the
  clocksource core to invert the value.

- The Faraday driver also handles sched_clock()

On the Aspeed, the counter can only count downwards, so support
the timers in downward-counting mode as well, and flag the
Aspeed to use this mode. This mode was tested on the Gemini so
I have high hopes that it'll work fine on the Aspeed as well.

After this we have one driver for all three SoCs and a generic
Faraday FTTMR010 timer driver, which is nice.

Cc: Joel Stanley <joel@jms.id.au>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2017-06-12 10:45:10 +02:00
Andrew Jeffery 43c08c1c1a ARM: aspeed: Select pinctrl drivers
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 22:36:06 +11:00
Joel Stanley 8c2ed9bcfb arm: Add Aspeed machine
Aspeed devices are a common Baseboard Management Controller (BMC)
system on chip containing an ARM9 or ARM11 core, off-chip DDR RAM and
support for a large number of peripherals.

This patch adds basic support for the ast2400 and ast2500 machines,
capable of booting to a prompt in QEMU (-M palmetto-bmc), on an
Palmetto OpenPower development machine, and on the ast2500 EVB.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2016-05-09 17:41:14 +09:30