Commit Graph

10 Commits

Author SHA1 Message Date
Yoshihiro Shimoda ffbf9cf3f9 clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag
Geert suggested defining multiple register layout variants using an enum
[1] to support further devices like R-Car V3U.  So, use enum
clk_reg_layout instead of a boolean .stbyctrl flag.  No behavioral
change.

[1] https://lore.kernel.org/linux-renesas-soc/CAMuHMdVAgN69p9FFnQdO4iHk2CHkeNaVui2Q-FOY6_BFVjQ-Nw@mail.gmail.com/

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599810232-29035-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-17 15:30:08 +02:00
Chris Brandt c9d9d90347 clk: renesas: r7s9210: Add SPIBSC clock
Add SPIBSC clock for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Link: https://lore.kernel.org/r/20191206134202.18784-4-chris.brandt@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-12-20 15:03:27 +01:00
Geert Uytterhoeven 9c561be8d8 clk: renesas: r7s9210: Always use readl()
On arm32, there is no reason to use the (soon deprecated) clk_readl().
Hence use the generic readl() instead.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-02 09:50:48 +02:00
Stephen Boyd 1ef06003a5 clk: renesas: Mark rza2_cpg_clk_register static
This is only used in this file, so mark it static to silence a sparse
warning.

Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-29 13:52:42 -08:00
Chris Brandt eb38c119dd clk: renesas: r7s9210: Add USB clocks
Add USB clocks for RZ/A2

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-11-13 09:58:51 +01:00
Chris Brandt 507c93a22c clk: renesas: r7s9210: Add SDHI clocks
Add SDHI clocks for RZ/A2

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-11-05 13:59:34 +01:00
Chris Brandt a53a28dca4 clk: renesas: r7s9210: Add SPI clocks
Add RSPI clocks for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-28 09:57:09 +02:00
Chris Brandt 4cb1480f5f clk: renesas: r7s9210: Move table update to separate function
Same functionality, just easier to read.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-26 14:22:05 +02:00
Chris Brandt b9553c13b1 clk: renesas: r7s9210: Convert some clocks to early
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-26 14:22:05 +02:00
Chris Brandt fde35c9c7d clk: renesas: cpg-mssr: Add R7S9210 support
Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module
Standby.

The Module Standby HW in the RZ/A series is very close to R-Car HW, except
for how the registers are laid out.
The MSTP registers are only 8-bits wide, there are no status registers
(MSTPSR), and the register offsets are a little different. Since the RZ/A
hardware manuals refer to these registers as the Standby Control Registers,
we'll use that name to distinguish the RZ/A type from the R-Car type.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Rob Herring <robh@kernel.org> # DT bits
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-09-11 12:01:07 +02:00