Commit Graph

2995 Commits

Author SHA1 Message Date
Stefan Wahren c494a447c1 soc: bcm: bcm2835-power: Refactor ASB control
The functions to control the async AXI bridges are almost identical.
So define a general function to handle it and keep the original ones as
wrapper. This should make this driver easier to extend.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220625113619.15944-9-stefan.wahren@i2se.com
2022-07-04 11:59:21 +01:00
Arnd Bergmann aa61fa3e36 Amlogic Drivers changes for v5.20:
- Fix refcount leak in meson-secure-pwrc.c
 - Fix refcount leak in meson_mx_socinfo_init
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmK+qqwACgkQd9zb2sjI
 SdERLRAA0CWCXOmUbHvpLZc/Pjac16sMJ5Cc7Y8Az/tf17UAAekuay6w11ZIdKWW
 XBSY7McC/+hVaJcT2QANo4Axo3Br2T80osGMEv2CdQ6X6m7fP/rAVCaq2T1CeuZS
 Vombc5tgqTdiNh3pT8sFV6dTorGe+mEUxy1p1epKIoHTm2TR9erbrCsV1yG+O83q
 yC+M89dqAtb925uAp6FbQX/e81vnbezBCdyWd3iNaseZ0pmPlOXHrTgtPmAcb2eC
 RxVOJo0Uc0SeEOd6Cq5sD92pNQ53jwJcs4KUzZZC52/Ni7TkDexcwIn7UqazFYe2
 vPPE66CgI0wWveDRPPyOVkh1QJrsk+TPDIBGLX8vxRv2VhEUykFle8tao1Tn4Cpx
 Nd0ApfuB60yEGsZnqbV1SxnJu59BbFETGKOWKcImKEnC/c1sne6DVbzkFfzUKyIr
 dIy48lIku9gQko6vk90iRzFIP0Dd2KhwJhWUbm0necakzNWBD2sB19r9dTmtfJ/Q
 SsiKo4Ts/oKAMfdttGt9iPdtfsysX8wnAuCo9UXdjPS60zuke64GEQ2ISKc/6VJN
 vny5ebNhkJbmdjqYlJZ5BzBbYTN307qSmHs8ZBhdLiSLMgfhyBtnooLyGtb+Ddb8
 P/L5g95jlpKzqaQAiMrvz2kmIjpPm2rZp9imGr7akL8sG50y1eU=
 =T3Kd
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK/V6IACgkQmmx57+YA
 GNkBGw//WcS2pTHRjQUYg5Bcy+13dDgWq4XHwtoBuBPBg7J6CNVfbNKUqO9ukcY+
 paYroFcb+KVSP+aQqJndit4fSp+Pr4eKb5rwKnjbXg/OiJhpmiOrUb0xzoJCHIH/
 jtBJ/H7NLzY4gCGMy3bD7RyrE1J7KblenlYy8b+6c26zdGnQRI5tATTqNM3N6Y8X
 wMRphRGbdv87eZ0akGTp/lWgVlsD4LPpOGaxWpLyzRUwElDz2IE68rj5y5X14KBu
 yU2rvmx2Us3rVSKMA4xp6nlTzHkCN3Q/S8R4j2aR6DaYDpdSTmthk6Hm5/RR3il7
 xwWTQRB2U2Ap0zYDymmFd6KOnViM1sWghiQEL0celQVpkxWDKcFwbURiRLgnK+5z
 2sms67A2IcUpXNulZVoBFwwjlKlS4H4u5lW/B89Xm9lS2WYACEiPuBSixJ4C+vBY
 eYOvE2YqXQTY9Ylqv78ceAnpokcDrHPBz6ZQ8O7xWFF27yRihcoU8jS7RH2XB6DH
 zeQK6B0+btbFo9u7FTvhwFgVKkCg5z5VXjI1+nzZYyfOrApYDI7MCe3Vx2rfS/fu
 dmBZ+j/8GyDlpSYX5IWBMs3pBFEk37nHRckpLsRldKvK75wMrlMqDx9e5QaP6nTc
 2j+pjIVQt+PwdmQSt/bcTZOoO8AxYAE0q+a8pHFHgW9oHJs3Vuc=
 =KaI8
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers

Amlogic Drivers changes for v5.20:
- Fix refcount leak in meson-secure-pwrc.c
- Fix refcount leak in meson_mx_socinfo_init

* tag 'amlogic-drivers-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: amlogic: Fix refcount leak in meson-secure-pwrc.c
  meson-mx-socinfo: Fix refcount leak in meson_mx_socinfo_init

Link: https://lore.kernel.org/r/0c01e173-9abf-69ac-7882-e6ecc3935c33@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01 22:22:57 +02:00
Arnd Bergmann 92a1691b9d Renesas driver updates for v5.20
- Small fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYrVvaQAKCRCKwlD9ZEnx
 cErcAP9I7JffzrhKlkPAxuVWcjW1skuj4y5K31M2Wsz3sFRddgEAoyYRm9H2cUHu
 CJMqvds7W1MVtgvTbOKjnMx6pjx3egQ=
 =tqeB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK/V0sACgkQmmx57+YA
 GNnXFw/+MIOR9IgRmkb71G91IB4Y++e2TW5dTIu4elmWBgfLWx963wYSAsLAqSsn
 6kGqBoKOJCv5UM+EROeN/yiG97YtsDWa4nTZHHP0sTPmL8uzy9AeT2PhSE1weL8U
 R0BVnOL8WG94j/eQS9KbSDg1A6wvbxcp7796nCGkI2n7jCir0Tmu83Fa/TvWMtP+
 iq0ziZbXse1aPK4y/AVbg6yF9ONLo6WcebLu8tWkVUEAU4T8TvyM1pPiBVUlTqPB
 3dfKfnZ+xjTnJzCi15MuIvopYOozrSjYFmD4Wt9WIns6+ZZIccTzae0c9hfGpYFd
 ZfC6uS5ILWxUyyRbIwBW1EzcCkI7479g27wVWSuxc4inV1Y5MKp4yc0hsbX4vqZD
 po6AC0ciwG1NfE7pmPEPzcrxsxNLOdQ6UmtKQT9wHVik/b6vl7MkmFXV8Co13qNu
 Nz/4fh/Cq4+JdhFxYBUPAXTcEzWLmeUgozIXZKVy1xKTWP/9RoLtOmJkXsYZuyWo
 ZvJ23Q3zPu3/wkvVPBlUTHddt9m5t6bwt1KvCTA7SqJ2iwnr9NW3Wbyc0qYjoAqi
 ZS2Mjfhq4Wfme4eF+gXHfIO2Qx7Sln4pnzQzE1wz7jdj/wKhXYR/lzxt24BKlBKC
 HwcrnYlf8seQT8eTUPmuIMW7VkQHUrUHCMSHqr2/QRa0nBflR5g=
 =Y6m1
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.20

  - Small fixes and improvements.

* tag 'renesas-drivers-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-sysc: Optimize rcar_sysc_area struct sizes
  soc: renesas: r8a779a0-sysc: Fix A2DP1 and A2CV[2357] PDR values

Link: https://lore.kernel.org/r/cover.1656069638.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01 22:21:31 +02:00
Arnd Bergmann a38dbb4f20 AT91 fixes for 5.19
It contains 3 SoC fixes and 2 DT fixes:
 SoC:
 - fix the wakeup from RTC and RTT for ULP1 mode
 - fix section mismatch warning
 - fix SAM9X60 SiP detection
 
 DT:
 - fixes the EEPROMs compatibles for sama5d2_icp and sam9x60ek and EEPROM
   size for sam9x60ek
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYrraHQAKCRCejrg/N2X7
 /SttAQDmoJ4WB6+osorxNV+G9CnHZHQJHjI0X2ZTUGj59k6vIAEAu+LGjHyUmxVe
 TfYbnfaAgOICc8HsC2CbdkeR01RqNAM=
 =x+2+
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK+81wACgkQmmx57+YA
 GNlQiBAAjEhrj2SQkigFGgGR+YFo+se/gNwOBz3OXZ6VyVFVqAKaaqC0MBM9OyBD
 Yyf6nGTT+VLe+Ekc/y7GtIW2oaCDTansk6E+MXe8QSHzs3T6BmKONAIH1YqUFZ3a
 0YCR9jBlIL16l3X08KnAhOm35iaqO0SgEZ9RDfGfTIWDAFmBis5rst5VreAlEbPp
 9LPsKYFjd7tqP1jFYpgE8UTkDZgS3rQHnsBAKKCLXT0tFTudgGk5B9/3Ni0V1wM2
 3ubf+1CW2vvbfXFtpruRzNlZ+Li3fZ0/b1bXRGXLZLRh2+/LvMVLEb/KN9Ln20hZ
 pYT0IYJhfu8MWgcZUof1Qnc437nDie7YoJ1JrDV13uhDhlBwW/E3KMtXLWvX07n3
 9p6IvbVGX/Wen7j1MWyOztJ55j4XbJebNcm2s/uXygjT3f4zsVk9HbFHpfiElPSZ
 xfqGRz+3ygRRA/itE3SMnmiCKRKip99NH9ohstzPg6xJ882fPQo+3BGFGo1AN4Mw
 Evj4bvDWX6NBgR1LSJFv0JG82wWWKm9byxcpKGXJ6g5dTwmyC/a+HHnmZ+iDWiq/
 BYtyS3iuE/5YFp7tO9AXYBfQyiMZ3VlKt0KqCK2GFxa7KN7CY2fALusVt44WJY7E
 FFwDvQ5kvAdERvVG4ddYGHj7Hjg9euDpht/l3fqIkNaFtWM27fo=
 =CHPb
 -----END PGP SIGNATURE-----

Merge tag 'at91-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 5.19

It contains 3 SoC fixes and 2 DT fixes:
SoC:
- fix the wakeup from RTC and RTT for ULP1 mode
- fix section mismatch warning
- fix SAM9X60 SiP detection

DT:
- fixes the EEPROMs compatibles for sama5d2_icp and sam9x60ek and EEPROM
  size for sam9x60ek

* tag 'at91-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: pm: Mark at91_pm_secure_init as __init
  ARM: at91: fix soc detection for SAM9X60 SiPs
  ARM: dts: at91: sama5d2_icp: fix eeprom compatibles
  ARM: dts: at91: sam9x60ek: fix eeprom compatible and size
  ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt
  ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt
  ARM: at91: pm: use proper compatible for sama5d2's rtc

Link: https://lore.kernel.org/r/20220628135130.3114878-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01 15:15:08 +02:00
Linus Walleij 620f83b832
soc: ixp4xx/npe: Fix unused match warning
The kernel test robot found this inconsistency:

  drivers/soc/ixp4xx/ixp4xx-npe.c:737:34: warning:
  'ixp4xx_npe_of_match' defined but not used [-Wunused-const-variable=]
     737 | static const struct of_device_id ixp4xx_npe_of_match[] = {

This is because the match is enclosed in the of_match_ptr()
which compiles into NULL when OF is disabled and this
is unnecessary.

Fix it by dropping of_match_ptr() around the match.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220626074315.61209-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-01 15:14:26 +02:00
Miaoqian Lin e6e0951414 soc: qcom: aoss: Fix refcount leak in qmp_cooling_devices_register
Every iteration of for_each_available_child_of_node() decrements
the reference count of the previous node.
When breaking early from a for_each_available_child_of_node() loop,
we need to explicitly call of_node_put() on the child node.
Add missing of_node_put() to avoid refcount leak.

Fixes: 05589b30b2 ("soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC.")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606064252.42595-1-linmq006@gmail.com
2022-06-30 22:03:58 -05:00
Xiang wangx a3e7259f9e soc: qcom: llcc: Fix syntax errors in comments
Delete the redundant word 'and'.

Signed-off-by: Xiang wangx <wangxiang@cdjrlc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220604142327.14714-1-wangxiang@cdjrlc.com
2022-06-30 22:00:27 -05:00
Miaoqian Lin 92a563fcf1 soc: qcom: ocmem: Fix refcount leak in of_get_ocmem
of_parse_phandle() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.
of_node_put() will check NULL pointer.

Fixes: 88c1e9404f ("soc: qcom: add OCMEM driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220602042430.1114-1-linmq006@gmail.com
2022-06-30 21:50:46 -05:00
Tanmay Shah acd6510dd7 firmware: xilinx: Add TF_A_PM_REGISTER_SGI SMC call
SGI interrupt register and reset is performed by EEMI ioctl
IOCTL_REGISTER_SGI. However, this is not correct use of EEMI call.
SGI registration functionality does not qualify as energy management
activity and so shouldn't be mapped to EEMI call.

This new call will replace IOCTL_REGISTER_SGI and will  be handled by TF-A
specific handler in TF-A. To maintain backward compatibility for a while
firmware driver will still use IOCTL_REGISTER_SGI as fallback strategy if
new call fails or is not supported by TF-A.

This new design also helps to make TF-A as pass through layer for EEMI
calls. So we don't have to maintain PM_IOCTL as EEMI API ID in TF-A.

Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220607224253.54919-1-tanmay.shah@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-29 14:46:22 +02:00
Douglas Anderson fe72f9bce1 soc: qcom: cmd-db: replace strscpy_pad() with strncpy()
Commit ac0126a017 ("soc: qcom: cmd-db: replace strncpy() with
strscpy_pad()") breaks booting on my sc7280-herobrine-herobrine
device. From printouts I see that at bootup the function is called
with an id of "lnbclka2" which is 8 bytes big.

Previously all 8 bytes of this string were copied to the
destination. Now only 7 bytes will be copied since strscpy_pad() saves
a byte for '\0' termination.

We don't need the '\0' termination in the destination. Let's go back
to strncpy(). According to the warning:
  If a caller is using non-NUL-terminated strings, strncpy() can still
  be used, but destinations should be marked with the __nonstring
  attribute to avoid future compiler warnings.
...so we'll do that.

While we're at it, let's change the query array to use
"sizeof(ent->id)" so it can't possibly go out of sync with our later
copy.

Fixes: ac0126a017 ("soc: qcom: cmd-db: replace strncpy() with strscpy_pad()")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220628064301.v3.1.Ie7b480cd99e2c13319220cbc108caf2bcd41286b@changeid
2022-06-28 14:44:44 -05:00
Mihai Sain 35074df65a ARM: at91: fix soc detection for SAM9X60 SiPs
Fix SoC detection for SAM9X60 SiPs:
SAM9X60D5M
SAM9X60D1G
SAM9X60D6K

Fixes: af3a10513c ("drivers: soc: atmel: add per soc id and version match masks")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220616081344.1978664-1-claudiu.beznea@microchip.com
2022-06-28 12:55:32 +03:00
Marek Vasut 1ec32a4f1c soc: imx: imx8m-blk-ctrl: Make error prints useful
Print the name of the power domain which failed to make the error
prints actually useful for finding the error.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Paul Elder <paul.elder@ideasonboard.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 16:16:15 +08:00
Michael Walle 786dde1e59 soc: fsl: guts: add serial_number support
Most layerscapes provide a security fuse processor where the vendor
will store a unique id per part. Unfortunately, we cannot use the
corresponding efuse driver because this driver needs to be ready
early during the boot phase. To get the unique identifier, we just
need to access two registers. Thus we just search the device tree
for the corresponding device, map its memory to read the id and then
unmap it again.

Because it is likely that the offset within the fuses is dependent
on the SoC, we need a per SoC data. Also, the compatible string is
different among the SoCs. For now, this add support for the LS1028A
SoC.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:52:02 +08:00
Michael Walle 55488c90b3 soc: fsl: guts: drop platform driver
This driver cannot be unloaded and it will be needed very early in the
boot process because other driver (weakly) depend on it (eg. for chip
errata handling). Drop all the platform driver and devres stuff and
simply make it a core_initcall.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:59 +08:00
Michael Walle b46dd0cb93 soc: fsl: guts: use of_root instead of own reference
There is already a global of_root reference. Use that instead of getting
one on our own. We don't need to care about the reference count either
this way.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:56 +08:00
Michael Walle 5d707e4e3f soc: fsl: guts: allocate soc_dev_attr on the heap
This is the last global static variable. Drop it and allocate the memory
on the heap instead.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:54 +08:00
Michael Walle ab4988d6a3 soc: fsl: guts: embed fsl_guts_get_svr() in probe()
Move the reading of the SVR into the probe function as
fsl_guts_get_svr() is the only user of the static guts variable and this
lets us drop that as well as the malloc() for this variable. Also, we
can unmap the memory region after we accessed it, which will simplify
error handling later.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:51 +08:00
Michael Walle 6de6cb89fc soc: fsl: guts: remove module_exit() and fsl_guts_remove()
This driver will never be unloaded. Firstly, it is not available as a
module, but more importantly, other drivers will depend on this one to
apply possible chip errata.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:48 +08:00
Michael Walle ab3f045774 soc: fsl: guts: machine variable might be unset
If both the model and the compatible properties are missing, then
machine will not be set. Initialize it with NULL.

Fixes: 34c1c21e94 ("soc: fsl: fix section mismatch build warnings")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-27 14:51:28 +08:00
Julia Lawall a20e55d477 soc: qcom: rpmhpd: fix typos in comment
Spelling mistakes (triple letters) in comment.
Detected with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220521111145.81697-9-Julia.Lawall@inria.fr
2022-06-25 22:36:13 -05:00
Krzysztof Kozlowski d11a34a404 soc: qcom: correct kerneldoc
Correct kerneldoc warnings like:

  drivers/soc/qcom/mdt_loader.c:126:
    warning: Function parameter or member 'fw_name' not described in 'qcom_mdt_read_metadata'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220519073301.7072-2-krzysztof.kozlowski@linaro.org
2022-06-25 22:05:31 -05:00
Krzysztof Kozlowski ac0126a017 soc: qcom: cmd-db: replace strncpy() with strscpy_pad()
The use of strncpy() is considered deprecated for NUL-terminated
strings[1].  Replace strncpy() with strscpy_pad(), to keep existing
pad-behavior of strncpy.  This fixes W=1 warning:

  drivers/soc/qcom/cmd-db.c: In function ‘cmd_db_get_header.part.0’:
  drivers/soc/qcom/cmd-db.c:151:9: warning: ‘strncpy’ specified bound 8 equals destination size [-Wstringop-truncation]
    151 |         strncpy(query, id, sizeof(query));

[1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220519073301.7072-1-krzysztof.kozlowski@linaro.org
2022-06-25 22:05:31 -05:00
Uwe Kleine-König bc0f149376 soc: qcom: apr: Drop redundant check in .remove()
The remove callback is only called by the driver core if there is a
driver to unbind, so there is no need to check dev->driver to be
non-NULL.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220618203913.35785-1-u.kleine-koenig@pengutronix.de
2022-06-25 22:01:02 -05:00
Douglas Anderson 0f0eca0ccb soc: qcom: socinfo: Add an ID for sc7180P
Some sc7180 Chromebooks actually have sc7180P (known by many names,
apparently, including possibly sc7180 Pro and sc7185). This is a
sc7180 part that has slightly higher clock speeds.

The official ID number allocated to these devices by Qualcomm is 495
so we'll add an entry to the table for them. Note that currently
shipping BIOS for these devices will actually end up reporting an ID
of 407 due to a bug but eventually a new BIOS will be released which
corrects it to 495.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220523085437.v3.1.I26eca1856f99e6160d30de6d50ecab60e6226354@changeid
2022-06-25 14:52:39 -05:00
Peng Wu a825d72f74 soc: mediatek: fix missing clk_disable_unprepare() on err in svs_resume()
Fix the missing clk_disable_unprepare() before return
from svs_resume() in the error handling case.

Signed-off-by: Peng Wu <wupeng58@huawei.com>
Reported-by: Hulk Robot <hulkci@huawei.com>
Link: https://lore.kernel.org/r/20220623070240.63382-1-wupeng58@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-23 10:50:53 +02:00
AngeloGioacchino Del Regno 44e36d7552 soc: mediatek: mutex: Use DDP_COMPONENT_DITHER0 mod index for MT8365
In commit
4e8988c634 ("soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0")
the enum mtk_ddp_comp_id was modified to add an index number to the
DITHER component because some new SoCs have multiple dither blocks.

As a result, all of the mutex mod arrays have been changed to use the
new definition instead of the old one (even if that's retained): for
consistency purposes, follow the same trend on the newly introduced
MT8365 mutex mod array.

This commit brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220620102454.131417-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-22 16:06:41 +02:00
Martin Kepplinger 43b240d41b soc: imx: gpcv2: print errno for regulator errors
Make debugging of power management issues easier by printing the reason
why a regulator fails to be enabled or disabled.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-19 15:14:39 +08:00
Yang Li b710673e2d soc: ti: wkup_m3_ipc: Remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/soc/ti/wkup_m3_ipc.c:691:2-3: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220504225125.45830-1-yang.lee@linux.alibaba.com
2022-06-17 20:25:01 -05:00
Liang He 9a073d4fbb soc: bcm: brcmstb: biuctrl: Add missing of_node_put()
In brcmstb_biuctrl_init(), of_find_compatible_node() will return a
node pointer with refcount incremented. We should use of_node_put()
in each fail path or when it is not used anymore.

Signed-off-by: Liang He <windhl@126.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-17 14:54:22 -07:00
Moudy Ho e5758850c2 soc: mediatek: mutex: add functions that operate registers by CMDQ
Due to HW limitations, MDP3 is necessary to enable MUTEX in each frame
for SOF triggering and cooperate with CMDQ control to reduce the amount
of interrupts generated(also, reduce frame latency).

In response to the above situation, a new interface
"mtk_mutex_enable_by_cmdq" has been added to achieve the purpose.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220610063424.7800-7-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 15:51:52 +02:00
Moudy Ho 2c9f8d1e01 soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP
For the purpose of module independence, related settings should be moved
from MDP to the corresponding driver.
This patch adds 8183 MUTEX MOD settings for MDP.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220610063424.7800-3-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 15:51:51 +02:00
Moudy Ho d0804085c5 soc: mediatek: mutex: add common interface for modules setting
In order to allow multiple modules to operate MUTEX hardware through
a common interfrace, two flexible indexes "mtk_mutex_mod_index" and
"mtk_mutex_sof_index" need to be added to replace original component
ID so that like DDP and MDP can add their own MOD table or SOF
settings independently.

In addition, 2 generic interface "mtk_mutex_write_mod" and
"mtk_mutex_write_sof" have been added, which is expected to replace
the "mtk_mutex_add_comp" and "mtk_mutex_remove_comp" pair originally
dedicated to DDP in the future.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220610063424.7800-2-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 15:51:51 +02:00
Chunfeng Yun 72be1e7a44 soc: mediatek: pm-domains: Add support always on flag
There is a t-phy shared by PCIe and USB3 on mt8195, if the t-phy is
used by PCIe, when power off its mtcmos, need software reset it
(workaround way, usually hardware do it, but has an issue on mt8195),
but it has side effect to USB2 phy(works with USB3 phy to support
USB3.2 Gen1), so add support GENPD_FLAG_ALWAYS_ON flag, and make its
power always on.
Another reason is that USB3.2 Gen1/2 need keep power always on when
support runtime-pm due to hardware limitation until now.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220617095841.23031-1-chunfeng.yun@mediatek.com
[mb: smaller nit fixes on commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 13:49:37 +02:00
Fabien Parent 38077cb39b soc: mediatek: mt8365-mmsys: add DPI/HDMI display path
Right now only the DSI path connections are described in the mt8365
mmsys driver. The external path will be DPI/HDMI. This commit adds
the connections for DPI/HDMI.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220530201436.902505-5-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 12:25:57 +02:00
Fabien Parent 141311b856 soc: mediatek: mutex: add MT8365 support
Add mutex support for MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220530201436.902505-4-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 12:25:57 +02:00
Roger Lu 0bbb09b2af soc: mediatek: SVS: add mt8192 SVS GPU driver
mt8192 SVS GPU uses 2-line (high/low bank) HW architecture to provide
bank voltages. High bank helps update higher frequency's voltage
and low bank helps update lower frequency's voltage.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-8-roger.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 10:50:08 +02:00
Roger Lu 13f1bbcfb5 soc: mediatek: SVS: add debug commands
The purpose of SVS is to help find the suitable voltages
for DVFS. Therefore, if SVS bank voltages are concerned
to be wrong, we can show/disable SVS bank voltages by
this patch.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-6-roger.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 10:50:07 +02:00
Roger Lu 6c69271926 soc: mediatek: SVS: add monitor mode
SVS monitor mode is based on different thermal temperature
to provide suitable SVS bank voltages.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-5-roger.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 10:50:07 +02:00
Roger Lu 681a02e950 soc: mediatek: SVS: introduce MTK SVS engine
The Smart Voltage Scaling(SVS) engine is a piece of hardware
which calculates suitable SVS bank voltages to OPP voltage table.
Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck
when receiving OPP_EVENT_ADJUST_VOLTAGE.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-4-roger.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-17 10:50:07 +02:00
Liang He d18529a4c1 soc: amlogic: Fix refcount leak in meson-secure-pwrc.c
In meson_secure_pwrc_probe(), there is a refcount leak in one fail
path.

Signed-off-by: Liang He <windhl@126.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Fixes: b3dde5013e ("soc: amlogic: Add support for Secure power domains controller")
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220616144915.3988071-1-windhl@126.com
2022-06-17 09:40:40 +02:00
Sai Prakash Ranjan 6f1de1da81 soc: qcom: geni: Disable MMIO tracing for GENI SE
Disable MMIO tracing for GENI SE driver to prevent excessive
logging. Any access over serial console would involve a lot of
TX and RX register accesses (and few others), so these MMIO
read/write trace events in these drivers cause a lot of unwanted
noise because of the high frequency of such operations and it is
not very useful tracing these events for such drivers.
Given we want to enable these trace events on development devices
(maybe not production devices) where performance also really
matters so that we don't regress other components by wasting CPU
cycles and memory collecting these traces, it makes more sense to
disable these  traces from such drivers.

Also another reason to disable these traces would be to prevent
recursive tracing when we display the trace buffer containing
these MMIO trace events since writing onto serial console would
further record MMIO traces.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-06-15 17:41:12 +02:00
Arnd Bergmann 11bb764fbf This pull request contains Broadcom ARM-based SoCs driver fixes for
5.19, please pull the following:
 
 - Miaoqian fixes a device tree node reference count in the system sleep
   code for Broadcom STB chips
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmKgbBUACgkQh9CWnEQH
 BwQF9xAA38EssKFHnhPvczIEQZLPJNdoNFow7/Dr1ePrGrMlHzU1C1Ot9FIs45hM
 NBlOmV336GzIiRib3QxWAjBAAEf+kXGfecMcS9x3DDDq5cI5hRo1gX7HM5toKSLJ
 eMjeDJ89AGFKBSUSNgJrctt/h0l6ZViN4GlGgd6a2+QYG/+lcIsdqsz61+jbO4cy
 qh9LLBcUi6spHOOSXeIIjQSaQumcwXrAija4Zuo/7jHmDbMt4HWjCnhmOncNpEmG
 J/2QqZW8n21iw7MXO1tzXXCQLFmIJich7vAAZ8j3aOCrDBMnXINeKJeXJ0+mL7YA
 Uho3M8h+uYlAiW4IsIV9w7BOs/XtRXuSPPML2CMPHGDbIjdg0SilEZKIoQNbK1z+
 mRSMCBIgMVYO9Oh5nFo+Jwkr/0lkEwjkLqJMohv3PnPe3ONuhhEKBbNq5FQNh/e1
 u0gjKwjAvMFdyinRxHK3xahdACqx6CgrxhUSGEcnrHrh74LfDjXaUvKQ5lSoZvdb
 dv/8zVDuAsYWvF66KaR7dhJ4PzLBVcc3YjAycMdjss1GCD0lzy5LzYJ+vxOspMKL
 ZJasoJOK5j8wVzZyjUKAOs8XwOagNA1nuUraNNo+4ONCgIo/a/aE68X+MWlUI8vU
 QJX2nmECphqPazq0t3fmboMcXY5Zv/s9LPFtKpJVJuqAvc1qjMo=
 =Da3i
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKoYO8ACgkQmmx57+YA
 GNlSgA/6AoZqvQXG66RO8PRF3rHoTmAKVFGl7GjK8FSJfB8ioJAgfW75k+0F3rZD
 uLRn+XxrRuEunJUNl+CIa3BM4bGTa4m/jGwsiCF7y2i1rnsdcKvFwz0ZXzgnExb8
 I2nlfATpQIEA6CQB9HieaaO87x/ZxB+3rzBLw5zRrD+Ir4mLNDu8M7mMXKE9ZhLA
 5VMOdPkLpPNaymaIVEahFGwBZWcDQp31ZMdgHr4keWZ8YO5Dos3Z5eQU8Bh99wei
 O/upy50+hgl1V/PJLq6H/6HNNrKXRSDS2HmCsUoPRXIPp1V9DsTPdj+66r30CuNx
 ImYBT3nnTJWUBO+J50fxqy7VggRcarXvXvTE/T9WZHaYTwCvFgGwLYSzdsbRlKuN
 WcI45f7/d0L4K3OYBdwuhtwjo3O7wLi52DVfMLL8jTGRsugi4pzblZZ3wS2x9mWT
 TM/LW81KibkFPlXWd4hsQYPWMZUqHhuUhVvreJAhbHFONzFZpcWJHfgiTI+RISA0
 WEq2gki3OyHUUfM6dcYG82zPb/4VNmhxLvjubKUn/8cd6kL7bvEi7a8I5pP5c7fN
 RjwPbNHeRfC142CcFL75VBmEFPWicXnqQgN9krX3vgUZ0/4VRe19zO1ikYJOf0fH
 Mky9eL8gZGIPur4WAH/D8xQ8AaKZvLWGypiV25MHUip98dxDsQo=
 =gf3s
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.19/drivers-fixes' of https://github.com/Broadcom/stblinux into arm/fixes

This pull request contains Broadcom ARM-based SoCs driver fixes for
5.19, please pull the following:

- Miaoqian fixes a device tree node reference count in the system sleep
  code for Broadcom STB chips

* tag 'arm-soc/for-5.19/drivers-fixes' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: pm: pm-arm: Fix refcount leak in brcmstb_pm_probe

Link: https://lore.kernel.org/r/20220608093132.1465703-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-06-14 12:20:31 +02:00
Alexander Stein 7c7eaeefb0 soc: imx: imx8m-blk-ctrl: fix display clock for LCDIF2 power domain
LCDIF2 has its own display clock, use this one.

Fixes: 07614fed00 ("soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Paul Elder <paul.elder@ideasonboard.com>
Tested-by: Martyn Welch <martyn.welch@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-14 11:53:42 +08:00
Geert Uytterhoeven 4f5bc54d28 soc: renesas: rcar-sysc: Optimize rcar_sysc_area struct sizes
Reduce the sizes of the rcar_sysc_area and rcar_gen4_sysc_area
structures:
  - parent is in the range [-1..32] or [-1..64], so s8 is sufficient,
  - flags needs just 3 bits (for now), so u8 is plenty.

This reduces kernel size by:
  - 288 bytes for an R-Car Gen1+Gen2 kernel (arm32),
  - 1772 bytes for an R-Car Gen3+Gen4 kernel (arm64).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/cbbc8f464743d636895c048de61aa610d75392de.1654701156.git.geert+renesas@glider.be
2022-06-13 11:43:50 +02:00
Geert Uytterhoeven bccceabb92 soc: renesas: r8a779a0-sysc: Fix A2DP1 and A2CV[2357] PDR values
The PDR values for the A2DP1 and A2CV[2357] power areas on R-Car V3U are
incorrect (copied-and-pasted from A2DP0 and A2CV[0146]).
Fix them.

Reported-by: Renesas Vietnam via Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Fixes: 1b4298f000 ("soc: renesas: r8a779a0-sysc: Add r8a779a0 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87bc2e70ba4082970cf8c65871beae4be3503189.1654696188.git.geert+renesas@glider.be
2022-06-13 11:43:50 +02:00
Thomas Gleixner 2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Miaoqian Lin 37d838de36 soc: bcm: brcmstb: pm: pm-arm: Fix refcount leak in brcmstb_pm_probe
of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

In brcmstb_init_sram, it pass dn to of_address_to_resource(),
of_address_to_resource() will call of_find_device_by_node() to take
reference, so we should release the reference returned by
of_find_matching_node().

Fixes: 0b741b8234 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-08 02:21:17 -07:00
Julia Lawall 9b65687904 soc: bcm: brcmstb: pm: pm-arm: fix typo in comment
Spelling mistake (triple letters) in comment.
Detected with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-08 00:50:50 -07:00
Rex-BC Chen 1c9faace10 soc: mediatek: devapc: Add support for MT8186
Add devapc data and compatible to support MT8186 devapc.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220504115501.3490-4-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:15 +02:00
Rex-BC Chen 2cb41ed0d7 soc: mediatek: devapc: Separate register offsets from mtk_devapc_data
The register offsets is the same between MT6779 and MT8186. To reuse the
register offsets, we move these register offsets to another structure
"mtk_devapc_regs_ofs".

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220504115501.3490-3-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:15 +02:00
AngeloGioacchino Del Regno f1a95a356d soc: mediatek: pwrap: Compress of_device_id entries to one line
Compress each entry of the of_device_id tables in this driver to one
line instead of three, as they fit just fine in a single line.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220517104712.24579-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:15 +02:00
AngeloGioacchino Del Regno 43406cebf0 soc: mediatek: pwrap: Move IO pointers to new structure
In the PMIC Wrapper driver each PMIC has its own regmap configuration
and its own pwrap_{read/write}() callbacks, but it's just about either
a 32 bits vs 16 bits register, and only one of them uses 32bits regs:
this means that the same ops are assigned over and over again to all
of the supported PMICs.

It is therefore possible to avoid reassigning the same things over
and over, reducing the amount of lines, without any impact on human
readability of this driver: add a pwrap_slv_regops structure and
move the callbacks and regmap_config pointer in there instead.
This allows to assign just one pointer to that shared data in the
per-pmic struct pwrap_slv_type.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220517104712.24579-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:15 +02:00
AngeloGioacchino Del Regno 56a468b5f6 soc: mediatek: pwrap: Check return value of platform_get_irq()
Check for the return value of platform_get_irq(): if no interrupt
is specified, it wouldn't make sense to call devm_request_irq().

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220517104712.24579-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:14 +02:00
AngeloGioacchino Del Regno e84187fa6f soc: mediatek: pwrap: Switch to devm_platform_ioremap_resource_byname()
In order to simplify ioremapping resources, instead of calling
platform_get_resource_byname() and then devm_ioremap_resource(),
simply call devm_platform_ioremap_resource_byname().

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220517104712.24579-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:14 +02:00
AngeloGioacchino Del Regno 18c7deca2b soc: mediatek: pwrap: Use readx_poll_timeout() instead of custom function
Function pwrap_wait_for_state() is a function that polls an address
through a helper function, but this is the very same operation that
the readx_poll_timeout macro means to do.
Convert all instances of calling pwrap_wait_for_state() to instead
use the read_poll_timeout macro.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220517104712.24579-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-06-07 18:25:14 +02:00
Linus Torvalds 6f9b5ed8ca Char / Misc / Other smaller driver subsystem updates for 5.19-rc1
Here is the large set of char, misc, and other driver subsystem updates
 for 5.19-rc1.  The merge request for this has been delayed as I wanted
 to get lots of linux-next testing due to some late arrivals of changes
 for the habannalabs driver.
 
 Highlights of this merge are:
 	- habanalabs driver updates for new hardware types and fixes and
 	  other updates
 	- IIO driver tree merge which includes loads of new IIO drivers
 	  and cleanups and additions
 	- PHY driver tree merge with new drivers and small updates to
 	  existing ones
 	- interconnect driver tree merge with fixes and updates
 	- soundwire driver tree merge with some small fixes
 	- coresight driver tree merge with small fixes and updates
 	- mhi bus driver tree merge with lots of updates and new device
 	  support
 	- firmware driver updates
 	- fpga driver updates
 	- lkdtm driver updates (with a merge conflict, more on that
 	  below)
 	- extcon driver tree merge with small updates
 	- lots of other tiny driver updates and fixes and cleanups, full
 	  details in the shortlog.
 
 All of these have been in linux-next for almost 2 weeks with no reported
 problems.
 
 Note, there are 3 merge conflicts when merging this with your tree:
 	- MAINTAINERS, should be easy to resolve
 	- drivers/slimbus/qcom-ctrl.c, should be straightforward
 	  resolution
 	- drivers/misc/lkdtm/stackleak.c, not an easy resolution.  This
 	  has been noted in the linux-next tree for a while, and
 	  resolved there, here's a link to the resolution that Stephen
 	  came up with and that Kees says is correct:
 	  	https://lore.kernel.org/r/20220509185344.3fe1a354@canb.auug.org.au
 
 I will be glad to provide a merge point that contains these resolutions
 if that makes things any easier for you.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYpnkbA8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylOrgCggbbAFwESBY9o2YfpG+2VOLpc0GAAoJgY1XN8
 P/gumbLEpFvoBZ5xLIW8
 =KCgk
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc / other smaller driver subsystem updates from Greg KH:
 "Here is the large set of char, misc, and other driver subsystem
  updates for 5.19-rc1. The merge request for this has been delayed as I
  wanted to get lots of linux-next testing due to some late arrivals of
  changes for the habannalabs driver.

  Highlights of this merge are:

   - habanalabs driver updates for new hardware types and fixes and
     other updates

   - IIO driver tree merge which includes loads of new IIO drivers and
     cleanups and additions

   - PHY driver tree merge with new drivers and small updates to
     existing ones

   - interconnect driver tree merge with fixes and updates

   - soundwire driver tree merge with some small fixes

   - coresight driver tree merge with small fixes and updates

   - mhi bus driver tree merge with lots of updates and new device
     support

   - firmware driver updates

   - fpga driver updates

   - lkdtm driver updates (with a merge conflict, more on that below)

   - extcon driver tree merge with small updates

   - lots of other tiny driver updates and fixes and cleanups, full
     details in the shortlog.

  All of these have been in linux-next for almost 2 weeks with no
  reported problems"

* tag 'char-misc-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (387 commits)
  habanalabs: use separate structure info for each error collect data
  habanalabs: fix missing handle shift during mmap
  habanalabs: remove hdev from hl_ctx_get args
  habanalabs: do MMU prefetch as deferred work
  habanalabs: order memory manager messages
  habanalabs: return -EFAULT on copy_to_user error
  habanalabs: use NULL for eventfd
  habanalabs: update firmware header
  habanalabs: add support for notification via eventfd
  habanalabs: add topic to memory manager buffer
  habanalabs: handle race in driver fini
  habanalabs: add device memory scrub ability through debugfs
  habanalabs: use unified memory manager for CB flow
  habanalabs: unified memory manager new code for CB flow
  habanalabs/gaudi: set arbitration timeout to a high value
  habanalabs: add put by handle method to memory manager
  habanalabs: hide memory manager page shift
  habanalabs: Add separate poll interval value for protocol
  habanalabs: use get_task_pid() to take PID
  habanalabs: add prefetch flag to the MAP operation
  ...
2022-06-03 11:36:34 -07:00
Linus Torvalds 09a018176b ARM: SoC changes, part 2
This is the second part of the general SoC updates, containing
 everything that did not make it in the initial pull request,
 or that came in as a bugfix later.
 
  - Devicetree updates for SoCFPGA, ASPEED, AT91 and Rockchip, including
    a new machine using an ASPEED BMC.
 
  - More DT fixes from Krzysztof Kozlowski across platforms
 
  - A new SoC platform for the GXP baseboard management controller,
    used in current server products from HPE.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKY3lwACgkQmmx57+YA
 GNlwLQ//YCbh/iH0OfNYiyT8ugFQYmKxLccdnkW/5uJ+WHO4lPbxcXfw+SxPZl2X
 uxlrBn1/+LH+UUzeqmIUVJzmLE2x/mO6LKp3PwKdD0k+NeiFPKQYTVhUgIsLXN3c
 H79Hmgid1P1FoyaO9u3ZP/v8j4xTFaPN4JD+VsMzXup+yalkj+FZPK0vaWcuen4I
 xaf75FclA4hJ1KosoWHUs2kgMOCF+oxfHH4ikloBoDnpfhCPnNoTeXBHMQN+5+5V
 X+8YW8J/1y0v2pVKX+Zgb7iWA8e9SMUvI1NVv5v3K5JY03Pbp3g1FfiTvYVdIbb6
 OMaFlzu/DKmYuzvbWPawx5paq38GbjmlTVD/EfHx/vjaviVqXDrbnjetYW4sVE/x
 GP4ovMu5d9IijZMM5Oa0SxBOObBEmdcoWcDbSUWI91autPBdsPTEYr7m+R9eD6hZ
 GOsFAU4Jt9p0xVsnXGUNQIzU8J+7Rj1ZqtPqdvDQm99mri/2PqOdAIgb/zj563Ut
 6/BpqIiQm4Yfg/6YYQ6JPSaNYnsFhbwLkE2j/wBRRnCcWjsK3bb16nCV8977xFrX
 89Gy01Z9VlSBaZpoeXQFT4kmMn7edS86kDAVdF0NP5eCI9TpO3mt6WsQbMQoe9Dt
 Y3q0TuRjucBB7Re1uIIzWyfMvDePCan2rpDF4sDiqtR9188R9rg=
 =2qok
 -----END PGP SIGNATURE-----

Merge tag 'arm-late-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM SoC updates from Arnd Bergmann:
 "This is the second part of the general SoC updates, containing
  everything that did not make it in the initial pull request, or that
  came in as a bugfix later.

   - Devicetree updates for SoCFPGA, ASPEED, AT91 and Rockchip,
     including a new machine using an ASPEED BMC.

   - More DT fixes from Krzysztof Kozlowski across platforms

   - A new SoC platform for the GXP baseboard management controller,
     used in current server products from HPE"

* tag 'arm-late-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (56 commits)
  ARM: configs: Enable more audio support for i.MX
  tee: optee: Pass a pointer to virt_addr_valid()
  arm64: dts: rockchip: rename Quartz64-A bluetooth gpios
  arm64: dts: rockchip: add clocks property to cru node rk3368
  arm64: dts: rockchip: add clocks property to cru node rk3308
  arm64: dts: rockchip: add clocks to rk356x cru
  ARM: dts: rockchip: add clocks property to cru node rk3228
  ARM: dts: rockchip: add clocks property to cru node rk3036
  ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188
  ARM: dts: rockchip: add clocks property to cru node rk3288
  ARM: dts: rockchip: Remove "amba" bus nodes from rv1108
  ARM: dts: rockchip: add clocks property to cru node rv1108
  arm64: dts: sprd: use new 'dma-channels' property
  ARM: dts: da850: use new 'dma-channels' property
  ARM: dts: pxa: use new 'dma-channels/requests' properties
  soc: ixp4xx/qmgr: Fix unused match warning
  ARM: ep93xx: Make ts72xx_register_flash() static
  ARM: configs: enable support for Kontron KSwitch D10
  ep93xx: clock: Do not return the address of the freed memory
  arm64: dts: intel: add device tree for n6000
  ...
2022-06-02 15:27:44 -07:00
Linus Torvalds 96479c0980 ARM: multiplatform changes, part 2
The second part of the multiplatform changes now converts the
 Intel/Marvell PXA platform along with the rest. The patches went through
 several rebases before the merge window as bugs were found, so they
 remained separate.
 
 This has to touch a lot of drivers, in particular the touchscreen,
 pcmcia, sound and clk bits, to detach the driver files from the
 platform and board specific header files.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKZKqsACgkQmmx57+YA
 GNnO/w//dgJBlkmoIIKlG2eJsvoUKwDt7MuLEMCqSqYYUSvMENFwKK66INMDIJ3l
 PmKf94JadlpBm2OB2vzW+D1EtaLGX9eXZkKD+vyB1I1yFkKdzEPcAfitfrRwe58E
 pR4nQd/jVL4UCY+pp442O1q9VvMpMV9P4ILJGPS/PpsD5CT9Gn8m9svIIuNuDRFd
 nwpyZC3l32jVLo9iuLmwZUvxtOWI3hTqZrnxhByBhlvtnGexRsq/VhfubK2uzBi1
 CyWHjqzOSmseGmsUDwv9LFqVV9YRCeisS3IElA5L0VgM0XvHKA+f9qyF7V6zI20g
 y9LtqhdAtiTpE/aUrOW2LDYaM/bc7RilYZrWchoZbCEsHhV4C+ld3QoTyxvGscvG
 tbznhvZKdUNX8LHS0J9NqIj1q1YGN5ei5r/C5R8DBj1q8VcTVnq3dms8xzVTd35o
 xS5BbLFliiI96jc7S6LaQizXheYjAfdPhmXUAxNXvWIVQ6SXnf8/U/RB9Zzjb8hm
 FH2Gu8m/Dh2MHKBBRWSVw8VahV0V7WiEaWeYuwwTbW1wUrsWiizVaPnqrt6Cq9DW
 oJZgBvktWEXUQz73qrnvwo9GjcKqAxaWKWq05hHKHKuLGezsPAyIhIKr51V2xqqw
 cp2OIMCsN5GYENOhHvt6BMRAI5iA4VyFDtWAqw9B6EIwno6N7Z4=
 =cnSb
 -----END PGP SIGNATURE-----

Merge tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM multiplatform updates from Arnd Bergmann:
 "The second part of the multiplatform changes now converts the
  Intel/Marvell PXA platform along with the rest. The patches went
  through several rebases before the merge window as bugs were found, so
  they remained separate.

  This has to touch a lot of drivers, in particular the touchscreen,
  pcmcia, sound and clk bits, to detach the driver files from the
  platform and board specific header files"

* tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  ARM: pxa/mmp: remove traces of plat-pxa
  ARM: pxa: convert to multiplatform
  ARM: pxa/sa1100: move I/O space to PCI_IOBASE
  ARM: pxa: remove support for MTD_XIP
  ARM: pxa: move mach/*.h to mach-pxa/
  ARM: PXA: fix multi-cpu build of xsc3
  ARM: pxa: move plat-pxa to drivers/soc/
  ARM: mmp: rename pxa_register_device
  ARM: mmp: remove tavorevb board support
  ARM: pxa: remove unused mach/bitfield.h
  ARM: pxa: move clk register definitions to driver
  ARM: pxa: move smemc register access from clk to platform
  cpufreq: pxa3: move clk register access to clk driver
  ARM: pxa: remove get_clk_frequency_khz()
  ARM: pxa: pcmcia: move smemc configuration back to arch
  ASoC: pxa: i2s: use normal MMIO accessors
  ASoC: pxa: ac97: use normal MMIO accessors
  ASoC: pxa: use pdev resource for FIFO regs
  Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
  Input: wm97xx - switch to using threaded IRQ
  ...
2022-06-02 15:23:54 -07:00
Linus Torvalds 1ff7bc3ba7 More power management updates for 5.19-rc1
- Add Tegra234 cpufreq support (Sumit Gupta).
 
  - Clean up and enhance the Mediatek cpufreq driver (Wan Jiabing,
    Rex-BC Chen, and Jia-Wei Chang).
 
  - Fix up the CPPC cpufreq driver after recent changes (Zheng Bin,
    Pierre Gondois).
 
  - Minor update to dt-binding for Qcom's opp-v2-kryo-cpu (Yassine
    Oudjana).
 
  - Use list iterator only inside the list_for_each_entry loop (Xiaomeng
    Tong, and Jakob Koschel).
 
  - New APIs related to finding OPP based on interconnect bandwidth
    (Krzysztof Kozlowski).
 
  - Fix the missing of_node_put() in _bandwidth_supported() (Dan
    Carpenter).
 
  - Cleanups (Krzysztof Kozlowski, and Viresh Kumar).
 
  - Add Out of Band mode description to the intel-speed-select utility
    documentation (Srinivas Pandruvada).
 
  - Add power sequences support to the system reboot and power off
    code and make related platform-specific changes for multiple
    platforms (Dmitry Osipenko, Geert Uytterhoeven).
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmKU8lESHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxVz0P91LNCbkDSt60jzNkXdEjsvUnI/YjJ+QJ
 /+ta7iCwf90obb6s9soBkTyU8Ia7hJ/IWDJW/5xhdG0ySYF17hGNIGKK9xKGsJFK
 tzzWtjFsvT3PeUZQERekqWp8OYskHYmQMj8o4jqqFF7DZD/AswTgkVLALUd7YhVL
 UvLmcKsUA7eXy3ZrhtrGSzVSEbKOGXBLFyjy3IuWjfz6Uk/nGQRNKGf7byRWLM44
 y7zb75/5+p4MPyyJP8M/uiXzEYDKuubRtfx9PdmLgBUSMbtho6eB1x47dZWooaxe
 YKmcFjF80AmnwxHb+Te2rZHPeIYr+5hLBaEq7xaLQf/nAS3y5z1PIfI2wVQ5mXPz
 D599jHHda/6oSAKCVTq2fKfnlR6fetm5j66xOQINpD+G5b5tNSpllXJDamFZxFgP
 DiQAOFzdnRYnK7yTiLWVl1q76SVRxqsGz7/5Ak+NRj2OQK2wRkLzHuZfiV/8r0pk
 ksi6Ew9TerXkstoTQsSToPQxB2VvosSajNU3Oy27pmM0oal1XxP0LIPz9sMor5/g
 tfk5f6Yz/+FFIfXj3cZffZNdhsJgejmcqPdrSdCOV3sBrblnIMQNpHiYg4jGztoj
 IjYKYPVpSaWiSZLQOaK2moTEvm9CfQz1TQCF+/Kz88LX6/7ZaDJFxHG2FDEob0sg
 6KVbrZWweLI=
 =PAh+
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more power management updates from Rafael Wysocki:
 "These update the ARM cpufreq drivers and fix up the CPPC cpufreq
  driver after recent changes, update the OPP code and PM documentation
  and add power sequences support to the system reboot and power off
  code.

  Specifics:

   - Add Tegra234 cpufreq support (Sumit Gupta)

   - Clean up and enhance the Mediatek cpufreq driver (Wan Jiabing,
     Rex-BC Chen, and Jia-Wei Chang)

   - Fix up the CPPC cpufreq driver after recent changes (Zheng Bin,
     Pierre Gondois)

   - Minor update to dt-binding for Qcom's opp-v2-kryo-cpu (Yassine
     Oudjana)

   - Use list iterator only inside the list_for_each_entry loop
     (Xiaomeng Tong, and Jakob Koschel)

   - New APIs related to finding OPP based on interconnect bandwidth
     (Krzysztof Kozlowski)

   - Fix the missing of_node_put() in _bandwidth_supported() (Dan
     Carpenter)

   - Cleanups (Krzysztof Kozlowski, and Viresh Kumar)

   - Add Out of Band mode description to the intel-speed-select utility
     documentation (Srinivas Pandruvada)

   - Add power sequences support to the system reboot and power off code
     and make related platform-specific changes for multiple platforms
     (Dmitry Osipenko, Geert Uytterhoeven)"

* tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (60 commits)
  cpufreq: CPPC: Fix unused-function warning
  cpufreq: CPPC: Fix build error without CONFIG_ACPI_CPPC_CPUFREQ_FIE
  Documentation: admin-guide: PM: Add Out of Band mode
  kernel/reboot: Change registration order of legacy power-off handler
  m68k: virt: Switch to new sys-off handler API
  kernel/reboot: Add devm_register_restart_handler()
  kernel/reboot: Add devm_register_power_off_handler()
  soc/tegra: pmc: Use sys-off handler API to power off Nexus 7 properly
  reboot: Remove pm_power_off_prepare()
  regulator: pfuze100: Use devm_register_sys_off_handler()
  ACPI: power: Switch to sys-off handler API
  memory: emif: Use kernel_can_power_off()
  mips: Use do_kernel_power_off()
  ia64: Use do_kernel_power_off()
  x86: Use do_kernel_power_off()
  sh: Use do_kernel_power_off()
  m68k: Switch to new sys-off handler API
  powerpc: Use do_kernel_power_off()
  xen/x86: Use do_kernel_power_off()
  parisc: Use do_kernel_power_off()
  ...
2022-05-30 11:37:26 -07:00
Arnd Bergmann 4a4e81ddb8 Refcount leak for a used of-node in the grf-init.
-----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmKD9OcQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgZDNB/9QBkDadcTEzn1GpRDZb8b4tpBrBiyYzNEl
 458EpbcqHi40HejXq4ZlzdniyZtl1eeRGd76aXpmc5azHPK+DhjvChKfhV+YWi/y
 aTJtLIreZEZuu3TH74PVrHr81sj+5TuZBVat5M3/dGNzIEkTm6CsiM07U9h2f5sD
 uktLk1aUioC5DRMxHCrEtmZmsiQT/uukwwiNVckuSjiRRlVlTd1NFzKqggs1yqNh
 TSQ3d/vnl1C+nw7ErwludYVtkUiVpoShKQp8GCvAMXo4aPuxEnto87UvOsdbibJW
 Xp8R/NuoE7W+iXLvwg4AuHS27/8oyJfxIt2PDA1Cw57A1oumtVeG
 =fSY+
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKRMmQACgkQmmx57+YA
 GNmu6w/+JD6MYF81WZEUosKh7qOjfuLMAsJvjAV/x3ibYHIM7NBF6PwarDqAN5Z7
 QNNGDK4kVF5IJBWHohWVk0YhR8JKkwWSFlaGJxwRTRGoKEfK3aAH5en5yCrxDRRO
 Vsft5DT2fxELhE2bD8VweqPrKibH6nKUwadfAzWLdKBFFITU/lv2hDU4HL+ett0t
 Rlppu2lu674iWD18W8q8ozpZArchgQ76vW2ZfYoq8vNVY1B6WxjmdGKw9brMBqaM
 dd03tEJ1qaL8j6eO91GfEHGWm8+rL5QLTILNSZ9ma/vg/RaXyn18VCuuU+hG06DK
 aLsplf7GXNxcR/QVWEeT9vUCzGCQAr9EGyZ33qgmZv/bBhfTQOcGuE76SKxbn/6I
 eBFFPoM9dHtk2GM3qhTARHa4UqSWD6lfFGD0NhDBpVVHUN3N4RFXVuoOradz2Oj3
 DvBRyysYmkVzGOzHaqCjRz0A08Gms6U1KwHt0+4Fwf0kcs+zdvLS7mkVHOF5LuVY
 5XVgp+Z8eZtOH1utoC8/bXcGymi2ij8GHZ5PCG3piYalriTuvZExZThnKzpcMQ4A
 HVmfMJ9oroUArmgzbEHGBWSR8QQa6OCEoRHPj9gJGaKaTqNJTybNxhlk58qI7twP
 EfJ7MGQlpE6dRcAuL1tVD0CqFyGEO7pMwUNDLY0ltD7gMOYDA5k=
 =qzen
 -----END PGP SIGNATURE-----

Merge tag 'v5.19-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late

Refcount leak for a used of-node in the grf-init.

* tag 'v5.19-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: Fix refcount leak in rockchip_grf_init

Link: https://lore.kernel.org/r/4541398.Icojqenx9y@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 22:19:48 +02:00
Linus Walleij 526f3f3b10
soc: ixp4xx/qmgr: Fix unused match warning
The kernel test robot found this inconsistency:

>> drivers/soc/ixp4xx/ixp4xx-npe.c:737:34: warning:
  'ixp4xx_npe_of_match' defined but not used [-Wunused-const-variable=]
     737 | static const struct of_device_id ixp4xx_npe_of_match[] = {

This is because the match is enclosed in the of_match_ptr()
which compiles into NULL when OF is disabled and this
is unnecessary.

Fix it by dropping of_match_ptr() around the match.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220523085520.913217-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 16:02:21 +02:00
Linus Torvalds cc3c470ae4 ARM: driver changes for 5.19
There are minor updates to SoC specific drivers for chips by Rockchip,
 Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy
 driver changes include:
 
 - Several conversions of DT bindings to yaml format.
 
 - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs.
 
 - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core),
   and support for more chips in the RPMh power domains and the soc-id.
 
 - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP.
 
 - Apple M1 gains support for the on-chip NVMe controller, making it
   possible to finally use the internal disks. This also includes SoC
   drivers for their RTKit IPC and for the SART DMA address filter.
 
 For other subsystems that merge their drivers through the SoC tree,
 we have
 
 - Firmware drivers for the ARM firmware stack including TEE, OP-TEE,
   SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE
   now has a cache for firmware argument structures as an optimization,
   and SCMI now supports the 3.1 version of the specification.
 
 - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers
 
 - Memory controller updates for Tegra, and a few updates for other
   platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOXOoACgkQmmx57+YA
 GNlpVQ//eQGfL0WktE5G/y0mCVuVHtXT5nSjHMgjTOdb9+QvaATCfxnLXvP7Gq7C
 7YzJd68G+2ZC4rUkkjTxyMICT7eIrJSAIAFn4PWee4EQ5DfbHgG+1tToTjxqb+QQ
 6wGB5MVaYUhjZE30kY2E8a+OKxHtEnkt9wcch6ei0vzsMZquQJF6byfHd5+I4Knd
 CyDmXX8ZGXK3FnhvuBLr3Rgwyhs0X4Ju7UaONLZxBYxdnh8WmymRszmMnv5qEkub
 KDe8fbhFamOT3Z55JdCA5xq7LvUzjsKpTGFxFcS0ptbkTmtAsuyYqqiWvAPx3D5u
 5TxVGSx9QKid6fpIsITZ2ptO6fgljh1W9b/3Y3/eltudXsM1qqSxyN2Hre+M9egf
 WEDADqbNR5Y5+bq1iZWI348jXkNHVPpsLHI9Ihqf4yyrKwFkmRmNLnws53XTAPH2
 FPXZvJjwFDBDHGfewSoLFePXUPNytVLXbr6Mq72ZyTDIBDU8Mxh666Wd8bu4tgbG
 1Y2pMjDIdXDOsljM6Of5D3XjM1kuDwEmFxWGy+cKLgoEbHLeE1xIbTjUir4687+d
 VNHdtsIRFPRZzz2lUSmI8vlA2aewMWrkOF/Ulz8xh6gG8uitMSfOxghg4IWOfRVM
 mlvgFP5eqTInmQcbWRxaRO9JzP+rPp1sAcEpsBmuEHw5Akflbc8=
 =XoLF
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "There are minor updates to SoC specific drivers for chips by Rockchip,
  Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom.

  Noteworthy driver changes include:

   - Several conversions of DT bindings to yaml format.

   - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs.

   - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core),
     and support for more chips in the RPMh power domains and the
     soc-id.

   - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP.

   - Apple M1 gains support for the on-chip NVMe controller, making it
     possible to finally use the internal disks. This also includes SoC
     drivers for their RTKit IPC and for the SART DMA address filter.

  For other subsystems that merge their drivers through the SoC tree, we
  have

   - Firmware drivers for the ARM firmware stack including TEE, OP-TEE,
     SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE
     now has a cache for firmware argument structures as an
     optimization, and SCMI now supports the 3.1 version of the
     specification.

   - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI
     drivers

   - Memory controller updates for Tegra, and a few updates for other
     platforms"

* tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits)
  memory: tegra: Add MC error logging on Tegra186 onward
  memory: tegra: Add memory controller channels support
  memory: tegra: Add APE memory clients for Tegra234
  memory: tegra: Add Tegra234 support
  nvme-apple: fix sparse endianess warnings
  soc/tegra: pmc: Document core domain fields
  soc: qcom: pdr: use static for servreg_* variables
  soc: imx: fix semicolon.cocci warnings
  soc: renesas: R-Car V3U is R-Car Gen4
  soc: imx: add i.MX8MP HDMI blk-ctrl
  soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
  soc: imx: add i.MX8MP HSIO blk-ctrl
  soc: imx: imx8m-blk-ctrl: set power device name
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc/tegra: pmc: Select REGMAP
  dt-bindings: reset: st,sti-powerdown: Convert to yaml
  dt-bindings: reset: st,sti-picophyreset: Convert to yaml
  dt-bindings: reset: socfpga: Convert to yaml
  dt-bindings: reset: snps,axs10x-reset: Convert to yaml
  ...
2022-05-26 10:32:47 -07:00
Linus Torvalds c011dd537f ARM: updates for 32-bit SoCs
These updates are for platform specific code in arch/arm/, mostly fixing
 minor issues. The at91 platform gains support for better power
 management on the lan966 platform and new firmware on the sama5
 platform. The mediatek soc drivers in turn are enabled for the new
 mt8195 SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKORHMACgkQmmx57+YA
 GNnKYA//QhTTZePOMqHZHBVU4dqJuHrjd+rwME5u7a6hqSe3VYaFao6LF+P5fAzR
 IWk8svgCJLIdRx4tnA+kE7LIBsJoPwXYxhGUlgM5CfrxYClQuofnWP58Z+EbIAXx
 VIboLBW1Anw5y7zw+0JkB01DMuGzDDFnUJ4Y+0M3aW3VGC8wJXc+dM+t8BWOn7OW
 DNTcXfJgkRJBtzT++tMU4Z7Kmn//i4xohuT7dwJW4vvIfTL350Bl5Z1EHGnScfMk
 HgbJD5iF7Z12jj7ureuWengr/MN1eAPs18ZdWRcmo4Ie5IDWB50dMoYifjp/tslO
 oXRODrGCuX9yOjcjleGU1mAbb7zqoaThZcbI0yjVOaVwyU0fQR9NFJTqmSEEX97p
 LPZHU1CtAjRns7BW3ons9wPhy4s1xSPopJaHiXDwMMzAlx+kTcoFlFFvWCSlrcOC
 MMo+eN1BQ3SbIxi3Ji3p6MnmSLIiE/wq4nKCEagKAv+AjtqRXYDIsT+28A96Xgeo
 1R5agDamDMp0h6ZrhHMGSIgppWe+qvX14Jp3Hw0Nocgdyf8ABDR9H3/gZasXKbZu
 LrbNLn3vNVKTMn9YpM0T94Uwf0nFPH6MOzFVmjahRute3TU7ioSXxbVPpNuiOkXj
 RFXe1YUoILjLJgHZSUEpdHP+meGUjeScHTQt6jV97WfTeq2ZALg=
 =Eoh1
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull 32-bit ARM SoC updates from Arnd Bergmann:
 "These updates are for platform specific code in arch/arm/, mostly
  fixing minor issues.

  The at91 platform gains support for better power management on the
  lan966 platform and new firmware on the sama5 platform. The mediatek
  soc drivers in turn are enabled for the new mt8195 SoC"

* tag 'arm-soc-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (34 commits)
  ARM: at91: debug: add lan966 support
  ARM: at91: pm: add support for sama5d2 secure suspend
  ARM: at91: add code to handle secure calls
  ARM: at91: Kconfig: implement PIT64B selection
  ARM: at91: pm: add quirks for pm
  ARM: at91: pm: use kernel documentation style
  ARM: at91: pm: introduce macros for pm mode replacement
  ARM: at91: pm: keep documentation inline with structure members
  orion5x: fix typos in comments
  ARM: hisi: Add missing of_node_put after of_find_compatible_node
  ARM: shmobile: rcar-gen2: Drop comma after OF match table sentinel
  ARM: shmobile: Drop commas after dt_compat sentinels
  soc: mediatek: mutex: remove mt8195 MOD0 and SOF0 definition
  MAINTAINERS: Add Broadcom BCMBCA entry
  arm: bcmbca: add arch bcmbca machine entry
  MAINTAINERS: Broadcom internal lists aren't maintainers
  dt-bindings: pwrap: mediatek: Update pwrap document for mt8195
  soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0
  soc: mediatek: add mtk-mutex support for mt8195 vdosys0
  soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
  ...
2022-05-26 10:25:22 -07:00
Rafael J. Wysocki 14c03a4a75 Merge back reboot/poweroff notifiers rework for 5.19-rc1. 2022-05-25 14:38:29 +02:00
Miaoqian Lin a2106f3807 meson-mx-socinfo: Fix refcount leak in meson_mx_socinfo_init
of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: 5e68c0fc8d ("soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220524065729.33689-1-linmq006@gmail.com
2022-05-25 09:19:01 +02:00
Dmitry Osipenko eae813b755 soc/tegra: pmc: Use sys-off handler API to power off Nexus 7 properly
Nexus 7 Android tablet can be turned off using a special bootloader
command which is conveyed to bootloader by putting magic value into the
special scratch register and then rebooting normally. This power-off
method should be invoked if USB cable is connected. Bootloader then will
display battery status and power off the device. This behaviour is
borrowed from downstream kernel and matches user expectations, otherwise
it looks like device got hung during power-off and it may wake up on
USB disconnect.

Switch PMC driver to sys-off handler API, which provides drivers with
chained power-off callbacks functionality that is required for powering-off
devices properly. It also brings resource-managed API for the restart
handler registration that makes PMC driver code cleaner.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-05-19 19:30:31 +02:00
Abhyuday Godhasara e6d3c99adf driver: soc: xilinx: Update function prototype for xlnx_unregister_event
As per the current implementation only single callback data gets saved per
event, driver is throwing an error if try to register multiple callback for
same event. So at time of unregistration of any event required things are
event details and callback handler as parameter of xlnx_unregister_event().

As part of adding support of multiple callbacks for same event also require
change in prototype of xlnx_unregister_event().
During unregistration of any events, now required things are event details,
callback handler and agent's private data as parameter of
xlnx_unregister_event().

Also modify the usage of xlnx_unregister_event() in xilinx/zynqmp_power.c
driver as per new implementation.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Link: https://lore.kernel.org/r/20220427074803.19009-3-abhyuday.godhasara@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-19 18:57:28 +02:00
Abhyuday Godhasara 05e5ba40ea driver: soc: xilinx: Add support of multiple callbacks for same event in event management driver
As per the current implementation of only single callback data gets
saved per event, driver is throwing an error if try to register multiple
callback for same event.

Add support of multiple callbacks data for same event. So agent can
register for same event with multiple callbacks. Here event management
driver will store the callbacks as list in Hash table entry for that event.

Here each callback data contain 2 element as callback handler and private
data of agent driver.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Link: https://lore.kernel.org/r/20220427074803.19009-2-abhyuday.godhasara@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-19 18:57:28 +02:00
Rafael J. Wysocki d44d6c4a3a Update devfreq next for v5.19
Detailed description for this pull request:
 1. Update devfreq core
 - Add cpu based scaling support to passive governor. Some device like
 cache might require the dynamic frequency scaling. But, it has very
 tightly to cpu frequency. So that use passive governor to scale
 the frequency according to current cpu frequency.
 
 To decide the frequency of the device, the governor does one of the following:
 : Derives the optimal devfreq device opp from required-opps property of
   the parent cpu opp_table.
 
 : Scales the device frequency in proportion to the CPU frequency. So, if
   the CPUs are running at their max frequency, the device runs at its
   max frequency. If the CPUs are running at their min frequency, the
   device runs at its min frequency. It is interpolated for frequencies
   in between.
 
 2. Update devfreq driver
 - Update rk3399_dmc.c as following:
 : Convert dt-binding document to YAML and deprecate unused properties.
 
 : Use Hz units for the device-tree properties of rk3399_dmc.
 
 : rk3399_dmc is able to set the idle time before changing the dmc clock.
   Specify idle time parameters by using nano-second unit on dt bidning.
 
 : Add new disable-freq properties to optimize the power-saving feature
   of rk3399_dmc.
 
 : Disable devfreq-event device on remove() to fix unbalanced
   enable-disable count.
 
 : Use devm_pm_opp_of_add_table()
 
 : Block PMU (Power-Management Unit) transitions when scaling frequency
   by ARM Trust Firmware in order to fix the conflict between PMU and DMC
   (Dynamic Memory Controller).
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmKDddYWHGN3MDAuY2hv
 aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU1o0EACGE7FV/pA/sbOFhhLXQlI1XMQf
 C2XVvjigP5M7Y9qgM6qLBKCSmRPbBjuO4VLKkIycmo2GRcUs+Sk5CqALjWZF0tDR
 aiAV+P3wIC2pCZNtAXJG6BhP5GNzGYYdv2zJfNmVUsYUYVC3ezppuE1Yp2Sscq5t
 K43eAOq0c9+TTeLfdDKdi07QtevMHwbOxjNUhwnzN5+yD9cknK1Ht5FVjDc8eYTG
 yBJPgMy9qhNqEZ4gl9zpKJkpAJMOhquT4ZtytNioIfnmKCrpyiOy+yApvW5WiU1d
 /8KMiG42C47rUBYCiEGEdn6PaTOpuOK0hnuoxlxE07dqJP349SbozFTqZxfbCJhI
 OjZSdLTolPFq82zuAafBJmijmeAiYdI0FKrhXmQo4doeleIQG9z0h8YpkQSnF47L
 xsj7QswD0LxtMQbYv5zds1NoGnUn/U+TpoJ8mbpg5gPWKaBTNdTZFJQj+HXtrDyy
 1ouR41u6kOoLLDHu2I5f9dTMptJRg3jS+kQfDv17K8u5mAmcwFidpOiyac6m2xad
 Nnn85NAE9JaxpzVe3+S3uQdscEe2FBWEZCkbrCcPn2T88BZwrfcby02YRBw22WkS
 p4xPAOncw4lhZ6z3pedcH/1+kk6uoTube5QK8ddSRxYrRavtOsqchAaec+hYRNif
 CbjJOqsdbDLa7ANLxw==
 =/3W8
 -----END PGP SIGNATURE-----

Merge tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux

Pull devfreq changes for 5.19-rc1 from Chanwoo Choi:

"1. Update devfreq core

 - Add cpu based scaling support to passive governor. Some device like
   cache might require the dynamic frequency scaling. But, it has very
   tightly to cpu frequency. So that use passive governor to scale
   the frequency according to current cpu frequency.

  To decide the frequency of the device, the governor does one of the following:
  : Derives the optimal devfreq device opp from required-opps property of
    the parent cpu opp_table.

  : Scales the device frequency in proportion to the CPU frequency. So, if
    the CPUs are running at their max frequency, the device runs at its
    max frequency. If the CPUs are running at their min frequency, the
    device runs at its min frequency. It is interpolated for frequencies
    in between.

 2. Update devfreq drivers

  - Update rk3399_dmc.c as following:

   : Convert dt-binding document to YAML and deprecate unused properties.

   : Use Hz units for the device-tree properties of rk3399_dmc.

   : rk3399_dmc is able to set the idle time before changing the dmc clock.
     Specify idle time parameters by using nano-second unit on dt bidning.

   : Add new disable-freq properties to optimize the power-saving feature
     of rk3399_dmc.

   : Disable devfreq-event device on remove() to fix unbalanced
     enable-disable count.

   : Use devm_pm_opp_of_add_table()

   : Block PMU (Power-Management Unit) transitions when scaling frequency
     by ARM Trust Firmware in order to fix the conflict between PMU and DMC
     (Dynamic Memory Controller)."

* tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
  PM / devfreq: passive: Keep cpufreq_policy for possible cpus
  PM / devfreq: passive: Reduce duplicate code when passive_devfreq case
  PM / devfreq: Add cpu based scaling support to passive governor
  PM / devfreq: Export devfreq_get_freq_range symbol within devfreq
  PM / devfreq: rk3399_dmc: Block PMU during transitions
  soc: rockchip: power-domain: Manage resource conflicts with firmware
  PM / devfreq: rk3399_dmc: Avoid static (reused) profile
  PM / devfreq: rk3399_dmc: Use devm_pm_opp_of_add_table()
  PM / devfreq: rk3399_dmc: Disable edev on remove()
  PM / devfreq: rk3399_dmc: Support new *-ns properties
  PM / devfreq: rk3399_dmc: Support new disable-freq properties
  PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD
  PM / devfreq: rk3399_dmc: Drop excess timing properties
  PM / devfreq: rk3399_dmc: Drop undocumented ondemand DT props
  dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties
  dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds
  dt-bindings: devfreq: rk3399_dmc: Fix Hz units
  dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties
  dt-bindings: devfreq: rk3399_dmc: Convert to YAML
2022-05-18 20:55:34 +02:00
Miaoqian Lin 9b59588d8b soc: rockchip: Fix refcount leak in rockchip_grf_init
of_find_matching_node_and_match returns a node pointer with refcount
incremented, we should use of_node_put() on it when done.
Add missing of_node_put() to avoid refcount leak.

Fixes: 4c58063d42 ("soc: rockchip: add driver handling grf setup")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220516072013.19731-1-linmq006@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-05-17 10:49:37 +02:00
Arnd Bergmann d4a3b44233 Powerdomain fixes and improvements, some GRF compatible properties
and a rk3566 GRF clocksource default setup.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmJ8Q84QHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgT31B/9d8fq4fBg9mkF6s0CtFMzw/KOO0ybaxcmx
 6KmIbFPOFJfhgXf1EZOl5S555XiIK4Sj24PQA8ySCnu/8jt9SV3dss5rTnaEiG+b
 TTxzndBFITLunvqMNa0wSSeGyQP1Hh5Y9QAEQS9Xy+L4Hnn1t+F8dX92JUEHos9E
 Ox9mPAiTN/dj/FFT8gYTv4gEIwtxf3y0VpwdejeyLkOmIHiwK/Te1nclty9q9aMM
 2OQsSZdF0cAV2oxjEaeVoTRowAWqrlY+RF0px12RFAa/CwrNkW57qHCWKfCjfmoI
 WIJ44bxPWF4OhEG4/sRTYRysklofGRw3dtQSxZlUKbMy9v67pyFU
 =vglc
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ+JfUACgkQmmx57+YA
 GNkU7w//ZhChli63CICSuwykKyvgp7esVMmjUZ08WpPHAPrvG/CBKO3QkQbqcixY
 DTtWNnZau4gOEizOmLn7McvSe3K6f1C3HGtgoNIt7JhQFe0b7zDZ9/xRv7lE/u5a
 XxnS/0s/JYzkzXsfsSLEvzV+9cgsRQyO5gD3ZlAtPpbHReNCFjcA44Bzk5eoXgY9
 ZTL/8yryreHc6cnOiERaKyf3+lTfAXcF6gk0q07psFT61ofl4BwQVNe+esKDiU3l
 DqekGWDfF0HWLYWmhXqmFPVIgnuRzlbvBpkb6R8QgTxIvopKWeUFs2GoqPKs1bln
 sVsevaW4GSO138J0K2l+SeeW/KVskSGblZlVEtlQhztD3yOhuVnVabKu+Mc3rNaC
 LzKgt0qjzddtHGwPMbvQdig/XkgCMIy8ZTPLn73BH8kQGmBORBc+pvTlhsgvXCXc
 t/4ixo3jOjDo+fRe2/4cNpPOSqj0Wdm8WYGdwuLs6K42EH553MtVFGLOVN45+Dzd
 5pwzOf9UaDtOcGDQ0mpJztNKWhAn3j6RyvnLnBqDS+pE1Evf5hu1zvRAXaNNKw7b
 9L08VMf27d1eZQqsc3vTBb/M/YNV9zq4DwcaJJCpISCRlDQDqIEUdJSlG3rjV2jo
 YIL85kEnYnx0iuHJYN24JtymttXykdx8Qsk6M8wFkxu/QC7rWZ8=
 =M9KR
 -----END PGP SIGNATURE-----

Merge tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers

Powerdomain fixes and improvements, some GRF compatible properties
and a rk3566 GRF clocksource default setup.

* tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: Fix compile-testing SoC drivers
  soc: rockchip: power-domain: Replace dsb() with smb()
  soc: rockchip: Clean up Kconfig whitespace
  soc: rockchip: set dwc3 clock for rk3566
  dt-bindings: soc: rockchip: add rk3566-pipe-grf compatible
  soc: rockchip: pm_domains: Fix typo in comment
  dt-bindings: soc: rockchip: add naneng combo phy register compatible

Link: https://lore.kernel.org/r/3998951.tdWV9SEqCh@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-13 11:33:41 +02:00
Arnd Bergmann 3f656f2618 Qualcomm driver updates for v5.19
This converts a wide range of Qualcomm-related DeviceTree bindings to
 YAML, in order to improve our ability to validate the DeviceTree source.
 
 The RPMh power-domain driver gains support for the modem platform SDX65,
 the compute platform SC8280XP and the automotive platform SA8540p. While
 LLCC gains support for SC8180X and SC8280XP and gains a
 MODULE_DEVICE_TABLE() to make it functional as a module.
 
 It adds a driver for configuring the SSC bus, providing Linux access to
 the hardware blocks in the sensor subsystem.
 
 The socinfo driver gets confusion related to MSM8974 Pro sorted out and
 adds new ids for SM8540 and SC7280.
 
 The SCM driver gains support for MSM8974.
 
 Add missing of_node_put() in smp2p and smsm drivers.
 Stop using iterator after list_for_each_entry() and define static
 definitions as such, in the PDR driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmJ5WsYbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FIo8P+wcc78TQQuG67nqPr2gb
 QFqVK8U2mz07XW0H1rnGZKsTSrZxFs/YWRBaw+dYC5OZVJHx/uoZM04Njsyy/DFh
 UaNQgTgsS4+D5+butveh4lBdmk4ja5sreLHw25/azw5VBzeHb9+4HeAd7QMMQ+BO
 /EvIlykPwsgGIZwabzDHkY8w/xt64CPiajps1qGlFDJedSLsdJ8bKHctvcFD03v3
 3utJku3jAc5SZMBQgDttpPwpn7UnHXjCvWxyz8oSFaWDQBROztH0FbiJsZnjMuFI
 9RfRqblgb2PkvaG23W7jv68aJf3yQ6siY8ezPPs3/1F6T6tMQaAKEhwrY93ZQiWc
 gDDx33TvX3YJiRRdC2Gvg1QpL4xMFUERR8o4ooQ0t+b8bG6TkGP44VVg3/n1wrMK
 Q5xdgDigfrNnVZV1b2flQHc4qke4hNoV23SQ7iFWvtSJO09xklVJhXFGQ6mthEkb
 PnBFurLyxglKw6afs1/2P8tplS52K0l19lgNJu6vtUzC6fMOg50cX0mmWP8+rkFb
 njhXlPqCDataECZazyxnn7KORAn3E7zQceJ/LJeV+XZ9i5DJLXup+JkuBCWem4Nd
 ucEeYtQVRel5FCWZZzkXviPCTlWgTB7ya7pJPCzvZpnNFHeSWSjr9YK6xtWwy9rP
 CBRXYrz2gJLV/MGkB1piAwkm
 =/Dqp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5hB4ACgkQmmx57+YA
 GNksBxAAj09+d2U1sFSJl3HiHTrXyg3MYoG0dA1QK2CRKucdwMf6KBGpEHTQyL6a
 Iqan6URrTqEM3WP4suBsZh8vbv1C8u7KGWwDAMqJ18BkigoGHEV1PyvmHYRvPoT2
 6DSHAkGbYfDglxXZ4JcxNaQk3+t6rZpe5LcRRgQ7JpoKfzlqKxfSJfPFLzYAvhSV
 qThiyd3GvfcgkVHL9noh4BrBrnNRj7wMzUwQnhW5aWebN+DqgG8zlzmmZEQx61uR
 sjMogRZNpGXVAR+4yvPZNoxTGM0plssxlkDQGS4b0XLP1t7ohr22eFPTrWqcsYCi
 h4fa3nXxUIoTDJXQ7nmU04VXp5xVUtQKKe+zXIvQBT98OkM1f6ep5i7rrEh5DZxJ
 TWVdRLuIVpHVsVARqq+qpEnwyDeiF3Hgmope3xPYhEIs1WcIOQzWBjHbNTNeiFdy
 fQMrmAQjirXJBV18ImRSMcAXW+Shc72vnj6fViQcrL5Pzj1HJFMjh/bpPzAhIUYJ
 w9to8mpNgHUpMwnkfMUqQDV6FANVbYPqancK/z4rEPd8mj6bq1z2GEQq2e9+cAfM
 imyD30+g7fm7e4mxp53mv/oxqf4NJExE0eIjXAQY53at0TCk+ngsxJd96Wz3aIpB
 eL9YN5x+y6vXkFC+hsnX2/QdUiVCmfpbrez2QqzoZncSkJ4mjdI=
 =rjVH
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.19

This converts a wide range of Qualcomm-related DeviceTree bindings to
YAML, in order to improve our ability to validate the DeviceTree source.

The RPMh power-domain driver gains support for the modem platform SDX65,
the compute platform SC8280XP and the automotive platform SA8540p. While
LLCC gains support for SC8180X and SC8280XP and gains a
MODULE_DEVICE_TABLE() to make it functional as a module.

It adds a driver for configuring the SSC bus, providing Linux access to
the hardware blocks in the sensor subsystem.

The socinfo driver gets confusion related to MSM8974 Pro sorted out and
adds new ids for SM8540 and SC7280.

The SCM driver gains support for MSM8974.

Add missing of_node_put() in smp2p and smsm drivers.
Stop using iterator after list_for_each_entry() and define static
definitions as such, in the PDR driver.

* tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (33 commits)
  soc: qcom: pdr: use static for servreg_* variables
  soc: qcom: llcc: Add sc8180x and sc8280xp configurations
  dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
  soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains
  soc: qcom: rpmhpd: Don't warn about sparse rpmhpd arrays
  dt-bindings: power: rpmpd: Add sc8280xp RPMh power-domains
  spi: dt-bindings: qcom,spi-geni-qcom: convert to dtschema
  soc: qcom: socinfo: Sort out 8974PRO names
  dt-bindings: soc: qcom,smp2p: convert to dtschema
  dt-bindings: qcom: geni-se: Update UART schema reference
  dt-bindings: qcom: geni-se: Update I2C schema reference
  dt-bindings: soc: qcom,rpmh-rsc: convert to dtschema
  bus: add driver for initializing the SSC bus on (some) qcom SoCs
  dt-bindings: bus: add device tree bindings for qcom,ssc-block-bus
  dt-bindings: qcom: qcom,geni-se: refer to dtschema for SPI
  dt-bindings: soc: qcom,smd: convert to dtschema
  firmware: qcom_scm: Add compatible for MSM8976 SoC
  dt-bindings: firmware: qcom-scm: Document msm8976 bindings
  soc: qcom: smem: validate fields of shared structures
  soc: qcom: smem: map only partitions used by local HOST
  ...

Link: https://lore.kernel.org/r/20220509181839.316655-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:14:06 +02:00
Arnd Bergmann 2b6866d70d i.MX drivers update for 5.19:
- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
   domains, and add HSIO and HDMI block control support.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmJ3IvYUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6lhwf7BpYDyiaYHBKQLXWWDZj1QanO6bjM
 fMlxvVdggfeLW6ijerCb+wf2jNQY75lWRRny4x4WWP+sSVZ4u9SUJlxLrwo/aWYr
 44KWWr4PkSMDm5j2bQyy8S9o01ZpxT/FOqqTC51PwgMx7yxB7+d1Z1txWwp5W0jB
 Ps92O4bKRfvCCF7Mgjw3/FDu5iek6+9pHx5dQxQ1CWPuvVJos6M9Ktkv27x3oOvI
 S4v6Y7v5m1WxSjUK2p09pIGP9AJrHhmRNJF3R/ZrXqUKAlpCQFK6DwZ9mY/rfcfj
 tPoqCwj9/UmzG+GlBo8z7I2GQmF7vmwH6bqjP/T6SHOoxE9/fiqT2Swc5A==
 =S4x7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5g1gACgkQmmx57+YA
 GNmd7A/7BR8AlCUX1H5SrWAiJbu0iR64vXRG+K6iqvEQV99K8zivQ7Sg6D+EwonR
 YiLFOGTkk3O2hfZWbamNGDxmYrcjC5Kg3Zo0ZMJ2Cg91oBNB5olK/9hKOyrIfPMH
 JTZJ/7n7nFi5xUFKBcof3VwNsqsHDp7XGl+jD7la8Dd9m4Yytofz3L4YxQLAkLhU
 fobCmW/Nb9QxoKJL1aa+ix0HzZc00cvnUD3CqxFmqamJVJiPPnLFh+VgvDc1vP2P
 q0bYvXuqL3lXVVbbi3jHqVldCwyzx7egcv72q33yGQPSaNEJ04jV/JUEz6sIj2XI
 HfoQ5iyqczLPZMvJQiXxBsAy9wxde+qoMUwq7OvkLBBF+xEbwrkvp3wTElySRA6Y
 YjP8nf39vuQ7qT9Lj4vNBJvQDoLbrKw+xEnFxjmCdJWgdqxVD0yVnPLjCFvmtFfl
 /b3g8CePnUwupaI4K8nmo9dvMG46oe7xA86M6KphYdIUg0NVB+/kmxMnwSLBZ3Qz
 HRIUyeqV6knzMo413GsQSe9zCiMRcsuDiQ8xHwe5Ko0P8Kr3kyPFX6ofv5D5I54W
 leog0kQU/eYXMEveCqIaxjUFRb9SE8UY9SK//mAqzreLNFT896yG5GeD0WzRxwQl
 oxtn+DdzpRHdjiDnS2OC4v22BvxVb3qLr0rVlCC1V3KFalxyRjU=
 =2GwC
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.19:

- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
  domains, and add HSIO and HDMI block control support.

* tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: fix semicolon.cocci warnings
  soc: imx: add i.MX8MP HDMI blk-ctrl
  soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
  soc: imx: add i.MX8MP HSIO blk-ctrl
  dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
  dt-bindings: soc: Add i.MX8MP media block control DT bindings
  soc: imx: imx8m-blk-ctrl: set power device name
  soc: imx: gpcv2: add support for i.MX8MP power domains
  soc: imx: gpcv2: add PGC control register indirection

Link: https://lore.kernel.org/r/20220508033843.2773685-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:10:48 +02:00
Arnd Bergmann 1901300bf3 TI Driver updates for v5.19
* wkup_m3: io isolation, voltage scaling, vtt regulator and a debug option to stop m3 in suspend.
 * tisci: support for polled mode for system suspend, reset driver is now enabled for COMPILE_TEST
 * knav, dma.. misc cleanups for IS_ERR, pm_run_time*, and various other fixups.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmJ2m64ACgkQ3bWEnRc2
 JJ0VrxAAkwYvb9VDyF2o0WqJZfllt7KqUXPMZ2ijayNwnDy1EVTmcHgjX7K4hA5Z
 z9RX2kzeCobah2urRWVJvVnfsqUlAQB8xjtg9UMskjoicbmJ1OZ8/eOS+Ctwuco9
 7VNVTDhqu7vIOdOtahJ6M9ajIWJorrWNrXf2s9eZZJLaJ3apGolOY6mqGKURq6QY
 jnLvESmPIEtBrYjWr/dkrrPmGuffygM2i7J6RF9RJ3fKuNX7uS72nnYRHN714WU8
 hRuJG4AaYRaEZmWfByXIktdakHBFiBP2g4Zvkeds8KXtRGoamYrrGXuPE1pb1w4p
 kVhumbktMFMSNf37yWdjwo5M1hemhw6SNR3i/021Bt7DSmA7BC0+iLVDJwA+dsrr
 XoCt8V6s3KydeNRDGYSQVECPExYqVyCp3bnHVWPjfS21zpLPmaOQvTA2TTRb737t
 iRKnprDXAD/ALBq9XZbsC2L8jelcXkCOT/+vpCMR4jjyM8OZcmWFU3Nkgp/Uhst/
 3zaL34i4EzvUlrkuHKu92GdNkzkfdd/bk/Emve+12v54QeyM/go8Tn3DLRsWVvg3
 CRgMY5ldELIsPR3VHSTmE8M0YxpmpxM9ixiM0Yrs/V21EZLdiwejqznM9yaLgwM3
 AwPo/WUImn+l+RINY3VdwoHV4dr6CMxkn2laFcQ/c9KEG39ZWH8=
 =Nlpv
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ5gvYACgkQmmx57+YA
 GNlMFRAAhKFLeAl8aXmFzApW0oFLc8cU81wp5cd/5Y/985sph8Lf1TX/ipYxy4oW
 bvq3zhSwS/oxiU7WAPqnOp8zjPmMO5EaK1sbHFT3JgtUVqQk7ZDLs6RMkSbLaXro
 jxYM7UKF8evwTJwBAaXXo9NqXg35Jl24pnZ4oUDib2d5voneOKOpAt1SSqTqUFeT
 y3zlX61j3YANo9KE93ghCON2rq0QSiaq9IUaOcP9BITpM8IjW5yMGmL7/K/GwIxf
 iW5j0yytZ0sh+oA9PGxWvchoQoxgNz3HizC8ksPPoRXFF9umRHZsPRso5NSLCfG7
 9uh6n0dsQ4ua9iTgaMQOCvVsmCY9nawf8xuUxoUCdNK533Pl6T/9gM8D3IwHROLb
 tlk7cW8R5e3CFUL3uKFgmcec/gUAwvraarIkFjwRRpDm68HKWfbU+Ck1BvnaiTje
 mAVi6UewQwjQHL1Q3cpjSAEVlLk0CIEDZtZrgqMyPTl9zfZWkKoFt1XbLM0EMtfw
 LXiFX+wYoHPVIsmRpjh/gQe3BMPNHmYiRHIZFXb+fWZNCIlVXit1yN10WbG+fhC6
 FISfaBj5vSogZ/4kFy8mcD+VsWOsq47cckslQPphRxXGtDfmB/TnQmRAL04D/hlu
 +g7PrPwCIGZL1rbk2eOeZUA56SUyzHa+B21l/6s1F+SnEG+UpZY=
 =7h5b
 -----END PGP SIGNATURE-----

Merge tag 'ti-driver-soc-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers

TI Driver updates for v5.19

* wkup_m3: io isolation, voltage scaling, vtt regulator and a debug option to stop m3 in suspend.
* tisci: support for polled mode for system suspend, reset driver is now enabled for COMPILE_TEST
* knav, dma.. misc cleanups for IS_ERR, pm_run_time*, and various other fixups.

* tag 'ti-driver-soc-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  soc: ti: wkup_m3_ipc: Add debug option to halt m3 in suspend
  soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling
  soc: ti: wkup_m3_ipc: Add support for IO Isolation
  soc: ti: knav_qmss_queue: Use IS_ERR instead of IS_ERR_OR_NULL when checking knav_queue_open() result
  soc: ti: pm33xx: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
  firmware: ti_sci: Switch transport to polled mode during system suspend
  soc: ti: wkup_m3_ipc: Add support for toggling VTT regulator
  soc: ti: knav_qmss_queue: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync
  soc: ti: knav_dma: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync
  reset: ti-sci: Allow building under COMPILE_TEST
  soc: ti: ti_sci_pm_domains: Check for null return of devm_kcalloc
  soc: ti: omap_prm: Use of_device_get_match_data()
  soc: ti: pruss: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
  soc: ti: replace usage of found with dedicated list iterator variable
  soc: ti: wkup_m3_ipc: fix platform_get_irq.cocci warning

Link: https://lore.kernel.org/r/20220507163424.pvqnwrxpoo73lmp2@debtless
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-09 23:09:10 +02:00
Brian Norris defec178df soc: rockchip: power-domain: Manage resource conflicts with firmware
On RK3399 platforms, power domains are managed mostly by the kernel
(drivers/soc/rockchip/pm_domains.c), but there are a few exceptions
where ARM Trusted Firmware has to be involved:

(1) system suspend/resume
(2) DRAM DVFS (a.k.a., "ddrfreq")

Exception (1) does not cause much conflict, since the kernel has
quiesced itself by the time we make the relevant PSCI call.

Exception (2) can cause conflict, because of two actions:

(a) ARM Trusted Firmware needs to read/modify/write the PMU_BUS_IDLE_REQ
    register to idle the memory controller domain; the kernel driver
    also has to touch this register for other domains.
(b) ARM Trusted Firmware needs to manage the clocks associated with
    these domains.

To elaborate on (b): idling a power domain has always required ungating
an array of clocks; see this old explanation from Rockchip:
https://lore.kernel.org/linux-arm-kernel/54503C19.9060607@rock-chips.com/

Historically, ARM Trusted Firmware has avoided this issue by using a
special PMU_CRU_GATEDIS_CON0 register -- this register ungates all the
necessary clocks -- when idling the memory controller. Unfortunately,
we've found that this register is not 100% sufficient; it does not turn
the relevant PLLs on [0].

So it's possible to trigger issues with something like the following:

1. enable a power domain (e.g., RK3399_PD_VDU) -- kernel will
   temporarily enable relevant clocks/PLLs, then turn them back off
   2. a PLL (e.g., PLL_NPLL) is part of the clock tree for
      RK3399_PD_VDU's clocks but otherwise unused; NPLL is disabled
3. perform a ddrfreq transition (rk3399_dmcfreq_target() -> ...
   drivers/clk/rockchip/clk-ddr.c / ROCKCHIP_SIP_DRAM_FREQ)
   4. ARM Trusted Firmware unagates VDU clocks (via PMU_CRU_GATEDIS_CON0)
   5. ARM Trusted firmware idles the memory controller domain
   6. Step 5 waits on the VDU domain/clocks, but NPLL is still off

i.e., we hang the system.

So for (b), we need to at a minimum manage the relevant PLLs on behalf
of firmware. It's easier to simply manage the whole clock tree, in a
similar way we do in rockchip_pd_power().

For (a), we need to provide mutual exclusion betwen rockchip_pd_power()
and firmware. To resolve that, we simply grab the PMU mutex and release
it when ddrfreq is done.

The Chromium OS kernel has been carrying versions of part of this hack
for a while, based on some new custom notifiers [1]. I've rewritten as a
simple function call between the drivers, which is OK because:

 * the PMU driver isn't enabled, and we don't have this problem at all
   (the firmware should have left us in an OK state, and there are no
   runtime conflicts); or
 * the PMU driver is present, and is a single instance.

And the power-domain driver cannot be removed, so there's no lifetime
management to worry about.

For completeness, there's a 'dmc_pmu_mutex' to guard (likely
theoretical?) probe()-time races. It's OK for the memory controller
driver to start running before the PMU, because the PMU will avoid any
critical actions during the block() sequence.

[0] The RK3399 TRM for PMU_CRU_GATEDIS_CON0 only talks about ungating
    clocks. Based on experimentation, we've found that it does not power
    up the necessary PLLs.

[1] CHROMIUM: soc: rockchip: power-domain: Add notifier to dmc driver
    https://chromium-review.googlesource.com/q/I242dbd706d352f74ff706f5cbf42ebb92f9bcc60
    Notably, the Chromium solution only handled conflict (a), not (b).
    In practice, item (b) wasn't a problem in many cases because we
    never managed to fully power off PLLs. Now that the (upstream) video
    decoder driver performs runtime clock management, we often power off
    NPLL.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2022-05-09 03:36:52 +09:00
Arnd Bergmann 64dbc4dd7a ARM: pxa: move plat-pxa to drivers/soc/
There are two drivers in arch/arm/plat-pxa: mfp and ssp. Both
of them should ideally not be needed at all, as there are
proper subsystems to replace them.

OTOH, they are self-contained and can simply be normal
SoC drivers, so move them over there to eliminate one more
of the plat-* directories.

Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> (mach-pxa)
Acked-by: Lubomir Rintel <lkundrak@v3.sk> (mach-mmp)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-07 22:56:16 +02:00
Arnd Bergmann 68edb53a4f soc/tegra: Changes for v5.19-rc1
This set of changes adds nvmem cell lookup entries for Tegra194 that are
 used to read calibration data from the SoC fuses, and updates the reset
 sources for Tegra234.
 
 Other than that, included is a minor build fix for a missing dependency
 that can be encountered very rarely in random config builds. Lastly some
 kerneldoc comments are added to avoid build warnings.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmJ1LD8THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoYh8D/9PZ9Z6MfFP/4mU+LQccO7OW4iw+nUq
 J3LSOby2SRlTBLz0BsgYYoxEd1jDcPTvN9ND9tkmy8I77doVfgq2tcnBxqKZSwdy
 w+mhr68cjx5yy0KieevSb3JSEp6hXL728j1CnxofHFy51NY2yuqcIwNRMEfYYX1d
 UkCGaFnEjU1PvawDSKiruNy2r8oZaPDKXwtkhGxJedQ83CkCtkE2qNHi1GcJogo9
 O8RB7eGIiZflloY83SlhoLm/qILBTGuARKUeXIEC66Ss6tbl1DccJ1i8iZlMr4uV
 mOd+jnCiAkzL+EY9geD8e8cltAPqD5lhIwQB4kseB3Jw0+BRgmSMo/qlKo6zoC2x
 nxaq5haxKAcE+fY1o5/h36hXCD5ZoeSTRlXowyXuLzvLkzhE/tMdC7SqqjTuDMe4
 Yjf4yp50vEnbjdbnSx57yPqT7q1vclcV/or9MkravkV5zSxhzSUgfnuCAabrKNrQ
 a/aiGy1yJD2V3iC1jhTQNaja/e7iUNF+TNmEGLlkZSpLzp9nDHJra5h+BklulGVb
 qApf2o7sc6I5n7iyb+6WypBbHP+sX6PkkNWx4KDvUmsp3jG7LQiJQPdRiq60iicV
 KQ1FqzDjhTyfxxiR2PwDGNZQsyK6DO3qST1oqk3pav55G6aHLsQx4+g3+tFIMhnN
 oXskT6rAWqmjyw==
 =Gmv7
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1gNEACgkQmmx57+YA
 GNnOGg//bt18Pfhk53a9cLhiJEip4xkJ3uC0mAVZGGWLEGuxSjUDcS2KGnUQNgCV
 2T+WAIcPVW1gpoQriDGqEJtDGSeiwSqGFuyndeAJZLZunPB4hGcUA/js21yhfZNb
 DVPyi9MT2DHQLIveSN3BFOjulBsKTNG86MZ9Y/wlboDZCEblIzutnx7E2BKULrlj
 8FADgd0Smk4giUoucelfn8Vt0B4ECl4+PZOpM5Gau3iTd2Ku++Sd42NZEIv4QFOx
 7/WJAhDsFc/ZH1D7eJZl3xAECC9u5+Th3ulGFIE0YqmmKOPSTumIX0C1Beg8J9RA
 9V5PQ6zrPoevpFct+JdHmqRDh1XPBp/OrPazj8Kommm3HZaP1mEpBwFswUk9ElkG
 CInmEMRCDl4bZaUcwZX9vkoaKTfILDPQp32nFHZcznkJUu3AVdOz+cS90WSp6vC0
 aX+5PGUv0WAkxXUNP1sNjDn4yLT+lJhGYYsna4ocVLx6UBlDET6VzmXZ4fjojbWh
 3VUC5xCEm+JQBONmbnYNoX8VQe6zkCKruESBpOqNA8+AQfrsRVdqTQ4At40+znJ7
 HmoHVHEvYXE1SJgSo8GisG4hnrrXLWTAkzVfh51YEfXywBLB067ToLquNjS8a0eS
 J/80qkkS5RgOfun0cuGWKRXmvDrzZGQJjhbAdDj4sQSyrNWf1+A=
 =S4fJ
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.19-rc1

This set of changes adds nvmem cell lookup entries for Tegra194 that are
used to read calibration data from the SoC fuses, and updates the reset
sources for Tegra234.

Other than that, included is a minor build fix for a missing dependency
that can be encountered very rarely in random config builds. Lastly some
kerneldoc comments are added to avoid build warnings.

* tag 'tegra-for-5.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Document core domain fields
  soc/tegra: pmc: Select REGMAP
  soc/tegra: pmc: Update Tegra234 reset sources
  soc/tegra: fuse: Add nvmem cell lookup entries for Tegra194

Link: https://lore.kernel.org/r/20220506143005.3916655-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:10:57 +02:00
Arnd Bergmann 819ed6f07d Renesas driver updates for v5.19 (take two)
- Initial support for the R-Car V4H and RZ/V2M SoCs,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnThKAAKCRCKwlD9ZEnx
 cDtZAQDveNky2MIYx0nNb88JzK5PS1zo85KcU5g6ybf/QEnMdQEA7GYKKKi9q3rF
 5Q1h6kUvIW6e8c7lcva2DI4D7ZUIoAk=
 =M1iB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1gDcACgkQmmx57+YA
 GNl8LhAAjqsrH2O/ufjr/7SK1hHpqGdPo08RwHOvHNLOX35si9l4sSswf5xpI0M5
 NtpS1DaDH5X7z/VteRC2CYqRR5L2pKogmjpEVxPCQxgVGfeicg4ntw59O6vuBmml
 w1bZ5a9Ipd/8AU5mEOXCZlb+96I16T9wfetlerSYyYsmt8pCLYwQrXijoIwUhrS0
 i8YxzfUD5MZ7RZd8mzxxGs8vKDmgMZMuoxzdRxpoLIfgaRNyqCboLoP1lvQhXLFY
 XHLJZOW1pHd41sx5f1cJv3wKwsBHBVxzXFNGGz2i60BaVjrBSbSpixM+C/LUddIl
 h+QhR9PLKk2iIbDuiD6x9G6fv20LA0Gz5BI57XiJcuPK/SIB8R4hISYpQ6GVAh1L
 ve2NPE6o4hJC7UhJRH6JFNyfaF6pmPK9VVvG9BOPvd8L6SKyyeWHiVgaOzCBgJKm
 5ZPKPZ8KCC9Rky7secioIFb2eyGg73CKWVi+cZzSb9wVkPC7rZsTTbErWTAI4FEn
 slyJrA36bfQXk2kDaWIXdN55xXD+oZhkHtwVVX61Srp6DEnaUABocGJ+TtrrfdkE
 9OlsQE9fivl6WPtTZJ11RivT3qnpiUFl/owaG+l3q01Ryvtm9GJAJuBDhl1qN9AM
 /5endo466iMqS9zlNol+2MjPplGek43XSBE//24/+7BSmzPwcNs=
 =P6fe
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.19 (take two)

  - Initial support for the R-Car V4H and RZ/V2M SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-drivers-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: R-Car V3U is R-Car Gen4
  soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs
  soc: renesas: Add RZ/V2M (R9A09G011) config option
  soc: renesas: rcar-rst: Add support for R-Car V4H
  soc: renesas: Identify R-Car V4H
  soc: renesas: r8a779g0-sysc: Add r8a779g0 support
  dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779g0 SYSC power domain definitions

Link: https://lore.kernel.org/r/cover.1651828613.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06 22:08:23 +02:00
Thierry Reding d3a20dcbca soc/tegra: pmc: Document core domain fields
These fields are used to track the state of the core domain. Add basic
descriptions so that kerneldoc can be properly generated for them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-06 10:53:19 +02:00
Tom Rix 28e3dc8f8c soc: qcom: pdr: use static for servreg_* variables
Sparse reports this repesentative issue
pdr_internal.h:31:22: warning: symbol 'servreg_location_entry_ei' was not declared. Should it be static?
Similar for other servreg_*

Global variables should not be defined in header files.
This only works because pdr_internal.h is only included
by pdr_interface.c.  Single file use variables should be
static so add static to their storage-class specifiers.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220422173806.21982-1-trix@redhat.com
2022-05-05 22:08:15 -05:00
Arnd Bergmann bdc33dad34 Apple SoC NVMe driver and dependencies:
- RTKit IPC library required to boot and communicate with
     co-processors embedded inside Apple SoCs
   - SART DMA address filter required to allow some DMA transactions for
     the NVMe co-processor
   - NVMe platform driver
 
 The following minor changes since v3 on the mailing list have been
 folded in:
 
   - sart: %llx -> %pa for a phys_addr_t
   - rtkit:/sart: Drop IS_ENABLED inside headers
   - rtkit: Use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL
   - nvme: Set NVME_REQ_CANCELLED in the timeout handler
   - nvme: Use DEFINE_SIMPLE_DEV_PM_OPS instead of #ifdef CONFIG_PM_SLEEP
 -----BEGIN PGP SIGNATURE-----
 
 iIkEABYKADEWIQRUAfN3OZ14tapALxsd6alOrecRcQUCYm/5lhMcc3ZlbkBzdmVu
 cGV0ZXIuZGV2AAoJEB3pqU6t5xFxITsBAI02bdBvHQAFouu1WzhLzlAPNqjGv3Th
 YFOJL4y2oyigAP9zkIGP0e1JcpApPxvlmQnM340ZY+TCth+ahoCWlS4VAg==
 =b0QX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ0IIIACgkQmmx57+YA
 GNnxlg/+M0d7awpSyiN2g2aoPN9PzaDiWgjSDJ30THfY+JodFmK/Uw1L2dO32+md
 0UMuMH9Vtiy3NXf/dDoLU+kiNQgT1ZY7Iw2220GZyHxRUC/7RZ/zGNvAb1FclDhK
 YEYtlA2fK1MvlhEcriD8ytP78R80UA7Cx4o5T8CkgfN2OtjLip72aMCFtzRfxMk6
 W0GQvkTpDtp3qn59Wlz/JEJKMT+q0txxq1QkPW93Su190S/7Lk/nd+CkmFDHx54n
 2LFa33JuZZfNbzPMN9emTl7G5Z7Y241zYBMHvtAzd3WdaDZ6I1apeVnDXrNRhysC
 4B8si4qbo9NORhWR96okll0MCiBNZ1UfvS4U+/8A1b0CHwX5rEUKLNOXIfO8xApi
 L3HvVUpYPJw8w3aK2SKGVt2aQcnbluy9+LJQgHByPFbeIV80OjWoR4xSSZi2XErl
 tp4vmyUBTR8g85EnCqcc8OWCdl+yMjX+NmftLk/XB7/xD+HtqKocqizOVho/9u+K
 rv6Ivx6JHk33LFG/jJkN6q8OncgfSRirg0oy6IF/dy2xS2U3OtfaIXHIy9NosC36
 B3bm8mb3CVQJxazMYl3rstBGQoN1YpuwOsHRUWiWG1jDnXFwCSck9b5OH+y64PME
 45V27Rx1ftTgrOWgsllIqsviWADO4Qj7n5YXYvC+hGrBeDnM8pQ=
 =gi38
 -----END PGP SIGNATURE-----

Merge tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of https://github.com/AsahiLinux/linux into arm/drivers

Apple SoC NVMe driver and dependencies:

  - RTKit IPC library required to boot and communicate with
    co-processors embedded inside Apple SoCs
  - SART DMA address filter required to allow some DMA transactions for
    the NVMe co-processor
  - NVMe platform driver

The following minor changes since v3 on the mailing list have been
folded in:

  - sart: %llx -> %pa for a phys_addr_t
  - rtkit:/sart: Drop IS_ENABLED inside headers
  - rtkit: Use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL
  - nvme: Set NVME_REQ_CANCELLED in the timeout handler
  - nvme: Use DEFINE_SIMPLE_DEV_PM_OPS instead of #ifdef CONFIG_PM_SLEEP

* tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of https://github.com/AsahiLinux/linux:
  nvme-apple: Add initial Apple SoC NVMe driver
  dt-bindings: nvme: Add Apple ANS NVMe
  soc: apple: Add SART driver
  dt-bindings: iommu: Add Apple SART DMA address filter
  soc: apple: Add RTKit IPC library
  soc: apple: Always include Makefile

Link: https://lore.kernel.org/r/20220505154020.84638-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05 21:07:46 +02:00
Arnd Bergmann dbdaca1300 This pull request contains Broadcom ARM/ARM64 SoCs drivers changes for
5.19, please pull the following:
 
 - Qintao adds a missing NULL check to the Broadcom PMB driver after a
   memory allocation
 
 - Li removes the redundant suppress_bind_attrs from the brcmstb_gisb
   driver which only has a probe and no remove function
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmJy6BUACgkQh9CWnEQH
 BwRzjxAA56LdLa1ucGBLuXaLMzhN7JBQwqFbJRhJnig6gYMoOu4eJf2tD9Bfq/XN
 Mu5tAqE19orfBsu1xm67hzVUDpwL3DKN11FVDjYBKqmVU8PMEjd8F619ak6DLs+4
 D5R/wC+4sanfwotk7Ud3MAb+F8zUGwFM5NdaMwHdFAZOq++c5zU9xNFHhU3IfJBR
 OdbGKwaFmRT9iF4mztx1C9s3aBSggDqMeCpJeLqlS7jPim14gN3nl+l06n480kw/
 dMgJxnI3sCydefJiGYNDLV833Wfj2XFkLnVbK2erDUL9UTRQSetwPuvIJKI4jPSW
 uAiWM8l8y9DrOTSauVQs8khgx7hzdJ6haYydXfJKI8ZidOHHE7DcOuUkIgvXidpY
 iT5QgVTfVK9l48pFN1xCC+TkfizlbaVVbdTqlp0hPfB/Jb7ZUtKCtcq4A0T4HgdT
 5W8z1bwMdKZpbKj931IcTPO4CH6VVKzJXBks75+17QxPWU7lu883kr81fclYbYD8
 q+VbAMY1lEaWEOUhSuXtK3ubpM4ygVrjrHPpm2qWfeK2RqUTNnQrXy1JSafPwl/2
 zcYjExr6MWNDaXD/oI/udKnEiul+quoW6rXmDdYQHE/t+pOqbPKPNOGRF/pFSW2q
 WJo1seJG20fiCmhOyoTinT4Gfen42a5Tr03ONOP8uS2K9ca4+mU=
 =DrJC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJz33gACgkQmmx57+YA
 GNlLjhAAnwpXm0Oco9a+OA3vKPiw4JZzpUvBUW1uCcT6YNRdZKNLhXE50VgshX/s
 L0bK9yarJ/3H2ULs6zsAb4YWDsIrhdrIuARBYuJqJEnXAPCYQO77CJt6K+XPRARf
 maKOfbK4dOrGyXOqqsMKfM3EUWECGK1Z45QBOxi4xj1/U/b0kQc/N8feznzx/uer
 9uzlIleZrixGi3ez/BCmUrqdEMRDKu2AgpUWZQ6J6dwaWSBs8/upeyedEaDc3HgD
 InMsJgkDh/K8dRjuqZQXzsSIVuc/XYiDCVisuCLP+C+a8MTq3We9Y8inu7tv625O
 p1/iiDXO4JAFoD3g0wxH2SetcT1fNIwPv9icG4Lsz2BNav/nAm2/dWc/Py8jvPN+
 hjIqm2IuNL9yxtyMREZ83TWc81688o5laEvw9JslhSaAddhave974vF/bSywryFi
 qZsMpXrTk6q68HzwKpieV/Mx8iNDNkj6peXmAwR5pZ7Uhi/bjYVPnPG0CvMOEstt
 zcjOADLSJPoqjWxqBuPw/71gEoBmv+eJFCXV7mhBBjt+CngmdEAsUmEnMKZPL6SY
 nYCqEy/N5C57FeXbcmMnBbauHdcuoyMrb6RIsVExhbboaLKF0JtEow5z9tM15yqv
 8++HBYsZTA0R+VO4/sn7CX5rG/F+eo0YusN/dUfy7EFr2rK5iSU=
 =ycAK
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.19/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64 SoCs drivers changes for
5.19, please pull the following:

- Qintao adds a missing NULL check to the Broadcom PMB driver after a
  memory allocation

- Li removes the redundant suppress_bind_attrs from the brcmstb_gisb
  driver which only has a probe and no remove function

* tag 'arm-soc/for-5.19/drivers' of https://github.com/Broadcom/stblinux:
  bus: brcmstb_gisb: Remove the suppress_bind_attrs attribute of the driver
  soc: bcm: Check for NULL return of devm_kzalloc()

Link: https://lore.kernel.org/r/20220504210942.1838248-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05 16:30:16 +02:00
kernel test robot 7a0c5cb671 soc: imx: fix semicolon.cocci warnings
drivers/soc/imx/imx8mp-blk-ctrl.c:227:61-62: Unneeded semicolon
drivers/soc/imx/imx8mp-blk-ctrl.c:192:61-62: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: 556f5cf956 ("soc: imx: add i.MX8MP HSIO blk-ctrl")
CC: Lucas Stach <l.stach@pengutronix.de>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 20:51:52 +08:00
Geert Uytterhoeven 27e7657a7c soc: renesas: R-Car V3U is R-Car Gen4
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence reflect this in the SoC Family field.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/2bbecad7b6c24c0d5c1797b3f7f0733d5ba33842.1651497066.git.geert+renesas@glider.be
2022-05-05 12:31:22 +02:00
Lucas Stach e3442022f5 soc: imx: add i.MX8MP HDMI blk-ctrl
This adds driver support for the HDMI blk-ctrl found on the
i.MX8MP SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:28:58 +08:00
Paul Elder 07614fed00 soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
Add the description for the i.MX8MP media blk-ctrl.

Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de> # MX8MP LCDIF #1 and #2
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:28:57 +08:00
Lucas Stach 556f5cf956 soc: imx: add i.MX8MP HSIO blk-ctrl
The i.MX8MP added some blk-ctrl peripherals that don't follow the regular
structure of the blk-ctrls in the previous SoCs. Add a new file for those
with currently only the HSIO blk-ctrl being supported. Others will be added
later on.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:28:57 +08:00
Lucas Stach 8239d67f59 soc: imx: imx8m-blk-ctrl: set power device name
Set the name for the virtual power device to the name of the attached
blk-ctrl domain. Makes the debug output for the power domains a lot
more pleasant to read.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05 09:07:56 +08:00
Bjorn Andersson ec69dfbdc4 soc: qcom: llcc: Add sc8180x and sc8280xp configurations
Add LLCC configuration data for the SC8180X and SC8280XP platforms,
based on the downstream tables.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Link: https://lore.kernel.org/r/20220502215406.612967-3-bjorn.andersson@linaro.org
2022-05-04 11:39:40 -05:00
Thierry Reding 9767d1be15 soc/tegra: pmc: Select REGMAP
Commit 9d5e7c3e36 ("soc/tegra: pmc: Provide USB sleepwalk register
map") introduced a dependency on the regmap infrastructure, so select
the corresponding Kconfig entry. This avoids failures in random builds
that may otherwise end up having SOC_TEGRA_PMC enabled but not REGMAP.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:09:49 +02:00
Dave Gerlach 2a21f9e6d9 soc: ti: wkup_m3_ipc: Add debug option to halt m3 in suspend
Add a debugfs option to allow configurable halting of the wkup_m3
during suspend at the last possible point before low power mode entry.
This condition can only be resolved through JTAG and advancing beyond
the while loop in a8_lp_ds0_handler [1]. Although this hangs the system
it forces the system to remain active once it has been entirely
configured for low power mode entry, allowing for register inspection
through JTAG to help in debugging transition errors.

Halt mode can be set using the enable_off_mode entry under wkup_m3_ipc
in the debugfs.

[1] https://git.ti.com/cgit/processor-firmware/ti-amx3-cm3-pm-firmware/tree/src/pm_services/pm_handlers.c?h=08.02.00.006#n141

Suggested-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[dfustini: add link for a8_lp_ds0_handler() in ti-amx3-cm3-pm-firmware]
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220502033211.1383158-1-dfustini@baylibre.com
2022-05-03 08:02:09 -05:00
Dave Gerlach ea082040fe soc: ti: wkup_m3_ipc: Add support for i2c voltage scaling
Allow loading of a binary containing i2c scaling sequences to be
provided to the wkup_m3 firmware in order to properly scale voltage
rails on the PMIC during low power modes like DeepSleep0. Proper binary
format is determined by the FW in use.

Code expects firmware to have 0x0C57 present as the first two bytes
followed by one byte defining offset to sleep sequence followed by one
byte defining offset to wake sequence and then lastly both sequences.
Each sequence is a series of I2C transfers in the form:

u8 length | u8 chip address | u8 byte0/reg address | u8 byte1 | u8 byteN
..

The length indicates the number of bytes to transfer, including the
register address. The length of each transfer is limited by the I2C
buffer size of 32 bytes.

Based on previous work by Russ Dill.

[dfustini: replace FW_ACTION_HOTPLUG with FW_ACTION_UEVENT]

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
[dfustini: add NULL argument to rproc_da_to_va() call]
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220426200741.712842-3-dfustini@baylibre.com
2022-05-03 08:02:09 -05:00
Dave Gerlach 1dcbae86ee soc: ti: wkup_m3_ipc: Add support for IO Isolation
AM43xx support isolation of the IOs so that control is taken
from the peripheral they are connected to and overridden by values
present in the CTRL_CONF_* registers for the pad in the control module.

The actual toggling happens from the wkup_m3, so use a DT property from
the wkup_m3_ipc node to allow the PM code to communicate the necessity
for placing the IOs into isolation to the firmware.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220414192722.2978837-3-dfustini@baylibre.com
2022-05-03 08:02:09 -05:00
Haowen Bai d4c41d32cf soc: ti: knav_qmss_queue: Use IS_ERR instead of IS_ERR_OR_NULL when checking knav_queue_open() result
As the usage of knav_queue_open():

* Returns a handle to the open hardware queue if successful. Use IS_ERR()
* to check the returned value for error codes.

It will only return error codes, not null.

Signed-off-by: Haowen Bai <baihaowen@meizu.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/1650765944-20170-1-git-send-email-baihaowen@meizu.com
2022-05-03 08:02:05 -05:00
Minghao Chi 2b7042500c soc: ti: pm33xx: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@aotmide.com>
Link: https://lore.kernel.org/r/20220418063059.2558074-1-chi.minghao@zte.com.cn
2022-05-03 06:58:10 -05:00
Sven Peter b170143ae1 soc: apple: Add SART driver
The NVMe co-processor on the Apple M1 uses a DMA address filter called
SART for some DMA transactions. This adds a simple driver used to
configure the memory regions from which DMA transactions are allowed.

Unlike a real IOMMU, SART does not support any pagetables and can't be
implemented inside the IOMMU subsystem using iommu_ops.

It also can't be implemented using dma_map_ops since not all DMA
transactions of the NVMe controller are filtered by SART.
Instead, most buffers have to be registered using the integrated NVMe
IOMMU and we can't have two separate dma_map_ops implementations for a
single device.

Co-developed-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-05-02 17:24:45 +02:00
Sven Peter 9bd1d9a0d8 soc: apple: Add RTKit IPC library
Apple SoCs such as the M1 come with multiple embedded co-processors
running proprietary firmware. Communication with those is established
over a simple mailbox using the RTKit IPC protocol.

This cannot be implemented inside the mailbox subsystem since on top
of communication over channels we also need support for starting,
hibernating and resetting these co-processors. We also need to
handle shared memory allocations differently depending on the
co-processor and don't want to split that across multiple drivers.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-05-01 16:55:06 +02:00
Sven Peter cbb0f00131 soc: apple: Always include Makefile
We want to allow the code inside drivers/soc/apple to be compiled with
COMPILE_TEST but this will currently result in linking errors because
ARCH_APPLE is not set and make will never recurse into
drivers/soc/apple.
Let's just unconditionally recurse into apple/ since all drivers
in there are guarded by config options anyways.

Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-05-01 16:55:05 +02:00
Brian Norris add9f6f30e soc: rockchip: Fix compile-testing SoC drivers
Similar to commit 7f94b69ece ("ARM: ixp4xx: fix compile-testing soc
drivers").

drivers/soc/rockchip/Kconfig makes plenty of provision for configuring
drivers either for ARCH_ROCKCHIP or for COMPILE_TEST. But
drivers/soc/Makefile pulls the rug out from under us, by refusing to
build anything if we specified COMPILE_TEST but not ARCH_ROCKCHIP.

Currently, I'm not aware of anything that breaks without this patch, but
it certainly makes for confusing builds (CONFIG_ROCKCHIP_PM_DOMAINS=y,
but we didn't actually compile the driver?) and leaves room for future
error (I have pending patches that break confusingly with COMPILE_TEST=y
even though their Kconfig dependencies seem correct [1]).

Defer to drivers/soc/rockchip/{Makefile,Kconfig} to do the right thing.

[1] e.g.,
https://lore.kernel.org/linux-rockchip/20220405184816.RFC.2.I2d73b403944f0b8b5871a77585b73f31ccc62999@changeid/
[RFC PATCH 2/2] PM / devfreq: rk3399_dmc: Block PMU during transitions

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220425184503.v3.3.Id5f16dec920f620120c0a143a97a12e16d401760@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-30 15:06:14 +02:00
Brian Norris 2ca9e472c7 soc: rockchip: power-domain: Replace dsb() with smb()
It's unclear if these are really needed at all, but seemingly their
purpose is only as a write barrier. Use the general macro instead of the
ARM-specific one.

This driver is partially marked for COMPILE_TEST'ing, but it doesn't
build under non-ARM architectures. Fix this up before *really* enabling
it for COMPILE_TEST.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220426014545.628100-2-briannorris@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-30 15:06:14 +02:00
Brian Norris 9be1a9996e soc: rockchip: Clean up Kconfig whitespace
There are spaces instead of tabs, and other inconsistent indentation.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220426014545.628100-1-briannorris@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-30 15:06:14 +02:00
Bjorn Andersson f68f1cb343 soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains
The Qualcomm sc8280xp platform has 13 and the sa8540p platform has 11
power-domains. Add compatibles, the typically used ones power-domains
and their relevant active-only variants, to the RPMh power-domain
driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220426233508.1762345-4-bjorn.andersson@linaro.org
2022-04-28 14:19:57 -05:00
Bjorn Andersson af77132e9d soc: qcom: rpmhpd: Don't warn about sparse rpmhpd arrays
In some cases the DT binding will fully describe the set of available
RPMh power-domains, but there is no reason for exposing them all in the
implementation.

Omitting individual data->domains is handle gracefully by
of_genpd_add_provider_onecell(), so there's no reason for printing a
warning when this occurs.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220426233508.1762345-3-bjorn.andersson@linaro.org
2022-04-28 14:19:57 -05:00
Herve Codina 14f11da778 soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs
PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs.
Without these configs, the clocks used by the PCI bridge are not
enabled and so accessing the devices leads to a kernel crash:

    Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848

Select PM and PM_GENERIC_DOMAINS for ARCH_RZN1

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220422120850.769480-5-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-28 16:47:14 +02:00
Phil Edworthy 068eb5a910 soc: renesas: Add RZ/V2M (R9A09G011) config option
Add a configuration option for the RZ/V2M SoC.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220420204307.87343-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-28 16:46:47 +02:00
QintaoShen b4bd2aafac soc: bcm: Check for NULL return of devm_kzalloc()
As the potential failure of allocation, devm_kzalloc() may return NULL.  Then
the 'pd->pmb' and the follow lines of code may bring null pointer dereference.

Therefore, it is better to check the return value of devm_kzalloc() to avoid
this confusion.

Fixes: 8bcac4011e ("soc: bcm: add PM driver for Broadcom's PMB")
Signed-off-by: QintaoShen <unSimple1993@163.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-26 09:12:35 -07:00
Jason-JH.Lin 537f8ffbdf soc: mediatek: mutex: remove mt8195 MOD0 and SOF0 definition
Using mt8183 MDO0 and SOF0 definition instead of creating new one for
mt8195.

Fixes: 8fdb61f193 ("soc: mediatek: add mtk-mutex support for mt8195 vdosys0")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Link: https://lore.kernel.org/r/20220425034537.28989-1-jason-jh.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-25 12:46:13 +02:00
Yoshihiro Shimoda d869d48ae7 soc: renesas: rcar-rst: Add support for R-Car V4H
Add support for R-Car V4H (R8A779G0) to the R-Car RST driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220420084255.375700-12-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-25 10:58:58 +02:00
Yoshihiro Shimoda 87ab58e1fe soc: renesas: Identify R-Car V4H
Add support for identifying the R-Car V4H (R8A779G0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220420084255.375700-11-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-25 10:58:58 +02:00
Yoshihiro Shimoda 11a5ebb42e soc: renesas: r8a779g0-sysc: Add r8a779g0 support
Add support for R-Car V4H (R8A779G0) SoC power areas and register
access.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220420084255.375700-10-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-25 10:58:58 +02:00
Dave Gerlach f226041424 soc: ti: wkup_m3_ipc: Add support for toggling VTT regulator
Some boards like the AM335x EVM-SK and AM437x GP EVM provide software
control via a GPIO pin to toggle the DDR VTT regulator to reduce power
consumption in low power states.

The VTT regulator should be disabled after enabling self-refresh on
suspend, and should be enabled before disabling self-refresh on resume.
This is to allow proper self-refresh entry/exit commands to be
transmitted to the memory.

The "ti,vtt-gpio-pin" device tree property in the wkup_m3_ipc node
specifies which GPIO pin to use. This property is communicated to the
Wakeup Cortex M3 co-processor where the actual toggling of the GPIO pin
happens in CM3 firmware [1].

Please note that the GPIO pin must be on the GPIO0 module as that module
is in the wakeup power domain.

[1] https://git.ti.com/cgit/processor-firmware/ti-amx3-cm3-pm-firmware/tree/src/pm_services/ddr.c?h=08.02.00.006#n190

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
[dfustini: remove the unnecessary "ti,needs-vtt-toggle" property]
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220409211215.2529387-3-dfustini@baylibre.com
2022-04-22 18:12:35 -05:00
Minghao Chi 12eeb74925 soc: ti: knav_qmss_queue: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate for simplifying
code.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220418062955.2557949-1-chi.minghao@zte.com.cn
2022-04-22 18:12:06 -05:00
Matthias Brugger 949cfe1a43 Merge tag 'v5.18-next-vdso0-stable-tag' into v5.18-next/soc 2022-04-22 14:39:59 +02:00
jason-jh.lin 4e8988c634 soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0
The mmsys routing table of mt8195 vdosys0 has 2 DITHER components,
so mmsys need to add DDP_COMPONENT_DITHER1 and change all usages of
DITHER enum form DDP_COMPONENT_DITHER to DDP_COMPONENT_DITHER0.

But its header need to keep DDP_COMPONENT_DITHER enum
until drm/mediatek also changed it.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220419094143.9561-7-jason-jh.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-22 14:38:53 +02:00
jason-jh.lin 8fdb61f193 soc: mediatek: add mtk-mutex support for mt8195 vdosys0
Add mtk-mutex support for mt8195 vdosys0.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220419094143.9561-3-jason-jh.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-22 14:38:53 +02:00
jason-jh.lin b804923b7c soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
1. Add mt8195 mmsys compatible for 2 vdosys.
2. Add io_start into each driver data of mt8195 vdosys.
3. Add get match data function to identify mmsys by io_start.
4. Add mt8195 routing table settings of vdosys0.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20220419094143.9561-2-jason-jh.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-22 14:38:52 +02:00
Chun-Kuang Hu 5252c1c5a0 soc: mediatek: cmdq: Use mailbox rx_callback instead of cmdq_task_cb
rx_callback is a standard mailbox callback mechanism and could cover the
function of proprietary cmdq_task_cb, so use the standard one instead of
the proprietary one. Client has changed to use the standard callback
machanism and sync dma buffer in client driver, so remove the proprietary
callback in cmdq helper.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Tested-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Link: https://lore.kernel.org/r/1650102868-26219-1-git-send-email-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-20 14:14:59 +02:00
Luca Weiss a555b382e7 soc: qcom: socinfo: Sort out 8974PRO names
MSM8974PRO is commonly used for referring to Snapdragon 801, compared to
MSM8974 which is Snapdragon 800.

The Snapdragon 801 has three variants with different clock speeds, with
the -AA, -AB and -AC suffix.

Adjust the names in socinfo to reflect this.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415195449.617040-1-luca@z3ntu.xyz
2022-04-19 13:04:01 -05:00
Minghao Chi d3e3116f25 soc: ti: knav_dma: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifying code.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20220412082923.2532649-1-chi.minghao@zte.com.cn
2022-04-15 15:04:53 -05:00
QintaoShen ba56291e29 soc: ti: ti_sci_pm_domains: Check for null return of devm_kcalloc
The allocation funciton devm_kcalloc may fail and return a null pointer,
which would cause a null-pointer dereference later.
It might be better to check it and directly return -ENOMEM just like the
usage of devm_kcalloc in previous code.

Signed-off-by: QintaoShen <unSimple1993@163.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/1648107843-29077-1-git-send-email-unSimple1993@163.com
2022-04-15 14:59:23 -05:00
Minghao Chi (CGEL ZTE) cabfa5b465 soc: ti: omap_prm: Use of_device_get_match_data()
Since omap_prm_id_table all have (and expected to have) data entries,
use of_device_get_match_data() to simplify the code.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220307033736.2075221-1-chi.minghao@zte.com.cn
2022-04-15 14:31:03 -05:00
Deepak Kumar Singh f1383348ad soc: qcom: smem: validate fields of shared structures
Structures in shared memory that can be modified by remote
processors may have untrusted values, they should be validated
before use.

Adding proper validation before using fields of shared
structures.

Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1646147913-15791-2-git-send-email-quic_deesin@quicinc.com
2022-04-12 21:29:58 -05:00
Deepak Kumar Singh 20bb6c9de1 soc: qcom: smem: map only partitions used by local HOST
SMEM driver is IO mapping complete region and CPU is doing a speculative
read into a partition where local HOST does not have permission resulting
in a NOC error.

Map only those partitions which are accessibly to local HOST.

Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1646147913-15791-1-git-send-email-quic_deesin@quicinc.com
2022-04-12 21:29:49 -05:00
Bjorn Andersson 5334a3b12a soc: qcom: llcc: Add MODULE_DEVICE_TABLE()
The llcc-qcom driver can be compiled as a module, but lacks
MODULE_DEVICE_TABLE() and will therefore not be loaded automatically.
Fix this.

Fixes: a3134fb09e ("drivers: soc: Add LLCC driver")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220408213336.581661-3-bjorn.andersson@linaro.org
2022-04-11 20:46:25 -05:00
Minghao Chi f25d2b2b55 soc: ti: pruss: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get is more appropriate
for simplifing code

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
Link: https://lore.kernel.org/r/20220408080853.2494292-1-chi.minghao@zte.com.cn
2022-04-11 08:46:09 -05:00
Jakob Koschel d281a982c2 soc: ti: replace usage of found with dedicated list iterator variable
To move the list iterator variable into the list_for_each_entry_*()
macro in the future it should be avoided to use the list iterator
variable after the loop body.

To *never* use the list iterator variable after the loop it was
concluded to use a separate iterator variable instead of a
found boolean [1].

This removes the need to use a found variable and simply checking if
the variable was set, can determine if the break/goto was hit.

Signed-off-by: Jakob Koschel <jakobkoschel@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cWXJ6w@mail.gmail.com/
Link: https://lore.kernel.org/r/20220324072503.63244-1-jakobkoschel@gmail.com
2022-04-11 08:45:56 -05:00
Yihao Han c2b0390132 soc: ti: wkup_m3_ipc: fix platform_get_irq.cocci warning
Remove dev_err() messages after platform_get_irq*() failures.
platform_get_irq() already prints an error.

Generated by: scripts/coccinelle/api/platform_get_irq.cocci

Signed-off-by: Yihao Han <hanyihao@vivo.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220303124444.3373-1-hanyihao@vivo.com
2022-04-11 08:45:42 -05:00
Peter Geis 5c0bb71138 soc: rockchip: set dwc3 clock for rk3566
The rk3566 dwc3 otg port clock is unavailable at boot, as it defaults to
the combophy as the clock source. As combophy0 doesn't exist on rk3566,
we need to set the clock source to the usb2 phy instead.

Add handling to the grf driver to handle this on boot.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220408151237.3165046-3-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:39:05 +02:00
Sebastian Fricke 07905844f4 soc: rockchip: pm_domains: Fix typo in comment
s/eject devices form power domain/eject devices from the power domain/

Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Link: https://lore.kernel.org/r/20220326183451.66115-1-sebastian.fricke@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-04-10 18:38:59 +02:00
Adam Ford e2aa165cd0 soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang
The imx8mn clock list for the ISI lists four clocks, but DOMAIN_MAX_CLKS
was set to 3.  Because of this, attempts to enable the fourth clock failed,
threw some splat, and ultimately hung.

Fixes: 7f511d514e ("soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-10 09:32:08 +08:00
Lucas Stach a8a2c274dd soc: imx: gpcv2: add support for i.MX8MP power domains
This adds driver support for all the GPC power domains found on
the i.MX8MP SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 20:02:36 +08:00
Lucas Stach d9651b99dd soc: imx: gpcv2: add PGC control register indirection
The PGC control registers in the shared (not per-PGC) region of the
GPC address space have different offsets on i.MX8MP to make space for
additional interrupt control registers.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-08 20:01:46 +08:00
Jakob Koschel 3be066542e soc: qcom: pdr: replace usage of found with dedicated list iterator variable
To move the list iterator variable into the list_for_each_entry_*()
macro in the future it should be avoided to use the list iterator
variable after the loop body.

To *never* use the list iterator variable after the loop it was
concluded to use a separate iterator variable instead of a
found boolean [1].

This removes the need to use a found variable and simply checking if
the variable was set, can determine if the break/goto was hit.

Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cWXJ6w@mail.gmail.com/
Signed-off-by: Jakob Koschel <jakobkoschel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220324072435.63070-1-jakobkoschel@gmail.com
2022-04-07 22:20:27 -05:00
Rohit Agarwal 3edff6262c soc: qcom: rpmhpd: Add SDX65 power domains
Add power domains found in Qualcomm SDX65 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647410837-22537-5-git-send-email-quic_rohiagar@quicinc.com
2022-04-07 22:18:00 -05:00
Miaoqian Lin aad66a3c78 soc: qcom: smsm: Fix missing of_node_put() in smsm_parse_ipc
The device_node pointer is returned by of_parse_phandle()  with refcount
incremented. We should use of_node_put() on it when done.

Fixes: c97c4090ff ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220308073648.24634-1-linmq006@gmail.com
2022-04-07 22:17:03 -05:00
Miaoqian Lin 8fd3f18ea3 soc: qcom: smp2p: Fix missing of_node_put() in smp2p_parse_ipc
The device_node pointer is returned by of_parse_phandle()  with refcount
incremented. We should use of_node_put() on it when done.

Fixes: 50e9964141 ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220308071942.22942-1-linmq006@gmail.com
2022-04-07 22:16:29 -05:00
Dmitry Baryshkov 54c2e9256a soc: qcom: socinfo: Add another ID for SM8450
Add another id for SM8450.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228190013.1790617-1-dmitry.baryshkov@linaro.org
2022-04-07 22:10:21 -05:00
Douglas Anderson 4a77579c73 soc: qcom: socinfo: add SC7280 entry to soc_id array
Add an entry for SC7280 SoC.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220321161546.1.Ifc4270fbe9bad536f08a47696e00cca5a0714abd@changeid
2022-04-07 22:08:42 -05:00
Sandipan Patra d3ed752654 soc/tegra: pmc: Update Tegra234 reset sources
Update the tegra234_reset_sources array to contain all reset sources for
Tegra234 and NULL out the entries that do not actually exist.

Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 15:03:23 +02:00
Sagar Kamble 942501661f soc/tegra: fuse: Add nvmem cell lookup entries for Tegra194
Add nvmem cell lookup entries for below FUSE cells:
 - gcplex-config-fuse
 - pdi0
 - pdi1

Also include the device name prefix "gpu-" in the names of the GPU FUSE
cells in nvmem_cell_info.

Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 14:55:50 +02:00
AngeloGioacchino Del Regno 9d7370a56d soc: mediatek: mmsys: Add sw0_rst_offset for MT8192
MT8192 has the same sw0 reset offset as MT8186: add the parameter
to be able to use mmsys as a reset controller for managing at
least the DSI reset line.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220323091932.10648-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04 14:10:02 +02:00
Biju Das 2f89bef90d soc: renesas: Identify RZ/G2UL SoC
Add support for identifying the RZ/G2UL SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:01:53 +02:00
Linus Torvalds 169e77764a Networking changes for 5.18.
Core
 ----
 
  - Introduce XDP multi-buffer support, allowing the use of XDP with
    jumbo frame MTUs and combination with Rx coalescing offloads (LRO).
 
  - Speed up netns dismantling (5x) and lower the memory cost a little.
    Remove unnecessary per-netns sockets. Scope some lists to a netns.
    Cut down RCU syncing. Use batch methods. Allow netdev registration
    to complete out of order.
 
  - Support distinguishing timestamp types (ingress vs egress) and
    maintaining them across packet scrubbing points (e.g. redirect).
 
  - Continue the work of annotating packet drop reasons throughout
    the stack.
 
  - Switch netdev error counters from an atomic to dynamically
    allocated per-CPU counters.
 
  - Rework a few preempt_disable(), local_irq_save() and busy waiting
    sections problematic on PREEMPT_RT.
 
  - Extend the ref_tracker to allow catching use-after-free bugs.
 
 BPF
 ---
 
  - Introduce "packing allocator" for BPF JIT images. JITed code is
    marked read only, and used to be allocated at page granularity.
    Custom allocator allows for more efficient memory use, lower
    iTLB pressure and prevents identity mapping huge pages from
    getting split.
 
  - Make use of BTF type annotations (e.g. __user, __percpu) to enforce
    the correct probe read access method, add appropriate helpers.
 
  - Convert the BPF preload to use light skeleton and drop
    the user-mode-driver dependency.
 
  - Allow XDP BPF_PROG_RUN test infra to send real packets, enabling
    its use as a packet generator.
 
  - Allow local storage memory to be allocated with GFP_KERNEL if called
    from a hook allowed to sleep.
 
  - Introduce fprobe (multi kprobe) to speed up mass attachment (arch
    bits to come later).
 
  - Add unstable conntrack lookup helpers for BPF by using the BPF
    kfunc infra.
 
  - Allow cgroup BPF progs to return custom errors to user space.
 
  - Add support for AF_UNIX iterator batching.
 
  - Allow iterator programs to use sleepable helpers.
 
  - Support JIT of add, and, or, xor and xchg atomic ops on arm64.
 
  - Add BTFGen support to bpftool which allows to use CO-RE in kernels
    without BTF info.
 
  - Large number of libbpf API improvements, cleanups and deprecations.
 
 Protocols
 ---------
 
  - Micro-optimize UDPv6 Tx, gaining up to 5% in test on dummy netdev.
 
  - Adjust TSO packet sizes based on min_rtt, allowing very low latency
    links (data centers) to always send full-sized TSO super-frames.
 
  - Make IPv6 flow label changes (AKA hash rethink) more configurable,
    via sysctl and setsockopt. Distinguish between server and client
    behavior.
 
  - VxLAN support to "collect metadata" devices to terminate only
    configured VNIs. This is similar to VLAN filtering in the bridge.
 
  - Support inserting IPv6 IOAM information to a fraction of frames.
 
  - Add protocol attribute to IP addresses to allow identifying where
    given address comes from (kernel-generated, DHCP etc.)
 
  - Support setting socket and IPv6 options via cmsg on ping6 sockets.
 
  - Reject mis-use of ECN bits in IP headers as part of DSCP/TOS.
    Define dscp_t and stop taking ECN bits into account in fib-rules.
 
  - Add support for locked bridge ports (for 802.1X).
 
  - tun: support NAPI for packets received from batched XDP buffs,
    doubling the performance in some scenarios.
 
  - IPv6 extension header handling in Open vSwitch.
 
  - Support IPv6 control message load balancing in bonding, prevent
    neighbor solicitation and advertisement from using the wrong port.
    Support NS/NA monitor selection similar to existing ARP monitor.
 
  - SMC
    - improve performance with TCP_CORK and sendfile()
    - support auto-corking
    - support TCP_NODELAY
 
  - MCTP (Management Component Transport Protocol)
    - add user space tag control interface
    - I2C binding driver (as specified by DMTF DSP0237)
 
  - Multi-BSSID beacon handling in AP mode for WiFi.
 
  - Bluetooth:
    - handle MSFT Monitor Device Event
    - add MGMT Adv Monitor Device Found/Lost events
 
  - Multi-Path TCP:
    - add support for the SO_SNDTIMEO socket option
    - lots of selftest cleanups and improvements
 
  - Increase the max PDU size in CAN ISOTP to 64 kB.
 
 Driver API
 ----------
 
  - Add HW counters for SW netdevs, a mechanism for devices which
    offload packet forwarding to report packet statistics back to
    software interfaces such as tunnels.
 
  - Select the default NIC queue count as a fraction of number of
    physical CPU cores, instead of hard-coding to 8.
 
  - Expose devlink instance locks to drivers. Allow device layer of
    drivers to use that lock directly instead of creating their own
    which always runs into ordering issues in devlink callbacks.
 
  - Add header/data split indication to guide user space enabling
    of TCP zero-copy Rx.
 
  - Allow configuring completion queue event size.
 
  - Refactor page_pool to enable fragmenting after allocation.
 
  - Add allocation and page reuse statistics to page_pool.
 
  - Improve Multiple Spanning Trees support in the bridge to allow
    reuse of topologies across VLANs, saving HW resources in switches.
 
  - DSA (Distributed Switch Architecture):
    - replay and offload of host VLAN entries
    - offload of static and local FDB entries on LAG interfaces
    - FDB isolation and unicast filtering
 
 New hardware / drivers
 ----------------------
 
  - Ethernet:
    - LAN937x T1 PHYs
    - Davicom DM9051 SPI NIC driver
    - Realtek RTL8367S, RTL8367RB-VB switch and MDIO
    - Microchip ksz8563 switches
    - Netronome NFP3800 SmartNICs
    - Fungible SmartNICs
    - MediaTek MT8195 switches
 
  - WiFi:
    - mt76: MediaTek mt7916
    - mt76: MediaTek mt7921u USB adapters
    - brcmfmac: Broadcom BCM43454/6
 
  - Mobile:
    - iosm: Intel M.2 7360 WWAN card
 
 Drivers
 -------
 
  - Convert many drivers to the new phylink API built for split PCS
    designs but also simplifying other cases.
 
  - Intel Ethernet NICs:
    - add TTY for GNSS module for E810T device
    - improve AF_XDP performance
    - GTP-C and GTP-U filter offload
    - QinQ VLAN support
 
  - Mellanox Ethernet NICs (mlx5):
    - support xdp->data_meta
    - multi-buffer XDP
    - offload tc push_eth and pop_eth actions
 
  - Netronome Ethernet NICs (nfp):
    - flow-independent tc action hardware offload (police / meter)
    - AF_XDP
 
  - Other Ethernet NICs:
    - at803x: fiber and SFP support
    - xgmac: mdio: preamble suppression and custom MDC frequencies
    - r8169: enable ASPM L1.2 if system vendor flags it as safe
    - macb/gem: ZynqMP SGMII
    - hns3: add TX push mode
    - dpaa2-eth: software TSO
    - lan743x: multi-queue, mdio, SGMII, PTP
    - axienet: NAPI and GRO support
 
  - Mellanox Ethernet switches (mlxsw):
    - source and dest IP address rewrites
    - RJ45 ports
 
  - Marvell Ethernet switches (prestera):
    - basic routing offload
    - multi-chain TC ACL offload
 
  - NXP embedded Ethernet switches (ocelot & felix):
    - PTP over UDP with the ocelot-8021q DSA tagging protocol
    - basic QoS classification on Felix DSA switch using dcbnl
    - port mirroring for ocelot switches
 
  - Microchip high-speed industrial Ethernet (sparx5):
    - offloading of bridge port flooding flags
    - PTP Hardware Clock
 
  - Other embedded switches:
    - lan966x: PTP Hardward Clock
    - qca8k: mdio read/write operations via crafted Ethernet packets
 
  - Qualcomm 802.11ax WiFi (ath11k):
    - add LDPC FEC type and 802.11ax High Efficiency data in radiotap
    - enable RX PPDU stats in monitor co-exist mode
 
  - Intel WiFi (iwlwifi):
    - UHB TAS enablement via BIOS
    - band disablement via BIOS
    - channel switch offload
    - 32 Rx AMPDU sessions in newer devices
 
  - MediaTek WiFi (mt76):
    - background radar detection
    - thermal management improvements on mt7915
    - SAR support for more mt76 platforms
    - MBSSID and 6 GHz band on mt7915
 
  - RealTek WiFi:
    - rtw89: AP mode
    - rtw89: 160 MHz channels and 6 GHz band
    - rtw89: hardware scan
 
  - Bluetooth:
    - mt7921s: wake on Bluetooth, SCO over I2S, wide-band-speed (WBS)
 
  - Microchip CAN (mcp251xfd):
    - multiple RX-FIFOs and runtime configurable RX/TX rings
    - internal PLL, runtime PM handling simplification
    - improve chip detection and error handling after wakeup
 
 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE6jPA+I1ugmIBA4hXMUZtbf5SIrsFAmI7YBcACgkQMUZtbf5S
 IrveSBAAmSNJlUK6vPsnNzs7IhsZnfI/AUjm2TCLZnlhKttbpI4A/4Pohk33V7RS
 FGX7f8kjEfhUwrIiLDgeCnztNHRECrCmk6aZc/jLEvecmTauJ+f6kjShkDY/wix+
 AkPHmrZnQeLPAEVuljDdV+sL6ik08+zQL7PazIYHsaSKKC0MGQptRwcri8PLRAKE
 KPBAhVhleq2rAZ/ntprSN52F4Af6rpFTrPIWuN8Bqdbc9dy5094LT0mpOOWYvgr3
 /DLvvAPuLemwyIQkjWknVKBRUAQcmNPC+BY3J8K3LRaiNhekGqOFan46BfqP+k2J
 6DWu0Qrp2yWt4BMOeEToZR5rA6v5suUAMIBu8PRZIDkINXQMlIxHfGjZyNm0rVfw
 7edNri966yus9OdzwPa32MIG3oC6PnVAwYCJAjjBMNS8sSIkp7wgHLkgWN4UFe2H
 K/e6z8TLF4UQ+zFM0aGI5WZ+9QqWkTWEDF3R3OhdFpGrznna0gxmkOeV2YvtsgxY
 cbS0vV9Zj73o+bYzgBKJsw/dAjyLdXoHUGvus26VLQ78S/VGunVKtItwoxBAYmZo
 krW964qcC89YofzSi8RSKLHuEWtNWZbVm8YXr75u6jpr5GhMBu0CYefLs+BuZcxy
 dw8c69cGneVbGZmY2J3rBhDkchbuICl8vdUPatGrOJAoaFdYKuw=
 =ELpe
 -----END PGP SIGNATURE-----

Merge tag 'net-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Pull networking updates from Jakub Kicinski:
 "The sprinkling of SPI drivers is because we added a new one and Mark
  sent us a SPI driver interface conversion pull request.

  Core
  ----

   - Introduce XDP multi-buffer support, allowing the use of XDP with
     jumbo frame MTUs and combination with Rx coalescing offloads (LRO).

   - Speed up netns dismantling (5x) and lower the memory cost a little.
     Remove unnecessary per-netns sockets. Scope some lists to a netns.
     Cut down RCU syncing. Use batch methods. Allow netdev registration
     to complete out of order.

   - Support distinguishing timestamp types (ingress vs egress) and
     maintaining them across packet scrubbing points (e.g. redirect).

   - Continue the work of annotating packet drop reasons throughout the
     stack.

   - Switch netdev error counters from an atomic to dynamically
     allocated per-CPU counters.

   - Rework a few preempt_disable(), local_irq_save() and busy waiting
     sections problematic on PREEMPT_RT.

   - Extend the ref_tracker to allow catching use-after-free bugs.

  BPF
  ---

   - Introduce "packing allocator" for BPF JIT images. JITed code is
     marked read only, and used to be allocated at page granularity.
     Custom allocator allows for more efficient memory use, lower iTLB
     pressure and prevents identity mapping huge pages from getting
     split.

   - Make use of BTF type annotations (e.g. __user, __percpu) to enforce
     the correct probe read access method, add appropriate helpers.

   - Convert the BPF preload to use light skeleton and drop the
     user-mode-driver dependency.

   - Allow XDP BPF_PROG_RUN test infra to send real packets, enabling
     its use as a packet generator.

   - Allow local storage memory to be allocated with GFP_KERNEL if
     called from a hook allowed to sleep.

   - Introduce fprobe (multi kprobe) to speed up mass attachment (arch
     bits to come later).

   - Add unstable conntrack lookup helpers for BPF by using the BPF
     kfunc infra.

   - Allow cgroup BPF progs to return custom errors to user space.

   - Add support for AF_UNIX iterator batching.

   - Allow iterator programs to use sleepable helpers.

   - Support JIT of add, and, or, xor and xchg atomic ops on arm64.

   - Add BTFGen support to bpftool which allows to use CO-RE in kernels
     without BTF info.

   - Large number of libbpf API improvements, cleanups and deprecations.

  Protocols
  ---------

   - Micro-optimize UDPv6 Tx, gaining up to 5% in test on dummy netdev.

   - Adjust TSO packet sizes based on min_rtt, allowing very low latency
     links (data centers) to always send full-sized TSO super-frames.

   - Make IPv6 flow label changes (AKA hash rethink) more configurable,
     via sysctl and setsockopt. Distinguish between server and client
     behavior.

   - VxLAN support to "collect metadata" devices to terminate only
     configured VNIs. This is similar to VLAN filtering in the bridge.

   - Support inserting IPv6 IOAM information to a fraction of frames.

   - Add protocol attribute to IP addresses to allow identifying where
     given address comes from (kernel-generated, DHCP etc.)

   - Support setting socket and IPv6 options via cmsg on ping6 sockets.

   - Reject mis-use of ECN bits in IP headers as part of DSCP/TOS.
     Define dscp_t and stop taking ECN bits into account in fib-rules.

   - Add support for locked bridge ports (for 802.1X).

   - tun: support NAPI for packets received from batched XDP buffs,
     doubling the performance in some scenarios.

   - IPv6 extension header handling in Open vSwitch.

   - Support IPv6 control message load balancing in bonding, prevent
     neighbor solicitation and advertisement from using the wrong port.
     Support NS/NA monitor selection similar to existing ARP monitor.

   - SMC
      - improve performance with TCP_CORK and sendfile()
      - support auto-corking
      - support TCP_NODELAY

   - MCTP (Management Component Transport Protocol)
      - add user space tag control interface
      - I2C binding driver (as specified by DMTF DSP0237)

   - Multi-BSSID beacon handling in AP mode for WiFi.

   - Bluetooth:
      - handle MSFT Monitor Device Event
      - add MGMT Adv Monitor Device Found/Lost events

   - Multi-Path TCP:
      - add support for the SO_SNDTIMEO socket option
      - lots of selftest cleanups and improvements

   - Increase the max PDU size in CAN ISOTP to 64 kB.

  Driver API
  ----------

   - Add HW counters for SW netdevs, a mechanism for devices which
     offload packet forwarding to report packet statistics back to
     software interfaces such as tunnels.

   - Select the default NIC queue count as a fraction of number of
     physical CPU cores, instead of hard-coding to 8.

   - Expose devlink instance locks to drivers. Allow device layer of
     drivers to use that lock directly instead of creating their own
     which always runs into ordering issues in devlink callbacks.

   - Add header/data split indication to guide user space enabling of
     TCP zero-copy Rx.

   - Allow configuring completion queue event size.

   - Refactor page_pool to enable fragmenting after allocation.

   - Add allocation and page reuse statistics to page_pool.

   - Improve Multiple Spanning Trees support in the bridge to allow
     reuse of topologies across VLANs, saving HW resources in switches.

   - DSA (Distributed Switch Architecture):
      - replay and offload of host VLAN entries
      - offload of static and local FDB entries on LAG interfaces
      - FDB isolation and unicast filtering

  New hardware / drivers
  ----------------------

   - Ethernet:
      - LAN937x T1 PHYs
      - Davicom DM9051 SPI NIC driver
      - Realtek RTL8367S, RTL8367RB-VB switch and MDIO
      - Microchip ksz8563 switches
      - Netronome NFP3800 SmartNICs
      - Fungible SmartNICs
      - MediaTek MT8195 switches

   - WiFi:
      - mt76: MediaTek mt7916
      - mt76: MediaTek mt7921u USB adapters
      - brcmfmac: Broadcom BCM43454/6

   - Mobile:
      - iosm: Intel M.2 7360 WWAN card

  Drivers
  -------

   - Convert many drivers to the new phylink API built for split PCS
     designs but also simplifying other cases.

   - Intel Ethernet NICs:
      - add TTY for GNSS module for E810T device
      - improve AF_XDP performance
      - GTP-C and GTP-U filter offload
      - QinQ VLAN support

   - Mellanox Ethernet NICs (mlx5):
      - support xdp->data_meta
      - multi-buffer XDP
      - offload tc push_eth and pop_eth actions

   - Netronome Ethernet NICs (nfp):
      - flow-independent tc action hardware offload (police / meter)
      - AF_XDP

   - Other Ethernet NICs:
      - at803x: fiber and SFP support
      - xgmac: mdio: preamble suppression and custom MDC frequencies
      - r8169: enable ASPM L1.2 if system vendor flags it as safe
      - macb/gem: ZynqMP SGMII
      - hns3: add TX push mode
      - dpaa2-eth: software TSO
      - lan743x: multi-queue, mdio, SGMII, PTP
      - axienet: NAPI and GRO support

   - Mellanox Ethernet switches (mlxsw):
      - source and dest IP address rewrites
      - RJ45 ports

   - Marvell Ethernet switches (prestera):
      - basic routing offload
      - multi-chain TC ACL offload

   - NXP embedded Ethernet switches (ocelot & felix):
      - PTP over UDP with the ocelot-8021q DSA tagging protocol
      - basic QoS classification on Felix DSA switch using dcbnl
      - port mirroring for ocelot switches

   - Microchip high-speed industrial Ethernet (sparx5):
      - offloading of bridge port flooding flags
      - PTP Hardware Clock

   - Other embedded switches:
      - lan966x: PTP Hardward Clock
      - qca8k: mdio read/write operations via crafted Ethernet packets

   - Qualcomm 802.11ax WiFi (ath11k):
      - add LDPC FEC type and 802.11ax High Efficiency data in radiotap
      - enable RX PPDU stats in monitor co-exist mode

   - Intel WiFi (iwlwifi):
      - UHB TAS enablement via BIOS
      - band disablement via BIOS
      - channel switch offload
      - 32 Rx AMPDU sessions in newer devices

   - MediaTek WiFi (mt76):
      - background radar detection
      - thermal management improvements on mt7915
      - SAR support for more mt76 platforms
      - MBSSID and 6 GHz band on mt7915

   - RealTek WiFi:
      - rtw89: AP mode
      - rtw89: 160 MHz channels and 6 GHz band
      - rtw89: hardware scan

   - Bluetooth:
      - mt7921s: wake on Bluetooth, SCO over I2S, wide-band-speed (WBS)

   - Microchip CAN (mcp251xfd):
      - multiple RX-FIFOs and runtime configurable RX/TX rings
      - internal PLL, runtime PM handling simplification
      - improve chip detection and error handling after wakeup"

* tag 'net-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2521 commits)
  llc: fix netdevice reference leaks in llc_ui_bind()
  drivers: ethernet: cpsw: fix panic when interrupt coaleceing is set via ethtool
  ice: don't allow to run ice_send_event_to_aux() in atomic ctx
  ice: fix 'scheduling while atomic' on aux critical err interrupt
  net/sched: fix incorrect vlan_push_eth dest field
  net: bridge: mst: Restrict info size queries to bridge ports
  net: marvell: prestera: add missing destroy_workqueue() in prestera_module_init()
  drivers: net: xgene: Fix regression in CRC stripping
  net: geneve: add missing netlink policy and size for IFLA_GENEVE_INNER_PROTO_INHERIT
  net: dsa: fix missing host-filtered multicast addresses
  net/mlx5e: Fix build warning, detected write beyond size of field
  iwlwifi: mvm: Don't fail if PPAG isn't supported
  selftests/bpf: Fix kprobe_multi test.
  Revert "rethook: x86: Add rethook x86 implementation"
  Revert "arm64: rethook: Add arm64 rethook implementation"
  Revert "powerpc: Add rethook support"
  Revert "ARM: rethook: Add rethook arm implementation"
  netdevice: add missing dm_private kdoc
  net: bridge: mst: prevent NULL deref in br_mst_info_size()
  selftests: forwarding: Use same VRF for port and VLAN upper
  ...
2022-03-24 13:13:26 -07:00
Linus Torvalds b4bc93bd76 ARM driver updates for 5.18
There are a few separately maintained driver subsystems that we merge through
 the SoC tree, notable changes are:
 
  - Memory controller updates, mainly for Tegra and Mediatek SoCs,
    and clarifications for the memory controller DT bindings
 
  - SCMI firmware interface updates, in particular a new transport based
    on OPTEE and support for atomic operations.
 
  - Cleanups to the TEE subsystem, refactoring its memory management
 
 For SoC specific drivers without a separate subsystem, changes include
 
  - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
    Layerscape SoCs.
 
  - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
    and Qualcomm SM8450.
 
  - Better power management on Mediatek MT81xx, NXP i.MX8MQ
    and older NVIDIA Tegra chips
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI4nOUACgkQmmx57+YA
 GNlNNhAApPQw+FKQ6yVj2EZYcaAgik8PJAJoNQWYED52iQfm5uXgjt3aQewvrPNW
 nkKx5Mx+fPUfaKx5mkVOFMhME5Bw9tYbXHm2/RpRp+n8jOdUlQpAhzIPOyWPHOJS
 QX6qu4t+agrQzjbOCGouAJXgyxhTJFUMviM2EgVHbQHXPtdF8i2kyanfCP7Rw8cx
 sVtLwpvhbLm849+deYRXuv2Xw9I3M1Np7018s5QciimI2eLLEb+lJ/C5XWz5pMYn
 M1nZ7uwCLKPCewpMETTuhKOv0ioOXyY9C1ghyiGZFhHQfoCYTu94Hrx9t8x5gQmL
 qWDinXWXVk8LBegyrs8Bp4wcjtmvMMLnfWtsGSfT5uq24JOGg22OmtUNhNJbS9+p
 VjEvBgkXYD7UEl5npI9v9/KQWr3/UDir0zvkuV40gJyeBWNEZ/PB8olXAxgL7wZv
 cXRYSaUYYt3DKQf1k5I4GUyQtkP/4RaBy6AqvH5Sx0lCwuY6G6ISK+kCPaaSRKnX
 WR+nFw84dKCu7miehmW9qSzMQ4kiSCKIDqk7ilHcwv0J2oXDrlqVPKGGGTzZjUc8
 +feqM/eSoYvDDEDemuXNSnl3hc1Zlvm7Apd5AN6kdTaNgoACDYdyvGuJ3CvzcA+K
 1gBHUBvGS/ODA25KnYabr7wCMgxYqf7dXfkyKIBwFHwxOnRHtgs=
 =Cfbk
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann:
 "There are a few separately maintained driver subsystems that we merge
  through the SoC tree, notable changes are:

   - Memory controller updates, mainly for Tegra and Mediatek SoCs, and
     clarifications for the memory controller DT bindings

   - SCMI firmware interface updates, in particular a new transport
     based on OPTEE and support for atomic operations.

   - Cleanups to the TEE subsystem, refactoring its memory management

  For SoC specific drivers without a separate subsystem, changes include

   - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
     Layerscape SoCs.

   - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
     and Qualcomm SM8450.

   - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older
     NVIDIA Tegra chips"

* tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits)
  ARM: spear: fix typos in comments
  soc/microchip: fix invalid free in mpfs_sys_controller_delete
  soc: s4: Add support for power domains controller
  dt-bindings: power: add Amlogic s4 power domains bindings
  ARM: at91: add support in soc driver for new SAMA5D29
  soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
  dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
  memory: emif: check the pointer temp in get_device_details()
  memory: emif: Add check for setup_interrupts
  dt-bindings: arm: mediatek: mmsys: add support for MT8186
  dt-bindings: mediatek: add compatible for MT8186 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
  soc: mediatek: mmsys: add mmsys reset control for MT8186
  soc: mediatek: mtk-infracfg: Disable ACP on MT8192
  soc: ti: k3-socinfo: Add AM62x JTAG ID
  soc: mediatek: add MTK mutex support for MT8186
  soc: mediatek: mmsys: add mt8186 mmsys routing table
  soc: mediatek: pm-domains: Add support for mt8186
  dt-bindings: power: Add MT8186 power domains
  soc: mediatek: pm-domains: Add support for mt8195
  ...
2022-03-23 18:23:13 -07:00
Linus Torvalds baaa68a979 ARM: SoC updates for 5.18
SoC specific code is generally used for older platforms that don't (yet)
 use device tree to do the same things.
 
  - Support is added for i.MXRT10xx, a Cortex-M7 based microcontroller
    from NXP. At the moment this is still incomplete as other portions
    are merged through different trees.
 
  - Long abandoned support for running NOMMU ARMv4 or ARMv5 platforms
    gets removed, now the Arm NOMMU platforms are limited to the
    Cortex-M family of microcontrollers
 
  - Two old PXA boards get removed, along with corresponding driver
    bits.
 
  - Continued cleanup of the Intel IXP4xx platforms, removing some
    remnants of the old board files.
 
  - Minor Cleanups and fixes for Orion, PXA, MMP, Mstar, Samsung
 
  - CPU idle support for AT91
 
  - A system controller driver for Polarfire
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI7I0sACgkQmmx57+YA
 GNkfsQ/+KHy6byGCcPiB3T+be2/WFnc7ANnniYku4o27703BpROLCltNAr4VTiyM
 Ucin72wmuPx840RiP0o8st7D9Ms7fG3/j4hoxJDG6v1aHr8CazCSPZR2EgVAOVeD
 n4jGuLzICqP3RLw/qdfTT4lARKGqKBW1l5ss0D4PxFECyKq6kzqEOt9wCw29vAJy
 Vw8CmcDhGr9sI8voZYN1dMyIV4FujkmOm/mNSHNTKKN0vt+GFU0gVxDAG2i7Rh1g
 cO7593Vg/U4daw97231uoW0q+9vZ6OKajZt1Mm6LFe4AsGRpV+eN5UpQeZzkm7ET
 D6GFE8/NTkcJHm50OYYER7t69uHe1O/Sf5+MIax1l5pthuWRZGolb1xOBeWJ9Al7
 Qgym9XNCGf0AoaUeXIuxVbhxNp8GXqBzL35qMK1hV4WkdrJSRGq+2GQLBgtb6owi
 ZIpDYAFnUNFkYFdtX5qez8zXy4LHtUf5bO+qnLXPT2Sk0MtYWx9Gn0P4kgMqezkn
 HQg1inPRQS7PB40xE+7Ap3pzvE/1IWgYblsS8CFekJ4+Nm0X4IRx6/s9KEDHU1ZQ
 RADI6jwwVe/ioOSNen7S60GNrFKDyt9ZbLq/+x/GE3SkmdTeAmcd+RPmQvc5SHnl
 jvUnjN1nsyqhOICIGMwvdkFkW749/af713xoiXyCUedZKIxAgkc=
 =2fmA
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "SoC specific code is generally used for older platforms that don't
  (yet) use device tree to do the same things.

   - Support is added for i.MXRT10xx, a Cortex-M7 based microcontroller
     from NXP. At the moment this is still incomplete as other portions
     are merged through different trees.

   - Long abandoned support for running NOMMU ARMv4 or ARMv5 platforms
     gets removed, now the Arm NOMMU platforms are limited to the
     Cortex-M family of microcontrollers

   - Two old PXA boards get removed, along with corresponding driver
     bits.

   - Continued cleanup of the Intel IXP4xx platforms, removing some
     remnants of the old board files.

   - Minor Cleanups and fixes for Orion, PXA, MMP, Mstar, Samsung

   - CPU idle support for AT91

   - A system controller driver for Polarfire"

* tag 'arm-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (29 commits)
  ARM: remove support for NOMMU ARMv4/v5
  ARM: PXA: fix up decompressor code
  soc: microchip: make mpfs_sys_controller_put static
  ARM: pxa: remove Intel Imote2 and Stargate 2 boards
  ARM: mmp: Fix failure to remove sram device
  ARM: mstar: Select ARM_ERRATA_814220
  soc: add microchip polarfire soc system controller
  ARM: at91: Kconfig: select PM_OPP
  ARM: at91: PM: add cpu idle support for sama7g5
  ARM: at91: ddr: fix typo to align with datasheet naming
  ARM: at91: ddr: align macro definitions
  ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency
  ARM: ixp4xx: Convert to SPARSE_IRQ and P2V
  ARM: ixp4xx: Drop all common code
  ARM: ixp4xx: Drop custom DMA coherency and bouncing
  ARM: ixp4xx: Remove feature bit accessors
  net: ixp4xx_hss: Check features using syscon
  net: ixp4xx_eth: Drop platform data support
  soc: ixp4xx-npe: Access syscon regs using regmap
  soc: ixp4xx: Add features from regmap helper
  ...
2022-03-23 18:20:09 -07:00
Linus Torvalds 02b82b02c3 Power management updates for 5.18-rc1
- Allow device_pm_check_callbacks() to be called from interrupt
    context without issues (Dmitry Baryshkov).
 
  - Modify devm_pm_runtime_enable() to automatically handle
    pm_runtime_dont_use_autosuspend() at driver exit time (Douglas
    Anderson).
 
  - Make the schedutil cpufreq governor use to_gov_attr_set() instead
    of open coding it (Kevin Hao).
 
  - Replace acpi_bus_get_device() with acpi_fetch_acpi_dev() in the
    cpufreq longhaul driver (Rafael Wysocki).
 
  - Unify show() and store() naming in cpufreq and make it use
    __ATTR_XX (Lianjie Zhang).
 
  - Make the intel_pstate driver use the EPP value set by the firmware
    by default (Srinivas Pandruvada).
 
  - Re-order the init checks in the powernow-k8 cpufreq driver (Mario
    Limonciello).
 
  - Make the ACPI processor idle driver check for architectural
    support for LPI to avoid using it on x86 by mistake (Mario
    Limonciello).
 
  - Add Sapphire Rapids Xeon support to the intel_idle driver (Artem
    Bityutskiy).
 
  - Add 'preferred_cstates' module argument to the intel_idle driver
    to work around C1 and C1E handling issue on Sapphire Rapids (Artem
    Bityutskiy).
 
  - Add core C6 optimization on Sapphire Rapids to the intel_idle
    driver (Artem Bityutskiy).
 
  - Optimize the haltpoll cpuidle driver a bit (Li RongQing).
 
  - Remove leftover text from intel_idle() kerneldoc comment and fix
    up white space in intel_idle (Rafael Wysocki).
 
  - Fix load_image_and_restore() error path (Ye Bin).
 
  - Fix typos in comments in the system wakeup hadling code (Tom Rix).
 
  - Clean up non-kernel-doc comments in hibernation code (Jiapeng
    Chong).
 
  - Fix __setup handler error handling in system-wide suspend and
    hibernation core code (Randy Dunlap).
 
  - Add device name to suspend_report_result() (Youngjin Jang).
 
  - Make virtual guests honour ACPI S4 hardware signature by
    default (David Woodhouse).
 
  - Block power off of a parent PM domain unless child is in deepest
    state (Ulf Hansson).
 
  - Use dev_err_probe() to simplify error handling for generic PM
    domains (Ahmad Fatoum).
 
  - Fix sleep-in-atomic bug caused by genpd_debug_remove() (Shawn Guo).
 
  - Document Intel uncore frequency scaling (Srinivas Pandruvada).
 
  - Add DTPM hierarchy description (Daniel Lezcano).
 
  - Change the locking scheme in DTPM (Daniel Lezcano).
 
  - Fix dtpm_cpu cleanup at exit time and missing virtual DTPM pointer
    release (Daniel Lezcano).
 
  - Make dtpm_node_callback[] static (kernel test robot).
 
  - Fix spelling mistake "initialze" -> "initialize" in
    dtpm_create_hierarchy() (Colin Ian King).
 
  - Add tracer tool for the amd-pstate driver (Jinzhou Su).
 
  - Fix PC6 displaying in turbostat on some systems (Artem Bityutskiy).
 
  - Add AMD P-State support to the cpupower utility (Huang Rui).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmI4pM4SHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxh5wQAJEz3u55wIHzeov30obtXaD3SxxnvRzR
 p96gRcmNoR2so/Q9D+h+JHZKQkVklbnbqExMXQn1qarceAUN7KPjVMRvagjZsC/f
 J3LtQmx96yqGTCzOTu5n+Ol2ojKLMCMo++no/2873BYhd60TV6oQxRzkNiZx215n
 tT6MKY5ZMX448VKWAWh9vt5rdvbBj9z6cfvpchK/3bziE21lfLz/1iXeFnwqjPGU
 XuA7NYbVAHOfsdHZk19+4qAgm8EYkmjd4/J8HDlb7XouyLuUGy8KJZYhSrJKiQ1C
 f9f2Zw0925/YpBmFXOwxuYWP9KjFKlq7Cdr3SSgVGDOvgyRtpeV4fU8Y6WPFCtEV
 fQdKr9/4KQP6hwUpxJZucSf49wcnyh7hFDMxrwVVcL96yXZef1OqG3ITihJY/n4J
 +wDnpR2VqBeiG5NyECjk3mPROZGFfUlHRsqMd3JOswMpGF5phpEI9nNFcayB262S
 Rkgcb3MacFVsuo/ZBdzCUTZ6ECvjxZn4FGZPxumkp65SJO18gOPbqs8qfGCZ3Tgb
 GDy0CWEOv/KuGnks1CkBGok2Z4q8s2GcZmaOp9BiPjxKJD71i4uPtiGA/5Ahb6cm
 Cu0G7Ub/t2Vc93E7mnTE4hh2IuiAN73yB5teM4YNllHw6f+aqVGlvJktIMpShajo
 eEBNFlkwljyz
 =WlR9
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "These are mostly fixes and cleanups all over the code and a new piece
  of documentation for Intel uncore frequency scaling.

  Functionality-wise, the intel_idle driver will support Sapphire Rapids
  Xeons natively now (with some extra facilities for controlling
  C-states more precisely on those systems), virtual guests will take
  the ACPI S4 hardware signature into account by default, the
  intel_pstate driver will take the defualt EPP value from the firmware,
  cpupower utility will support the AMD P-state driver added in the
  previous cycle, and there is a new tracer utility for that driver.

  Specifics:

   - Allow device_pm_check_callbacks() to be called from interrupt
     context without issues (Dmitry Baryshkov).

   - Modify devm_pm_runtime_enable() to automatically handle
     pm_runtime_dont_use_autosuspend() at driver exit time (Douglas
     Anderson).

   - Make the schedutil cpufreq governor use to_gov_attr_set() instead
     of open coding it (Kevin Hao).

   - Replace acpi_bus_get_device() with acpi_fetch_acpi_dev() in the
     cpufreq longhaul driver (Rafael Wysocki).

   - Unify show() and store() naming in cpufreq and make it use
     __ATTR_XX (Lianjie Zhang).

   - Make the intel_pstate driver use the EPP value set by the firmware
     by default (Srinivas Pandruvada).

   - Re-order the init checks in the powernow-k8 cpufreq driver (Mario
     Limonciello).

   - Make the ACPI processor idle driver check for architectural support
     for LPI to avoid using it on x86 by mistake (Mario Limonciello).

   - Add Sapphire Rapids Xeon support to the intel_idle driver (Artem
     Bityutskiy).

   - Add 'preferred_cstates' module argument to the intel_idle driver to
     work around C1 and C1E handling issue on Sapphire Rapids (Artem
     Bityutskiy).

   - Add core C6 optimization on Sapphire Rapids to the intel_idle
     driver (Artem Bityutskiy).

   - Optimize the haltpoll cpuidle driver a bit (Li RongQing).

   - Remove leftover text from intel_idle() kerneldoc comment and fix up
     white space in intel_idle (Rafael Wysocki).

   - Fix load_image_and_restore() error path (Ye Bin).

   - Fix typos in comments in the system wakeup hadling code (Tom Rix).

   - Clean up non-kernel-doc comments in hibernation code (Jiapeng
     Chong).

   - Fix __setup handler error handling in system-wide suspend and
     hibernation core code (Randy Dunlap).

   - Add device name to suspend_report_result() (Youngjin Jang).

   - Make virtual guests honour ACPI S4 hardware signature by default
     (David Woodhouse).

   - Block power off of a parent PM domain unless child is in deepest
     state (Ulf Hansson).

   - Use dev_err_probe() to simplify error handling for generic PM
     domains (Ahmad Fatoum).

   - Fix sleep-in-atomic bug caused by genpd_debug_remove() (Shawn Guo).

   - Document Intel uncore frequency scaling (Srinivas Pandruvada).

   - Add DTPM hierarchy description (Daniel Lezcano).

   - Change the locking scheme in DTPM (Daniel Lezcano).

   - Fix dtpm_cpu cleanup at exit time and missing virtual DTPM pointer
     release (Daniel Lezcano).

   - Make dtpm_node_callback[] static (kernel test robot).

   - Fix spelling mistake "initialze" -> "initialize" in
     dtpm_create_hierarchy() (Colin Ian King).

   - Add tracer tool for the amd-pstate driver (Jinzhou Su).

   - Fix PC6 displaying in turbostat on some systems (Artem Bityutskiy).

   - Add AMD P-State support to the cpupower utility (Huang Rui)"

* tag 'pm-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (58 commits)
  cpufreq: powernow-k8: Re-order the init checks
  cpuidle: intel_idle: Drop redundant backslash at line end
  cpuidle: intel_idle: Update intel_idle() kerneldoc comment
  PM: hibernate: Honour ACPI hardware signature by default for virtual guests
  cpufreq: intel_pstate: Use firmware default EPP
  cpufreq: unify show() and store() naming and use __ATTR_XX
  PM: core: keep irq flags in device_pm_check_callbacks()
  cpuidle: haltpoll: Call cpuidle_poll_state_init() later
  Documentation: amd-pstate: add tracer tool introduction
  tools/power/x86/amd_pstate_tracer: Add tracer tool for AMD P-state
  tools/power/x86/intel_pstate_tracer: make tracer as a module
  cpufreq: amd-pstate: Add more tracepoint for AMD P-State module
  PM: sleep: Add device name to suspend_report_result()
  turbostat: fix PC6 displaying on some systems
  intel_idle: add core C6 optimization for SPR
  intel_idle: add 'preferred_cstates' module argument
  intel_idle: add SPR support
  PM: runtime: Have devm_pm_runtime_enable() handle pm_runtime_dont_use_autosuspend()
  ACPI: processor idle: Check for architectural support for LPI
  cpuidle: PSCI: Move the `has_lpi` check to the beginning of the function
  ...
2022-03-21 14:26:28 -07:00
Conor Dooley 8e145bc705
soc/microchip: fix invalid free in mpfs_sys_controller_delete
Fix an invalid kfree in mpfs_sys_controller_delete, by replacing the
devm_kzalloc with a regular kzalloc. Change the error handling in the
probe function to free the sys_controller struct if the probe fails.

> cocci warnings: (new ones prefixed by >>)
> >> drivers/soc/microchip/mpfs-sys-controller.c:73:1-6: WARNING: invalid free of devm_ allocated data
Link: https://lore.kernel.org/linux-mm/202203180259.lgIylRZV-lkp@intel.com/

Fixes: d0054a470c ("soc: add microchip polarfire soc system controller")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <mail@conchuod.ie>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-18 22:30:43 +01:00
Jakub Kicinski 1e8a3f0d2a Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
net/dsa/dsa2.c
  commit afb3cc1a39 ("net: dsa: unlock the rtnl_mutex when dsa_master_setup() fails")
  commit e83d565378 ("net: dsa: replay master state events in dsa_tree_{setup,teardown}_master")
https://lore.kernel.org/all/20220307101436.7ae87da0@canb.auug.org.au/

drivers/net/ethernet/intel/ice/ice.h
  commit 97b0129146 ("ice: Fix error with handling of bonding MTU")
  commit 43113ff734 ("ice: add TTY for GNSS module for E810T device")
https://lore.kernel.org/all/20220310112843.3233bcf1@canb.auug.org.au/

drivers/staging/gdm724x/gdm_lte.c
  commit fc7f750dc9 ("staging: gdm724x: fix use after free in gdm_lte_rx()")
  commit 4bcc4249b4 ("staging: Use netif_rx().")
https://lore.kernel.org/all/20220308111043.1018a59d@canb.auug.org.au/

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-10 17:16:56 -08:00
Linus Torvalds 55b4083b44 ARM: SoC fixes for 5.17, part 3
Here is a third set of fixes for the soc tree, well
 within the expected set of changes.
 
 Maintainer list changes:
  - Krzysztof Kozlowski and Jisheng Zhang both have
    new email addresses
  - Broadcom iProc has a new git tree
 
 Regressions:
  - Robert Foss sends a revert for a Mediatek DPI bridge
    patch that caused an inadvertent break in the DT binding
  - mstar timers need to be included in Kconfig
 
 Devicetree fixes for:
  - Aspeed ast2600 spi pinmux
  - Tegra eDP panels on Nyan FHD
  - Tegra display IOMMU
  - Qualcomm sm8350 UFS clocks
  - minor DT changes for Marvell Armada, Qualcomm sdx65,
    Qualcomm sm8450, and Broadcom BCM2711
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIqEGcACgkQmmx57+YA
 GNmA+A//QHcuKnkrkVGI3qrHKYVgJK+0sEptRrjYKZ7GUqUyamCrY2xZuKZHmye0
 wTd1jrFZGCDufztyYmIy9vRMxn7CBQBHyvvQfUBKgFEWi0whcb9QcD4ko0imZTYp
 uz+WhTYbmLaNFF9PTDNXX7qahofwIY0A18rTzNbGL/G6dwTrcolAKkpSJE91oUU0
 Ck1xVUihf1YgJMQDJkWl8aubD44rM5wQORu6EAmi6L9Qm2HdWo8SFqiPoXuCC6ww
 xMxB362il4WcxS4MqYS76mRSjGzn5lnlQ0MCtGhSCl8j64XgrZopn68e67w/Te+s
 wjiuWJp9zZ7gUfZhomFTnSWhOJNmiQEOJsEYg3Frkr/rQO6cGgirY7RkXk2WiWxn
 t8feA4PCsUmWDC9pPxAfGSgTVOiSNNe1sZNHMHe0ZlWWzhM4m06lxhv66IITczOO
 RqvnMX9ATNYczE9NU1R2cyCXzYSPH0cpoejQs9F96U2p0/g/OiBJPGD8SFnfMify
 RXLSUnMAWIFSLHjW6C4xlrkFlISeXwFb+8bMZaBvA2NxFdfNwjqcNETC6nkPwTlB
 MN441qhkpp0LSnR0SBCgbKOLxl4wXAgtCVGHTx5aOV8AmnRKJ0e3AhP/jUTTMdgZ
 7RBIby4yLlk5ELAol6fCeW/MOI16g9pIaOi9NvYwXoqvAjazaJ4=
 =A4g/
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Here is a third set of fixes for the soc tree, well within the
  expected set of changes.

  Maintainer list changes:
   - Krzysztof Kozlowski and Jisheng Zhang both have new email addresses
   - Broadcom iProc has a new git tree

  Regressions:
   - Robert Foss sends a revert for a Mediatek DPI bridge patch that
     caused an inadvertent break in the DT binding
   - mstar timers need to be included in Kconfig

  Devicetree fixes for:
   - Aspeed ast2600 spi pinmux
   - Tegra eDP panels on Nyan FHD
   - Tegra display IOMMU
   - Qualcomm sm8350 UFS clocks
   - minor DT changes for Marvell Armada, Qualcomm sdx65, Qualcomm
     sm8450, and Broadcom BCM2711"

* tag 'soc-fixes-5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: marvell: armada-37xx: Remap IO space to bus address 0x0
  MAINTAINERS: Update Jisheng's email address
  Revert "arm64: dts: mt8183: jacuzzi: Fix bus properties in anx's DSI endpoint"
  dt-bindings: drm/bridge: anx7625: Revert DPI support
  ARM: dts: aspeed: Fix AST2600 quad spi group
  MAINTAINERS: update Krzysztof Kozlowski's email
  MAINTAINERS: Update git tree for Broadcom iProc SoCs
  ARM: tegra: Move Nyan FHD panels to AUX bus
  arm64: dts: armada-3720-turris-mox: Add missing ethernet0 alias
  ARM: mstar: Select HAVE_ARM_ARCH_TIMER
  soc: mediatek: mt8192-mmsys: Fix dither to dsi0 path's input sel
  arm64: dts: mt8183: jacuzzi: Fix bus properties in anx's DSI endpoint
  ARM: boot: dts: bcm2711: Fix HVS register range
  arm64: dts: qcom: c630: disable crypto due to serror
  arm64: dts: qcom: sm8450: fix apps_smmu interrupts
  arm64: dts: qcom: sm8450: enable GCC_USB3_0_CLKREF_EN for usb
  arm64: dts: qcom: sm8350: Correct UFS symbol clocks
  arm64: tegra: Disable ISO SMMU for Tegra194
  Revert "dt-bindings: arm: qcom: Document SDX65 platform and boards"
2022-03-10 11:43:01 -08:00
Arnd Bergmann c76edea0e5 Amlogic Drivers updates for v5.18:
- Add support for Amlogic S4 in meson-secure-pwrc power domain driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmIlxcAACgkQd9zb2sjI
 SdG04Q/+OTU7F/FWaNzpdpFVnwlGbYA66TCH9TYV79m7L2j/FZ0D6rbZNhFtXW7J
 skclZS9Rkdllq90OpgkHgmPRNvygDw0m0OqOdjYhgCQbSn3f1lgXNYrxnFyVyoFT
 kXEDCw6lUFpJZ/wFlO01zSJRALgIJMLvWpkX/bsMs3n02hQOYkfdfNdRuVqOEx/e
 YblCM3RvfsII0etXh3pj/cAStdc5BcZ0pQStXqhRKQORtZ4zd1VIW7H3ouWdrQfi
 qIHZD85SlK9tPM9+PGgj0bfUXiiT5pBbr6kaVhseGJ5J58FdSvUkjfz+CffJRmgT
 2e61rVyMbaYKMy3NBG3/OSVFuFCv7w65/z0FXW9cGxdtOoxNm65RKzPff3rdA/rT
 XOPSbHBrVqF22kMjgh7aMUbce8ve0Cqf4r8QK8Opqghyq+b8ndMp/qwehI5NENf2
 xxvBPP6vEYgaIHgXKN+ZzKzLoYdaiEQFf3T4gSuIKnMqNfuUbbjBi2WUstJ4X2IC
 vtXLZ15XGvfe0oj+/EFwtqPEyHwpumCAYOlq+9iT34G5pllcAbnhNWMwlj4frBxG
 k8HBfyaJ9alIn6qe9qMAwjD4eBEgzuFgqJc5HDnb8YOcT4UmzxrzPVtdbXUHTgSX
 a2mj0ZMCDMXARKrGpmMpngdp9P6DmK4OHbWEGqo97APZCmExBg0=
 =I56h
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmInfxUACgkQmmx57+YA
 GNlE5g//W8rmP7MMQgJrSeoOaCHCcri2sByL5+lyz6E4PQx2paUfcgG0+hosW57g
 6BcmAo5YrlG/SQBkmXuHS4vvWzWlac4f4tDDldXmdQYOzywlqdUVsHy6KyJaj7r/
 cJGimvMzI7Lfhkub1zeSya3GGTtXGPx6Rj+JssSUSFW/yM7L0irp6K1iAEobHdNj
 5ljHdhZQ8GRfHasj5ToPoigBk4fQbAg0iOhYnA28CP2NMv1dEoGCSh1i0xQvtiP3
 3lGeL/6kHAg2j99lEkQqRaKD9kQHpiDxtMtzf1M8lmnOAMX5N6WlPffYCWA/J9tO
 C7E7Yo6cInos4USpjmhYFY+E6TTgaitVc4xU+wltpILidULaxLBRo4OcVtFdoOPn
 hnCZB65Q5DCqn2cuwkVZ5KPXC6yax9YfkiOH7BHBtAo+sKbtJyuaV0sH4ZPbrSmW
 NZafDpDsEhbO2vtsB9tki3eMeSu5/HAhJI/1aba+Lpdf9MvAOjelEH62N+mtwnWC
 EJMaYXWi4d8sNaEgJ2gj5H97/qzBMnG2COiL7KQuaYocGwJsRrkbXyoaBsnN58/K
 arhrzS7/4KPXtQ6UFx7i2Ri25vvoi9YkrjFz02ivl57zn8QFw5pc/ruKhJxfh24Y
 SsHbOs3gwWBhEPR6yLbeM/MU+kOwYzDu504gK9EQCWvcHGWMxJU=
 =zPvd
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers

Amlogic Drivers updates for v5.18:
- Add support for Amlogic S4 in meson-secure-pwrc power domain driver

* tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: s4: Add support for power domains controller
  dt-bindings: power: add Amlogic s4 power domains bindings

Link: https://lore.kernel.org/r/c7471989-d929-c744-c0c3-c8e86eaaa225@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-08 17:06:45 +01:00
Arnd Bergmann d3d009847a AT91 SoC #2 for 5.18:
- SAMA5D29 variant to the SAMA5D2 family in SoC driver.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYiIhEwAKCRAfOrpwrNPN
 DFAlAP9xZajlf01HHkHuIYUY1yLwpIC+T/BhRWDx4K52frstAQEAhvSz47V9/v/l
 QkQGxuQyMjmihjFKh7+qVL8RgHZaPAc=
 =7HCW
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmInewAACgkQmmx57+YA
 GNkRuhAApqEF39tytJ7UHAhnjs+VxvYLQTP+ZBO6Dw0h/vG/sFWthG6sEJxgL8xv
 /ZOmDeABGB4+jsc9BXuBPV96sA6DkY2FKV0oHyOEvs0XsMU7Z4dmpTy/Zi1ji57O
 eKpqv4N2dEsqpq+JUTLHdTnTW5Gse8QHJ8krpNXx1J9k3acsEOupr2GfKfgqgy8C
 4m2Y+2LFsCrtO8fVXgVnxgIDdmvAoc8jbkPJ1V+pHPkh4c+Ar5B1FpsK8XIOKde/
 hvYQTJoPzSf5JAHZ5qZKQUMdQrTV9cdJLvwbR137e2soCHlkw4L7wNrhjW0rpTa8
 6NVhGbz6xX8Inars5+2XIsbaSWV/g7XVTNvwtM7FM9aV/S9T/AZajc1HjJ+Tk2Ad
 et4AicpiBh9/0l77VsxngukpsZ8JPBNEz5fPLK3awA/eCFWHtiiBApz9Hp4sO2qg
 25GJ0K0WAJSM27AbUCNjwYI/EQKqaZYvLq+k7jIMKXq5uX9lXwlAiG50kP8ZtvZb
 txKlZOYuqEHI5R7l5lTDkq7PL239fdBTb0M8G+uw65PY6HgwFarR7lvFFzAqFvMi
 Rx9eYLQhtP1d5sBOIUTATfHC9Qu+YpC1Sx9MHLyaU98V3TItTiD9YX6HRTFEaiv3
 CTYx/g1XvX37kxtVD3q8Ea4uolqpOR+Kt8tSWRz4faD4gIJxA0s=
 =bF4h
 -----END PGP SIGNATURE-----

Merge tag 'at91-soc-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers

AT91 SoC #2 for 5.18:

- SAMA5D29 variant to the SAMA5D2 family in SoC driver.

* tag 'at91-soc-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: add support in soc driver for new SAMA5D29
  soc: add microchip polarfire soc system controller
  ARM: at91: Kconfig: select PM_OPP
  ARM: at91: PM: add cpu idle support for sama7g5
  ARM: at91: ddr: fix typo to align with datasheet naming
  ARM: at91: ddr: align macro definitions
  ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency

Link: https://lore.kernel.org/r/20220304144216.23340-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-08 16:49:20 +01:00
Arnd Bergmann a2d266a8f1 mmsys: fix compilation by adding SW reset infrastructure
-----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmIh23sXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH40AA/7BnqESpln5mQ2lbvd2X7JSyMu
 JMTI4y3LyS0iFCMm1z/Njib+9YCdrN5WIcW8zNTxMbloIsdnLFPyNwvgyfVSWVRv
 F1dKf5t93SxE/+UpgjjjE+DJDIXgnGlf+iO6sGmmp/XFGo8jnMj4oagqdBMBToU0
 7ZTIfq0lXA9Z63fMccz4MEQUxoqqGqFUT5GJwOZ0p4JZn1Cv5FwZj+xLcY38DCC6
 YSCqirmxXHVf6Q8x80glVLodriT3vjsIUfY6kBxJIKC+mNcXHjczwOKhmjmQMjnY
 fpQhj5X/mdHg83dAXL6dBu2GI2cmbewIPVH5zz6El3gR9tClvrSE6RvH4M6Y1Pxa
 WfgzD3FxJJ3W8HGjFXoyRYVyDxfcBC2gaxTJ7BIDsk2U5FYzydTEeP9QRcMYjkSS
 9RP04QTrchobHObJO+ALqRb1FLnFQXBN2gCjV5Ym2OMtrEkLJUXJL6sBFFx6yTOS
 wrGUHHga6/0xD1aw85c/xE3aZomDPTIXDGBkbBBdPcGqahkcK3g8ZckI4ZnPwwzV
 Ug65pxF/pYbqjwuel5kZOAkTpRMTlp65JW0C3Lngy8YKaXpHlz2/j/HTrTQpErc7
 8HFqCCvkOzEX2Z9kdU/Gv6Hb30bldeXqQuEtLqVm2GLUJilnJuAY0MfhVriwP3Md
 Gju8DzAHPd+A/W/OZOA=
 =G73P
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmImi5QACgkQmmx57+YA
 GNnalRAAlKhmFyaPFnvrRHIYvjopI2p3ZBK7IKNQcJuy6rxg8IAPLzdFQbuaiAGe
 azGYny5/oBoTtuuPuQyJ88i+yi0UJDf/HBk2Qr2BLRar1X8ZsQpVc9cQv462D4NM
 AAabD3dG+dA9D3nWAsFJBRlwSgAkCAS7983E1lkhNskSD4CqthRP9RNcDr7haBmo
 yOev6mJxhxvKrpa2wSRQSlTOM9AIKdi2g2dUHWZrZaxjnnqOUK9TShpZOVH2LYwa
 fD1s8eaqGeO1nBcifghfJ7Fe8t7cTxQLMwwLW/IhOJ0ynMBHapBanCZqBvic1yld
 s8mVuQVy/wAVXByOuXk4Yreo58E9Hf5+w/WQFEUbu2HzQvlYX2RzLbrTJWbh+KIi
 taHv//DWQM626WunFcE3WbrcF4VvlD9+VLInEY9F6m+uZClRWYBGS5sBKNFmJynr
 816Wg4gAl6CMt/tPrYlCKXbk7nFoNebD0mhy5J36KiVDIDI9U2gAt4pJGkD9tr2p
 Kif+sNC9bzPnPrbxxLB7mAvUmjCDhShmxzFEvt6yLx3FYw8tNiCOE1WVC6snFugO
 hnVLbHUFUEMl0WSc9yaVy8uDyDkExU/S6Iom7QXlsKNEePnzEMSyfTwLXxwuAH5V
 ZVMCMT29ebyANN4iCCPZU8pzoccpUB+FrR1OiTodm+Zb9v0YEp4=
 =7Yyq
 -----END PGP SIGNATURE-----

Merge tag 'v5.17-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

mmsys: fix compilation by adding SW reset infrastructure

* tag 'v5.17-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data

Link: https://lore.kernel.org/r/e1b90372-a041-db6e-f35a-d17b26069e40@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-07 23:47:48 +01:00
Krzysztof Kozlowski 5125091d75
MAINTAINERS: update Krzysztof Kozlowski's email
Use Krzysztof Kozlowski's @kernel.org account in maintainer entries.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220307172805.156760-1-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-07 23:46:03 +01:00
Shunzhou Jiang f2b03c1056 soc: s4: Add support for power domains controller
Add support s4 Power controller. In s4, power control
registers are in secure domain, and should be accessed by smc.

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220307025357.1368673-3-shunzhou.jiang@amlogic.com
2022-03-07 09:40:39 +01:00
Mihai Sain def8abbb14 ARM: at91: add support in soc driver for new SAMA5D29
Add detection of new SAMA5D29 by the SoC driver.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220302155329.27668-1-nicolas.ferre@microchip.com
2022-03-04 12:49:22 +01:00
Rex-BC Chen 62dc30150c soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
There are different software reset registers for difference MTK SoCs.
Therefore, we add a new variable "sw0_rst_offset" to control it.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220217082626.15728-2-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-04 10:15:47 +01:00
Jakub Kicinski 80901bff81 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
net/batman-adv/hard-interface.c
  commit 690bb6fb64 ("batman-adv: Request iflink once in batadv-on-batadv check")
  commit 6ee3c393ee ("batman-adv: Demote batadv-on-batadv skip error message")
https://lore.kernel.org/all/20220302163049.101957-1-sw@simonwunderlich.de/

net/smc/af_smc.c
  commit 4d08b7b57e ("net/smc: Fix cleanup when register ULP fails")
  commit 462791bbfa ("net/smc: add sysctl interface for SMC")
https://lore.kernel.org/all/20220302112209.355def40@canb.auug.org.au/

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-03-03 11:55:12 -08:00
Arnd Bergmann 4d558d4d88 Qualcomm driver updates for v5.18
This refactors the Qualcomm mdt file loader, to partially decouple it
 from the SCM peripheral-authentication-service. This is needed as newer
 platforms, such as the Qualcomm SM8450, require the metadata to remain
 accessible to TrustZone during a longer time. This is followed by the
 introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1).
 
 It changes the way hardware version differences are handled in the LLCC
 driver and introduces support for Qualcomm SM8450. While updating the dt
 binding for LLCC it also introduces the missing SM8350 compatible.
 
 The ocmem and aoss drivers gains missing put_device() calls and rpmpd
 gains a missing check for kcalloc() failure.
 
 The SPM driver is updated to avoid instantiating the SPM cpuidle devices
 if the CPUs aren't controlled by SPM, such as when Snapdragon 8916
 operates in 32-bit mode without PSCI.
 
 The RPM power-domain driver gains MSM8226 support.
 
 Lastly the socinfo driver gains knowledge about a few new SoCs and
 PMICs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmIdnvAbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFMIQAL8yVzMuonz7yiuxZaC6
 nvCGWVIbsfjloLWjpE79orSoEx77DlhYaUDHdYqHMEV9ytdryaSaU5A5LGfzVugC
 D6TSvJh1SDV6hJ79xRZIDO72fJn/Xo62JCtTC4u+iBgoehhMrOQHm7HlBhLXJ2lq
 RiHDjzCHMaRTrPf1GCY8a1VK0nIa8KfaAbk+GzZ5Y+0I4oh7ea43DwUSYAIvZAKi
 N5CRXRFeoGpEnY9FzYYfkTPXu28hvj3NtGaEX8SIyzmgLBxCqLpFfxVj3xUsDGbX
 TFqr5YWO31/5oQN4Ex0IrD4NOyOtVyPCtd6iSmlW3t+LxcQsgfW4cCfzT9vQp8dV
 LLkhvKQCAMyIIzZtoHQRN2J0L4tQ8kW1lxW01XMbEjm0lOoALGisE8KouSPlAFn8
 zgX6bPWUmsuictfG8gmqgqKsloV6E5IU37Htcm+sdw89ZVks6UJG40D3DiOcpAXX
 eEKRMW8UHhR/u2AQRlaBcSTQVI/zfXWFk408zHxfD6fphrfnSPRBl+CEZmqrySWi
 eqsL1PJblZg1Uhg5Q8XRokAzB59RYVbs6jSiLKGTUvwTrBMUy+SK1UOG9V3pXsOv
 TSW92RXKZFS8smNcKm/2k1bhopW+2h2BB0z1OYBynl+VUOtCadf7DHciGmAn/Hxd
 eyL2HBVqS4LtdLHSL2TAj3oM
 =okza
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIeZNUACgkQmmx57+YA
 GNmKBBAAwpweTveDkEmeT6nTckDaRYBo0LthJr6TmgndjKq5QChknEOFSMvs6JzP
 Ftheb+J7NcrQ20vN+wv8ic2k6hP8UCRrxyt7IJSJ3iDsqjODxW0K/qoetpFL1BoY
 zCdo0+C7R9iK4QbEA7HjbG5SCVMe8eOLGJLWXkbAO/DInU/WZfSmbbieDSNIjHIp
 nBoX5iBPKHMxj8Cbi12ezK+NHgwXkPdc+H0YNnwbBX6cr470bq5AarJCuWS4W0XP
 xUTC86mR9NUDMu4MkIjbtTZUgKOSXuQoioH4uJKNTDObD+i1GDUNWTm1nvxrQMe1
 DZctGN2ISHKjzcS2okcYwZ4CX8SEB3QK07YydyBknsNINxvwm1fB23VtCikP4k2r
 Zqo6ewT1Y1imrb2MmjWyTesXO1u+JDz5d0A3O9O93Yvfn6Zz/wiGQV6HSmbU6RpQ
 JyJWUOokCydqKXMLlb79Ln2Sx8q84aoZGekEQGfTqvIObntuYx0VWdMJuisP0z4+
 CqZTnIc60IaG8WkB/xx/vzzKa8XmKTfalSxZV5ThTruVmiHAqd1rW8N/mR4ZE2bM
 YQ0AxQcaZHyUawPuaqOY/u9lADE0ROW/3loC5CWU8LLTSR3OM610YgQOKNC8yi2n
 FlEYdhupJEGcx4fLY+SPWGgYFhIZgqxlL7WNtzg7uEFiBpayLxA=
 =vkG6
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.18

This refactors the Qualcomm mdt file loader, to partially decouple it
from the SCM peripheral-authentication-service. This is needed as newer
platforms, such as the Qualcomm SM8450, require the metadata to remain
accessible to TrustZone during a longer time. This is followed by the
introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1).

It changes the way hardware version differences are handled in the LLCC
driver and introduces support for Qualcomm SM8450. While updating the dt
binding for LLCC it also introduces the missing SM8350 compatible.

The ocmem and aoss drivers gains missing put_device() calls and rpmpd
gains a missing check for kcalloc() failure.

The SPM driver is updated to avoid instantiating the SPM cpuidle devices
if the CPUs aren't controlled by SPM, such as when Snapdragon 8916
operates in 32-bit mode without PSCI.

The RPM power-domain driver gains MSM8226 support.

Lastly the socinfo driver gains knowledge about a few new SoCs and
PMICs.

* tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (37 commits)
  soc: qcom: rpmpd: Add MSM8226 support
  dt-bindings: power: rpmpd: Add MSM8226 to rpmpd binding
  soc: qcom: mdt_loader: Fix split-firmware condition
  dt-bindings: arm: msm: Add LLCC compatible for SM8450
  dt-bindings: arm: msm: Add LLCC compatible for SM8350
  soc: qcom: llcc: Add configuration data for SM8450 SoC
  soc: qcom: llcc: Update register offsets for newer LLCC HW
  soc: qcom: llcc: Add missing llcc configuration data
  soc: qcom: llcc: Add write-cache cacheable support
  soc: qcom: llcc: Update the logic for version info extraction
  soc: qcom: llcc: Add support for 16 ways of allocation
  soc: qcom: socinfo: Add some more PMICs and SoCs
  firmware: qcom: scm: Add support for MC boot address API
  firmware: qcom: scm: Drop cpumask parameter from set_boot_addr()
  firmware: qcom: scm: Simplify set_cold/warm_boot_addr()
  cpuidle: qcom-spm: Check if any CPU is managed by SPM
  remoteproc: qcom: pas: Add SM8450 remoteproc support
  dt-bindings: remoteproc: qcom: pas: Add SM8450 PAS compatibles
  remoteproc: qcom: pas: Carry PAS metadata context
  soc: qcom: mdt_loader: Extract PAS operations
  ...

Link: https://lore.kernel.org/r/20220301042055.1804859-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-01 19:24:21 +01:00
Arnd Bergmann 16e769e2ae - add power domains support for mt8195
- disable ACP on mt8192
 
 mt8186:
 - add support for power domains
 - add mmsys and mutex support needed for DRM
 - add reset control based on mmsys subsystem
 - add pmic wrapper
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmId5EgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH4gEg/+LL7XjcWZlD8GwTfJEeZjgk3c
 06rne1kKh0mm9+VEIHOp0RsMf4IdbHwCbAt3xMMcdOqAxh4oaKchCE0fPS2d+mdA
 2qZaysEBxG6RTs/wY9fS1/diGge3OroW3CuS0cv6mKh7acY9tLW5/VRvvgcOzSrT
 eJYGQqpXg4VfUJ41e7otIhj32Npltby9lBlo8Z5kF3Vy7yYAUEZvNrGrp0pmwkvM
 UJRlCZFoSGAfoijJfpH38vixi+qWYOiAhulweT01VhtIVYHjh+BmoQc4jZ8A7fhW
 ttzlrbYPELRD0eu6/zfdokXWVwZjkqB5HoumN7IaYW+ZUEY6iYhy9J+Ir9qpG82D
 Z4cbk4JMc6uEAjTdu6njdzlBukw80oXOo6nCyPa+xvniNWPoYTHN5JZaNWig4taC
 5i9diVBuwkOdYARKSFqxk1FuvvSDh+8QP9hNiomXZrPUjZgilXDQ2CncKFr70CNM
 iCQqCiHNpzaVEMxBkve2aU9kKc5qVixrLAqh/VOwpUln66aE1Ug51zzdAAkalyQv
 di6iZMRFy+pL3oNPFWAKv0Z0yowBj/QDFBZiOc/SqXrrNpHNDfMVPcSdZVtjSBXD
 DqPxPFRHaqV/+eFHc9xyvgKMMbg2xYsZXVrleyQWiXck0x2mshw3hIcghGpkPGDB
 w+b5BPpeewE49tamKJs=
 =KUFa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmId8OYACgkQmmx57+YA
 GNlaoA//cdGz81n8HG8zy1DpprypmbUCJv6SruIF1XE2ewOgZ486IiA0H1yYdSD5
 kDmok9SDjFM+WmqxoGUQl5hcNH67ThD/5rxgKgrIpi4kpfhgjbhYLJ9PGjZSAc4v
 9zW+l48WDYxHmq7xhsCgsC6BoimM3MHwJTA3crMzXqtG3PecrLtnMS6EAaX/Uoub
 Vw7HW8v7PAeO9xx4tBV+c65jYDmmcBm21iv9EptEUOgK06OhjyH6KoQjFwGpg/tb
 uEDehYDK5pULc9U2322sfRJ0b0LpD/+yJMREITe9XYuHX+4akqVEscEVvnwh/j+1
 PXwwtGOnVMk/5TLaLUQy181x4soXG+8uBVbitHpZVCfmRvel6fAbnfgAxyf7sYy/
 Kdbp1apVnQ7nDeW/rhR7glNrJSUN+R2uBbfmXPyU+MOoPG+1Ckz6YR4VrjKx0M/N
 K7qkqwJxp7TkuFJXzqWi58apyHqBdM9LzsyroRjk8FqeDC60T6RQDhJXuXDpDp58
 na4WDaS5expzgWpGiJwrm2MfT0rbI9X7pyGRcCPY6kVwtnLX84npVal6ZbS8jCwp
 KRO13i/ZzZj9ZNlOhANgYodedW4dO/tyW39xMIzYrQ+5QjQ8IvD+DFnv50F1DzON
 5IbTBTDS1B07dIikIb9FFLrGZL/bqEtafg9kGsYfypmXfVPf3FY=
 =G//M
 -----END PGP SIGNATURE-----

Merge tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- add power domains support for mt8195
- disable ACP on mt8192

mt8186:
- add support for power domains
- add mmsys and mutex support needed for DRM
- add reset control based on mmsys subsystem
- add pmic wrapper

* tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  dt-bindings: arm: mediatek: mmsys: add support for MT8186
  dt-bindings: mediatek: add compatible for MT8186 pwrap
  soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
  soc: mediatek: mmsys: add mmsys reset control for MT8186
  soc: mediatek: mtk-infracfg: Disable ACP on MT8192
  soc: mediatek: add MTK mutex support for MT8186
  soc: mediatek: mmsys: add mt8186 mmsys routing table
  soc: mediatek: pm-domains: Add support for mt8186
  dt-bindings: power: Add MT8186 power domains
  soc: mediatek: pm-domains: Add support for mt8195
  soc: mediatek: pm-domains: Move power status offset to power domain data
  soc: mediatek: pm-domains: Remove unused macro
  soc: mediatek: pm-domains: Add wakeup capacity support in power domain
  dt-bindings: power: Add MT8195 power domains

Link: https://lore.kernel.org/r/16a53482-5a8c-e95e-8cd4-b8304f110987@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-01 11:09:42 +01:00
Johnson Wang 83a7175cbe soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
MT8186 are highly integrated SoC and use PMIC_MT6366 for
power management. This patch adds pwrap master driver to
access PMIC_MT6366.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Johnson Wang <johnson.wang@mediatek.com>
Link: https://lore.kernel.org/r/20220207083034.15327-2-johnson.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01 08:51:23 +01:00
AngeloGioacchino Del Regno c432cd598a soc: mediatek: mt8192-mmsys: Fix dither to dsi0 path's input sel
In commit d687e056a1 ("soc: mediatek: mmsys: Add mt8192 mmsys routing table"),
the mmsys routing table for mt8192 was introduced but the input selector
for DITHER->DSI0 has no value assigned to it.

This means that we are clearing bit 0 instead of setting it, blocking
communication between these two blocks; due to that, any display that
is connected to DSI0 will not work, as no data will go through.
The effect of that issue is that, during bootup, the DRM will block for
some time, while atomically waiting for a vblank that never happens;
later, the situation doesn't get better, leaving the display in a
non-functional state.

To fix this issue, fix the route entry in the table by assigning the
dither input selector to MT8192_DISP_DSI0_SEL_IN.

Fixes: d687e056a1 ("soc: mediatek: mmsys: Add mt8192 mmsys routing table")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220128142056.359900-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01 08:36:59 +01:00
Rex-BC Chen 831785f0e5 soc: mediatek: mmsys: add mmsys reset control for MT8186
Add mmsys reset control register 0x160 for MT8186.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220217082626.15728-3-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01 08:34:47 +01:00
Alyssa Rosenzweig dcfd519256 soc: mediatek: mtk-infracfg: Disable ACP on MT8192
MT8192 contains an experimental Accelerator Coherency Port
implementation, which does not work correctly but was unintentionally
enabled by default. For correct operation of the GPU, we must set a
chicken bit disabling ACP on MT8192.

Adapted from the following downstream change to the out-of-tree, legacy
Mali GPU driver:

https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5

Note this change is required for both Panfrost and the legacy kernel
driver.

Co-developed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: Nick Fan <Nick.Fan@mediatek.com>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Chen-Yu Tsai <wenst@chromium.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220215184651.12168-1-alyssa.rosenzweig@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-03-01 08:21:28 +01:00
Linus Torvalds 719fce7539 ARM: SoC fixes for v5.17, part 2
The code changes address mostly minor problems:
 
  - Several NXP/FSL SoC driver fixes, addressing issues with error
    handling and compilation
 
  - Fix a clock disabling imbalance in gpcv2 driver.
 
  - Arm Juno DMA coherency issue
 
  - Trivial firmware driver fixes for op-tee and scmi firmware
 
 The remaining changes address issues in the devicetree files:
 
  - a timer regression for the OMAP devkit8000, which has to use
    the alternative timer.
 
  - A hang in the i.MX8MM power domain configuration
 
  - Multiple fixes for the Rockchip RK3399 addressing issues
    with sound and eMMC
 
  - Cosmetic fixes for i.MX8ULP, RK3xxx, and Tegra124
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIc+ooACgkQmmx57+YA
 GNnNhQ/+O3PntP8vYNO50tteeFVuClgyb4hA2P2xx6Kis4dLSTDaUcTd3745roLh
 mT6k90fZH3nBKQHzDSlc5Pf0mpskuJFOwt96wDC6a40VAW7+VwTFDdFDOG3z/KyX
 +8yXWv613EjzE5IYx0LEt0W2/2CaHfzysu99o1J6Wrp0DkHyh7lmgvrRzdckYCqZ
 Bj4ehCyaMTFyoSyFJDrs/+HDeN7eeeEwS/UXzzvQnNfne+kKVsJKcpfg6pPsLjOV
 oMadkV42uLB79XZs1R5/4bs2NL7ceFphtDovKaeZ9z3HKF0ZFudYfq93ymflS/df
 l/uXBX6eRrT8C6IuJSlCN8vZWD9vLOzcBTrNx7mbk9gcXjaN91tXu7TJqurWu8xk
 t5F7H1gfPcVD7jTGdD9cArqJTJAFTeyMB0eUFdGhX7KhDo+oeJQ49HTzjx8TEX6y
 oEL6LnGBFYvnV6TYZtkp/aPvaqFaJ4j5WT+VzsVina8yOAKb0bWizoC3I2IvyNXS
 aX3rSuJ3vYfm6wmcdx3yCS0wAD7mqOip7OeuG43L8pcnc4Fgz/cFtzsB6shl9oNj
 e41/xfvnyn+mGn2QnZ41XjcnZieRcwZ62OaMfMhd3Oa7Xj7XD0lE5fFd7LnfJ0pn
 5xsMpHo+AuPHO1YyMFmMopqYNuromtQLmNCdg6LDnsXAnL7g45c=
 =NNpd
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The code changes address mostly minor problems:

   - Several NXP/FSL SoC driver fixes, addressing issues with error
     handling and compilation

   - Fix a clock disabling imbalance in gpcv2 driver.

   - Arm Juno DMA coherency issue

   - Trivial firmware driver fixes for op-tee and scmi firmware

  The remaining changes address issues in the devicetree files:

   - A timer regression for the OMAP devkit8000, which has to use the
     alternative timer.

   - A hang in the i.MX8MM power domain configuration

   - Multiple fixes for the Rockchip RK3399 addressing issues with sound
     and eMMC

   - Cosmetic fixes for i.MX8ULP, RK3xxx, and Tegra124"

* tag 'soc-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
  ARM: tegra: Move panels to AUX bus
  soc: imx: gpcv2: Fix clock disabling imbalance in error path
  soc: fsl: qe: Check of ioremap return value
  soc: fsl: qe: fix typo in a comment
  soc: fsl: guts: Add a missing memory allocation failure check
  soc: fsl: guts: Revert commit 3c0d64e867
  soc: fsl: Correct MAINTAINERS database (SOC)
  soc: fsl: Correct MAINTAINERS database (QUICC ENGINE LIBRARY)
  soc: fsl: Replace kernel.h with the necessary inclusions
  dt-bindings: fsl,layerscape-dcfg: add missing compatible for lx2160a
  dt-bindings: qoriq-clock: add missing compatible for lx2160a
  ARM: dts: Use 32KiHz oscillator on devkit8000
  ARM: dts: switch timer config to common devkit8000 devicetree
  tee: optee: fix error return code in probe function
  arm64: dts: imx8ulp: Set #thermal-sensor-cells to 1 as required
  arm64: dts: imx8mm: Fix VPU Hanging
  ARM: dts: rockchip: fix a typo on rk3288 crypto-controller
  ARM: dts: rockchip: reorder rk322x hmdi clocks
  firmware: arm_scmi: Remove space in MODULE_ALIAS name
  arm64: dts: agilex: use the compatible "intel,socfpga-agilex-hsotg"
  ...
2022-02-28 12:51:14 -08:00
Conor Dooley e6e6479c27 soc: microchip: make mpfs_sys_controller_put static
dsafsdfd0054 ("soc: add microchip polarfire soc system controller")
incorrectly exported mpfs_sys_controller_put. Remove the export and make
the function static instead. This fixes the "no previous prototype
for 'mpfs_sys_controller_put'" warning spotted by the kernel test robot.

Fixes: d0054a470c ("soc: add microchip polarfire soc system controller")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <mail@conchuod.ie>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 16:57:04 +01:00
Arnd Bergmann 254a1864e4 TI Driver updates for v5.18
* Fixups for k3-ringacc, smartreflex, tisci, wkup_m3_ipc
 * Device detection for am62x.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmIctj8ACgkQ3bWEnRc2
 JJ2yUhAAgm/9jJZphktxVc5gsra/GvwAcYQEPLD2dcoBBGvhAlbIr8XtZkuKYScZ
 JhOxQeH/J9H036VFw6riA62xIp5fi/QoT6DXFtyPFLhaxLfU7Z70kK5KCIAPSqR1
 ep5ZF6FaCtgMsdTd3hA/pUo6NoCbyfXgLTD7yv1Zmn0NliWE7Dnllsaal8dYQEjQ
 HdKSnk91JH0AYVF7zCYdh/92QDp+POMp0uJKj+oCoGHZhq3/kCyPjgNzXo/5bJ30
 3gcNmV+enTYtxLULRS8vZ7gkjBZlRfCozOCEH4ep9ujrFC0pVifEJ2cVfocz489m
 OpCPOja4+z10iLxWdFdt4mPOVt/SHr/U0nqMB9TlRJpBxDzjaeORtLk/oA8fTXFh
 dTfkF3Eau1v7Kau1sfqX9u7nipfBAaFDzFTMozyO/IfGVoa9qgOVvgCosm/Hy3cj
 RR1ofb7yKGaz9HSZXcPkBati3iWRYlucZlZeCdWikAPNHnuv+SjYFBEzwSHkCHVW
 sxhEH3leqsc0lnP5I80NeYpAqybj/KF86auFC5R6mwTO2wJw0YqpWXLYFdp/6bGy
 X+xJr3aQb4d+Rse7P6ZAwtsE/1cO0KgNPMDpeWyPt5aYjcVv6Wn0BB55WbaXRVpv
 Jo+Oqlnypdkhx6qR33dSvE72tl+YqOib/jeQtgKf9JAS/hjNt4Y=
 =8Gnw
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIcwlsACgkQmmx57+YA
 GNnzrQ/+LCLw4ab6ipwNsShyWibHh+HEA70owCigGzrkB2+RljaSt8p4koB5wMC0
 eTgfpkZLLhHlDdA6zZZNJgDHEveoLg1yWk7u3tx3K+hNDiZX4VVH+3OhuefeVaFe
 /Ii94rrVtjNscEve2X4KbJXfeeHaNz2nJTFvKloHgW0wkjL/djcqbOm/tKwEiPiw
 gB6mF1MaBLiH1ijgg2JUGpNtK4pILtEb8X9dmxL7iP6X4rSKWkNVYQcxfu+8c0iI
 Tt4RY+u/9PzTQtyl7y0uN8LJ388nfZWedb+yxwUiQ8AkuKCbYcTYFm5HazAurBTd
 LSSK5qO9NV2O4FoYJ9fZRKuLU0eVCXePRxo8XMfzUdu0U+cet1p7icsR/91SV7Gj
 h2ELZLXh5ZamU9jE/GEb9rxbnUfQISy9UPstiD9dQUQBjDQnd5TsA4Fo3HRJZYls
 ELB2nqgY4rS414MNYOaFY1hARc/NHT86tyW4mvIsRit31Qle2Tm9T06IMilkSf7U
 D4gnmHEETZRMEtaP0cML/BAFS7I/xbCZGU+c4JjcOs/D/EKTd0rwUwmaiGc/2XiF
 Ng6Ow/KhCckiEX3fut7Bl7emZvtAfB8RwMlExOXY/pof5F479ahoRDd4I5JmZQlq
 YNb77p9Gf2gvnzVFcUsjU/NiycuZnEuG/ZALZCpx4atVKNWaf7c=
 =rCpA
 -----END PGP SIGNATURE-----

Merge tag 'ti-driver-soc-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers

TI Driver updates for v5.18

* Fixups for k3-ringacc, smartreflex, tisci, wkup_m3_ipc
* Device detection for am62x.

* tag 'ti-driver-soc-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  soc: ti: k3-socinfo: Add AM62x JTAG ID
  soc: ti: wkup_m3_ipc: Fix IRQ check in wkup_m3_ipc_probe
  firmware: ti_sci: inproper error handling of ti_sci_probe
  firmware: ti_sci: Fix compilation failure when CONFIG_TI_SCI_PROTOCOL is not defined
  soc: ti: smartreflex: Use platform_get_irq_optional() to get the interrupt
  soc: ti: k3-ringacc: Use devm_bitmap_zalloc() when applicable

Link: https://lore.kernel.org/r/20220228120655.wobd72acngl2bz6k@ecard
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 13:38:51 +01:00
Arnd Bergmann 345932db14 soc/tegra: Changes for v5.18-rc1
This contains the final bit to enable advanced power management on
 Tegra20 and Tegra30. It also contains some cleanups and wake event
 support on Tegra234.
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmIZBUETHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zodJ7D/iKg/aP3rroIzzISWfB1t2GcT98RaI9
 8CnJ7ywKqf5lDCNuRGm8La4IyXewfTfzXK/r6RninlljonGVbaalVQk4uJgiXkkP
 m50/SpYqUGnT2bPfO5JByJCTUdDmzzIcAWpAw53Cs0OLgr9aMyIpmpyn5vwfRDY6
 9UQQokaDFKuCwr71QZv3EEl8V840cazopp89Q5C1ivHW2uwSG6sjojTIsB9Rxr5x
 C+WqP48mSrDZ9pB+qx8uszb7d3SolYH7lOfWyMzPhnCXy7hyoVcAYcywt5JIoBQ1
 t+FtRoJ5e3bShJyhHDU3vdRV6R2hD0V1BHOLpiZmDzQYZtTIHYdKnnRe7VTtFSQK
 rFHz1+LQeI1b3pZTmY1HtUO8XIUo01NdMOh84RQx5U5Fp7zgBrsp7e0TV1BLhx6r
 fACZCeFnFvt8bFVJYBxun5hV5pfByqqh7G432D+DXpyCvwPe6p6a8frewWDr/4M3
 e89T9pU3MNahLC7R97Tfs1JvkQijXuW/yPU505Y6sCFzwzvXyF3axE4ERYJN8yT8
 2iev8As/CGwTGtU1glYCd0U/gvsZwJdlxxepCSitaxNxl2EUwlhZo68UM4SG45vb
 bWFXfWe+hXHIDz7RS1E5D/00nhqoN9ZBldteDit6UenoK4Ys3s6ExZwYSd6zxWsX
 NEWkUTW6kBqu
 =Jmv9
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIcwfMACgkQmmx57+YA
 GNn2RA//XLSM4sQtSsuBnp6gtYohGbm8O2BJdG7gu3BsjtM/ZM9Sy8zjPJh8ZGoF
 qYktfhm6KwoEHd2Cm0nNNcWNA3IOATHRUveeFIuWWgeUyMwPz0eXsd4w0KZzzqZE
 N6Cvp8Jml3BjEC8yat5IxgHJTJXt87zJHvYiEQPQzoqVL7/vGA/SDGaun7dU9yzG
 Yb+3SDeMcIYniU5w1fiQPS4zl07UzXceAPSEPDZXtXKYSBgvbjtFEtLZ7GPDYfeI
 cAH4BqaZBVUh3vZZk7ZqeyAPF4lVgmbeNZbWP3zTG/jrTryCAmi0u1xiKKC07uh3
 QeFrxr7URHj25Co5zgpsAyNf48uHGKq6x8P9SGleIeENCs94ORrmkdWc69dkzzmO
 R2gOR/Er+3JFzvaf23vSx2qhtIN476CusBTwHkWuh7gmmc5EC+5D7GcLqYCCKlJg
 0wY0AUXc60T80S8e50u80UN4UrBPI6I89ibPz4mRcrwhVeFKf4iAli7tYSVyCaQx
 ykrjRw7EGsUMCsmu35IavRDWKbzFOJvjiaK6dw365wO8XdDu+lO27+mj7Eo4mamc
 y2kGr0ZJCirSGQaRHaqu6G7jIhHhSOlQrzJUzOp+sxd73bY8v72FuS34gvjivlxi
 ntOJFmAYmX+jzyW4K+Q8KeXMIf0BPkHGZLGFYNxfFxwYJFBhCKo=
 =26qK
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.18-rc1

This contains the final bit to enable advanced power management on
Tegra20 and Tegra30. It also contains some cleanups and wake event
support on Tegra234.

* tag 'tegra-for-5.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: bpmp: cleanup double word in comment
  soc/tegra: pmc: Add Tegra234 wake events
  soc/tegra: fuse: Explicitly cast to/from __iomem
  soc/tegra: fuse: Update nvmem cell list
  soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30

Link: https://lore.kernel.org/r/20220225164741.1064416-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-28 13:37:07 +01:00
Vignesh Raghavendra c65d68e7e9 soc: ti: k3-socinfo: Add AM62x JTAG ID
Add JTAG ID entry to help identify AM62x SoC in kernel.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220225120239.1303821-2-vigneshr@ti.com
2022-02-28 05:35:19 -06:00
Yongqiang Niu 15f1768365 soc: mediatek: add MTK mutex support for MT8186
Add MTK mutex support for MT8186 SoC.
We need MTK mutex to control timing of display modules and there
are two display pipelines for MT8186 including internal and external
display.

MTK mutex for internal display:
- Timing source: DSI
- Control modules: OVL0/RDMA0/COLOR0/CCORR/AAL0/GAMMA/POSTMASK0/DITHER

MTK mutex for external display:
- Timing source : DPI
- Control modules: OVL_2L0/RDMA1

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:19:24 +01:00
Yongqiang Niu 5f9b5b757e soc: mediatek: mmsys: add mt8186 mmsys routing table
Add new routing table for MT8186.
In MT8186, there are two routing pipelines for internal and external
display.

Internal display: OVL0->RDMA0->COLOR0->CCORR0->AAL0->GAMMA->POSTMASK0->
		  DITHER->DSI0
External display: OVL_2L0->RDMA1->DPI0

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:18:39 +01:00
Chun-Jie Chen 88590cbc17 soc: mediatek: pm-domains: Add support for mt8186
Add power domain control data in mt8186.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220215104917.5726-3-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:11 +01:00
Chun-Jie Chen 342479c86d soc: mediatek: pm-domains: Add support for mt8195
Add domain control data including bus protection data size
change due to more protection steps in mt8195.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220130012104.5292-6-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:04 +01:00
Chun-Jie Chen db2ca8608a soc: mediatek: pm-domains: Move power status offset to power domain data
MT8195 has more than 32 power domains so it needs
two set of pwr_sta and pwr_sta2nd registers,
so move the register offset from soc data into power domain data.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220130012104.5292-5-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:04 +01:00
Chun-Jie Chen dcbf6831a5 soc: mediatek: pm-domains: Remove unused macro
Due to clk resource data will be allocated dynamically by
searching parent count of clk in power domain node, so remove
the unused marco MAX_SUBSYS_CLKS for static allocation.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220130012104.5292-4-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:03 +01:00
Chun-Jie Chen ac0ca39554 soc: mediatek: pm-domains: Add wakeup capacity support in power domain
Due to some power domain needs to keep on for wakeup in system suspend,
so add GENPD_FLAG_ACTIVE_WAKEUP support in Mediatek power domain driver.

Fixes: 59b644b01c ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220130012104.5292-3-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-02-28 12:02:03 +01:00
Arnd Bergmann c8812c2a08 i.MX drivers update for 5.18:
- Drop LS1021A device check from soc-imx driver as it's unneeded since
   commit commit 4ebd29f916 ("soc: imx: Register SoC device only on
   i.MX boards").
 - Add support for power domains provided by the VPU blk-ctrl on the
   i.MX8MQ.
 - Add resource owner management API which will be used to check whether
   M4 is under control of Linux.
 - Add VPU MU resources support into SCU power domain driver.
 - Support DT overlay for WEIM bus driver with OF reconfiguration
   notifier handler.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmIUirsUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM54UQf/UzYym4Y/Clur4F7xh4XodaP6Y2fF
 M7DJUcE7rkI4jHCASnyh7NwSdqLCBiXOa6GVMpagELG8qoMYV/Gcwdt2Q60tn8TM
 ASADkSKobjDF7hywQpGQL9808QTKglRwgVBnTgeKaUrjE1Lw0gebgM9qoisrUzjk
 wwQxnUdyNxkeCOw5743z28H+lJmC8j3EecD+mjN6DiqCJYIMacQQ3+7S0pyHq2ii
 TdaV0oi4ApannwlxcguqYDDgwX7VXxnguPmGVIHc8Pq+zqmbCTfcaUbRTwlYX4PK
 5CCb+2sN8v0MYxKH5elYuUoMQeTZ2w7IeK99JDoCNueNbIbK6G7wndHfdQ==
 =m1lO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY/kEACgkQmmx57+YA
 GNnOZQ//U4XOr+yZA5csefH0z3LDKuQBFVuM6w2pXw8sdcC84X4BFlRjJNeam8jT
 LqS5t69nWJaN/1qny8MeX5lBk7rqomRs3iVizKR6AP6EsKw39F8i89U0eD7ePXiQ
 dKkio4lL8w4WuOnNwoaY7eElh+jP+gYftnv8GVAmjxSJkjBTAM2HtQjFdg+G+5kn
 UOCkdq6/goyvA54oq+MWfn+sSXHOyPYN4kyndb87sWnTNoLeGzklFIm4uTeG3A+e
 716vS9sm1CZZrSB2FLxMffY/VDgQBLFZPU/fqgbetVQA2+cyQH+YHPSFdHs+eTje
 KqtjuKIRs1zuMy2jnSDS7KIj9c9JtNJtJJG2a0bskom4z3lG/yXfnmbQEJgj82jI
 T54YwM4h5MQlzznduQcyk3F3vhQssqauBjC/KIIw4TpP4qlDOpFls+v+8KNtDaDK
 Znk5j3gzX4H2DvWxE3OoQePCCx7LKvM5pgRYZffrHvaVIFUlAykDhjNuGI05+Wdh
 uAXeTqFmWxQ9iPy5M3zQh1i3cYIKhEE+4plO7lRFDbFny4ylQDcKR+fKtVmDzmN+
 JcYHpdcy9PTzGIf/9qiDQHSEGcvalPBwlGy7kUTewT0t+yvUTqG1EJz8ndgQL7f6
 4wCHShGVTD55gp2OLszeFsvHae5UoPvDornryNS9pB1KCAbzbSg=
 =N5wZ
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.18:

- Drop LS1021A device check from soc-imx driver as it's unneeded since
  commit commit 4ebd29f916 ("soc: imx: Register SoC device only on
  i.MX boards").
- Add support for power domains provided by the VPU blk-ctrl on the
  i.MX8MQ.
- Add resource owner management API which will be used to check whether
  M4 is under control of Linux.
- Add VPU MU resources support into SCU power domain driver.
- Support DT overlay for WEIM bus driver with OF reconfiguration
  notifier handler.

* tag 'imx-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  bus: imx-weim: add DT overlay support for WEIM bus
  firmware: imx: scu-pd: imx8q: add vpu mu resources
  firmware: imx: add get resource owner api
  soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl
  dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains
  soc: imx: Remove Layerscape check

Link: https://lore.kernel.org/r/20220222075226.160187-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 17:05:21 +01:00
Arnd Bergmann c253bf70c6 NXP/FSL SoC driver fixes for v5.17
- Add missing SoC compatible in existing binding
 - Replace kernel.h with the necessary inclusions
 - MAINTAINERS file fixes
 - Fix memory allocation failure check in guts driver
 - Various cleanups and minor fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAmIQNLkACgkQhtxQDvus
 FVQEhQ//d2cWdVvGUL5hqz+bEdu5b9XmiyLYlN5u9ur0j6D1q8GGuNThC68N0y9E
 mmZfKS2WJHWOodowXEtcMaa27Zra5NEHZZoXS6i11xKnX6vnwB+bjBVGZSk3yJr1
 YoRWRi8p6jnZ1RY2ImBk6WnPS/6yIJ8NrtpNFaASnllXA7Le9xAiucXv3aNRaYgm
 qlvxv3+FEXQkKxC6jo/XnUjO59jpsV2GzS+KkUDDMvSQuWr5W+yxT+82KquK40eP
 mwfvzH4qiJNxRTjFEZufSeBPJF8IU3ojwcV5QOI1syO4OpC6ZLCaC9M96TNwIRLs
 zcAfQ+iY8+pcSLoTeGkvdi/LE32jf+/V0oPFrAHd0YaOSKA+Bc2zuznW500MQrwj
 cCF0VySacP74mRDv1ddgQEAJTSVK+/uwvOjX46AVidNAchl3GCYMQhEFlwwHEGee
 R6QUpipHvGOKMsIkwSrHP4tHcvGsPR4+UivLtkBQjOMqTbNEoUDtdOTYY5AYhsqU
 r6dGQ5cLDuYYbxKzi7E4Gw0IPESaYgohy316sNPHoBqNYE32OtTO06oG30hVLWvE
 5k0Cj5XqTWBgwnGeMvCb3FJmOmM1PVPS2Tu1bKYcUNuR9DthMmcrPwpqe3Jz/jEN
 Uv6afsdvCE0oOO85nCg2KpgQy9sziGbXDqF6OJy6eeXbou7aSPw=
 =RAoa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY+J4ACgkQmmx57+YA
 GNnrVw/+M8MYpJV65PjBrCgY5548Zd60zvhwm02eC0QwGFuteg3wgO+EyC/nPBXF
 dSHKSBcPM6Dt4bqnJQVRlHmkfF10lT+JD+2gGikh6Fc6EXDj0TegQnnnorXRJT4J
 7uy52KEdc1GsDU6hwDIbGr7Q7Ih/syTOKT3kj5j3OoSYjEjaRgwbYqOfAwT7j0St
 NrhJPUKwtnn72a/6q9L9jKrakT6dSUw42HKPiyaoQAG/7EzsFRUl8pkqybgGKTPV
 UKyOB2UH1B3c8/9sLA19xkCAl4A3DXh4odcr7LRpfmhBH2/NBO72WhqeAGS5uBnJ
 FHBEIamztUndfhU317OITf25MMNHCBWz3lGxY8FH8NlUxd2LyQ6nR1h7iGZLhAXE
 rHxamYVGaBoep7E3Vy/D7qJACyG1tv7L3o/btCi2r4444Fhdk+gvKTbDdPcy/dHn
 jLqYDgVinoejW1KqRBt8ixPM6Yqp/v8AS2ACmt+SmoWoKaNzMyL2NYoQNPzlJ8SZ
 ZT3zLw4H1SIAvu5qOFz0qRYU2vuDNdBL+moAV9a/MU67fvcmyXZHsEGjMwYmW/H6
 S4nWlqSmYLldAmu1wff/+oqZw/1VTdy7ryzN56ei7TtEmvQ+ov15FZuc23ZIBmK1
 EECagK8LdhZiluYzU0oYjXkkrcjn9YCPbPgflKQK1EoJvBI6BfY=
 =gn5p
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes

NXP/FSL SoC driver fixes for v5.17

- Add missing SoC compatible in existing binding
- Replace kernel.h with the necessary inclusions
- MAINTAINERS file fixes
- Fix memory allocation failure check in guts driver
- Various cleanups and minor fixes

* tag 'soc-fsl-fix-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: qe: Check of ioremap return value
  soc: fsl: qe: fix typo in a comment
  soc: fsl: guts: Add a missing memory allocation failure check
  soc: fsl: guts: Revert commit 3c0d64e867
  soc: fsl: Correct MAINTAINERS database (SOC)
  soc: fsl: Correct MAINTAINERS database (QUICC ENGINE LIBRARY)
  soc: fsl: Replace kernel.h with the necessary inclusions
  dt-bindings: fsl,layerscape-dcfg: add missing compatible for lx2160a
  dt-bindings: qoriq-clock: add missing compatible for lx2160a

Link: https://lore.kernel.org/r/20220219012208.21835-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 16:41:17 +01:00
Arnd Bergmann 022e5220f2 AT91 & POLARFIRE SoC #1 for 5.18:
- sama7g5: CPU idle support with CPUFreq operating points defined in DT
 - polarfire: addition of the soc system controller
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYhjItwAKCRAfOrpwrNPN
 DDLmAP9CKK9j0y3YEs69vXYO4URTc5FrpRdZ976mHZdvl5ZJpQD/SK8k/AZhVwsV
 OUMN8zosXY0TiCRjsaLPq6MK9Nv09QA=
 =alh4
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY9zUACgkQmmx57+YA
 GNltxA/+KgPQWmNQ3sPfkGq+rbCMof3misxS41OL64VUyT7VFau9nZeyJ7m8Vc4X
 CudkmTO39IgYLOcy6l51Pq8zeZ8jcMEQPntFo6fQUimo5slZQBNVuHnnCiWjpUdh
 eOQe5KwQb9fHPW/vMN0zKafckkVQXELo88ol54SorHqDwK/LU/s8iYYsUXByMJoa
 mxrZvg8/pXmQ+yyo1lpID0VfN+nWmOq4LVwSniF7z88M+J/H6R/A+KLqOoEyKvUN
 1wawBdKHqmH/BftMnGP6oqFVFeOgH4BhMLPMSLp09rO5isx6vgPhWXvGh0PfL/+9
 hUaOE+Hr7j33Yuxow97opx/Q0z+pqT0nyENq7/3cZpzB8V+WVJNFQeZ4Pm2A5jis
 NLRhm+V9gnRd8usZeepa8uvywo1aZHE2T14VcFffSPqgkOONyDj0V7DEP3gfZicA
 ezYIbUFHqU2hVsEmnxzXNDrvdUmI3yv77mK+1QXE3HBdd8DLDzpNOdzXED1ENf9p
 j2vBUX4XCiQVxSBbhA8ILKEh+xCUHDh6ZUMnMzQwy4hxa2RPfFPscr+m/YURDb8A
 EIfvG0qtBIe/CsVrD8XfhBTyewhFQKWxYUSDz0nl9OWhr3+Q/6yxJSSvAQoD40tS
 rYuS6JFDIJdB+wjt2Q6adR4xpCnEkfDL8ysWiYPMnTQ/mnmu2hg=
 =VBoe
 -----END PGP SIGNATURE-----

Merge tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc

AT91 & POLARFIRE SoC #1 for 5.18:

- sama7g5: CPU idle support with CPUFreq operating points defined in DT
- polarfire: addition of the soc system controller

* tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  soc: add microchip polarfire soc system controller
  ARM: at91: Kconfig: select PM_OPP
  ARM: at91: PM: add cpu idle support for sama7g5
  ARM: at91: ddr: fix typo to align with datasheet naming
  ARM: at91: ddr: align macro definitions
  ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency

Link: https://lore.kernel.org/r/20220225121943.71494-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25 16:35:17 +01:00
kartik 194217df81 soc/tegra: pmc: Add Tegra234 wake events
Enable the Tegra RTC alarm and power key wake-ups for Tegra234

Signed-off-by: kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-25 14:08:46 +01:00
Conor Dooley d0054a470c soc: add microchip polarfire soc system controller
This driver provides an interface for other drivers to access the
functions of the system controller on the Microchip PolarFire SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220217101349.2374873-2-conor.dooley@microchip.com
2022-02-25 12:50:59 +01:00
Jakub Kicinski aaa25a2fa7 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
tools/testing/selftests/net/mptcp/mptcp_join.sh
  34aa6e3bcc ("selftests: mptcp: add ip mptcp wrappers")

  857898eb4b ("selftests: mptcp: add missing join check")
  6ef84b1517 ("selftests: mptcp: more robust signal race test")
https://lore.kernel.org/all/20220221131842.468893-1-broonie@kernel.org/

drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c
  fb7e76ea3f ("net/mlx5e: TC, Skip redundant ct clear actions")
  c63741b426 ("net/mlx5e: Fix MPLSoUDP encap to use MPLS action information")

  09bf979232 ("net/mlx5e: TC, Move pedit_headers_action to parse_attr")
  84ba8062e3 ("net/mlx5e: Test CT and SAMPLE on flow attr")
  efe6f961cd ("net/mlx5e: CT, Don't set flow flag CT for ct clear flow")
  3b49a7edec ("net/mlx5e: TC, Reject rules with multiple CT actions")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-02-24 17:54:25 -08:00
Luca Weiss 20f36361b7 soc: qcom: rpmpd: Add MSM8226 support
Add the power domains preset in MSM8226.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220220223004.507739-2-luca@z3ntu.xyz
2022-02-24 14:12:34 -06:00
Rafael J. Wysocki 46501add15 - Added dtpm hierarchy description (Daniel Lezcano)
- Changed the locking scheme (Daniel Lezcano)
 
 - Fixed dtpm_cpu cleanup at exit time and missing virtual dtpm pointer
   release (Daniel Lezcano)
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEEGn3N4YVz0WNVyHskqDIjiipP6E8FAmIWg2YACgkQqDIjiipP
 6E8kYAf/YGJpBz5tWEUyGZWD4kPHxDiij6mu++qrXmRSBR3Baozq94WaR7wynC3U
 DNo9Zw3dJ4H9t7YtxDKdSV93oeKD5erXllqkLiq1lhNQR50p3gL3rypbR4VCr5y0
 B7scPdBtHuLuFU3TPZTkmzF2krsncH4WdhcIm4/h6jrvYDkCs9v4fEHqujgmBtFa
 4yB6EoZQp+9hUcjQUkVwolpCW6BlkSOaIIabzEiuBfLs+6Hy64RIzguMo3yg036P
 88ed1o7tvK/bV3aLXQ1UufUadhaxkMp/mdBuJ3lUaRiJyeYtVR9EKlxa7/0bNzc5
 N+ZAlpzqAY7q/1/J7wL7gIo7g1ZeFQ==
 =5pr0
 -----END PGP SIGNATURE-----

Merge tag 'dtpm-v5.18' of https://git.linaro.org/people/daniel.lezcano/linux

Pull DTPM (Dynamic Thermal Power Management) changes for 5.18-rc1 from
Daniel Lezcano:

"- Added dtpm hierarchy description (Daniel Lezcano)

 - Changed the locking scheme (Daniel Lezcano)

 - Fixed dtpm_cpu cleanup at exit time and missing virtual dtpm pointer
   release (Daniel Lezcano)"

* tag 'dtpm-v5.18' of https://git.linaro.org/people/daniel.lezcano/linux:
  dtpm/soc/rk3399: Add the ability to unload the module
  powercap/dtpm_cpu: Add exit function
  powercap/dtpm: Move the 'root' reset place
  powercap/dtpm: Destroy hierarchy function
  powercap/dtpm: Fixup kfree for virtual node
  powercap/dtpm_cpu: Reset per_cpu variable in the release function
  powercap/dtpm: Change locking scheme
  rockchip/soc/drivers: Add DTPM description for rk3399
  powercap/drivers/dtpm: Add dtpm devfreq with energy model support
  powercap/drivers/dtpm: Add CPU DT initialization support
  powercap/drivers/dtpm: Add hierarchy creation
  powercap/drivers/dtpm: Convert the init table section to a simple array
2022-02-24 20:00:32 +01:00
Thierry Reding b631c9c2ae soc/tegra: fuse: Explicitly cast to/from __iomem
sparse is picky about casts between different address spaces. A cast to
plain void * needs to be accompanied by a __force modifier and casting
back to void __iomem * needs to be explicit to avoid warnings.

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 88724b78a8 ("soc/tegra: fuse: Use resource-managed helpers")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 17:09:13 +01:00
kartik 6f259bf161 soc/tegra: fuse: Update nvmem cell list
Update tegra_fuse_cells with below entries:

 - gcplex-config-fuse:
     Configuration bits for GPU, used to enable/disable write protected
     region used for storing GPU firmware.
 - pdi0:
     Unique per chip public identifier.
 - pdi1:
     Unique per chip public identifier.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 17:09:13 +01:00
Dmitry Osipenko 1e5cf1452e soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30
All device drivers got runtime PM and OPP support. Flip the core domain
support status for Tegra20 and Tegra30 SoCs.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 17:09:10 +01:00
Lad Prabhakar 088659ad2a soc: renesas: Kconfig: Introduce ARCH_RZG2L config option
The Renesas RZ/G2L, RZ/G2LC, RZ/G2UL and RZ/V2L SoCs have identical IP
blocks for which drivers are common.  To avoid updating the Kconfig
files for drivers in common to each SoC, introduce the ARCH_RZG2L config
option.
The ARCH_RZG2L config option will be selected by the above mentioned
SoCs, and the ARCH_RZG2L config option will be used as a dependency for
the drivers in common.

While at it, move PM and PM_GENERIC_DOMAINS under the ARCH_RZG2L config
option instead of keeping it for individual SoCs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220224092114.25737-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:53:25 +01:00
Bjorn Andersson a1b0198726 soc: qcom: mdt_loader: Fix split-firmware condition
The updated condition checking if a segment can be found in the loaded
firmware blob, or need to be loaded from a separate file, incorrectly
classifies segments that ends at the end of the loaded blob. The result
is that the mdt loader attempts to load the segment from a separate
file.

Correct the conditional to use the loaded segment instead.

Fixes: ea90330fa3 ("soc: qcom: mdt_loader: Extend check for split firmware")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220215034819.1209367-1-bjorn.andersson@linaro.org
2022-02-23 13:13:12 -06:00
Daniel Lezcano f1ebef9e55 dtpm/soc/rk3399: Add the ability to unload the module
The dtpm hierarchy can now be removed with the
dtpm_destroy_hierarchy() function. Add the module_exit() callback so
the module can be unloaded by removing the previously created
hierarchy.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20220130210210.549877-7-daniel.lezcano@linaro.org
2022-02-23 19:46:29 +01:00
Lad Prabhakar b89acaf8ca soc: renesas: Kconfig: Explicitly select PM and PM_GENERIC_DOMAINS configs
Explicitly select PM and PM_GENERIC_DOMAINS configs for ARCH_R9A07G044
and ARCH_R9A07G054 configs.  PM and PM_GENERIC_DOMAINS configs are
required for RZ/{G2L,V2L} SoC without these configs the SMARC EVK's
won't boot.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220221222450.5393-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-22 09:44:15 +01:00
Laurent Pinchart fa231bef3b soc: imx: gpcv2: Fix clock disabling imbalance in error path
The imx_pgc_power_down() starts by enabling the domain clocks, and thus
disables them in the error path. Commit 18c98573a4 ("soc: imx: gpcv2:
add domain option to keep domain clocks enabled") made the clock enable
conditional, but forgot to add the same condition to the error path.
This can result in a clock enable/disable imbalance. Fix it.

Fixes: 18c98573a4 ("soc: imx: gpcv2: add domain option to keep domain clocks enabled")
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-21 15:27:41 +08:00
Jiasheng Jiang a222fd8541 soc: fsl: qe: Check of ioremap return value
As the possible failure of the ioremap(), the par_io could be NULL.
Therefore it should be better to check it and return error in order to
guarantee the success of the initiation.
But, I also notice that all the caller like mpc85xx_qe_par_io_init() in
`arch/powerpc/platforms/85xx/common.c` don't check the return value of
the par_io_init().
Actually, par_io_init() needs to check to handle the potential error.
I will submit another patch to fix that.
Anyway, par_io_init() itsely should be fixed.

Fixes: 7aa1aa6ece ("QE: Move QE from arch/powerpc to drivers/soc")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2022-02-18 17:11:23 -06:00
Jason Wang 6385960501 soc: fsl: qe: fix typo in a comment
The double `is' in the comment in line 150 is repeated. Remove one
of them from the comment.  Also removes a redundant tab in a new line.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2022-02-18 17:11:21 -06:00
Christophe JAILLET b9abe942cd soc: fsl: guts: Add a missing memory allocation failure check
If 'devm_kstrdup()' fails, we should return -ENOMEM.

While at it, move the 'of_node_put()' call in the error handling path and
after the 'machine' has been copied.
Better safe than sorry.

Fixes: a6fc3b6981 ("soc: fsl: add GUTS driver for QorIQ platforms")
Depends-on: fddacc7ff4dd ("soc: fsl: guts: Revert commit 3c0d64e867ed")
Suggested-by: Tyrel Datwyler <tyreld@linux.ibm.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2022-02-18 17:11:20 -06:00
Christophe JAILLET b113737cf1 soc: fsl: guts: Revert commit 3c0d64e867
This reverts commit 3c0d64e867
("soc: fsl: guts: reuse machine name from device tree").

A following patch will fix the missing memory allocation failure check
instead.

Suggested-by: Tyrel Datwyler <tyreld@linux.ibm.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2022-02-18 17:11:20 -06:00
Linus Torvalds 2848551bc6 sound fixes for 5.17-rc5
A collection of small patches, mostly for old and new regressions
 and device-specific fixes.
 
 - Regression fixes regarding ALSA core SG-buffer helpers
 - Regression fix for Realtek HD-audio mutex deadlock
 - Regression fix for USB-audio PM resume error
 - More coverage of ASoC core control API notification fixes
 - Old regression fixes for HD-audio probe mask
 - Fixes for ASoC Realtek codec work handling
 - Other device-specific quirks / fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmIOMkUOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE9FPQ/+KO9rNKbUZNAMFPyqAQyHqvi09fPO3vcPf7Ct
 chCwxB5I2dNNqYPgiqeEJbqrjctxjIN2wDvbACjmv+5AM52FKvcq0YgwhdYbuc8Z
 tXO2TPqshQUFC5o7TDYXZFZ0X6+YbDsoHYmhWDtP7qjGyaL3q17MOE3nZkPpqSqd
 7U2wGX8OLdYWTfjEFCxwSncqq8h63QC3afYodXhhB8NAszYjUplnAa5aXShYGIuM
 hw3uPmHEXoFosb9tfh7nq8GzP9I1shsQZsi4fuOh8fil3HadvQUF9RRLRyWVb+UT
 HmAXs2UnU15cWrV61swxPq1iqWdBKHSgudO3OkdBgFO1mrdUCAMTDUZxVqMtJMYZ
 bZfXKMTHmDvAuJjVqBf0eN9FHA8O8/l9RUi+UN1u/YRCZ0gkRpAuCuWc6ziL8G8I
 lDbsRe6jdz8nDyUp/N4cOt+UAbtpnYKGjG/bh05wpCxXHBecj1cH3v0yIgOrqdOz
 HtnfYwLEgPHjZIVZ8euEd8lvU1yBHH55QOJJbRImNhffCHrd39awwwqQWDY0mvUn
 KODB28Fr3AjJZnC/u4wdJNOQXciQ8WwHA6RE7eu2Ijg5UM2crA92icF4SrmNkMEx
 qOIxOvpTc+MtxdRQvfpfoAaD7J3TWh0p8jZxC/a/Wj/bitfp8zkdAE2Ml2pqZrIU
 Wj5nmEY=
 =/LCk
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "A collection of small patches, mostly for old and new regressions and
  device-specific fixes.

   - Regression fixes regarding ALSA core SG-buffer helpers

   - Regression fix for Realtek HD-audio mutex deadlock

   - Regression fix for USB-audio PM resume error

   - More coverage of ASoC core control API notification fixes

   - Old regression fixes for HD-audio probe mask

   - Fixes for ASoC Realtek codec work handling

   - Other device-specific quirks / fixes"

* tag 'sound-5.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (24 commits)
  ASoC: intel: skylake: Set max DMA segment size
  ASoC: SOF: hda: Set max DMA segment size
  ALSA: hda: Set max DMA segment size
  ALSA: hda/realtek: Fix deadlock by COEF mutex
  ALSA: usb-audio: Don't abort resume upon errors
  ALSA: hda: Fix missing codec probe on Shenker Dock 15
  ALSA: hda: Fix regression on forced probe mask option
  ALSA: hda/realtek: Add quirk for Legion Y9000X 2019
  ALSA: usb-audio: revert to IMPLICIT_FB_FIXED_DEV for M-Audio FastTrack Ultra
  ASoC: wm_adsp: Correct control read size when parsing compressed buffer
  ASoC: qcom: Actually clear DMA interrupt register for HDMI
  ALSA: memalloc: invalidate SG pages before sync
  ALSA: memalloc: Fix dma_need_sync() checks
  MAINTAINERS: update cros_ec_codec maintainers
  ASoC: rt5682: do not block workqueue if card is unbound
  ASoC: rt5668: do not block workqueue if card is unbound
  ASoC: rt5682s: do not block workqueue if card is unbound
  ASoC: tas2770: Insert post reset delay
  ASoC: Revert "ASoC: mediatek: Check for error clk pointer"
  ASoC: amd: acp: Set gpio_spkr_en to None for max speaker amplifer in machine driver
  ...
2022-02-18 09:20:52 -08:00
Jakub Kicinski 6b5567b1b2 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
No conflicts.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-02-17 11:44:20 -08:00
Takashi Iwai 5948342a52 ASoC: Fixes for v5.18
More fixes that have arrived in the past few -rcs, plus a MAINTAINERS
 update.  The biggest update here is the fix for control change
 notifications in ASoC generic controls found by mixer-test.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmIKgz8ACgkQJNaLcl1U
 h9Conwf6A3asUY/E6bxnHR82zjXlTi9h8o4gpduu1v38J+npn37cSz7w50AZq2o3
 SCbedB5LuZpGRKgP9tXPR3jqmXDwBH2D7cazISXLXLq8CKMHxuGuvY6vxaw7x+xz
 T7MIinNr9FGn5uqrTmmucRj7YyxA4YRQteQTRq5ixjUW/XvdIXcmOVY0ZO+P09Iq
 RBAZFtqNOh+AEdKddEfG3yykm1gU6rhvZM52KeJds22MSVCpQSYRe64yIwizERFr
 Jcb3qfuDtrVx0WaIW8H4jxfrHUw4ZbVs8ut2Z7fUwG2S1tiR88uNYiQ1uoMKAdQT
 WKLx/No3uLk2hZ8UszPc6KUqcrbGRA==
 =FeYQ
 -----END PGP SIGNATURE-----

Merge tag 'asoc-fix-v5.17-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v5.18

More fixes that have arrived in the past few -rcs, plus a MAINTAINERS
update.  The biggest update here is the fix for control change
notifications in ASoC generic controls found by mixer-test.
2022-02-14 17:55:39 +01:00
Linus Walleij 8754a7e61c soc: ixp4xx-npe: Access syscon regs using regmap
If we access the syscon (expansion bus config registers) using the
syscon regmap instead of relying on direct accessor functions,
we do not need to call this static code in the machine
(arch/arm/mach-ixp4xx/common.c) which makes things less dependent
on custom machine-dependent code.

Look up the syscon regmap and handle the error: this will make
deferred probe work with relation to the syscon.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220211223238.648934-8-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-12 18:20:03 +01:00
Lucas Stach 608d7c325e soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl
This adds the necessary bits to drive the VPU blk-ctrl on the i.MX8MQ, to
avoid putting more of this functionality into the decoder driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-11 10:51:52 +08:00
Sai Prakash Ranjan a6e9d7ef25 soc: qcom: llcc: Add configuration data for SM8450 SoC
Add LLCC configuration data for SM8450 SoC.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/fec944cb8f2a4a70785903c6bfec629c6f31b6a4.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Sai Prakash Ranjan 424ad93c23 soc: qcom: llcc: Update register offsets for newer LLCC HW
Newer LLCC HW have different register offsets for several registers,
currently of which LLCC hardware info and status are used to identify
the LLCC version information and other data. So use separate table to
keep track of these register offsets which vary by different LLCC HW
versions and eases any future addition in variations of register offsets
for newer hardware.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/c655d16d945aef2d7fc8e7c212f3e1c58a84eb95.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Sai Prakash Ranjan bc88a42075 soc: qcom: llcc: Add missing llcc configuration data
Add missing llcc configuration data for few chipsets which
were not added during initial post.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/143d11bacaca086406fdd10fc32f91eccd943527.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Sai Prakash Ranjan 2b8175a1f1 soc: qcom: llcc: Add write-cache cacheable support
Newer SoCs with LLCC IP version 2.1.0.0 and later support write
sub-cache cacheable feature. Use a separate llcc_slice_config member
"write_scid_cacheable_en" to identify this feature and program
LLCC_TRP_SCID_WRSC_CACHEABLE_EN register to enable it.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/83372c8178f579d055ec58212ce5af5d55abadd4.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Sai Prakash Ranjan 8008e7902f soc: qcom: llcc: Update the logic for version info extraction
LLCC HW version info is made up of major, branch, minor and echo
version bits each of which are 8bits. Several features in newer
LLCC HW are based on the full version rather than just major or
minor versions such as write-subcache enable which is applicable
for versions v2.0.0.0 and later, also upcoming write-subcache
cacheable for SM8450 SoC which is only present in versions v2.1.0.0
and later, so it makes it easier and cleaner to just directly
compare with the full version than adding additional major/branch/
minor/echo version checks. So remove the earlier major version check
and add full version check for those features.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/a82d7c32348c51fcc2b63e220d91b318bf706c83.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Huang Yiwei 06b24ab364 soc: qcom: llcc: Add support for 16 ways of allocation
Add support for 16 ways of allocation for LLCC HW version 2.1.0
and later.

Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/a7a5f64259c2c02628f03fb59b91e9fa78da2dfb.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Bjorn Andersson 76ee15ae1b soc: qcom: socinfo: Add some more PMICs and SoCs
Add SM8350, SC8280XP, SA8540P and one more SM8450 and various PMICs
found on boards on these platforms to the socinfo driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220210051043.748275-1-bjorn.andersson@linaro.org
2022-02-10 17:53:00 -06:00
Ioana Ciornei 86ec882f59 soc: fsl: dpio: read the consumer index from the cache inhibited area
Once we added support in the dpaa2-eth for driver level software TSO we
observed the following situation: if the EQCR CI (consumer index) is
read from the cache-enabled area we sometimes end up with a computed
value of available enqueue entries bigger than the size of the ring.

This eventually will lead to the multiple enqueue of the same FD which
will determine the same FD to end up on the Tx confirmation path and the
same skb being freed twice.

Just read the consumer index from the cache inhibited area so that we
avoid this situation.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-02-09 13:15:35 +00:00
Guenter Roeck 946eb87114
ASoC: Revert "ASoC: mediatek: Check for error clk pointer"
This reverts commit 9de2b9286a ("ASoC: mediatek: Check for error clk
pointer").

With this patch in the tree, Chromebooks running the affected hardware
no longer boot. Bisect points to this patch, and reverting it fixes
the problem.

An analysis of the code with this patch applied shows:

        ret = init_clks(pdev, clk);
        if (ret)
                return ERR_PTR(ret);
...
                for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
                        struct clk *c = clk[data->clk_id[j]];

                        if (IS_ERR(c)) {
                                dev_err(&pdev->dev, "%s: clk unavailable\n",
                                        data->name);
                                return ERR_CAST(c);
                        }

                        scpd->clk[j] = c;
                }

Not all clocks in the clk_names array have to be present. Only the clocks
in the data->clk_id array are actually needed. The code already checks if
the required clocks are available and bails out if not. The assumption that
all clocks have to be present is wrong, and commit 9de2b9286a ("ASoC:
mediatek: Check for error clk pointer") needs to be reverted.

Cc: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Cc: Mark Brown <broonie@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Reported-by: Daniel Golle <daniel@makrotopia.org>
Fixes: 9de2b9286a ("ASoC: mediatek: Check for error clk pointer")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220207160923.3911501-1-linux@roeck-us.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08 13:37:39 +00:00
Jae Hyun Yoo 301a5d3ad2
soc: aspeed: lpc-ctrl: Block error printing on probe defer cases
Add a checking code when it gets -EPROBE_DEFER while getting a clock
resource. In this case, it doesn't need to print out an error message
because the probing will be re-visited.

Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20211104173709.222912-1-jae.hyun.yoo@intel.com
Link: https://lore.kernel.org/r/20220201070118.196372-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:52:59 +01:00
Biju Das cb5508e47e soc: renesas: Add support for reading product revision for RZ/G2L family
As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates
product revision. Use this information to populate the revision info
for RZ/G2L family.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:43:06 +01:00
Daniel Lezcano b9d6c47a2b rockchip/soc/drivers: Add DTPM description for rk3399
The DTPM framework does support now the hierarchy description.

The platform specific code can call the hierarchy creation function
with an array of struct dtpm_node pointing to their parent.

This patch provides a description of the big / Little CPUs and the
GPU and tie them together under a virtual 'package' name. Only rk3399 is
described now.

The description could be extended in the future with the memory
controller with devfreq.

The description is always a module and it describes the soft
dependencies. The userspace has to load the softdeps module in the
right order.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by; Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20220128163537.212248-6-daniel.lezcano@linaro.org
2022-02-04 17:38:09 +01:00
Bjorn Andersson f4e526ff7e soc: qcom: mdt_loader: Extract PAS operations
Rather than passing a boolean to indicate if the PAS operations should
be performed from within __mdt_load(), extract them to their own helper
function.

This will allow clients to invoke this directly, with some
qcom_scm_pas_metadata context that they later needs to release, without
further having to complicate the prototype of qcom_mdt_load().

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-9-bjorn.andersson@linaro.org
2022-02-03 21:54:48 -06:00
Bjorn Andersson ebeb20a9cd soc: qcom: mdt_loader: Always invoke PAS mem_setup
After spelunking various old kernel trees no finds has been found
indicating that the PAS mem_setup call should actually be made
conditional on the image being relocatable.

Group the two PAS operations together, to facilitate splitting them out
in a following patch.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-8-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 75d7213ce1 soc: qcom: mdt_loader: Reorder parts of __qcom_mdt_load()
Move the traversal of the program headers to the start of the function,
to make sure that min_ and max_addr are in scope as the call to
qcom_scm_pas_mem_setup() is moved in the next commit.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-7-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson ea90330fa3 soc: qcom: mdt_loader: Extend check for split firmware
Some of the Qualcomm SM8450 firmware files are padded such that the
start of the first segment falls within the .mdt file but the segment to
be loaded is stored as a separate .bNN file.

Extend the condition to only attempt to read a segment inline if the
entire segment would be available.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-6-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 64fb5eb87d soc: qcom: mdt_loader: Allow hash to reside in any segment
It's been observed that some firmware found on Qualcomm SM8450 devices
carries the hash segment as the last segment in the ELF. Extend the
support to allow picking the hash from any segment in the MDT/MBN.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-5-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 8bd42e2341 soc: qcom: mdt_loader: Allow hash segment to be split out
It's been observed that some firmware found in a Qualcomm SM8450 device
has the hash table in a separate .bNN file. Use the newly extracted
helper function to load this segment from the separate file, if it's
determined that the hashes are not part of the already loaded firmware.

In order to do this, the function needs access to the firmware basename
and to provide more useful error messages a struct device to associate
the errors with.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-4-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 26c1f17013 soc: qcom: mdt_loader: Split out split-file-loader
Spotted in a SM8450 device, the hash metadata segment is split out in a
separate .bNN file which means that the logic for loading split out
segmenents needs to be duplicated in qcom_mdt_read_metadata().

Split out the existing logic to a helper function that can be used in
both code paths.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-3-bjorn.andersson@linaro.org
2022-02-03 15:32:29 -06:00
Bjorn Andersson 3a99f121fe firmware: qcom: scm: Introduce pas_metadata context
Starting with Qualcomm SM8450, some new security enhancements has been
done in the secure world, which results in the requirement to keep the
metadata segment accessible by the secure world from init_image() until
auth_and_reset().

Introduce a "PAS metadata context" object that can be passed to
init_image() for tracking the mapped memory and a related release
function for client drivers to release the mapping once either
auth_and_reset() has been invoked or in error handling paths on the way
there.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-2-bjorn.andersson@linaro.org
2022-02-03 15:32:29 -06:00
Miaoqian Lin c3d66a164c soc: ti: wkup_m3_ipc: Fix IRQ check in wkup_m3_ipc_probe
platform_get_irq() returns negative error number instead 0 on failure.
And the doc of platform_get_irq() provides a usage example:

    int irq = platform_get_irq(pdev, 0);
    if (irq < 0)
        return irq;

Fix the check of return value to catch errors correctly.

Fixes: cdd5de500b ("soc: ti: Add wkup_m3_ipc driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
Link: https://lore.kernel.org/r/20220114062840.16620-1-linmq006@gmail.com
2022-02-02 13:37:04 -06:00
Lad Prabhakar 001d7c8370 soc: ti: smartreflex: Use platform_get_irq_optional() to get the interrupt
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_optional().

While at it return 0 instead of returning ret in the probe success path.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220105180323.8563-1-prabhakar.mahadev-lad.rj@bp.renesas.com
2022-02-02 13:11:40 -06:00
Christophe JAILLET a8eba8dde5 soc: ti: k3-ringacc: Use devm_bitmap_zalloc() when applicable
'rings_inuse' and 'proxy_inuse' are bitmaps. So use 'devm_bitmap_zalloc()'
to simplify code and improve the semantic.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/45544b0d97a7bea7764292852842adf5085a7700.1640276001.git.christophe.jaillet@wanadoo.fr
2022-02-02 13:06:21 -06:00
Daniel Thompson 8030cb9a55 soc: qcom: aoss: remove spurious IRQF_ONESHOT flags
Quoting the header comments, IRQF_ONESHOT is "Used by threaded interrupts
which need to keep the irq line disabled until the threaded handler has
been run.". When applied to an interrupt that doesn't request a threaded
irq then IRQF_ONESHOT has a lesser known (undocumented?) side effect,
which it to disable the forced threading of the irq. For "normal" kernels
(without forced threading) then, if there is no thread_fn, then
IRQF_ONESHOT is a nop.

In this case disabling forced threading is not appropriate for this driver
because it calls wake_up_all() and this API cannot be called from
no-thread interrupt handlers on PREEMPT_RT systems (deadlock risk, triggers
sleeping-while-atomic warnings).

Fix this by removing IRQF_ONESHOT.

Fixes: 2209481409 ("soc: qcom: Add AOSS QMP driver")
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[bjorn: Added Fixes tag]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220127173554.158111-1-daniel.thompson@linaro.org
2022-01-31 18:12:20 -06:00
Xu Wang 4e6ae78ee6 soc: qcom: apr: Remove redundant 'flush_workqueue()' calls
'destroy_workqueue()' already drains the queue before destroying it, so
there is no need to flush it explicitly.

Remove the redundant 'flush_workqueue()' calls.

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220114085019.42904-1-vulab@iscas.ac.cn
2022-01-31 16:44:47 -06:00
Miaoqian Lin 4b41a9d0fe soc: qcom: aoss: Fix missing put_device call in qmp_get
The reference taken by 'of_find_device_by_node()' must be released when
not needed anymore.
Add the corresponding 'put_device()' in the error handling paths.

Fixes: 8c75d585b9 ("soc: qcom: aoss: Expose send for generic usecase")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220108095931.21527-1-linmq006@gmail.com
2022-01-31 16:17:44 -06:00
Miaoqian Lin 0ff027027e soc: qcom: ocmem: Fix missing put_device() call in of_get_ocmem
The reference taken by 'of_find_device_by_node()' must be released when
not needed anymore.
Add the corresponding 'put_device()' in the error handling path.

Fixes: 01f937ffc4 ("soc: qcom: ocmem: don't return NULL in of_get_ocmem")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220107073126.2335-1-linmq006@gmail.com
2022-01-31 16:09:50 -06:00
Jiasheng Jiang 5a811126d3 soc: qcom: rpmpd: Check for null return of devm_kcalloc
Because of the possible failure of the allocation, data->domains might
be NULL pointer and will cause the dereference of the NULL pointer
later.
Therefore, it might be better to check it and directly return -ENOMEM
without releasing data manually if fails, because the comment of the
devm_kmalloc() says "Memory allocated with this function is
automatically freed on driver detach.".

Fixes: bbe3a66c3f ("soc: qcom: rpmpd: Add a Power domain driver to model corners")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211231094419.1941054-1-jiasheng@iscas.ac.cn
2022-01-31 15:57:00 -06:00
Christophe JAILLET a9ff0638a4 soc: qcom: llcc: Use devm_bitmap_zalloc() when applicable
'drv_data->bitmap' is a bitmap. So use 'devm_bitmap_zalloc()' to simplify
code, improve the semantic.

This also fixes a spurious indentation.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/3ee83f75afa8754fade4fff6a03b57f0ae3ccc28.1640245993.git.christophe.jaillet@wanadoo.fr
2022-01-31 15:42:19 -06:00
Fabio Estevam c137fb8909 soc: imx: Remove Layerscape check
Since commit 4ebd29f916 ("soc: imx: Register SoC device only on i.MX
boards") the soc-imx driver is only registered on i.MX platforms as
intended.

This means that we no longer need to do a specific check for
Layerscape.

Remove the now unneeded "fsl,ls1021a" check.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-28 17:46:08 +08:00
Biju Das 860122d802 soc: renesas: Identify RZ/V2L SoC
Add support for identifying the RZ/V2L (R9A07G054) SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:46:15 +01:00
Sam Protsenko 442b0c08db soc: samsung: Fix typo in CONFIG_EXYNOS_USI description
The proper name is Exynos Auto V9, not V0. It was the typo slipped in
unnoticed, fix it.

Fixes: b603377e40 ("soc: samsung: Add USI driver")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220114144606.24358-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-23 18:05:41 +01:00
Linus Torvalds 3689f9f8b0 bitmap patches for 5.17-rc1
-----BEGIN PGP SIGNATURE-----
 
 iQHJBAABCgAzFiEEi8GdvG6xMhdgpu/4sUSA/TofvsgFAmHi+xgVHHl1cnkubm9y
 b3ZAZ21haWwuY29tAAoJELFEgP06H77IxdoMAMf3E+L51Ys/4iAiyJQNVoT3aIBC
 A8ZVOB9he1OA3o3wBNIRKmICHk+ovnfCWcXTr9fG/Ade2wJz88NAsGPQ1Phywb+s
 iGlpySllFN72RT9ZqtJhLEzgoHHOL0CzTW07TN9GJy4gQA2h2G9CTP+OmsQdnVqE
 m9Fn3PSlJ5lhzePlKfnln8rGZFgrriJakfEFPC79n/7an4+2Hvkb5rWigo7KQc4Z
 9YNqYUcHWZFUgq80adxEb9LlbMXdD+Z/8fCjOrAatuwVkD4RDt6iKD0mFGjHXGL7
 MZ9KRS8AfZXawmetk3jjtsV+/QkeS+Deuu7k0FoO0Th2QV7BGSDhsLXAS5By/MOC
 nfSyHhnXHzCsBMyVNrJHmNhEZoN29+tRwI84JX9lWcf/OLANcCofnP6f2UIX7tZY
 CAZAgVELp+0YQXdybrfzTQ8BT3TinjS/aZtCrYijRendI1GwUXcyl69vdOKqAHuk
 5jy8k/xHyp+ZWu6v+PyAAAEGowY++qhL0fmszA==
 =RKW4
 -----END PGP SIGNATURE-----

Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux

Pull bitmap updates from Yury Norov:

 - introduce for_each_set_bitrange()

 - use find_first_*_bit() instead of find_next_*_bit() where possible

 - unify for_each_bit() macros

* tag 'bitmap-5.17-rc1' of git://github.com/norov/linux:
  vsprintf: rework bitmap_list_string
  lib: bitmap: add performance test for bitmap_print_to_pagebuf
  bitmap: unify find_bit operations
  mm/percpu: micro-optimize pcpu_is_populated()
  Replace for_each_*_bit_from() with for_each_*_bit() where appropriate
  find: micro-optimize for_each_{set,clear}_bit()
  include/linux: move for_each_bit() macros from bitops.h to find.h
  cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
  tools: sync tools/bitmap with mother linux
  all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
  cpumask: use find_first_and_bit()
  lib: add find_first_and_bit()
  arch: remove GENERIC_FIND_FIRST_BIT entirely
  include: move find.h from asm_generic to linux
  bitops: move find_bit_*_le functions from le.h to find.h
  bitops: protect find_first_{,zero}_bit properly
2022-01-23 06:20:44 +02:00
Lukas Bulwahn 3c2905ea79
riscv: canaan: remove useless select of non-existing config SYSCON
The config SYSCON never existed in the kernel repository; so, the select of
that config in ./drivers/soc/canaan/Kconfig has no effect.

Presumably, this was just some mistake, assuming some symmetry in handling
and naming of configs that simply does not exist.

Remove this useless select of a non-existing config.

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-01-20 09:35:11 -08:00
Yury Norov 9b51d9d866 cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
cpumask_first() is a more effective analogue of 'next' version if n == -1
(which means start == 0). This patch replaces 'next' with 'first' where
things look trivial.

There's no cpumask_first_zero() function, so create it.

Signed-off-by: Yury Norov <yury.norov@gmail.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2022-01-15 08:47:31 -08:00
Yury Norov b5c7e7ec7d all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
find_first{,_zero}_bit is a more effective analogue of 'next' version if
start == 0. This patch replaces 'next' with 'first' where things look
trivial.

Signed-off-by: Yury Norov <yury.norov@gmail.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2022-01-15 08:47:31 -08:00
Linus Torvalds 3bad80dab9 Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem
 changes for 5.17-rc1.
 
 Lots of different things are in here for char/misc drivers such as:
 	- habanalabs driver updates
 	- mei driver updates
 	- lkdtm driver updates
 	- vmw_vmci driver updates
 	- android binder driver updates
 	- other small char/misc driver updates
 
 Also smaller driver subsystems have also been updated, including:
 	- fpga subsystem updates
 	- iio subsystem updates
 	- soundwire subsystem updates
 	- extcon subsystem updates
 	- gnss subsystem updates
 	- phy subsystem updates
 	- coresight subsystem updates
 	- firmware subsystem updates
 	- comedi subsystem updates
 	- mhi subsystem updates
 	- speakup subsystem updates
 	- rapidio subsystem updates
 	- spmi subsystem updates
 	- virtual driver updates
 	- counter subsystem updates
 
 Too many individual changes to summarize, the shortlog contains the full
 details.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYeGNAQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymoVgCg1CPjMu8/SDj3Sm3a1UMQJn9jnl8AnjQcEp3z
 hMr9mISG4r6g4PvjrJBj
 =9May
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char, misc, and other "small" driver
  subsystem changes for 5.17-rc1.

  Lots of different things are in here for char/misc drivers such as:

   - habanalabs driver updates

   - mei driver updates

   - lkdtm driver updates

   - vmw_vmci driver updates

   - android binder driver updates

   - other small char/misc driver updates

  Also smaller driver subsystems have also been updated, including:

   - fpga subsystem updates

   - iio subsystem updates

   - soundwire subsystem updates

   - extcon subsystem updates

   - gnss subsystem updates

   - phy subsystem updates

   - coresight subsystem updates

   - firmware subsystem updates

   - comedi subsystem updates

   - mhi subsystem updates

   - speakup subsystem updates

   - rapidio subsystem updates

   - spmi subsystem updates

   - virtual driver updates

   - counter subsystem updates

  Too many individual changes to summarize, the shortlog contains the
  full details.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  counter: 104-quad-8: Fix use-after-free by quad8_irq_handler
  dt-bindings: mux: Document mux-states property
  dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
  counter: remove old and now unused registration API
  counter: ti-eqep: Convert to new counter registration
  counter: stm32-lptimer-cnt: Convert to new counter registration
  counter: stm32-timer-cnt: Convert to new counter registration
  counter: microchip-tcb-capture: Convert to new counter registration
  counter: ftm-quaddec: Convert to new counter registration
  counter: intel-qep: Convert to new counter registration
  counter: interrupt-cnt: Convert to new counter registration
  counter: 104-quad-8: Convert to new counter registration
  counter: Update documentation for new counter registration functions
  counter: Provide alternative counter registration functions
  counter: stm32-timer-cnt: Convert to counter_priv() wrapper
  counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper
  counter: ti-eqep: Convert to counter_priv() wrapper
  counter: ftm-quaddec: Convert to counter_priv() wrapper
  counter: intel-qep: Convert to counter_priv() wrapper
  counter: microchip-tcb-capture: Convert to counter_priv() wrapper
  ...
2022-01-14 16:02:28 +01:00
Linus Torvalds 3ceff4ea07 sound updates for 5.17-rc1
It's a relatively calm development cycle, but still lots of updates in
 the driver side like Intel SOF.  Below are some highlights:
 
 * ALSA / ASoC core:
 - A new kselftest for ALSA control API
 - PCM NO_REWINDS support
 - Potential race fixes around control removals
 - Unify x86 SG-buffer memory allocation code
 - Cleanups and race fixes for ASoC DPCM locking
 
 * ASoC:
 - Refinements and cleanups around the delay() APIs
 - Wider use of dev_err_probe().
 - Continuing cleanups and improvements to the SOF code
 - Support for pin switches in simple-card derived cards
 - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
   systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
   S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
   TLV320ADC3xxx
 
 * HD-audio / USB-audio:
 - Fix deadlock at HD-audio codec unbinding
 - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
 - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device
 
 * Misc:
 - Fix virmidi drain behavior
 
 Note that the merge of CS35L41 codec support is still half-baked, and
 at least one ACPI change is missing.  Although this won't hinder the
 kernel build itself, we're going to catch up before RC1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmHgHvgOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE9/JBAAk1qY+2GE7a2j/dRW31rv2JxS3iMnCIdnp/Hn
 c0mArt8iEDPXbgmQ2b+tnuqh5GSz073UPCorxkEdAkYisbGSzk22VnfWsNwbSEgC
 p8Tqt8ma1blQWUYGzszQEN9u9BCLaMr1cO/ORZmD/f7hSq5W42Q8IYLTb1/9gdax
 +pJyBg8Y52PAKURnKWzmDoasJeDoQauxZ9R0g3BgQHj8Hb3QHQonyqKxJlyFac/e
 RyV7YycM2ES3Dj4u7TReRd9hdKeuzc2Wg8qYVC3x/9dzhKpvDM3Tg5ONw/58jW4x
 G6tuEj5SeEKH2LRQYTOLYScz9lVUalv97PCsq5LkQrDLqrO3hT+vxQpRdBZefRIQ
 +cKBd9GReRlQW9XCDrUs9ZuWtl1cyta8T3mk3WhTvjUcTlr1vd+TcyRoQvNhFNVH
 LaTjD1526Yra8BxyzSe7tyHhvOIvRWwjzSfwCyYV9097wV82+rOReqHyMDhN7Djc
 NbBQvoIh7v1Yo+hOYE3RUUhS5h+CJH8l43J1pWNODjXVYivYTzCOizDdJ8ktRaHE
 gpQ1vAM4pW1R5mQsyIwj6G9B1bclYboVBjlE9SXCpT3vmDneIWuLUmNV89gyNW+p
 96B3dL4BoCTyBtGYBtow2Es+/rX2dEWtM6pvOSHhRDoWL586Snr2lXDEbAQ9uZF9
 zpq1uqs=
 =csTR
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It's a relatively calm development cycle, but still lots of updates in
  the driver side like Intel SOF. Below are some highlights:

  ALSA / ASoC core:
   - A new kselftest for ALSA control API
   - PCM NO_REWINDS support
   - Potential race fixes around control removals
   - Unify x86 SG-buffer memory allocation code
   - Cleanups and race fixes for ASoC DPCM locking

  ASoC:
   - Refinements and cleanups around the delay() APIs
   - Wider use of dev_err_probe().
   - Continuing cleanups and improvements to the SOF code
   - Support for pin switches in simple-card derived cards
   - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
     systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
     S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
     TLV320ADC3xxx

  HD-audio / USB-audio:
   - Fix deadlock at HD-audio codec unbinding
   - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
   - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device

  Misc:
   - Fix virmidi drain behavior

  Note that the merge of CS35L41 codec support is still half-baked, and
  at least one ACPI change is missing. Although this won't hinder the
  kernel build itself, we're going to catch up before RC1"

* tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits)
  ALSA: hda: intel-dsp-config: reorder the config table
  ALSA: hda: intel-dsp-config: add JasperLake support
  ALSA: hda: cs35l41: fix double free on error in probe()
  ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses
  ALSA: hda: Fix dependency on ASoC cs35l41 codec
  ASoC: cs35l41: Add support for hibernate memory retention mode
  ASoC: cs35l41: Update handling of test key registers
  ALSA: intel_hdmi: Check for error num after setting mask
  ASoC: wcd9335: Keep a RX port value for each SLIM RX mux
  ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id
  ALSA: virmidi: Remove duplicated code
  ALSA: seq: virmidi: Add a drain operation
  ASoC: topology: Fix typo
  ASoC: fsl_asrc: refine the check of available clock divider
  ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect
  ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev
  ASoC: rt5640: Add support for boards with an external jack-detect GPIO
  ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ
  ASoC: rt5640: Change jack_work to a delayed_work
  ASoC: rt5640: Fix possible NULL pointer deref on resume
  ...
2022-01-14 14:55:38 +01:00
Linus Torvalds feb7a43de5 Rework of the MSI interrupt infrastructure:
Treewide cleanup and consolidation of MSI interrupt handling in
   preparation for further changes in this area which are necessary to:
 
   - address existing shortcomings in the VFIO area
 
   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmHf+SETHHRnbHhAbGlu
 dXRyb25peC5kZQAKCRCmGPVMDXSYobzGD/wNEFl5qQo5mNZ9thP6JSJFOItm7zMc
 2QgzCYOqNwAv4jL6Dqo+EHtbShYqDyWzKdKccgqNjmdIqgW8q7/fubN1OPzRsClV
 CZG997AsXDGXYlQcE3tXZjkeCWnWEE2AGLnygSkFV1K/r9ALAtFfTBJAWB+UD+Zc
 1P8Kxo0q0Jg+DQAMAA5bWfSSjo/Pmpr/1AFjY7+GA8BBeJJgWOyW7H1S+GYEWVOE
 RaQP81Sbd6x1JkopxkNqSJ/lbNJfnPJxi2higB56Y0OYn5CuSarYbZUM7oQ2V61t
 jN7pcEEvTpjLd6SJ93ry8WOcJVMTbccCklVfD0AfEwwGUGw2VM6fSyNrZfnrosUN
 tGBEO8eflBJzGTAwSkz1EhiGKna4o1NBDWpr0sH2iUiZC5G6V2hUDbM+0PQJhDa8
 bICwguZElcUUPOprwjS0HXhymnxghTmNHyoEP1yxGoKLTrwIqkH/9KGustWkcBmM
 hNtOCwQNqxcOHg/r3MN0KxttTASgoXgNnmFliAWA7XwseRpLWc95XPQFa5sptRhc
 EzwumEz17EW1iI5/NyZQcY+jcZ9BdgCqgZ9ECjZkyN4U+9G6iACUkxVaHUUs77jl
 a0ISSEHEvJisFOsOMYyFfeWkpIKGIKP/bpLOJEJ6kAdrUWFvlRGF3qlav3JldXQl
 ypFjPapDeB5guw==
 =vKzd
 -----END PGP SIGNATURE-----

Merge tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI irq updates from Thomas Gleixner:
 "Rework of the MSI interrupt infrastructure.

  This is a treewide cleanup and consolidation of MSI interrupt handling
  in preparation for further changes in this area which are necessary
  to:

   - address existing shortcomings in the VFIO area

   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space"

* tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (94 commits)
  genirq/msi: Populate sysfs entry only once
  PCI/MSI: Unbreak pci_irq_get_affinity()
  genirq/msi: Convert storage to xarray
  genirq/msi: Simplify sysfs handling
  genirq/msi: Add abuse prevention comment to msi header
  genirq/msi: Mop up old interfaces
  genirq/msi: Convert to new functions
  genirq/msi: Make interrupt allocation less convoluted
  platform-msi: Simplify platform device MSI code
  platform-msi: Let core code handle MSI descriptors
  bus: fsl-mc-msi: Simplify MSI descriptor handling
  soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
  soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation
  NTB/msi: Convert to msi_on_each_desc()
  PCI: hv: Rework MSI handling
  powerpc/mpic_u3msi: Use msi_for_each-desc()
  powerpc/fsl_msi: Use msi_for_each_desc()
  powerpc/pasemi/msi: Convert to msi_on_each_dec()
  powerpc/cell/axon_msi: Convert to msi_on_each_desc()
  powerpc/4xx/hsta: Rework MSI handling
  ...
2022-01-13 09:05:29 -08:00
Linus Torvalds aca48b2dd1 ARM: SoC devicetree changes for v5.17
As usual, this is the bulk of the updates for the SoC tree, adding
 more devices to existing files, addressing issues from ever improving
 automated checking, and fixing minor issues.
 
 The most interesting bits as usual are the new platforms.
 All the newly supported SoCs belong into existing families
 this time:
 
  - Qualcomm gets support for two newly announced platforms, both
    of which can now work in production environments: the SDX65
    5G modem that can run a minimal Linux on its Cortex-A7 core,
    and the Snapdragon 8 Gen 1, their latest high-end phone SoC.
 
  - Renesas adds support for R-Car S4-8, the most recent automotive
    Server/Communication SoC.
 
  - TI adds support for J721s2, a new automotive SoC in the K3
    family.
 
  - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
    generation following their popular MT76xx series. Only basic
    support is added for now.
 
  - NXP i.MX8 ULP8 is a new low-power variant of the widespread
    i.MX8 series.
 
  - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that
    we have supported for a long time.
 
 New boards with the existing SoCs include
 
  - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
 
  - AT91/SAMA5 based evaluation board
 
  - NXP gains twenty new development and industrial boards for their
    i.MX and Layerscape SoCs
 
  - Intel IXP4xx now supports the final two machines in device tree
    that were previously only supported in old style board files.
 
  - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013,
    while MT8183 is used in the Acer Chromebook 314.
 
  - Qualcomm gains support for the reference machines using the two
    new SoCs, plus a number of Chromebook variants and phones based
    on the Snapdragon 7c, 845 and 888 SoCs, including various
    Sony Xperia devices and the Microsoft Surface Duo 2.
 
  - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
 
  - Tegra now boots various older Android devices based on 32-bit
    chips out of the box, including a number of ASUS Transformer
    tablets.
    There is also a new Jetson AGX Orin developer kit.
 
  - Apple support adds the missing device trees for all the remaining
    M1 Macbook and iMac variants, though not yet the M1 Pro/Max
    versions.
 
  - Allwinner now supports another version of the Tanix TX6 set-top
    box based on the H6 SoC.
 
  - Broadcom gains support for the Netgear RAXE500 Wireless router
    based on BCM4908.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDsm4ACgkQmmx57+YA
 GNm9YhAAm0c/uPAkDA/6ESjaMC5qIHnV8CC9ZV24iINqFutcjKm2az8OiqKZT7UW
 a/+n2sfjAiyoAAaXrp/WvyMH2Sula1i/OZpR4GYIbD/lbYRFk+4+iW2YY9vViCjL
 KH6M/H6KfOSNmGcpe3wDvu7D4YWfFKDCDyUJsEaMW2xSQehYbH5P0OuzQW1EROHr
 GQp60QtCbUpMmqIrkJT99MxBGCCyb4dV6BT3iU489/YU3q3pOF8OWMLKv5TlXzfw
 x0pLH5CKavvCFj3iqp80sCEBeSoUecLKVnBRfmwAH1vgfNrhpXh4jP9m1e3Vh3Bb
 aJGZ57W77Akf+TywZEojDdIDQGKcdlzpZNxN2i4e4+LECYvfOdJW8GP18MmsXEY4
 apb0NeKad8FGRI4b97dIVEcTa894JkEZaEtnNaIdjWFhBgzO+Kr2iOTw71AKsJmc
 eIwv4SDdUQTU4VT08ceJTOVt8NikGALJStg5knpVJ9lfHvFlWj1GAE4QnCtS6pUR
 iiyqJ1/7khNplcgowaz6nuC2gSE49UwYQImLvBfG17eT1YU3B2OZg/FZ9xSmr2bW
 Thk+TKO9A6xai8QQWYV99Ae+Y6nDWUrLL5U9DXTn4cm64g5z3VkVKGcNajg/kAad
 hyQmSIhcypp2KN//c+d3VU/KY1EUYJDzg1EEwRuxP7Gih5/7pb8=
 =IF3G
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "As usual, this is the bulk of the updates for the SoC tree, adding
  more devices to existing files, addressing issues from ever improving
  automated checking, and fixing minor issues.

  The most interesting bits as usual are the new platforms. All the
  newly supported SoCs belong into existing families this time:

   - Qualcomm gets support for two newly announced platforms, both of
     which can now work in production environments: the SDX65 5G modem
     that can run a minimal Linux on its Cortex-A7 core, and the
     Snapdragon 8 Gen 1, their latest high-end phone SoC.

   - Renesas adds support for R-Car S4-8, the most recent automotive
     Server/Communication SoC.

   - TI adds support for J721s2, a new automotive SoC in the K3 family.

   - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
     generation following their popular MT76xx series. Only basic
     support is added for now.

   - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
     series.

   - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
     have supported for a long time.

  New boards with the existing SoCs include

   - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers

   - AT91/SAMA5 based evaluation board

   - NXP gains twenty new development and industrial boards for their
     i.MX and Layerscape SoCs

   - Intel IXP4xx now supports the final two machines in device tree
     that were previously only supported in old style board files.

   - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
     MT8183 is used in the Acer Chromebook 314.

   - Qualcomm gains support for the reference machines using the two new
     SoCs, plus a number of Chromebook variants and phones based on the
     Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
     devices and the Microsoft Surface Duo 2.

   - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.

   - Tegra now boots various older Android devices based on 32-bit chips
     out of the box, including a number of ASUS Transformer tablets.

     There is also a new Jetson AGX Orin developer kit.

   - Apple support adds the missing device trees for all the remaining
     M1 Macbook and iMac variants, though not yet the M1 Pro/Max
     versions.

   - Allwinner now supports another version of the Tanix TX6 set-top box
     based on the H6 SoC.

   - Broadcom gains support for the Netgear RAXE500 Wireless router
     based on BCM4908"

* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
  Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: Remove "spidev" nodes
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  ...
2022-01-10 08:24:40 -08:00
Linus Torvalds e85195d5bf ARM: SoC driver updates for v5.17
There are cleanups and minor bugfixes across several SoC specific
 drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
 Renesas, ZynqMP
 
 Noteworthy new features are:
 
  - The op-tee firmware driver gains support for asynchronous
    notifications from secure-world firmware.
 
  - Qualcomm platforms gain support for new SoC types in various
    drivers: power domain, cache controller, RPM sleep, soc-info
 
  - Samsung SoC drivers gain support for new SoCs in ChipID and PMU,
    as well as a new USIv2 driver that handles various types of
    serial communiction (uart, i2c, spi)
 
  - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple
    drivers, as well as memory controller support for RZ/G2L
    (R9A07G044).
 
  - Apple M1 gains support for the PMGR power management driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDpK8ACgkQmmx57+YA
 GNmUqhAAnaxXJeu+dfWanrAAeH1MKju/uxB6bogtwrAc928BaqmeZfiAqsT9KsWu
 FhkWSGRu+y74fct4zkD3xfl0V2ROSrSjcvrWVu0GJPnXoOLKDZ1RbdZDnfXbwowa
 4urL5HeOtKYUpLjw7z8EQ43SHZba7CsiImGcF/4OtHW1hNGNIlU/Mym93lFT5Xdq
 HwDrktBWWVvBkCnxVGJjMwGGSCJbowIsPK8p8xr4CqML4Vdcx89qKB8cnCOg8Bgo
 YqzcJCTOY9K5qXI8D20GaTJCP5vCPxMgmeFn4LgWa+h9iJrt+g4J8zA1qGw92nwJ
 W2uRu/6YkCC2HMiyExuxkJNPKbFRbOqAm7lA/ZzuFpFU5RowACIrlwm4ZR/4UFDG
 fzrt3ZfNLRu33QxqhKY0jWGeHu729+RE2kpQ4FXveFmrtRIWnuX70/+NQFVhm+qy
 EBgXmlWNhTh2tcgfEzPja52+5h3SYKk6/J44266i/34x5eLDvmuRADzCVpLUmbPS
 G5UHVkWHZPJne6ZJQ+yz+o2h6BjcpCTvPRbt2/KkSOo9S0Qj4/XrOUHBAofy3odH
 Tdiba6lXMHZqvLlOOrMyJ0qdv26FJyJaSg5Wqhq45G1YCW5Xjc+cYzZggJBvBpIh
 thyN4b9jqfTnAZzKB6LCBUmEF2A7gXkuW9oXzNUkKtVzYluu1aQ=
 =tlZT
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are cleanups and minor bugfixes across several SoC specific
  drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
  Renesas, ZynqMP

  Noteworthy new features are:

   - The op-tee firmware driver gains support for asynchronous
     notifications from secure-world firmware.

   - Qualcomm platforms gain support for new SoC types in various
     drivers: power domain, cache controller, RPM sleep, soc-info

   - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as
     well as a new USIv2 driver that handles various types of serial
     communiction (uart, i2c, spi)

   - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers,
     as well as memory controller support for RZ/G2L (R9A07G044).

   - Apple M1 gains support for the PMGR power management driver"

* tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...
2022-01-10 08:13:52 -08:00
Greg Kroah-Hartman 824adf37ee Merge 5.16-rc8 into char-misc-next
We need the fixes in here as well for testing.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-03 13:44:38 +01:00
Jiasheng Jiang 9de2b9286a
ASoC: mediatek: Check for error clk pointer
Yes, you are right and now the return code depending on the
init_clks().

Fixes: 6078c65194 ("soc: mediatek: Refine scpsys to support multiple platform")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Link: https://lore.kernel.org/r/20211222015157.1025853-1-jiasheng@iscas.ac.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-24 14:06:57 +00:00
Arnd Bergmann 13ee75c7b5 Qualcomm driver updates for v5.17
This introduces RPM power-domain support for the SM8450, SM6125 and
 QCM2290 platforms. It them clean up the platform-based naming of the
 resources definitions throughout the RPMh PD driver.
 
 The last-level cache controller driver gains SM8350 support.
 
 The RPM sleep stats driver gains support for several older systems that
 had a slightly different memory layout for this information.
 
 The socinfo gains SM8450, SM6350 and SM7227 definitions.
 
 In addition to the DeviceTree binding updates related to these changes
 new compatibles was added to describe the SM8450 and the Kryo 780 CPU.
 
 Lastly a few typo and style fixes are introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBUg4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FObUQAOCTBSbL/US0wCCUEHPq
 MScjFtPDAV88bJi9uRzi5lalwPd/3yPZu+XLcCV/CjRj6nlGAbua2EcogvMsM1Lj
 rgHZopKnnDOHEFII2ZZ3lyJN4EntvSGHtnm/i2Jd7n3nB52zBkuRpgn3mi32QWoL
 QmGECClAPFBlQi9P33yHDZ/XC8ZK1y982G+Pb8SD6guxmtGxXCm4SaZ4qwVya53s
 euBl+nT/snARPEwaqRoGIsvs+fH2BcoJbug19MLQ+3Q4K9ycxQkWalzcMsLM/EjT
 H1JGjoaHbTpNhyMmKDqN2jS0CkvoLiYOIvhAbqw6l2HluRkn8QhcDOJJ9RHl2oB/
 EqYkK457F7smA0Z9vViuaEZJWfyPNt0z2c7zcpf73Iuk8cBM+48MUQ1UOwyvQh3c
 8AeyyAkgyYBWv58h5rLDS2fqD+tWx4hz6tqxyYojsxYjQkyWRDU6540tGSDeVAt+
 SUQ9qFXWyG7R5Z3GBVHi7ztXnkl6vYZUF05fhZrkpw9YrGlmu3wK/3Rcg9ZIECOg
 Q0UA/GQsqQtCqmzkRQsur/ljEbCrmtiB6JvG+7cnQIWPwcN/4Ho3wyfXvtzNvNki
 dMIpd+7NKkTaj1HUaH5qEnyO4szUpMoFfOrtqzlucH5dGG6fppY3svVWzuxLcbDy
 8+b+/aDuWa7HUXpBbPaK7H7U
 =ovup
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHBy8wACgkQmmx57+YA
 GNmS3xAAhIPIdMWF76Gb7eQu0UWrbuACSl0Nkt5SRbRyjX0BHectf+ssXUzR6r2/
 l8Uf2fkBYP5UWVUbWXlKPlmwmdQo/lAGYeHvi/lx3W4ORvIe6CRTeIS0q0DLPwSV
 H7iH8lnoFozIITt+6N+LhN9VME/Zpo8E/t2Wt47mkSkV/2hP6Adrgh5f4pz4KMcl
 hHQcAhi0/3DTEoGjczBDcTXMIt8nUPSwTnd1ktOaD0avRgKgiiLslvzjTxLMXRuw
 aDInx8uIMBswbEE0ZtG1aFrYZ54Y3DAm65n4aZfOPo3OlLjiosOqT1pvKWkpF/u1
 OYcQzVEdUnEwZKB9BYzkTFVtK3ptE/5nNFg4HkclZATrqvEfQ6I3EbM9tvtY6GV+
 BUUjxOthWq0Rnazd3BkOJvsepSndB1dOfxAunBk6m/r44shWWjLKGRI3jd+0QgW2
 UVd0hy5pC28OZelGgSAU0PVQyHYl/82pRu7UCpHVaOg9mvuwgURChr7ddGi9XWVG
 cMChFAumH/hvnQrRavONPUqaTjP62hRkOqjA/bvc3jFuAgFWqvSrc+z1AvqKw4Uz
 0ks+tjoHrQ839EZB0g/LDk7K8MDe8llvOk16gzqNxplQJe2WYaRZ9S0GD+3MC1Wz
 sSIyMsFLhfZJ2Z7TNOqLTPPW3jfoU3ntNzHUY8gCpTSh8DVkbtQ=
 =NlpZ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.17

This introduces RPM power-domain support for the SM8450, SM6125 and
QCM2290 platforms. It them clean up the platform-based naming of the
resources definitions throughout the RPMh PD driver.

The last-level cache controller driver gains SM8350 support.

The RPM sleep stats driver gains support for several older systems that
had a slightly different memory layout for this information.

The socinfo gains SM8450, SM6350 and SM7227 definitions.

In addition to the DeviceTree binding updates related to these changes
new compatibles was added to describe the SM8450 and the Kryo 780 CPU.

Lastly a few typo and style fixes are introduced.

* tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...

Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 13:42:52 +01:00
Jason Wang e395f021cc soc: qcom: rpmh-rsc: Fix typo in a comment
The double `for' in the comment in line 694 is repeated. Remove one
of them from the comment.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211211090626.248801-1-wangborong@cdjrlc.com
2021-12-20 19:10:11 -06:00
Luca Weiss d39cec003a soc: qcom: socinfo: Add SM6350 and SM7225
Both SoCs are known as 'lagoon' downstream. Add their ids to the socinfo
driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213081111.20217-1-luca.weiss@fairphone.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 90c74c1c25 soc: qcom: rpmhpd: Sort power-domain definitions and lists
Sort all power-domain defines and the SoC specific lists in
alphabetical order for better readability.
No functional changes.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-5-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 7d6a0a4dcf soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
The requirement to specify the active + sleep and active-only MX
power-domains as the parents of the corresponding CX power domains is
not applicable on sc7280. Fix it by using the cx/cx_ao structs for
sc7280 instead of the _w_mx_parent ones.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-4-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 09bb67c104 soc: qcom: rpmhpd: Rename rpmhpd struct names
The rpmhpd structs were named with a SoC-name prefix, but then
they got reused across multiple SoC families making things confusing.
Rename all the struct names to remove SoC-name prefixes.
While we do this we end up with some power-domains without parents,
and some with and at times different parents across SoCs.
use a _w_<parent-name>_parent suffix for such cases.
No functional change as part of this patch.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-3-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 84e3b09292 soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
sm8450_cx and sm8450_cx_ao should be peers of each other, add the
missing .peer entry for sm8450_cx_ao

Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-2-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Dmitry Baryshkov 9e4cdb4ca7 soc: qcom: socinfo: add SM8450 ID
Add the ID for the Qualcomm SM8450 SoC.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-8-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Dmitry Baryshkov 5d12289516 soc: qcom: rpmhpd: Add SM8450 power domains
Add the power domains exposed by RPMH in the Qualcomm SM8450 platform.
Unlike previous generations CX domain is not a child of MX domain.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-7-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Dmitry Baryshkov aa9fc2c7e5 soc: qcom: smem: Update max processor count
Update max processor count to reflect the number of co-processors on
SM8450 SoCs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-5-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Martin Botka 82c6bf7585 soc: qcom: rpmpd: Add support for sm6125
Add RPM power domains located in Qualcomm SM6125
SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-2-martin.botka@somainline.org
2021-12-20 19:10:10 -06:00
Rikard Falkeborn 3925b909f7 soc: qcom: aoss: constify static struct thermal_cooling_device_ops
The only usage of qmp_cooling_device_ops is to pass its address to
devm_thermal_of_cooling_device_register() which takes a pointer to const
struct thermal_cooling_device_ops as argument. Make it const to allow
the compiler to put it in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211128210317.25504-1-rikard.falkeborn@gmail.com
2021-12-20 19:10:10 -06:00
Changcheng Deng 92c550f9ff PM: AVS: qcom-cpr: Use div64_ul instead of do_div
do_div() does a 64-by-32 division. Here the divisor is an unsigned long
which on some platforms is 64 bit wide. So use div64_ul instead of do_div
to avoid a possible truncation.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211125014311.45942-1-deng.changcheng@zte.com.cn
2021-12-20 19:10:09 -06:00
Konrad Dybcio 6fc61c39ee soc: qcom: llcc: Add configuration data for SM8350
Add LLCC configuration data for SM8350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org
2021-12-20 19:10:09 -06:00
Stephan Gerhold 708dbf4490 soc: qcom: stats: Add fixed sleep stats offset for older RPM firmwares
Not all RPM firmware versions have the dynamic sleep stats offset
available. Most older versions use a fixed offset of 0xdba0.
Add support for this using new SoC-specific compatibles for APQ8084,
MSM8226, MSM8916 and MSM8974.

Even older SoCs seem to use a different offset and stats format.
If needed those could be supported in the future by adding separate
compatibles for those with a different stats_config.

Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211119213953.31970-3-stephan@gerhold.net
2021-12-20 19:10:09 -06:00
Arnd Bergmann 9593bdfa1d Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
 2. Exynos PMU: add Exynos850 support.
 3. Minor bindings cleanup.
 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
    a shared IP block between I2C, UART/serial and SPI. Basically one has
    to choose which feature the USI block will support and later the
    regular I2C/serial/SPI driver will bind and work.
    This merges also one commit with dt-binding headers from my dts64
    pull request.
 
    Together with a future serial driver change, this will break the ABI.
 
    Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
 
    Why: To properly and efficiently support the USI with new hierarchy
    of USI-{serial,SPI,I2C} devicetree nodes.
 
    Rationale:
    Recently added serial and USI support was short-sighted and did not
    allow to smooth support of other features (SPI and I2C). Adding
    support for USI-SPI and USI-I2C would effect in code duplication.
    Adding support for different USI versions (currently supported is
    USIv2 but support for v1 is planned) would cause even more code
    duplication and create a solution difficult to maintain.
    Since USI-serial and ExynosAutov9 have been added recently, are
    considered fresh development features and there are no supported
    products using them, the code/solution is being refactored in
    non-backwards compatible way.  The compatibility is not broken yet.
    It will be when serial driver changes are accepted.
    The ABI break was discussed with only known users of ExynosAutov9 and
    received their permission.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAa1EQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+/HEACSadLl5gVkHa2IDfnG5q8b0rWK2/qLNsKR
 YTLDB3XnLWMEZs7TMDqT6OtTKaQSJOlUAVKL5ZkZ9W0DNcG0mWcMdIPJ2HH8nv9Q
 oVwJnOpDVFRal/zligg6JO1Rwly9ZFJryg5o1k3Ii979wzRf5v4Wu/d7PdVQ53VB
 tmeL2tCE9Cf3LlnGi1Pnjcr9c/Jab62XFTXb/Hp62tXhtfCysVktaVLilTEnVP6D
 VJm842bLVLLGYmerUe7XvnmL7cpN07VzCCXl8QtiXQ92Sgf4hSLmn7CcwyfkVl0O
 vEhK8CrHgx4TenDUnF6DGec/64H+1f26BN0APbJWwoLX7jt595yZspmGhsHL6gmE
 lLNnl0mey5ExuNJTlEXpt4DJNjElA7s6C6kizoFwtIsdJWpnxLM+TB9CuqG2rS0o
 nRqEX1uIEYYIx4y3LK334Sctwnh0J90J40LrOzRNII2fwDa5THsckudgxCitUi+0
 xeX8NelVCAZrrzVWydCrDim7cT/VHPE1BC97vcVcViFFFjJt1clwn+gajGz7ffrt
 zm+XjubkaGWr81GivQK+axmZhg78229RjY2TYjFiDy7sPUnbDpT3JRxLv1Nh/xh8
 7nrzZoy0sZTdJ4j4n1+UkykoOzWJ96GifqIlqZBPOIHhVC0zSgGQFrQ8hKF1fdWb
 2BqdvGErUg==
 =2Ed8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlD4ACgkQmmx57+YA
 GNndpw//awblW/2vJ2hayxPCwQknzNXeEHn2jSQJ8j92Ep+Z90oyeiA7woPBepl2
 QxgLJlNRt7GGbLEH3R0wpx0kg5w4ZroHG1dyUxPfF/EFfnHpuCLNuUFnj8Cl/fPw
 14o2VLI7NBZFxK4pZYlrTX0QUWEnDET6G/LO3IL+/YelU8aBQZVBfb9Hvj9OnI1h
 juIPrfwaUNbl37HwfQU5FftQYJnOcy0EBiSOaqPoYpyIHguxU1QZ5mZy5M0iytGV
 HZFFYOfAs2l7kD+CVchtnGeIyWUinW7d4hRTS4qi4QP51pnaAefFnxHLKz9RwgMf
 FCKZUax4/t7ifDu9b2sqiT8htToY8/xpoHyi2YjQTvyM3vOTi2OLWtWbLv4fnybi
 L1MCAogcG/GCcTYECyGjSnfFV5c5CYIWEPqCJ50x4odj288OGSvtEZ2Q27j/HCvk
 dlhrAQyL+fIWt+U7LM9FnJRSwgD1fplvtXncuVl7J3oA8uXYZg5tw6LIFBkxQTMG
 Qypc5nxVtZK3Qz1Q59Q9zzZTE0amHr0m2uYGS6JOnIG6sbeApSLlxSW4+NMOLSMx
 BOfSZa1etm1TBx3fI0O0HjUb4MOnUwDoWrUrV5MkJohFtqvAoQMQejtjt11+ffGn
 SOTLAGE2VDTzCkAJs3gSLsESq6uB0wQFUiT68CyrR4ify61qZSs=
 =pxdx
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.17

1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
   a shared IP block between I2C, UART/serial and SPI. Basically one has
   to choose which feature the USI block will support and later the
   regular I2C/serial/SPI driver will bind and work.
   This merges also one commit with dt-binding headers from my dts64
   pull request.

   Together with a future serial driver change, this will break the ABI.

   Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards

   Why: To properly and efficiently support the USI with new hierarchy
   of USI-{serial,SPI,I2C} devicetree nodes.

   Rationale:
   Recently added serial and USI support was short-sighted and did not
   allow to smooth support of other features (SPI and I2C). Adding
   support for USI-SPI and USI-I2C would effect in code duplication.
   Adding support for different USI versions (currently supported is
   USIv2 but support for v1 is planned) would cause even more code
   duplication and create a solution difficult to maintain.
   Since USI-serial and ExynosAutov9 have been added recently, are
   considered fresh development features and there are no supported
   products using them, the code/solution is being refactored in
   non-backwards compatible way.  The compatibility is not broken yet.
   It will be when serial driver changes are accepted.
   The ABI break was discussed with only known users of ExynosAutov9 and
   received their permission.

* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: soc: samsung: keep SoC driver bindings together
  soc: samsung: Add USI driver
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: exynos-pmu: Add Exynos850 support
  dt-bindings: samsung: pmu: Document Exynos850
  soc: samsung: exynos-chipid: add Exynos7885 SoC support
  soc: samsung: exynos-chipid: describe which SoCs go with compatibles

Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:33:34 +01:00
Arnd Bergmann 87e1287614 i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
   to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
   i.MX8MN display related domain support.
 - Add optional continuous burst clock support for imx-weim bus driver.
 - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
   gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
   MIX domain.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9dygUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7+jwgAle7/Po7Qs0JVrUwkJOWAjNxveXjv
 keEC5o+svPOLIToX1lA+bY2CKlok2n6IIiEkpbgc+C+prTip0zJnJUFFHxuOeMkl
 +/EWTthCAddLwXCdmU6c5HSw8XJ9rkH3YDvd46GkPnZuUiZVVmTYkuZQ25qCbPpE
 f1kCg2RNVruZAOYHmMsoU+WMH3q40dvGSDVXbcHpNZ19qHooUyk/4jcXGlBJKXDo
 iGosWLdqMy0vbK4cWFzorPFyTpaF1qq/o7AppfexT1h0f6aLnuKnBA5JXY4y4bvd
 e+6EZ0VwvtdZBqMNaZLHqltCVA/Y0q2gXGryKUM6n7mGdv/LYictLHPudA==
 =WKrF
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAjj4ACgkQmmx57+YA
 GNlesQ/9HT8YKAUTsFRYbzKaK0tduZX9eFS8kIF6NlhTqD5IIYhwG4zZGhezRBdM
 Xt1DztCKqI5/okIn5mtHa/nPOoXd8mElivqt+z/rNIvdB+QkeVbCAOQvHUXeNS1F
 +sy8PTHLLGZNOGWGzKB4bFtJnc6yawwjz4EukG59cnC+AUePdo3DTT7Xnhf45j+j
 SSYdG2wgcQ5OW9okKov+AcoupFosrC3Zcuswf2lPcxOfZY0x6yalXXfmerRUZR+g
 JKTA3bFVLBG2o7nHcJp9ePh0K03+SfaaT5sSAbFm1DxL4hhtcPQJ2uq7I1kVBWKh
 8gBAy5Q+dNNZI/OQxM5TGB3EiQ20qBEdkxDxW2bUwAuG+Qyazgv5gRp5doU7FQnP
 Kl2f3TkM6/KRJNT3RytesTBSynisC9b4BuzpgFtfCBjK4/LEZSzSG07KHhP+k3pT
 b0FWQlw9+Rvj/stChWZgVRC6G3ALi7NYf5NLrGhsKjEdrAYBHwoh8OniwI4NyqdK
 14qWkPb9ctvh6J1IGQ7c2qG+iXSMc9oogG7dmb9Vas2RI/tMeEOJSWdmEY6TZbSP
 40e3Wews2RlU+lT8291Kuq2Dyj0YbK7dZ38ymy9cVHKvixr5QUEHxkJzICcDPqPQ
 rLdy/VwoSSDqkgNGcdXDdestnEXK7xvhgl/u3zT5RkcxfYxA3Q0=
 =74GG
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.17:

- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
  to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
  i.MX8MN display related domain support.
- Add optional continuous burst clock support for imx-weim bus driver.
- Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
  gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
  MIX domain.

* tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
  dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
  soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
  soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
  bus: imx-weim: optionally enable continuous burst clock
  soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
  soc: imx: gpcv2: Synchronously suspend MIX domains

Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:07:58 +01:00
Arnd Bergmann b118863d2f soc/tegra: Changes for v5.17-rc1
This set of changes contains some preparatory work that is shared by
 several branches and trees to support DVFS via power domains.
 
 There's also a bit of cleanup and improvements to reboot on chips that
 use PSCI.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sGYTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zocR8EACMoED5WAU1C+No9Bd9c7h2iru4LhUg
 wnobzGX0ZOPn/O3873rBqIiZDrJoVDJvqbh761pt35BigqJrAcegQaoMgBsvTl11
 SAg6EpaQ2a/O7bPRj7V58XjxjlhoK+638PAuk7mzIDPibpnfZaNdJgI59/BEVVCd
 BQ7452z3LnPh9cFzCeqCMhvoJ2kTNgJvjGZ/EfOJE+tocwT+Fx83zzfM1kyflRr3
 2yBJwSi3k/D5KK38OT+uPvHqduqsci/aTel2AlLtNvFJ2iPg7ax3G6ak2MHgq/ac
 noYL1kIiCBx3QQ3npiBKGnq2D1JBzX2mbbJxZrcGYZDW3D+2z1xPPtGNGCPiRMYQ
 DSnR3AoRegKQZn6Jy+b44kLn0NhrI58qR/PXCzpggl+yCnIAAaBObr+bSYYxlr/u
 sO189kVg1IYIILime9a5nxUvYalWSgXB/sUqQXjfJIMsDAHYmws3QqNw7Z628wxx
 2ddWSKGrjkq+n3z0uR8xiQTdTGqeagYK+2yE4aVTfv65lsjBIlU75FhgsJUaGpBL
 5Y2sSGB6ysPdxtoH0ol+vckZq3tSyZbqgoty5dOOHoEm+YeBSyXjaZwYTaLYIgd+
 cUNKEsOBul1ZbT/ca2pEt+yTrKGrYgI7maa5ocwEYrvp4QFkHcNts5UmEwp+22pQ
 8JqmzeJH92E4LA==
 =f+T3
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAh0oACgkQmmx57+YA
 GNkwHhAAo+oITzjXFoHwCw97u6xOv9CxH6OFRSz2kbxBGHtniGx/lg7cxTIif4HX
 4bnvUv3nQqoRMJ2hlGXp0QCjfXVTJXnk3Nduf74aEN2fkclFuR/PBOl4py0imubs
 9ZVXpSSB4VSpXrtujAnlhO4nEEiFR0rXSTcJbUz3hqjVgatRm9pAGZmU0u5x/K0M
 idM46H+dDInWb53n/eJaj+GHoAJ18+yH62ck1OJqGSitaAfalGMFKRFHIqu8K95q
 ifadcrbFJo0711KKPRwgQPVgB1j7zFOjkaHDR7CjrsToRSVWbFwCgC6+nVg5X74h
 /wjvKq61pNvK7HavYIXWeUCzDqGbH404OjaksIYSw2Te2mJTOA0qOqh0edi6w6Y2
 kVUcnqM5zt/TYaXsZdlxX1lTItAOQiV0yEuq/zPYBJ0ecgvhKOR0GHUseVsfVPrz
 NxEZGEAgkSrHbSITd1arPgOuvL9FwlqsmWi6ZV6n+o/hiYlz9G2YoHK2tcaKd8wX
 FqmgtKOPnoYg3h+7PoSahNLWEbEZEt8v6w6ezERm9U+ntl/sYISk1OCwwHCyqpfP
 hA7J9GlK3f2aYmE0eT828bov1PIFudpdgL0HFadEAKdpfn3G0kYf0wQ2UZ6J+XrW
 ZbcWhPzSTjKIDLWyrbRYu5Zo7I8uBVAA/eFopMRGbbn27ZgjrsM=
 =gToI
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.17-rc1

This set of changes contains some preparatory work that is shared by
several branches and trees to support DVFS via power domains.

There's also a bit of cleanup and improvements to reboot on chips that
use PSCI.

* tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Rename core power domain
  soc/tegra: pmc: Rename 3d power domains
  soc/tegra: regulators: Prepare for suspend
  soc/tegra: fuse: Use resource-managed helpers
  soc/tegra: fuse: Reset hardware
  soc/tegra: pmc: Add reboot notifier
  soc/tegra: Don't print error message when OPPs not available

Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 14:38:18 +01:00
Arnd Bergmann a1539b2e26 drivers: Changes for v5.17-rc1
This is an assortment of driver patches that rely on some of the changes
 in the for-5.17/soc branch. These have all been acked by the respective
 maintainers and go through the Tegra tree to more easily handle the
 build dependency.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sMMTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZo+EACQhJAgO3Qo/Xaxcyh5qRBAgYKCwGSR
 eJcuaEcinYFomXUfRb57SycZDVNTFRXnbr/2SbvNlOLVrf7gRVkan/2rdCHlc27n
 BNDjiCx4c0oD1crnhJriM57ILUYqRNB0YWjnfsv3oOl+ZNkzNdIHmM8hxwEY6+5U
 Mc2Qj7WADZe0I+dFahyvDyfgBiPuPmamK1tWeJoeXOWNhgY51NFIgvGvp6IPCJFN
 NVWkhm+YB93e5t5KZMNEETqNx63Ep0k31tP6LPkqKDoScpFkSZLTq5Icx92Kr6Vk
 e+nSJn8sdsoym2VOHl33Cx7WXIHu+crmM7y/I+BNvgafigOd6LhzA2EnzMDyPHCo
 8ngd2x7vvy/CPaI45yczvPyyyptZGYPO2G9PmpFsT8ydPbMOzx0igQ3mtF8cZaeN
 izkcSvxRczCjN9rVhybghxktAmQihlGJLYB67sDoplLlc5QAJjH8kKSQcaLDmyAu
 /xgxwssSjWRtVacT7Ro5h8BYD6pmnlH9XmHCYprUQRdd446MWSl56bdw4iZXkpCM
 UdLnsgjHHNN41d8cKSU97KLxG2ynnPRF2mqxRDEXa8OWQfK/6H6spCkLqPgo572T
 N+AezZ2hqljuO0AGeixx+bExQLbqKt8becQP6CqynT9xZVkk+b2iYCTGKA04gb1l
 tpxRe5X1Sracow==
 =YfSG
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAbq4ACgkQmmx57+YA
 GNncmhAAgYwqoRCobfEDxMm+4zjFoimuZWynahKG0c/t7GcFfBQVIh4uLmTLd0bm
 8sjGW7R9BcNRtbI5ZX2buN5LpZ5qDk/HAoNA+QhgWwHuLS4/FHx2bOnYOfvCWKdK
 elXfI8SaZ3l5DClasvt865niELpj95PHEN2Yr3CqOircgGApazN/GkrefNj3v+YL
 UqhDNW2XhUKjdKddBXH9n8SftHHdc9CP61c8zNUql7CikpzPAfh/ZjBuxqwF5NtZ
 C7XaH9uRVr6v/rWl7T5+YSSgXkZFBH/D6NWFg+VVVkZwoZJDHuPY0yv3JwBDxzQL
 F7WNWxT7fZrXBjFxVvQGLvP5kab4RV4nZAwkwalOZQ7EmtqpKmtwurOh/X8qGbmk
 IpqeprisWVeUuRQxS3vARMRr9Xvf4yRQ+Z0AIW0u/eadVrpboXvHKQZpxfviA8v2
 tITsOHVB8/3hFt7t6FGMdaQhnp8Nsk9WNUv8zDwpa5cNoItZST9t0sXh+XnBKJ7N
 5WH83w64N/fBuFs1/c4A3MUP+GX7V7p3IoJIQZYFLRokXz3meuw9fGjQJZWAb+Mv
 OiWjQS1rUAJl81hU1KWXDelHJ1vg8DMZu1MrLmw4PzgtFq8yy8HICxLuwZdcvDhR
 0A8/ue+5r++XtYAfj+euhrUvNVKYXa5M9Th7LtSeATjX5r0D4UU=
 =lWBt
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

drivers: Changes for v5.17-rc1

This is an assortment of driver patches that rely on some of the changes
in the for-5.17/soc branch. These have all been acked by the respective
maintainers and go through the Tegra tree to more easily handle the
build dependency.

* tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  media: staging: tegra-vde: Support generic power domain
  spi: tegra20-slink: Add OPP support
  mtd: rawnand: tegra: Add runtime PM and OPP support
  mmc: sdhci-tegra: Add runtime PM and OPP support
  pwm: tegra: Add runtime PM and OPP support
  bus: tegra-gmi: Add runtime PM and OPP support
  usb: chipidea: tegra: Add runtime PM and OPP support
  soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()
  soc/tegra: Enable runtime PM during OPP state-syncing

Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 12:53:18 +01:00
Arnd Bergmann 4f34ebadff SoC: Keystone driver update for v5.17
* k3-socinfo: Add entry for J721S2 SoC family
 * Misc fixups for tisci, pruss, knav_dma
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmG8r3kACgkQ3bWEnRc2
 JJ27pBAAhRpxzVxKCWzZWl+8A2L6ew0xC2qzzrM/wYBOMFSGG+1tHMcpJHLmc+bl
 xPB96MIAl6i1FNelCmAxKeGi1KxVRvVv2O1loz/GxDtFvB8GKmslXbH7L+sGpvdF
 PS9UKhZA7I5E7vNLEqeYAG601mRKDHWXktWy4GK9XvL5HFhp5MXI/mkNzTYW/LH9
 ConyAZlbXgGwxWyas4ncOAlWi8GbFKzRi7uPsQAVRcd0aV6hSJNP380pMrliP6u1
 j6JbJrM0P9tiqdzyzOxd1oOzMfOHE24YmK1Io9Ik0sqK0nC+ehStHAszGF92ltOK
 2+TRl7lVx9ru2QZsOiPUsP0CKhy5igx8lhJt9onKLnPuJVcTm4mUZmM/LH3UB3CU
 9n38dtgqHwvC2C/qUCz0VuW36U3rs0TPGrbK6pEHeXlGafBavz8UoB1U3Xc5YVsl
 ZZAnkXnmu/Xd0t9ECYHdbPcRnOvznVpGdcE+Um3qrBXV5HeJeglXJDjezpSpWy7G
 CwXDTONbztTpxEqAKgMbQlST85GLylrq7c2L6OldPaOBZSqTXUIGBy1CgLbbyyW+
 v+u0Lu6gfTWcuHpps+ZxIs4Ah08lQR/cxZzKnu80CVH18cw/+xJmhxIw3dLLEo3t
 VI+sgkl47B6oiCqwk3g+zVhDD3uCRjhWsKkSXU6u/F1t/dhmBAk=
 =Pj7u
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAbjcACgkQmmx57+YA
 GNmgPg/+KtLblMDw83YyLKWklLOvetTOrFYR9ekrLAbOTBQ67TMnsA0N0gsKp0E5
 8ilpkrPMk8EsqNeA0u6raCjlW23tROl61i4RfHcNxBSSKOUYA3Twg+zM7jnMej6R
 7KYgiVD9Rt8gM3Iz5PLlLY2ifYOQXreYmyaG1JpOhkzmf4+kZdnDHdPyDQmDTQ7i
 MdjUGSL2om8ZsW7OZdrpdB49mq+WMohsEAS2kOHRWBF6d9wbDdSNW9efirdUkLOD
 es43t50ECYNMHRD6OKPab8vtOImHuHC/a/Adz5hXNF/6NgYTmr3Vj3dt82l7nNQK
 85mwOFApm7CqMIKvShDLhAWT3X++Ohli9uHI9wOOpcysYd1zuO0Mlx2ngJggLYFi
 2wWEbMpbiQ+J8Js9O13d7iSbi2t7XsOAlWgmo4iZSFK28b/C0/WwSopdyp+w7MPl
 iOE/nq8Wmr6umlKFJEWJGIMnSs4cUxmF6DoAm/dxbwMpJVfnROhdmFmfiaVZFwjR
 YzYoLcsgXucuhEcpYez72CPWSYfJOWva41Rl07Z1/wVixV4jmYg6xk+bzRz6Ph4B
 OBsBTxC/0xLiDejvfAx/SChA79nutFlr6ZXY2dcCeT+AOmDm4OwL/oUl2B7OFTun
 iQUmfJm3MtYJT1/OiTtkFOQVy/ov9zasdAWQVovGzFkKZMihZug=
 =L6uq
 -----END PGP SIGNATURE-----

Merge tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers

SoC: Keystone driver update for v5.17

* k3-socinfo: Add entry for J721S2 SoC family
* Misc fixups for tisci, pruss, knav_dma

* tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
  soc: ti: k3-socinfo: Add entry for J721S2 SoC family
  firmware: ti_sci: rm: remove unneeded semicolon
  soc: ti: pruss: fix referenced node in error message

Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 12:51:19 +01:00
Sam Protsenko b603377e40 soc: samsung: Add USI driver
USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.

Before starting to use a particular protocol, USIv2 must be configured
properly:
  1. Select protocol to be used via System Register
  2. Clear "reset" flag in USI_CON
  3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
     disabled, so that the IP clock is not gated automatically); this is
     done using USI_OPTION register
  4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
     modification

This driver implements the above behavior. Of course, USIv2 driver
should be probed before UART/I2C/SPI drivers. It can be achieved by
embedding UART/I2C/SPI nodes inside of the USI node (in Device Tree);
driver then walks underlying nodes and instantiates those. Driver also
handles USI configuration on PM resume, as register contents can be lost
during CPU suspend.

This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211204195757.8600-3-semen.protsenko@linaro.org
Tested-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-18 11:55:56 +01:00
Arnd Bergmann 5a17799462 Renesas driver updates for v5.17 (take two)
- Core support for the R-Car S4-8 (R8A779F0) SoC, including System
     Controller (SYSC) and Reset (RST) support.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYbxiYAAKCRCKwlD9ZEnx
 cB4xAQDNnQrCcjTjh6NI89xqCG/ht3FP+wn2zh2cObM2wA5Q/wD9Gm8eH+8B4vMF
 WPIK7b/Mnnr48gCqY35VgB7dPRjeQwU=
 =OJ8f
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG8pYkACgkQmmx57+YA
 GNklKxAAkBX5Tq9YHtcaAvLt23sX7XrS9rsyT9LO4vhDZxbpW7rwL2X5bLorehvn
 1i2taxbHddV+FaVZT4lSAGLg9V3rL+g3rkV8M5kkHGK7O6AJfmsZe6c6Vo7OdPfy
 pv5psn8BRpCluPA8pI04jCMBatCCtSLOHeLSmkM40IcypTGQfJhR6I66cElzInNV
 Cm5ZFXnuisHp+tJFh+Be0QH+oBDhmgXJO2x6kR+q1IVD+GyiSyryfB7bXMLUMSJv
 VCGT0Bsdxe0BBPXimk/0onbdqN4eJDgwe4VSspouYowN1euibpjkay29EA9MJexr
 cROQx7xdY37rHLEQbc2fDKdLQ67KFxz6D1COe7PGdhm5T4CZliP9YDMhwR7DPyQG
 PPbnCvwVjfTzEkUUcLPUoChxUpzbenzqKjGIq5xyfaEqN00ANeGHIwdijnhxpesn
 O61j6V+VifS4+M/qaH8cJdV4pfzGtUGhDnJEkuY7KaLpaw/Mh7b6BSmtuXI7xPzd
 L+7PzcxVWNRJe8JPXsgslRuXfM5984W2vxlDODjibjol75pW3rz/5nxXGvOq+5gC
 ZR4gKbPuBG0RJBhcZ4JFmOydynfUt+MlOaWagg5SBKJ4VysoCZuChtod3k2gfdlM
 lJtbPZNiuBtUR4j9n0ZO9wbssKxrtVJmjAGkr7jHVPxJD6fYKvM=
 =SlDh
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.17 (take two)

  - Core support for the R-Car S4-8 (R8A779F0) SoC, including System
    Controller (SYSC) and Reset (RST) support.

* tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-rst: Add support for R-Car S4-8
  soc: renesas: Identify R-Car S4-8
  soc: renesas: r8a779f0-sysc: Add r8a779f0 support
  soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions

Link: https://lore.kernel.org/r/cover.1639736722.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17 15:58:17 +01:00
Adam Ford 7f511d514e soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
This adds the description for the i.MX8MN disp blk-ctrl.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:20 +08:00
Adam Ford a0ec8a3a4c soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
The dispmix will be needed for the blkctl driver, so add it
to the gpcv2.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:09 +08:00
Adam Ford e2a6d22f3b soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
Like the i.MX8MM, keep the gpumix clocks running when the
domain is active.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:03 +08:00
Thomas Gleixner 7ad321a5ea soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
The function has no users and is pointless now that the core frees the MSI
descriptors, which means potential users can just use msi_domain_free_irqs().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de
2021-12-16 22:22:19 +01:00
Thomas Gleixner 49fbfdc222 soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation
Protect the allocation properly and use the core allocation and free
mechanism.

No functional change intended.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211206210748.737904583@linutronix.de
2021-12-16 22:22:19 +01:00
Thomas Gleixner 89e0032ec2 soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq()
Just use the core function msi_get_virq().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de
2021-12-16 22:16:41 +01:00
Thomas Gleixner d86a6d47bc bus: fsl-mc: fsl-mc-allocator: Rework MSI handling
Storing a pointer to the MSI descriptor just to track the Linux interrupt
number is daft. Just store the interrupt number and be done with it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211210221815.207838579@linutronix.de
2021-12-16 22:16:41 +01:00
Thomas Gleixner 0f18095871 soc: ti: ti_sci_inta_msi: Use msi_desc::msi_index
Use the common msi_index member and get rid of the pointless wrapper struct.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221814.540704224@linutronix.de
2021-12-16 22:16:40 +01:00
Thomas Gleixner 686073e9f8 soc: ti: ti_sci_inta_msi: Allocate MSI device data on first use
Allocate the MSI device data on first invocation of the allocation function.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221813.928842960@linutronix.de
2021-12-16 22:16:39 +01:00
Thomas Gleixner 34fff62827 device: Move MSI related data into a struct
The only unconditional part of MSI data in struct device is the irqdomain
pointer. Everything else can be allocated on demand. Create a data
structure and move the irqdomain pointer into it. The other MSI specific
parts are going to be removed from struct device in later steps.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20211210221813.617178827@linutronix.de
2021-12-16 22:16:38 +01:00
Arnd Bergmann 4bc73b7d48 soc/tegra: Fixes for v5.16-rc6
This contains a single build fix without which ARM allmodconfig builds
 are broken if -Werror is enabled.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG6FjoTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZm3D/4+KE1PLGuttpYScsRPfir5MYzf3MTG
 Xl3ihkHWKGcoCpBE0vHGqYZXkQGorahsi3CckZy84yvqKFo15HjYxDS8Tn5liTEc
 YmaEvHt5wlmv9VfhCssEFLM6vSE/5n4p0f+y+pzg0HLK+1E1iMGE+gCGDUPrUY4x
 L+WIVaosCXwYZgqt/+tYKE4wUyul1aZBUDsuuTg70uxPKtHGomI/U+Q8mAs4jW+S
 kAVkSrJijaXsMpUX0s6GMaKcu8yNUabcOYUE62w5jm38F2QIdGrM+00soBIEMh68
 4dRH1qEX5G77nh1BFwE9xQ0FOAWErdE8kiYfUp11GWT00fKlIe+vA5ikNcAby6sU
 1p+Y59ocLCzGxSJzyigcXr2xLKh50NR17qTh87oGCI4yyEDGxzuzt4sCMIW0AbMW
 hChBv2njnsPK8eqnmD97J8S3uYSazkewkiplhvP9jA6qSIQcqdKRbeOPAAnQCQ/3
 Lle0UpEAbH9oKEUU6eHroHs4bxYyxuK1xBLLZu7x7mPuTeHPtVsdeDMOxbPRQRe5
 edDRSkKsM3sguAhAqMjgE1aHH9xwm1vpSsECqnXvfwNCjiup1ulKHG1AYYZEcqcb
 h2Njv6CBv4gyS+g9AoGVcUZsu7XJf9xfka2A8FEiY/2UhUnSJcYxE1RkiKrya6uT
 B7rZ5J1sgzhqtg==
 =bWVy
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG7RvIACgkQmmx57+YA
 GNmhNBAAtueP175g6Wwp/UQLOXaw9CoP6GfD/TkfSTGaYPomE/RAQILpblDuQabS
 7UZZe7Zz1g1CfZd5ABvFuxtppNB+W4yzNW7kWhNbr6FSm+rXxvSnGicPLo5cU6zx
 OmnK4LEp6OdXOdPoQR26ogQTsfIEcQun/1FrFJYgW0mhMhPYfi1MfnKZWDUEIArH
 eZ5XbE4429C/neeEi3OTS3PK5FIj2wUTkceBTNreZe/nhQILVCTPFSwrK4V8FMsK
 bq6OJzkbCVQlSXiHJsF7TrF+CezOR0Mu0gsK3Iygcqw8FgWdrtVqotnr04+LXyzD
 nOo3WWtHNx88hGLt3/LEQ40hQuAKQ0/bFcHj+RGcurQbm03LLjcGoMwGA0WYu4GF
 novIV6xHwCS3MWS1nvcaEh76t8qzcGnlboKVdpOa5wWbWPlGtJ3pM/fbLVGFOi/f
 M6zat3f+FCfY9SBIGOpw4xni/a7vEmzRKJ4C1eFbtndT2pphBxr5iHSQF5ozVfjZ
 Z8MxDeUxEjQYmbTPjDHvLqp4eXsNhbXtZ9LVYST1Vg2sP/VnT1CbGL7KiPu20E3w
 oHxbTBaEuH44axK8sSBvBMvmb4uJgpa/uI+LrIddIIigej8ZE0s1fN8wn/sT7c4y
 ufkR/l7Ik6snylHvUW3OWSsKZmvGzqvlhOOL8+tLApjNqNEOT6Y=
 =2ABQ
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.16-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes

soc/tegra: Fixes for v5.16-rc6

This contains a single build fix without which ARM allmodconfig builds
are broken if -Werror is enabled.

* tag 'tegra-for-5.16-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix bitwise vs. logical OR warning

Link: https://lore.kernel.org/r/20211215162618.3568474-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-16 15:02:26 +01:00
Dmitry Osipenko 81c4c86c66 soc/tegra: pmc: Rename core power domain
CORE power domain uses name of device-tree node, which is inconsistent with
the names of PMC domains. Set the name to "core" to make it consistent.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 8d1a3411da soc/tegra: pmc: Rename 3d power domains
Device-tree schema doesn't allow domain name to start with a number.
We don't use 3d domain yet in device-trees, so rename it to the name
used by Tegra TRMs: TD, TD2.

Reported-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 006da96c84 soc/tegra: Enable runtime PM during OPP state-syncing
GENPD core now can set up domain's performance state properly while device
is RPM-suspended. Runtime PM of a device must be enabled during setup
because GENPD checks whether device is suspended and check doesn't work
while RPM is disabled. Instead of replicating the boilerplate RPM-enable
code around OPP helper for each driver, let's make OPP helper to take care
of enabling it.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 80ef351c98 soc/tegra: regulators: Prepare for suspend
Depending on hardware version, Tegra SoC may require a higher voltages
during resume from system suspend, otherwise hardware will crash. Set
SoC voltages to a nominal levels during suspend.

Link: https://lore.kernel.org/all/a8280b5b-7347-8995-c97b-10b798cdf057@gmail.com/
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 88724b78a8 soc/tegra: fuse: Use resource-managed helpers
Use resource-managed helpers to make code cleaner and more correct,
properly releasing all resources in case of driver probe error.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko aeecc50ace soc/tegra: fuse: Reset hardware
The FUSE controller is enabled at a boot time. Reset it in order to put
hardware and clock into clean and disabled state.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Jon Hunter 765d95f8ac soc/tegra: pmc: Add reboot notifier
The Tegra PMC driver implements a restart handler that supports Tegra
specific reboot commands such as placing the device into 'recovery' mode
in order to reprogram the platform. This is accomplished by setting the
appropriate bit in the PMC scratch0 register prior to rebooting the
platform.

For Tegra platforms that support PSCI or EFI, the default Tegra restart
handler is not called and the PSCI or EFI restart handler is called
instead. Hence, for Tegra platforms that support PSCI or EFI, the Tegra
specific reboot commands do not currently work. Fix this by moving the
code that programs the PMC scratch0 register into a separate reboot
notifier that will always be called on reboot.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 66209e6fbd soc/tegra: Don't print error message when OPPs not available
Previously we assumed that devm_tegra_core_dev_init_opp_table() will
be used only by drivers that will always have device with OPP table,
but this is not true anymore. For example now Tegra30 will have OPP table
for PWM, but Tegra20 not and both use the same driver. Hence let's not
print the error message about missing OPP table in the common helper,
we can print it elsewhere.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Miaoqian Lin 1bb0b8b195 soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
Since devm_ioremap_resource() function return error pointers.
The pktdma_get_regs() function does not return NULL, It return error
pointers too. Using IS_ERR() to check the return value to fix this.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211214015544.7270-1-linmq006@gmail.com
2021-12-16 06:34:07 -06:00
Nathan Chancellor a708376361 soc/tegra: fuse: Fix bitwise vs. logical OR warning
A new warning in clang points out two instances where boolean
expressions are being used with a bitwise OR instead of logical OR:

drivers/soc/tegra/fuse/speedo-tegra20.c:72:9: warning: use of bitwise '|' with boolean operands [-Wbitwise-instead-of-logical]
                reg = tegra_fuse_read_spare(i) |
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
                                               ||
drivers/soc/tegra/fuse/speedo-tegra20.c:72:9: note: cast one or both operands to int to silence this warning
drivers/soc/tegra/fuse/speedo-tegra20.c:87:9: warning: use of bitwise '|' with boolean operands [-Wbitwise-instead-of-logical]
                reg = tegra_fuse_read_spare(i) |
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
                                               ||
drivers/soc/tegra/fuse/speedo-tegra20.c:87:9: note: cast one or both operands to int to silence this warning
2 warnings generated.

The motivation for the warning is that logical operations short circuit
while bitwise operations do not.

In this instance, tegra_fuse_read_spare() is not semantically returning
a boolean, it is returning a bit value. Use u32 for its return type so
that it can be used with either bitwise or boolean operators without any
warnings.

Fixes: 25cd5a3914 ("ARM: tegra: Add speedo-based process identification")
Link: https://github.com/ClangBuiltLinux/linux/issues/1488
Suggested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15 17:19:06 +01:00
Arnd Bergmann d9bd3e9aca Apple SoC PMGR driver updates for 5.17
* Adds an auto-PM feature that is necessary for a single device
 * Disables module builds, which were broken anyway
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSU7I7lUkZru3Mt15+lhN6SrnTN2AUCYbnTUgAKCRClhN6SrnTN
 2B28AP9KqcASRLcJ8dHSv+ILmHQimW6/AeUuhuwkGjk9tRRFgQEAqDsHYL/hFlUe
 ayxR7RTLhlZUowdRHqzsAtI6mYyzEwE=
 =wksk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG6AngACgkQmmx57+YA
 GNkkChAAnU1lHryrPb23W7l0Tbm0niV3/7mXvPosLInoKWTff3PvvnZDX8F7azBR
 RTKrnERY3AWbh3n5ln+teKUT0QI90k9NfonZ/uFEYXeaQ374AntmyWUn7oY9GbuU
 0X/MbRbtjNi8Ug9qdHZlOAG5Kd+H3BktfXH+wTDlz/GULBcV5bk/jYoX2TkZrDAg
 3/wJGmd3FIyLXxGzABrE4+snJUP5tXwATGZjaCidMY8FbXxfHAe/IyK3UFHtFt8B
 7Qz/1nMVGtgVTboRou0QNz3hzyo0jKFVBeAfCokxjP7B+0Z2we/pFZMGAR/mvuw7
 4atuY6YiZwCsLEqH8VTzJiMt1vBLnHBaWKq6dBeBRJC7M2y6z3yagZdyHQEZeVj/
 /5QDb66/0BmkYiFnGaZUvv/ylKWfNPa099x7lBpCD+/2mK29IKoY0Xe5WzdwNBQ0
 1EyL5C0TgUL8/R+DgSxJWIpVffB4TsS1Npa3o9u/E+CgSocHgZaGYidvmO4viFCv
 sYrR4fISPdjwG57pkdYV9zwdvT4QmvLrVbsqxojp4JIpvB5dcIxhorno+AlbqXbB
 OCev6bqFV43SOdb878ePw9NzZZ9DXubi9G61zTZJAvVjOZuMAwcmMuxZYlQxL6ZS
 /JlaXZxQqfVU8GIZmFwGEWcXoqi2NOEnM5c4+hK+qWdONCW11Eg=
 =WaN0
 -----END PGP SIGNATURE-----

Merge tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux into arm/drivers

Apple SoC PMGR driver updates for 5.17

* Adds an auto-PM feature that is necessary for a single device
* Disables module builds, which were broken anyway

* tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux:
  soc: apple: apple-pmgr-pwrstate: Do not build as a module
  soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support

Link: https://lore.kernel.org/r/660f6f7f-0857-b54c-c415-79bcb93f0e02@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15 15:58:00 +01:00
Hector Martin 8e136c5ea4 soc: apple: apple-pmgr-pwrstate: Do not build as a module
This doesn't make any sense as a module since it is a critical device,
and it turns out of_phandle_iterator_args was not exported so the module
version doesn't build anyway.

Fixes: 6df9d38f91 ("soc: apple: Add driver for Apple PMGR power state controls")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15 20:36:05 +09:00
Arnd Bergmann 5213313b9a arm64: dts: ZynqMP SoC changes for v5.17
- cleanup and fix PM_INIT_FINALIZE
 - check return value of zynqmp_pm_get_api_version()
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYbCc4wAKCRDKSWXLKUoM
 Ic+dAJ9MMpTVSUA2Lb8CaZFsdn2q5F+pBgCfeqSdrADuTtDIUBNEoqqPACLIWKw=
 =sfDq
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG4aO8ACgkQmmx57+YA
 GNm8eg/+L5wTEcLSnnV4KjJIDS3EXAUQsX4gMeylKyPFGVcnpr7HUU2Qdcp7RCUo
 l+dzbWou49WbK9sWeCRG/4rmlAeWGWqSB7G5vi9awM24bpyrepNrjHWwUsR+HrUZ
 LGwiF/xKdpAUKRDU7Cf4GeeiRRuT01Wg6lTFClLizr1RMHLh+WW4UGFFrenWM1YX
 IT4gndS8N9xtkIgxIDC3DkNvJKlsatqIfLDFzGUJdbN3SpSbUSDR+JrGOQ8DKWcO
 kgaaeD2A7f7C5Vuw9RbBSGP6ERy6zHRI9ITft2d46QINGJim7gAoqOqkXrLxtubc
 fMTENk9/VYnRVMXbbJJOv4DvpPwaVXYLj3WCe1c05Mq87HLfgM0baBNyKtL0/W4X
 DSN4JA+EMtxYKcvW6BbH7bZrKhj5lEv45KYY2Tw6A4ZCuW4dger5YSLRk3eoMsJS
 9Y93EtlJedQczjzl002KBqBmeIl4JfJvROtBujKYiPvPYJeX6matjEGHJ54CffFx
 0dBK9jIGDEtuQ4XPXXvwEhn51yGLVXotC4O/5otHz8BdBaO650fjd26KlR4EDMUd
 UrYlkO3+TDF2ArtnqHbPw5J90MuPEFcTy0Mv7kvBXp7NH+MSNym+CCGMXSNwzInU
 B2aLykf+Z4SMt6wgkLOjtdSb898sY3qKp13Ly3v7nSGsCDwKTiA=
 =wMk/
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-v5.17' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: dts: ZynqMP SoC changes for v5.17

- cleanup and fix PM_INIT_FINALIZE
- check return value of zynqmp_pm_get_api_version()

* tag 'zynqmp-soc-for-v5.17' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: check return value of zynqmp_pm_get_api_version()
  soc: xilinx: add a to_zynqmp_pm_domain macro
  soc: xilinx: use a properly named field instead of flags
  soc: xilinx: cleanup debug and error messages
  soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver

Link: https://lore.kernel.org/r/48dec441-2c1f-73a0-3e6c-aa0d7be5ba26@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 10:50:38 +01:00
Arnd Bergmann 5b532920d7 Apple SoC PMGR driver for 5.17
Adds the new PMGR driver. This includes the driver only; DT and
 MAINTAINERS changes are part of the DT pull.
 
 Minor change from v3: added `depends on PM` to the Kconfig to
 fix COMPILE_TEST randconfig failures.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQSU7I7lUkZru3Mt15+lhN6SrnTN2AUCYa7f+wAKCRClhN6SrnTN
 2Bk7AP42vfTQXHQVxtCnvivhc6m+P4z6sULPTqOWN4oPPcudSQEAkAjUeC2IFdQ3
 4XovFzUZb7R8E7in7OpYxXyVAK5/eQY=
 =xoPm
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG4YSgACgkQmmx57+YA
 GNnhlBAApQWuzm72VJr4QXEO+fI5rfiNE3+OZmJa1EF8dWLrDJMgpPj/dRCB1GX7
 +ssYXySIq6kZ+XzKpW9GkBLefjlIgBSl2/Vf3jlojEBwiff2wgYG2gvVs4q0VguD
 kU2aNT4mSV8/d7mw/QvKBESYQ6IuZ0bqDYBd9OEOI6uayXskrCX3bjhFw4dgQ5Cs
 fdzW30v2ZRW14unBTIZW7ghx2vdhdW0AtJG9dOsTTHkzXTvr7fjCb/DzqnS431cf
 wPFeC6Io4irLk82pwyOUiUeEaztL8AoZrRMkFOgJmc1K4zFBO1IZfWm/PIVclrqJ
 VM61n1SRW7Q0Xb7OPJhNAfJBPCmYX8ezUr64rhG5VYZhrYx73wWUfmYQaovBZtnE
 /zome7Y/Q2Ya9WD2wxlFUcnf9H58TziinSzYD0cKk0cmI1IRFr4ppnyqFWwNiesq
 lyQH1ILiWHGC3fzfNaaKFLbN54E/Y8TQtjYM/mATUjAksq7UWSj+H5G6g2mdb3OP
 LiIiUy5NW37DrUrqzB/8p+YtRX2X3IKgRDiBDeGFbIw+bzz987gWDMWxb1520Q0e
 bkDWUrNLPWQOC/SLmo+bsdWVjSIlQvIr/pLqHvcX51bwLGo/JpkNyhHO0CMFYXxR
 SZO7uKp4d1IM2E/tZ/uwpSGkGpiZXRB9UcdiFyZ3k5KXMTjsP7A=
 =lrwu
 -----END PGP SIGNATURE-----

Merge tag 'asahi-soc-pmgr-5.17' of https://github.com/AsahiLinux/linux into arm/drivers

Apple SoC PMGR driver for 5.17

Adds the new PMGR driver. This includes the driver only; DT and
MAINTAINERS changes are part of the DT pull.

Minor change from v3: added `depends on PM` to the Kconfig to
fix COMPILE_TEST randconfig failures.

* tag 'asahi-soc-pmgr-5.17' of https://github.com/AsahiLinux/linux:
  soc: apple: Add driver for Apple PMGR power state controls

Link: https://lore.kernel.org/r/049f4de9-51be-7be4-1f9a-a59756af88d7@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 10:17:28 +01:00
Aswath Govindraju a34ff76a16 soc: ti: k3-socinfo: Add entry for J721S2 SoC family
J721S2 SoC's JTAG PARTNO is 0xBB75.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211203120913.14737-1-a-govindraju@ti.com
2021-12-13 09:46:29 -06:00
Hector Martin cc1fe1e54b soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support
This is seemingly required for DCP/DCPEXT, without which they refuse to
boot properly. They need to be set to minimum state 4 (clock gated).

Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-12 10:32:10 +09:00
Stephan Gerhold 4ebd29f916 soc: imx: Register SoC device only on i.MX boards
At the moment, using the ARM32 multi_v7_defconfig always results in two
SoCs being exposed in sysfs. This is wrong, as far as I'm aware the
Qualcomm DragonBoard 410c does not actually make use of a i.MX SoC. :)

  qcom-db410c:/sys/devices/soc0$ grep . *
  family:Freescale i.MX
  machine:Qualcomm Technologies, Inc. APQ 8016 SBC
  revision:0.0
  serial_number:0000000000000000
  soc_id:Unknown

  qcom-db410c:/sys/devices/soc1$ grep . *
  family:Snapdragon
  machine:APQ8016
  ...

This happens because imx_soc_device_init() registers the soc device
unconditionally, even when running on devices that do not make use of i.MX.
Arnd already reported this more than a year ago and even suggested a fix
similar to this commit, but for some reason it was never submitted.

Fix it by checking if the "__mxc_cpu_type" variable was actually
initialized by earlier platform code. On devices without i.MX it will
simply stay 0.

Cc: Peng Fan <peng.fan@nxp.com>
Fixes: d2199b3487 ("ARM: imx: use device_initcall for imx_soc_device_init")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/CAK8P3a0hxO1TmK6oOMQ70AHSWJnP_CAq57YMOutrxkSYNjFeuw@mail.gmail.com/
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-08 20:30:00 +08:00
Michael Tretter 628e8ba1d3 soc: xilinx: add a to_zynqmp_pm_domain macro
Replace container_of for converting a generic_pm_domain to a
zynqmp_pm_domain with a macro definition to simplify the code.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-5-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:36 +01:00
Michael Tretter e7a9106c32 soc: xilinx: use a properly named field instead of flags
Instead of defining a flags field and a single bit in this field to
signal that a PM node has been requested, use a boolean field with a
descriptive name.

No functional change, but using a proper name instead of flags makes the
code easier to read.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-4-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:36 +01:00
Michael Tretter c4245100f7 soc: xilinx: cleanup debug and error messages
Use dev_err/dev_dbg instead of pr_err/pr_debug.

Add the PM node ids to supplement the (arbitrary) power domain names to
include information which PM nodes are requested by the driver.

Drop function names from the messages, because they can easily be added
with dynamic debug.

Remove comments explaining that error messages are printed on errors.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-3-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:35 +01:00
Michael Tretter 7fd890b89d soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver
PM_INIT_FINALIZE tells the PMU FW that Linux is able to handle the power
management nodes that are provided by the PMU FW. Nodes that are not
requested are shut down after this call.

Calling PM_INIT_FINALIZE from the zynqmp_power driver is wrong. The PM
node request mechanism is implemented in the zynqmp_pm_domains driver,
which must also call PM_INIT_FINALIZE.

Due to the behavior of the PMU FW, all devices must be powered up before
PM_INIT_FINALIZE is called, because otherwise the devices might
misbehave. Calling PM_INIT_FINALIZE from the sync_state device callback
ensures that all users probed successfully before the PMU FW is allowed
to power off unused domains.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-2-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:35 +01:00
Yoshihiro Shimoda 363b41dd25 soc: renesas: rcar-rst: Add support for R-Car S4-8
Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver.
The register map of R-Car S4-8 is the same as R-Car V3U so that
renames "V3U" and "r8a779a0" to "Gen4".

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:50:57 +01:00
Yoshihiro Shimoda 9711633587 soc: renesas: Identify R-Car S4-8
Add support for identifying the R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:47:54 +01:00
Yoshihiro Shimoda 654d5fdb89 soc: renesas: r8a779f0-sysc: Add r8a779f0 support
Add support for R-Car S4-8 (R8A779F0) SoC power areas and register
access.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:47:45 +01:00