a32b2ffb82
drm/nvc0-/gr: generate cs register lists from grctx data
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:43:11 +10:00
70f824ac8c
drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:43:06 +10:00
5ee86c4190
drm/nve0-/gr: some new gpc registers can have multiple copies
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GK110 exposes more than one, and needs to be dealt with in the ctxsw
ucode just like the TPC sets are.
Broadcast is at +0xe00.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:42:57 +10:00
c03ff9e8fa
drm/nvc0-/gr: pull out a group of separately context-switched gpc regs
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:42:51 +10:00
30f4e0870d
drm/nvc0-/gr: make register lists from initvals functions
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Generated context verified to be the same for all supported chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-05 13:42:32 +10:00
791dc143ed
drm/nvd0-/disp: handle case where display engine is missing/disabled
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:50 +10:00
e99716f13d
drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4
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No code changes, proven by envyas producing identical binaries.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:50 +10:00
05f9a5bc58
drm/nouveau/bsp/nv84: initial vp2 engine implementation
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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:49 +10:00
a0376b1481
drm/nouveau/vp/nv84: initial vp2 engine implementation
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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:49 +10:00
44b1e3bd6a
drm/nouveau/core: xtensa engine base class implementation
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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:48 +10:00
0d4a1450c9
drm/nouveau/vdec: fork vp3 implementations from vp2
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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:48 +10:00
a0fd4ec8f1
drm/nouveau/core: move falcon class to engine/
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Not really "core" per-se. About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:47 +10:00
d2898713fb
drm/nouveau/kms: don't fail if there's no dcb table entries
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Fixes module not loading on Tesla K20.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:46 +10:00
79442c3af0
drm/nouveau: remove limit on gart
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Most graphics cards nowadays have a multiple of this limit as their vram,
so limiting GART doesn't seem to make much sense.
Signed-off-by: Maarten >Lnkhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:43 +10:00
36798b61ed
drm/nouveau/vm: perform a bar flush when flushing vm
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Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes
internally".
nvidia always seems to do this flush after writing values.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:42 +10:00
57f0ec159b
drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:41 +10:00
eb12f57be6
drm/nvc8/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:41 +10:00
dba50728fd
drm/nvc4/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:40 +10:00
58ef23056a
drm/nvc1/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:40 +10:00
8b637ae3a3
drm/nvc3/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:39 +10:00
d8b02dbbc3
drm/nvc0/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:39 +10:00
37c3afd07c
drm/nvd9/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:38 +10:00
1dd44acfab
drm/nve4/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:37 +10:00
a8004a9edd
drm/nvc0-/gr: bump maximum gpc/tpc limits
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Needed for GK110, separate commit to catch any unexpected breaks to
other parts of the code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:37 +10:00
cb1e06e0e3
drm/nvf0/gr: initial register/context setup
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:36 +10:00
507cd5b553
drm/nve7/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:36 +10:00
99bd5537bd
drm/nve6/gr: update initial register/context values
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:35 +10:00
c4c7044ffc
drm/nouveau: delay busy bo vma removal until fence signals
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As opposed to an explicit wait. Allows userspace to not stall waiting
on buffer deletion.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:50:31 +10:00
780194b1b9
drm/nouveau/vm: make each vma take a reference on its parent vm
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:45:09 +10:00
51a506c012
drm/nouveau/core: remove nouveau_mm.mutex, no more users
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:45:05 +10:00
4e67bee8e1
drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/nvc0
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nvc0_vm_flush() accesses the pgd list, which will soon be able to race
with vm_unlink() during channel destruction.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:45:03 +10:00
15cace5917
drm/nvc0/vm: handle bar tlb flushes internally
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:57 +10:00
ca97a36698
drm/nv50-/vm: take mutex rather than irqsave spinlock
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These operations can take quite some time, and we really don't want to
have to hold a spinlock for too long.
Now that the lock ordering for vm and the gr/nv84 hw bug workaround has
been reversed, it's possible to use a mutex here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:50 +10:00
464d636bd0
drm/nv50/vm: remove explicit vm knowledge from engines
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This reverses the lock ordering between VM and gr/nv84:nvc0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:44 +10:00
c3032adb5c
drm/nv50/vm: handle bar tlb flushes internally
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:37 +10:00
fec43a722a
drm/nvc0/gr: port mp trap handling from calim's kepler code
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:32 +10:00
16b133df33
drm/nve0/gr: attempt to resume after sm traps
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:26 +10:00
3d8a6ed247
drm/nve0/gr: s/tp/tpc/
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NVIDIA's name...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:20 +10:00
8d6f585d00
drm/nve0/fifo: create our playlists up-front, at startup
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:12 +10:00
da746d4ec9
drm/nva3/clk: minor improvements to fractional N calculation
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Helps us to get identical numbers to the binary driver for (at least)
Kepler memory PLLs, and fixes a rounding error.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:06 +10:00
dceef5d87c
drm/nouveau/fb: initialise vram controller as pfb sub-object
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:04 +10:00
54ecff3e1a
drm/nouveau/clk: change init ordering, no longer needed by devinit
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And, will depend on FB/VOLT/DAEMON being ready when it gets initialised
so that it can set/restore clocks.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:44:01 +10:00
88524bc069
drm/nouveau/devinit: move simple pll setting routines to devinit
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These are pretty much useless for reclocking purposes. Lets make it
clearer what they're for and move them to DEVINIT to signify they're
for the very simple PLL setting requirements of running the init
tables.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:54 +10:00
7ada785f18
drm/nouveau: pass generic subdev to calculation routines
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:47 +10:00
aca78e9158
drm/nve0/ce: stub interrupt handler
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:42 +10:00
48506d17d5
drm/nve0/ce: link ce2 to its engine, rather than from graphics
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:36 +10:00
01672ef454
drm/nve0/fifo: copy engine context stored in ramfc, not externally
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:30 +10:00
b0bc5304fe
drm/nve0/ce: create engine object for ce2
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:23 +10:00
d53635a980
drm/nouveau: pull in latest ucode builds from external tree
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01 13:43:21 +10:00
9e895ace5d
Linux 3.10-rc7
2013-06-22 09:47:31 -10:00
Ben Skeggs