Commit Graph

213 Commits

Author SHA1 Message Date
Jonas Bonn e480158cc8 OpenRISC: GPIO
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:37 +02:00
Jonas Bonn 88ef7f3f13 OpenRISC: Scheduling/Process management
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:36 +02:00
Jonas Bonn 2a7be1160a OpenRISC: Idle/Power management
Minimal functionality...

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:35 +02:00
Jonas Bonn 09abb90107 OpenRISC: System calls
The OpenRISC Linux kernel conforms to the "generic" syscall interface which
contains only the reduced set of syscalls deemed necessary for new
architectures.  Unfortunately, the uClibc port for OpenRISC does not fully
support this reduced set; as such, an additional patch available out-of-tree
needs to be applied to the kernel in order to use the current uClibc.  This
is just a temporary measure until the libc port can be straightened out; it
is likely that OpenRISC will make the transition to glibc shortly where the
generic syscall interface is better supported.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:34 +02:00
Jonas Bonn 816ebaa8b6 OpenRISC: IRQ
This patch adds support for the OpenRISC PIC.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:33 +02:00
Jonas Bonn b731fbbd24 OpenRISC: Timekeeping
Implements support for the OpenRISC timer which is a 28 bit cycle counter
that can be read out of a special purpose register.  This counter is
used as a both a clock event and clocksource device.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:32 +02:00
Jonas Bonn a39af6f7b8 OpenRISC: DMA
Simple DMA implementation.  Allows for allocation of coherent memory
(simply uncached) for DMA operations.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:32 +02:00
Jonas Bonn e5ad95ce9b OpenRISC: PTrace
This patch implements minimal PTrace support.  The pt_regs structure is
not exported to userspace for OpenRISC; rather, the GETREGSET mechanism
is intended to be used and the registers, as such, exported in the core
dump format which is ABI stable.  This is in line with what is intended
for new architectures as of 2.6.34 and has the advantage of permitting
the layout of the registers on the kernel stack (as per pt_regs) to be
freely modified.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:31 +02:00
Jonas Bonn f8c4a270d9 OpenRISC: Build infrastructure
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:30 +02:00
Jonas Bonn ac689eb7f9 OpenRISC: Signal handling
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:29 +02:00
Jonas Bonn 61e85e3675 OpenRISC: Memory management
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:28 +02:00
Jonas Bonn 4f246ba30e OpenRISC: Device tree
The OpenRISC architecture uses the device tree infrastructure for the
platform description.  This is currently limited to having a device tree
built into the kernel, but work is underway within the OpenRISC project
to define how this device tree blob should be passed into the kernel from
an external resource.

Patch contains a single example DTS file to go with the defconfig for
or1ksim.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Cc: devicetree-discuss@lists.ozlabs.org
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:28 +02:00
Jonas Bonn 9d02a4283e OpenRISC: Boot code
Architecture code and early setup routines for booting Linux.

Signed-off-by: Jonas Bonn <jonas@southpole.se>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-22 18:46:27 +02:00