Commit Graph

24 Commits

Author SHA1 Message Date
Ben Skeggs f4e65efc88 drm/nouveau/ltc: protect clearing of comptags with mutex
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2016-12-13 11:40:09 +10:00
Ben Skeggs a96def399b drm/nouveau/ltc/gp100: initial support
Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE,
we cannot provide CBC/ZBC support without signed PMU firmware to handle
the task for us...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs 86b40432bd drm/nouveau/ltc/gm107-: decode interrupt status to human-readable strings
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs 9057c8d750 drm/nouveau/ltc/gm107-: fix typo in the address of NV_PLTCG_LTC0_LTS0_INTR
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2016-06-02 13:53:38 +10:00
Ben Skeggs 56d06fa29e drm/nouveau/core: remove pmc_enable argument from subdev ctor
These are now specified directly in the MC subdev.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Alexandre Courbot ab08f38cac drm/nouveau/ltc/gf100: use more reasonable timeout value
LTC operations timeout was set to 2ms, which may be too low for devices
that run at very low clocks (e.g. GM20B) and trigger timeout messages.

Set the timeout to the default 2s. Also remove the redundant error
messages since nvkm_wait_msec() will already display a warning.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:31 +10:00
Ben Skeggs 96aedd0ba9 drm/nouveau/ltc/gm107: fix slice intr offset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:16 +10:00
Ben Skeggs db1eb52846 drm/nouveau: s/gm204/gm200/ in a number of places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:12 +10:00
Alexandre Courbot f0db6e3be9 drm/nouveau/ltc/gm107: wait on relevant bit in gm107_ltc_cbc_wait
Patch "ltc/gm107: use nvkm_mask to set cbc_ctrl1" sets the 3rd bit
of the CTRL1 register instead of writing it entirely in
gm107_ltc_cbc_clear(). As a counterpart, gm107_ltc_cbc_wait() must also
be modified to wait on that single bit only, otherwise a timeout may
occur if some other bit of that register is set. This happened at least
on GM206 when running glmark2-drm.

While we are at it, use the more compact nvkm_wait_msec() to wait for
the bit to clear.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:11:06 +10:00
Ben Skeggs 7d2813c437 drm/nouveau/ltc/gm204: split implementation from gm107
Differences from GM10x:
- GM20x LTC count detection differs from GM10x
- GM20x init doesn't require large page size setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:21 +10:00
Ben Skeggs 4fb9c3f3e5 drm/nouveau/ltc/gm107: use nvkm_mask to set cbc_ctrl1
resman and nvgpu both do this, presumably for good reason.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:28:21 +10:00
Alexandre Courbot a0a49bac2f drm/nouveau/ltc/gf100: add flush/invalidate functions
Allow clients to manually flush and invalidate L2. This will be useful
for Tegra systems for which we want to write instmem using the CPU.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03 15:02:18 +10:00
Alexandre Courbot 38a8fc78d0 drm/nouveau/ltc: add hooks for invalidate and flush
These are useful for systems without a coherent CPU/GPU bus. For such
systems we may need to maintain the L2 ourselves.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-11-03 15:02:18 +10:00
Ben Skeggs 70bc7182cb drm/nouveau/ltc: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:44 +10:00
Ben Skeggs 3a8c3400f3 drm/nouveau/subdev: rename some functions to avoid upcoming conflicts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:33 +10:00
Ben Skeggs d36a99d2da drm/nouveau/fb: transition nvkm_ram away from being based on nvkm_object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:29 +10:00
Ben Skeggs 59e1a2f1a6 drm/nouveau/ltc: switch to subdev printk macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:23 +10:00
Ben Skeggs 1302bcbb82 drm/nouveau/ltc: switch to new-style timer macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:20 +10:00
Ben Skeggs 99336ed363 drm/nouveau/ltc: switch to device pri macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:15 +10:00
Ben Skeggs c7750cfbc1 drm/nouveau/ltc: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs b1e4553cb1 drm/nouveau/fb: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Alexandre Courbot eaecf0326f make RAM device optional
Having a RAM device does not make sense for chips like GK20A which have
no dedicated video memory. The dummy RAM device that we used so far
works as a temporary band-aid, but in the longer term it is desirable
for the driver to be able to work without any kind of VRAM.

This patch adds a few conditionals in places where a RAM device was
assumed to be present and allows some more objects to be allocated from
the TT domain, allowing Nouveau to handle GPUs for which
pfb->ram == NULL.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-04-14 17:00:42 +10:00
Ben Skeggs 2799bba69a drm/nouveau/ltc: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22 12:17:55 +10:00
Ben Skeggs c39f472e9f drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)
The symlinks were annoying some people, and they're not used anywhere
else in the kernel tree.  The include directory structure has been
changed so that symlinks aren't needed anymore.

NVKM has been moved from core/ to nvkm/ to make it more obvious as to
what the directory is for, and as some minor prep for when NVKM gets
split out into its own module (virt) at a later date.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-01-22 12:15:10 +10:00