Commit Graph

50 Commits

Author SHA1 Message Date
Maruthi Srinivas Bayyavarapu ea4a8c1d94 drm/amdgpu: add VCE VM mode support
This adds VCE VM mode support from Stoney onwards. Session tracking
is an open issue, yet to be supported.

v2: Fixed warnings from checkpatch.pl

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-12 18:12:16 -04:00
Rex Zhu c04399f194 drm/amdgpu: add vce bypass mode for tonga.
fix issue that encode test failed on the second time when
vce dpm enabled on tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:40 -04:00
Rex Zhu 0174df4e66 drm/amdgpu: refine function name for consistency
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:09 -04:00
Alex Deucher 6f0359ff73 drm/amdgpu/vce3: add support for third vce ring
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:51 -04:00
Alex Deucher 75c65480ba drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value.  This allows
different versions to expose more or less rings.

No functional change.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:43 -04:00
Tom St Denis 9aeb774c1e drm/amd/amdgpu: add mutex in check_soft for VCE v3
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:39:27 -04:00
Tom St Denis f3f0ea9536 drm/amd/amdgpu: Cleanup register access in VCE v3
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-16 10:39:17 -04:00
Chunming Zhou bde1d8b228 drm/amdgpu: enable VCE soft reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:24 -04:00
Rex Zhu ac8e3f3040 drm/amdgpu: remove RB1_BUSY bit checking
This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:23 -04:00
Chunming Zhou 9c0171b412 drm/amdgpu: fix harvest config checking in vce3 check_soft_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:22 -04:00
Tom St Denis 13d58d2a49 drm/amd/amdgpu: Don't set VCE CG in startup
It's handled by DPM/PP properly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:16 -04:00
Tom St Denis 6f906814a5 drm/amd/amdgpu: Fix VCE CG order and resume defaults
CG was being enabled in reverse sense from dpm/powerplay.
Also fix the default CLK_EN signal to enable all of the blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:14 -04:00
Tom St Denis f16fe6d303 drm/amd/amdgpu: fix indentation in vce3 CG
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:33:13 -04:00
Chunming Zhou 115933a577 drm/amdgpu: implement vce3 check/post_soft_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08 11:32:12 -04:00
Christian König ebff485e93 drm/amdgpu: use begin/end_use for VCE power/clock gating
This fixes turning power and clock on when it is actually needed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:37:03 -04:00
Rex Zhu ec38f1889a drm/amdgpu: add bypass mode for vce3.0
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:37:00 -04:00
jimqu b7e2e9f709 drm/amdgpu: correct coding style
Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:58 -04:00
jimqu 567e6e2984 drm/amdgpu: S3 resume fail on Polaris10
Sometimes, driver can not return from fence waiting when doing VCE ring
ib test. The issue is a asic special and random issue. so adjust VCE suspend
and resume sequence.

Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:34:18 -04:00
Tom St Denis 88a907d67c drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
Add name that we can print out in kernel messages
to aid in debugging.

v2: drop DAL changes for upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Christian König edf600dac6 drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Tom St Denis 16a7989ac6 drm/amd/amdgpu: Drop print_status callbacks.
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.

These functions were unused at the moment anyway.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:06 -04:00
Flora Cui 2cc0c0b5cd drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:57 -04:00
Sonny Jiang 1b4eeea5f7 drm/amdgpu: add VCE support to ELM/BAF
Ellesmere and Baffin are VCE 3.4

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:29 -04:00
Christian König a3f1cf355e drm/amdgpu: use max_dw in ring_init
Instead of specifying the total ring size calculate that from the maximum
number of dw a submission can have and the number of concurrent submissions.

This fixes UVD with 8 concurrent submissions or more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:50 -04:00
Dave Airlie 9b61c0fcdf Merge drm-fixes into drm-next.
Nouveau wanted this to avoid some worse conflicts when I merge that.
2016-03-14 09:46:02 +10:00
Christian König 9e5d53094c drm/amdgpu: make pad_ib a ring function v3
The padding depends on the firmware version and we need that for BO moves as
well, not only for VM updates.

v2: new approach of making pad_ib a ring function
v3: fix typo in macro name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:20 -05:00
Alex Deucher ea5e4c8731 drm/amdgpu: remove some more semaphore leftovers
No longer needed since semaphores were removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:51 -05:00
Chunming Zhou 2f4b940033 drm/amdgpu: clean up hw semaphore support in driver
No longer used.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:16:49 -05:00
Alex Deucher e3b04bc790 drma/dmgpu: move cg and pg flags into shared headers
So they can be used by powerplay.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:47 -05:00
Alex Deucher 808a934fd4 drm/amdgpu: handle vce pg flags properly
Don't attempt to start/stop the vce block if pg is disabled.

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-08 10:37:43 -05:00
Tom St Denis 691ca86a3a amdgpu/vce3: Simplify vce_v3_0_hw_init and ensure both rings default to not ready.
Simplified the ring test and added logic to ensure rings are marked not ready
by default.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:54 -05:00
Tom St Denis 74af12762d amdgpu/vce3: Remove magic constants from harvest register masks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:20:42 -05:00
Tom St Denis 81da2edef9 amdgpu/vce3: Simplify vce_v3_0_process_interrupt()
Fold two cases into one for a LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:33 -05:00
Tom St Denis af18b0f7fb amdgpu/vce3: Simplify vce_v3_0_soft_reset()
LOC reduction and simplification.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:24 -05:00
Tom St Denis 92988e604b amdgpu/vce3: Simplify idle and wait for idle code
More LOC reductions in VCE3 code.  This patch simplifies the is_idle and
wait_for_idle logic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:13 -05:00
Tom St Denis 1dab5f067e amdgpu/vce3: Cleanup harvest config function.
Basic LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:04 -05:00
Eric Huang 0689a57013 drm/amd/amdgpu: add vce3.0 clock gating support. (v2)
v2: fix grbm locking

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Leo Liu 3c0ff9f18f drm/amdgpu: vce use multiple cache surface starting from stoney
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:21:04 -05:00
Leo Liu d6c29c30ea drm/amdgpu: reset vce trap interrupt flag
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-20 18:20:55 -05:00
Samuel Li cfaba56603 drm/amdgpu: add VCE support for Stoney (v2)
Stoney is VCE 3.x single.

v2: Stoney is single pipe like Fiji

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-21 12:21:07 -04:00
Christian König b7e4dad3e1 drm/amdgpu: remove old lockup detection infrastructure
It didn't worked to well anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-10-21 11:35:12 -04:00
Alex Deucher be4f38e28c drm/amdgpu: fix vce3 instance handling
Need to properly handle the instances for the idle
checks and soft reset.

Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 16:35:54 -04:00
Jammy Zhou edff0e2826 drm/amdgpu: add insert_nop ring func and default implementation
The insert_nop function is added to amdgpu_ring_funcs structure as
well as the default implementation

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02 12:24:43 -04:00
Alex Deucher 188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
Jammy Zhou 2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Alex Deucher 6a585777c8 drm/amdgpu: implement VCE 3.0 harvesting support (v4)
For boards with bad VCE blocks, only configure the working
block.

v2: use the harvest info for pipe setup
v3: fix mask check as noted by Leo
v4: add dGPU support

Reviewed-by: Christian König <christian.koenig@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23 11:09:44 -04:00
yanyang1 5fc3aeeb9e drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:51 -04:00
Leo Liu 5bbc553a1a drm/amdgpu: implement VCE two instances support
VCE 3.0 has two indentical instances in the engine, they share
the same registers name in differrent memory block distinguished
by the grbm_gfx_index, we set to master instance after init, it
will dispatch task to slave instance. These two instances will
share the same firmware, but have their own stacks and heaps.

v2: add mutex for using grbm_gfx_index

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:48 -04:00
Leo Liu e982262214 drm/amdgpu: recalculate VCE firmware BO size
Firmware required BO size changes in terms of ASIC family

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:47 -04:00
Alex Deucher aaa36a976b drm/amdgpu: Add initial VI support
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:17 -04:00