Add basic support for first generation Amazon omap3-echo. This got
applied rather late as we discussed how to deal with SoC variants
with some accelerators unaccessible, and eventually ended up setting
up few more SoC specific dtsi files. Eventually we'll need to also
detect the disabled accelerators on driver init, but more patching
is needed for that.
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Merge tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.6 merge window
Add basic support for first generation Amazon omap3-echo. This got
applied rather late as we discussed how to deal with SoC variants
with some accelerators unaccessible, and eventually ended up setting
up few more SoC specific dtsi files. Eventually we'll need to also
detect the disabled accelerators on driver init, but more patching
is needed for that.
* tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add omap3-echo
ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725
Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4
Signed-off-by: Olof Johansson <olof@lixom.net>
- add DDR clock controller
- GPU OPP updates
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Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.6
- add DDR clock controller
- GPU OPP updates
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
ARM: dts: meson8b: fix the clock controller compatible string
ARM: dts: meson8b: add the DDR clock controller
ARM: dts: meson8: add the DDR clock controller
ARM: dts: meson: provide the XTAL clock using a fixed-clock
dt-bindings: clock: meson8b: add the clock inputs
dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding
Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
It's fairly big this time, but the highlights are:
- Enable cpufreq and CPU thermal throttling on the A64
- CLK_CPUX macro usage removed (changed from first pull request)
- CSI0 support on the R40
- CSI1 support on the A10 and A20
- SPI support on the R40
- PMU support on the H3, H5, H6 and R40
- MIPI-DSI support on the A64
- PWM support on the H6
- Thermal sensor on the A64, A83t, H3, H5, H6 and R40
- More DT schemas fixes and conversions
- New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5,
Pine64 H64 Model B, Neutis N5H3
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Merge tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
This is our usual set of DT patches for the Allwinner SoCs.
It's fairly big this time, but the highlights are:
- Enable cpufreq and CPU thermal throttling on the A64
- CLK_CPUX macro usage removed (changed from first pull request)
- CSI0 support on the R40
- CSI1 support on the A10 and A20
- SPI support on the R40
- PMU support on the H3, H5, H6 and R40
- MIPI-DSI support on the A64
- PWM support on the H6
- Thermal sensor on the A64, A83t, H3, H5, H6 and R40
- More DT schemas fixes and conversions
- New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5,
Pine64 H64 Model B, Neutis N5H3
* tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits)
arm64: dts: allwinner: a64: enable DVFS
arm64: dts: allwinner: a64: add dtsi with CPU operating points
arm64: dts: allwinner: a64: add cooling maps and thermal tripping points
arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks
ARM: dts: sunxi: Use macros for references to CCU clocks
arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board
ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes
arm64: dts: allwinner: a64: pinebook: Fix lid wakeup
ARM: dts: sun8i: r40: Add device node for CSI0
ARM: dts: sun7i: Add CSI1 controller and pinmux options
ARM: dts: sun4i: Add CSI1 controller and pinmux options
ARM: dts: sunxi: Add missing LVDS resets and clocks
ARM: dts: sun8i: r40: Use tcon top clock index macros
ARM: dts: sun8i: R40: Add PMU node
ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K
arm64: dts: allwinner: h6: Add thermal sensor and thermal zones
ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board
arm64: dts: allwinner: a64: Add MIPI DSI pipeline
arm64: dts: allwinner: a64: Add thermal sensors and thermal zones
...
Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- New board support: i.MX6SL based Tolino Shine 3 eBook reader,
i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks
Ventana Boards.
- A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and
VF610 ZII boards.
- Add revision in board compatible string for imx6sx-sdb-reva and
imx7d-sdb-reva board.
- A fixup on imx6sl-tolino-shine3 board to remove incorrect power
supply assignment.
- Set initial buck regulator modes explicitly for phycore-imx6 board,
so that a wrong initial mode set by bootloader does not interfere.
- Add Add LCD support for imx7d-pico board.
- A couple of patches from Michael Grzeschik to enhance USB Host
support on i.MX25.
- A couple of patches from Michael Trimarchi to remove duplicate
Ethernet PHY reset properties on imx6qdl-icore and switch to
phy-handle.
- A couple of changes to add extirq node support on LS1021A SoC and
make use of it on the LS1021A-TSN board.
- A few random device additions and improvements on various boards.
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Merge tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update for 5.6:
- New board support: i.MX6SL based Tolino Shine 3 eBook reader,
i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks
Ventana Boards.
- A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and
VF610 ZII boards.
- Add revision in board compatible string for imx6sx-sdb-reva and
imx7d-sdb-reva board.
- A fixup on imx6sl-tolino-shine3 board to remove incorrect power
supply assignment.
- Set initial buck regulator modes explicitly for phycore-imx6 board,
so that a wrong initial mode set by bootloader does not interfere.
- Add Add LCD support for imx7d-pico board.
- A couple of patches from Michael Grzeschik to enhance USB Host
support on i.MX25.
- A couple of patches from Michael Trimarchi to remove duplicate
Ethernet PHY reset properties on imx6qdl-icore and switch to
phy-handle.
- A couple of changes to add extirq node support on LS1021A SoC and
make use of it on the LS1021A-TSN board.
- A few random device additions and improvements on various boards.
* tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
ARM: dts: imx: Add GW5912 board support
ARM: dts: imx: Add GW5913 board support
ARM: dts: imx: Add GW5910 board support
ARM: dts: imx: Add GW5907 board support
ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property
ARM: dts: imx6sl-tolino-shine3: Remove incorrect power supply assignment
ARM: dts: imx7d-pico: Add LCD support
ARM: dts: imx6qdl-icore: Add fec phy-handle
ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods
ARM: dts: imx7: Unify temp-grade and speed-grade nodes
ARM: dts: imx6: phycore-som: add pmic onkey device
ARM: dts: imx51-babbage: Fix the DVI output description
ARM: dts: imx6qdl-apalis: mux HDMI CEC pin
ARM: dts: imx6sll: add PXP module
ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments
ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog
ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes
ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties
ARM: dts: phycore-imx6: set buck regulator modes explicitly
ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed
...
Link: https://lore.kernel.org/r/20200113034006.17430-4-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds memory timings for the PAZ100 and does some minor cleanup for
the external memory controller device tree node on Tegra124.
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Merge tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.6-rc1
This adds memory timings for the PAZ100 and does some minor cleanup for
the external memory controller device tree node on Tegra124.
* tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra20: paz00: Add memory timings
ARM: tegra: Rename EMC on Tegra124
ARM: tegra: Let the EMC hardware use the EMC clock
Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables bcm2711's PCIe bus, which is hardwired to a VIA
Technologies XHCI USB 3.0 controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
With the introduction of the Raspberry Pi 4 we were forced to explicitly
configure CMA's location, since arm64 defaults it into the ZONE_DMA32
memory area, which is not good enough to perform DMA operations on that
device. To bypass this limitation a dedicated CMA DT node was created,
explicitly indicating the acceptable memory range and size.
That said, compatibility between boards is a must on the Raspberry Pi
ecosystem so this creates a common CMA DT node so as for DT overlays to
be able to update CMA's properties regardless of the board being used.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This is the first generation Amazon Echo from 2016.
Audio support is not yet implemented.
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DM3730 is considered as omap36xx.dtsi, while the rest has:
DM3730 | DM3725 | AM3715 | AM3703
IVA X | X | |
SGX X | | X |
Where X is "supported"
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBone Black series is equipped with 512MB RAM
whereas only 256MB is included from am335x-bone-common.dtsi
This leads to an issue with unusual setups when devicetree
is loaded by GRUB2 directly.
Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
Signed-off-by: Tony Lindgren <tony@atomide.com>
An experimental test with the command below gives this error:
rk3188-bqedison2qc.dt.yaml: dwmmc@10218000: wifi@1:
'reg' is a required property
So fix this by adding a reg property to the brcmf sub node.
Also add #address-cells and #size-cells to prevent more warnings.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200110134420.11280-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Gateworks GW5907 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- FEC GbE Phy
- bi-color front-panel LED
- 256MB NAND boot device
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
- Digital IO expander (pca9555)
- Joystick 12bit adc (ads1015)
Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Samsung DTS ARM changes for v5.6
1. Couple ARM and wcore bus regulators on Exynos542x so higher
frequencies could be used with dynamic voltage and frequency scaling.
Enable this higher frequencies.
2. Correct the polarity of USB3503 hub GPIOs.
3. Adjust the bus frequencies (scaled with devfreq framework) on
Exynos5422 Odroid boards to match values possible to obtain from root
PLLs.
4. Add display to Tiny4412 board.
5. Cleanups and minor improvements.
* tag 'samsung-dt-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable FIMD node and add proper panel node to Tiny4412
ARM: dts: samsung: Rename Samsung and Exynos to lowercase
ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids
ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS
ARM: dts: exynos: Correct USB3503 GPIOs polarity
ARM: dts: exynos: Add missing CPU frequencies for Exynos5422/5800
ARM: dts: exynos: Add initial data for coupled regulators for Exynos5422/5800
ARM: dts: exynos: Remove syscon compatible from chipid node on Exynos5
Link: https://lore.kernel.org/r/20200110172334.4767-3-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
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Merge tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
arm64: dts: rockchip: Add PX30 LVDS
arm64: dts: rockchip: add dsi controller for px30
arm64: dts: rockchip: Add PX30 DSI DPHY
arm64: dts: rockchip: Add RK3328 idle state
arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
ARM: dts: rockchip: Add Radxa Dalang Carrier board
arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N10 binding
arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
arm64: dts: rockchip: enable the gpu on px30-evb
arm64: dts: rockchip: add the gpu for px30
dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
arm64: dts: rockchip: Add GPU cooling device for RK3399
arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
...
Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
additional operating points for rk3288-tinker.
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Merge tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Pin-name corrections for Veyron-Fievel, bluetooth for a number of veyron boards and
additional operating points for rk3288-tinker.
* tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger
ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
ARM: dts: rockchip: Add missing cpu operating points for rk3288-tinker
ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron
Link: https://lore.kernel.org/r/8215452.dU6eVM2tAM@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
MPU part:
-Add PWM support on DK2 board.
-Add counter support to STM32 timers.
-Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
extension connector on EV1 & DKx boards.
-Add ADC support on ED1 board.
-Update devicetree files split to better fit to STM32MP15 SOC & boards
diversity.
-Fix issues seen during YAML validation.
-Enable Ethernet (MAC) TX clock gating during low-power mode.
-Enable USB OTG HS support on DKx boards.
-Enable USB Host EHCI on DKx boards.
MCU part:
-Fix issues seen during YAML validation.
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Merge tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.6, round 1
Highlights:
----------
MPU part:
-Add PWM support on DK2 board.
-Add counter support to STM32 timers.
-Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
extension connector on EV1 & DKx boards.
-Add ADC support on ED1 board.
-Update devicetree files split to better fit to STM32MP15 SOC & boards
diversity.
-Fix issues seen during YAML validation.
-Enable Ethernet (MAC) TX clock gating during low-power mode.
-Enable USB OTG HS support on DKx boards.
-Enable USB Host EHCI on DKx boards.
MCU part:
-Fix issues seen during YAML validation.
* tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits)
ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval
ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco
ARM: dts: stm32: change nvmem node name on stm32mp1
ARM: dts: stm32: change nvmem node name on stm32f429
ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
ARM: dts: stm32: fix dma controller node name on stm32mp157c
ARM: dts: stm32: fix dma controller node name on stm32f743
ARM: dts: stm32: fix dma controller node name on stm32f746
ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1
ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards
ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx
ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups
ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups
ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity
...
Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.com
Signed-off-by: Olof Johansson <olof@lixom.net>
for 5.6, please pull the following:
- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
different than the previous Pi chips
- Florian switches the BCM956265HR board to use the hardware I2C
controllers for interfacing with the SFPs
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Merge tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.6, please pull the following:
- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
different than the previous Pi chips
- Florian switches the BCM956265HR board to use the hardware I2C
controllers for interfacing with the SFPs
* tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Enable HWRNG support
ARM: dts: bcm2835: Move rng definition to common location
ARM: dts: NSP: Use hardware I2C for BCM958625HR
Link: https://lore.kernel.org/r/20200108191114.15987-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix i.MX8MM SDMA1 AHB clock setting to remove a "Timeout waiting for CH0"
error seen with UART1.
- Correct compatible of RV3029 RTC device on imx6q-dhcom board.
- Correct interrupt trigger type for magnetometer on board
imx8mq-librem5-devkit.
- A series from Anson Huang to fix vdd3p0 power supplier for a few NXP
development board.
- Fix imx6q-icore-mipi board to use 1.5 version of i.Core MX6DL, so
that Ethernet interface on the board works properly.
- Fix Toradex Colibri board to get NAND flash support back.
- Fix SGTL5000 VDDIO regulator connection for imx6q-dhcom, which
is connected to PMIC SW2 output rather than a fixed 3V3 rail.
- Fix 'reg' of CPU node on imx7ulp to get rid of a warning given by
kernel.
- Fix endian setting for DCFG on LS1028A SoC, so that register access
of DCFG becomes correct.
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Merge tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.5, round 2:
- Fix i.MX8MM SDMA1 AHB clock setting to remove a "Timeout waiting for CH0"
error seen with UART1.
- Correct compatible of RV3029 RTC device on imx6q-dhcom board.
- Correct interrupt trigger type for magnetometer on board
imx8mq-librem5-devkit.
- A series from Anson Huang to fix vdd3p0 power supplier for a few NXP
development board.
- Fix imx6q-icore-mipi board to use 1.5 version of i.Core MX6DL, so
that Ethernet interface on the board works properly.
- Fix Toradex Colibri board to get NAND flash support back.
- Fix SGTL5000 VDDIO regulator connection for imx6q-dhcom, which
is connected to PMIC SW2 output rather than a fixed 3V3 rail.
- Fix 'reg' of CPU node on imx7ulp to get rid of a warning given by
kernel.
- Fix endian setting for DCFG on LS1028A SoC, so that register access
of DCFG becomes correct.
* tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support
ARM: dts: imx6sll-evk: Remove incorrect power supply assignment
ARM: dts: imx6sl-evk: Remove incorrect power supply assignment
ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment
ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
arm64: dts: imx8mq-librem5-devkit: use correct interrupt for the magnetometer
ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection
ARM: dts: imx7ulp: fix reg of cpu node
arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm
arm64: dts: ls1028a: fix endian setting for dcfg
ARM: dts: imx6q-dhcom: fix rtc compatible
Link: https://lore.kernel.org/r/20200110011836.GW4456@T480
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently the maximum rate for peripheral clock is calculated based on a
typical 133MHz MCK. The maximum frequency is defined in the datasheet as a
ratio to MCK. Some sama5d3 platforms are using a 166MHz MCK. Update the
device trees to match the maximum rate based on 166MHz.
Reported-by: Karl Rudbæk Olsen <karl@micro-technic.com>
Fixes: d2e8190b79 ("ARM: at91/dt: define sama5d3 clocks")
Link: https://lore.kernel.org/r/20200110172007.1253659-1-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
PAZ00 board has two variants of DDR2 SDRAM devices for External Memory:
one is Hynix HY5PS1G831CLFP-Y5 and the other is Micron MT47H128M8CF-25:H.
The Micron variant doesn't have official timings in the wild, hence only
timings for the Hynix are added. The memory frequency-scaling was tested
using the Tegra20 devfreq driver.
Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The EMC hardware block needs access to the EMC clock in order to scale
the external memory frequency. Add the clocks property so that drivers
for the EMC can acquire a reference to the EMC clock.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a fixed regulator and use it as power supply for RBG panel.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add a fixed regulator and use it as power supply for DSI panel.
Fixes: 18c8866266 ("ARM: dts: stm32: Add display support on stm32f469-disco")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Change non volatile node name from nvmem to efuse to be compliant
with yaml schema.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Change non volatile node name from nvmem to efuse to be compliant
with yaml schema.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Update of the mlahb node according to to DT bindings using json-schema
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Modify dma controller nodes name to fit with the standard naming.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Modify dma controller nodes name to fit with the standard naming.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Modify dma controller nodes name to fit with the standard naming.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
phy-names is required by usbotg_hs driver to get the phy, otherwise, it
considers that there is no phys property.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch enables USB OTG HS on stm32mp15 dkx in Peripheral mode.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch enables USB Host (USBH) EHCI controller on stm32mp15 dk boards.
As a hub is used between USBH and USB connectors, no need to enable
USBH OHCI controller: all low- and full-speed traffic is managed by the
hub.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch enables USBPHYC (USB PHY Controller on stm32mp15 DKx boards.
This enables the two usbphyc usb2 ports, which require 3 supplies:
3v3, 1v1 and 1v8.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 micro-SD port.
Pass the "broken-cd" property to describe the absence of the card detect
GPIO so that polling must be used.
According to Documentation/devicetree/bindings/mmc/mmc-controller.yaml:
broken-cd:
$ref: /schemas/types.yaml#/definitions/flag
description:
There is no card detection available; polling must be used.
Even though no error is oberved in the kernel, the lack of the
'broken-cd' property caused the micro-SD to not be detected in U-Boot,
so let's improve the device tree description to make it more accurate.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd3p0 LDO's input should be from external USB VBUS directly, NOT
PMIC's power supply, the vdd3p0 LDO's target output voltage can be
controlled by SW, and it requires input voltage to be high enough, with
incorrect power supply assigned, if the power supply's voltage is lower
than the LDO target output voltage, it will return fail and skip the LDO
voltage adjustment, so remove the power supply assignment for vdd3p0 to
avoid such scenario.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd3p0 LDO's input should be from external USB VBUS directly, NOT
PMIC's power supply, the vdd3p0 LDO's target output voltage can be
controlled by SW, and it requires input voltage to be high enough, with
incorrect power supply assigned, if the power supply's voltage is lower
than the LDO target output voltage, it will return fail and skip the LDO
voltage adjustment, so remove the power supply assignment for vdd3p0 to
avoid such scenario.
Fixes: 96a9169cf6 ("ARM: dts: imx6sll-evk: Assign corresponding power supply for vdd3p0")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd3p0 LDO's input should be from external USB VBUS directly, NOT
PMIC's power supply, the vdd3p0 LDO's target output voltage can be
controlled by SW, and it requires input voltage to be high enough, with
incorrect power supply assigned, if the power supply's voltage is lower
than the LDO target output voltage, it will return fail and skip the LDO
voltage adjustment, so remove the power supply assignment for vdd3p0 to
avoid such scenario.
Fixes: 3feea8805d ("ARM: dts: imx6sl-evk: Assign corresponding power supply for LDOs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd3p0 LDO's input should be from external USB VBUS directly, NOT
PMIC's power supply, the vdd3p0 LDO's target output voltage can be
controlled by SW, and it requires input voltage to be high enough, with
incorrect power supply assigned, if the power supply's voltage is lower
than the LDO target output voltage, it will return fail and skip the LDO
voltage adjustment, so remove the power supply assignment for vdd3p0 to
avoid such scenario.
Fixes: 37a4bdead1 ("ARM: dts: imx6sx-sdb: Assign corresponding power supply for LDOs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The vdd3p0 LDO's input should be from external USB VBUS directly, NOT
PMIC's power supply, the vdd3p0 LDO's target output voltage can be
controlled by SW, and it requires input voltage to be high enough, with
incorrect power supply assigned, if the power supply's voltage is lower
than the LDO target output voltage, it will return fail and skip the LDO
voltage adjustment, so remove the power supply assignment for vdd3p0 to
avoid such scenario.
Fixes: 93385546ba ("ARM: dts: imx6qdl-sabresd: Assign corresponding power supply for LDOs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.
With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY
Similar fix has merged for i.Core MX6Q but missed to update for DL.
Fixes: a8039f2dd0 ("ARM: dts: imx6dl: Add Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit support")
Cc: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
LAN8720 needs a reset of every clock enable. The reset needs
to be done at device level, due the flag PHY_RST_AFTER_CLK_EN.
So, add phy-handle by creating mdio child node inside fec.
This will eventually move the phy-reset-gpio which is defined
in fec node.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
and phy-mode properties.
So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.
Cc: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following warning is seen when building with W=1:
arch/arm/boot/dts/imx7s.dtsi:551.39-553.7: Warning (unique_unit_address): /soc/aips-bus@30000000/ocotp-ctrl@30350000/temp-grade@10: duplicate unit-address (also used in node /soc/aips-bus@30000000/ocotp-ctrl@30350000/speed-grade@10)
Since temp-grade and speed-grade point to the same node, replace them by
a single one to avoid the duplicate unit-address warning.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Without the onkey device it isn't possible to power off the system using
the X_PMIC_nONKEY signal which is routed to the SoM pin header.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The recovery mode pin is currently named 'REC_MODE_L', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'RECOVERY_SW_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200108092908.1.I3afd3535b65460e79f3976e9ebfa392a0dd75e01@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable fimd device node which is a display controller, and add panel
node required by it.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The clock setup on Meson8 cannot achieve a Mali frequency of exactly
182.15MHz. The vendor driver uses "FCLK_DIV7 / 1" for this frequency,
which translates to 2550MHz / 7 / 1 = 364285714Hz.
Update the GPU operating point to that specific frequency to not confuse
myself when comparing the frequency from the .dts with the actual clock
rate on the system.
Fixes: c3ea80b613 ("ARM: dts: meson8b: add the Mali-450 MP2 GPU")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The clock setup on Meson8 cannot achieve a Mali frequency of exactly
182.15MHz. The vendor driver uses "FCLK_DIV7 / 2" for this frequency,
which translates to 2550MHz / 7 / 2 = 182142857Hz.
Update the GPU operating point to that specific frequency to not confuse
myself when comparing the frequency from the .dts with the actual clock
rate on the system.
Fixes: 7d3f6b536e ("ARM: dts: meson8: add the Mali-450 MP6 GPU")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8b clock controller is an evolution of the Meson8 clock
controller. The clock controller on Meson8b contains two identical mali
clock trees for glitch-free rate switching.
Use the correct compatible string to make use of the glitch free mux.
Fixes: b6db3936f2 ("ARM: dts: meson: switch the clock controller to the HHI register area")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Fixes for some badly applied patches that went in to 5.5. There is also
a fix for an incorrect i2c address.
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Merge tag 'aspeed-5.5-devicetree-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/fixes
ASPEED device tree fixes for 5.5
Fixes for some badly applied patches that went in to 5.5. There is also
a fix for an incorrect i2c address.
* tag 'aspeed-5.5-devicetree-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: rainier: Fix fan fault and presence
ARM: dts: aspeed: rainier: Remove duplicate i2c busses
ARM: dts: aspeed: tacoma: Remove duplicate flash nodes
ARM: dts: aspeed: tacoma: Remove duplicate i2c busses
ARM: dts: aspeed: tacoma: Fix fsi master node
ARM: dts: aspeed-g6: Fix FSI master location
Link: https://lore.kernel.org/r/CACPK8XcjazgORXNZBU1ECMukXG4HA8D9VeDxiSPifDk_iB7_dw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
SolidRun Clearfog Pro rev 2.1 and Clearfog Base rev 1.3 added EEPROM.
Add DT node for EEPROM description in the .dtsi shared by Clearfog Pro
and Base.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Move the i2c0 controller properties to the SOM .dtsi. This is
preparation for adding an i2c device at the SOM level.
Cc: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
SolidRun Clearfog GTR L8 and S4 SBCs are based on Armada 385. They
features 8 (L8) or 4 (S4) switched Ethernet ports, 1 1Gb Ethernet port,
1 directly connected SFP port, 1 SFP port behind the switch (not
currently described in DT), 3 mini-PCIe slots, eMMC, SPI flash, USB3
port.
https://developer.solid-run.com/products/clearfog-gtr-a385/
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The PCA9552 used for fan fault and presence information is at address
61h, not 60h.
Fixes: 2efc118ce3 ("ARM: dts: aspeed: rainier: Add i2c devices")
Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is a revert of "ARM: dts: aspeed: rainier: Add i2c devices", which
was already applied to the tree.
Fixes: 9c44db7096 ("ARM: dts: aspeed: rainier: Add i2c devices")
Reviewed-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Tested-by: Jim Wright <wrightj@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is a revert of "ARM: dts: aspeed: tacoma: Enable FMC and SPI
devices" which was already applied as part of "ARM: dts: aspeed: Add
Tacoma machine".
Fixes: 8737481e38 ("ARM: dts: aspeed: tacoma: Enable FMC and SPI devices")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is a revert of "ARM: dts: aspeed: tacoma: Enable I2C busses", which
was already applied as part of "ARM: dts: aspeed: Add Tacoma machine".
Fixes: 606bcdde67 ("ARM: dts: aspeed: tacoma: Enable I2C busses")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The FIS nodes were placed incorrectly in the device tree.
Fixes: 0fe4e30478 ("ARM: dts: aspeed-g6: Describe FSI masters")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The flash write protect pin is currently named 'FW_WP_AP', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'AP_FLASH_WP_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200106135142.1.I3f99ac8399a564c88ff48ae6290cc691b47c16ae@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix up inconsistent usage of upper and lowercase letters in "Samsung"
and "Exynos" names.
"SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked
names. Therefore they should be written with lowercase letters starting
with capital letter.
The lowercase "Exynos" name is promoted by its manufacturer Samsung
Electronics Co., Ltd., in advertisement materials and on website.
Although advertisement materials usually use uppercase "SAMSUNG", the
lowercase version is used in all legal aspects (e.g. on Wikipedia and in
privacy/legal statements on
https://www.samsung.com/semiconductor/privacy-global/).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
We can now probe devices with ti-sysc interconnect driver and dts
data, and can continue dropping the related platform data and custom
ti,hwmods dts property for various devices.
And related to that, we finally can remove the legacy sdma support in
favor of using the dmaengine driver only. I was planning to send the
sdma changes separately, but that would have produced a pile of
pointless merge conflicts, so I decided it's best to resolve it locally.
After all, the sdma series also ends up removing the related platform
data.
Note that this series is based on omap-for-v5.6/ti-sysc-dt-signed branch
as it depends for dts data being in place.
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Merge tag 'omap-for-v5.6/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.6 merge window
We can now probe devices with ti-sysc interconnect driver and dts
data, and can continue dropping the related platform data and custom
ti,hwmods dts property for various devices.
And related to that, we finally can remove the legacy sdma support in
favor of using the dmaengine driver only. I was planning to send the
sdma changes separately, but that would have produced a pile of
pointless merge conflicts, so I decided it's best to resolve it locally.
After all, the sdma series also ends up removing the related platform
data.
Note that this series is based on omap-for-v5.6/ti-sysc-dt-signed branch
as it depends for dts data being in place.
* tag 'omap-for-v5.6/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (56 commits)
ARM: OMAP2+: Drop legacy platform data for sdma
ARM: OMAP2+: Drop legacy init for sdma
dmaengine: ti: omap-dma: Use cpu notifier to block idle for omap2
dmaengine: ti: omap-dma: Allocate channels directly
dmaengine: ti: omap-dma: Pass sdma auxdata to driver and use it
dmaengine: ti: omap-dma: Configure global priority register directly
ARM: OMAP5: hwmod-data: remove OMAP5 IOMMU hwmod data
ARM: OMAP4: hwmod-data: remove OMAP4 IOMMU hwmod data
ARM: OMAP2+: Drop legacy platform data for omap4 fdif
ARM: OMAP2+: Drop legacy platform data for omap4 slimbus
ARM: OMAP2+: Drop legacy platform data for omap5 kbd
ARM: OMAP2+: Drop legacy platform data for omap4 kbd
ARM: OMAP2+: Drop legacy platform data for dra7 smartreflex
ARM: OMAP2+: Drop legacy platform data for omap4 smartreflex
ARM: OMAP2+: Drop legacy platform data for omap4 hsi
ARM: OMAP2+: Drop legacy platform data for am4 vpfe
ARM: OMAP2+: Drop legacy platform data for dra7 ocp2scp
ARM: OMAP2+: Drop legacy platform data for omap5 ocp2scp
ARM: OMAP2+: Drop legacy platform data for omap4 ocp2scp
ARM: OMAP2+: Drop legacy platform data for am4 ocp2scp
...
Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-4
Signed-off-by: Olof Johansson <olof@lixom.net>
Devicetree changes for omaps for v5.6 to configure more
devices and update boards to use generic lcd panels:
- Configure HDMI for dra76-evm and am57xx-idk
- Correct node name for am3517 mdio
- Convert am335x-evm, am335x-evmsk, and am335x-icev2 to use generic
panels
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Merge tag 'omap-for-v5.6/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.6 merge window
Devicetree changes for omaps for v5.6 to configure more
devices and update boards to use generic lcd panels:
- Configure HDMI for dra76-evm and am57xx-idk
- Correct node name for am3517 mdio
- Convert am335x-evm, am335x-evmsk, and am335x-icev2 to use generic
panels
* tag 'omap-for-v5.6/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-icev2: Add support for OSD9616P0899-10 at i2c0
ARM: dts: am335x-evmsk: Use drm simple-panel instead of tilcdc-panel
ARM: dts: am335x-evm: Use drm simple-panel instead of tilcdc-panel
ARM: dts: omap3: name mdio node properly
ARM: dts: am57xx-idk-common: add HDMI to the common dtsi
ARM: dts: dra76-evm: add HDMI output
Link: https://lore.kernel.org/r/pull-1578420398-290837@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
Here are few fixes for v5.5-rc cycle:
- Two corner case fixes related to ti-sysc driver clock issues
- Fixes for am57xx dts for pcie gpios
- Beagle-x15 regulator dts fix
- Fix for wkup_m3_ipc driver race
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Merge tag 'omap-for-v5.5/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.5-rc cycle
Here are few fixes for v5.5-rc cycle:
- Two corner case fixes related to ti-sysc driver clock issues
- Fixes for am57xx dts for pcie gpios
- Beagle-x15 regulator dts fix
- Fix for wkup_m3_ipc driver race
* tag 'omap-for-v5.5/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: wkup_m3_ipc: Fix race condition with rproc_boot
ARM: dts: beagle-x15-common: Model 5V0 regulator
ARM: dts: am571x-idk: Fix gpios property to have the correct gpio number
ARM: dts: am57xx-beagle-x15/am57xx-idk: Remove "gpios" for endpoint dt nodes
bus: ti-sysc: Fix iterating over clocks
ARM: OMAP2+: Fix ti_sysc_find_one_clockdomain to check for to_clk_hw_omap
Link: https://lore.kernel.org/r/pull-1578418121-413328@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables hardware random number generator support for the BCM2711
on the Raspberry Pi 4 board.
Signed-off-by: Stephen Brennan <stephen@brennan.io>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
[nsaenzjulienne@suse.de: remove unnecessary status="okay"]
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
BCM2711 inherits from BCM283X, but has an incompatible HWRNG. Move this
node to bcm2835-common.dtsi, so that BCM2711 can define its own.
Signed-off-by: Stephen Brennan <stephen@brennan.io>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
A few clocks from the CCU were exported later, and references to them in
the device tree were using raw numbers.
Now that the DT binding header changes are in as well, switch to the
macros for more clarity.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The Allwinner R40 SoC contains four SPI controllers, using the newer
sun6i design (but at the legacy addresses).
The controller seems to be fully compatible to the A64 one, so no driver
changes are necessary.
The first three controllers can be used on two sets of pins, but SPI3 is
only routed to one set on Port A.
Only the pin groups for SPI0 on PortC and SPI1 on PortI are added here,
because those seem to be the only one exposed on the Bananapi boards.
Tested by connecting a SPI flash to a Bananapi M2 Berry SPI0 and SPI1
header pins.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
There's a SMSC USB2640 (USB hub & SD controller) connected to it, but
the SD card slot footprint is unpopulated. Also connected to the hub is
a SMSC LAN7500 gigabit ethernet adapter.
Link: https://lore.kernel.org/r/20191220065314.237624-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Olof Johansson <olof@lixom.net>
There are two on MMP3, along with the PHYs. The PHYs are made compatible
with the NOP transceiver, since there's no driver for the time being and
they're likely configured by the firmware.
Link: https://lore.kernel.org/r/20191220065314.237624-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Touch screen support for the iwg20d board,
- ARM global timer support on Cortex-A9 MPCore SoCs,
- Miscellaneous fixes for issues detected by "make dtbs_check".
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Merge tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.6
- Touch screen support for the iwg20d board,
- ARM global timer support on Cortex-A9 MPCore SoCs,
- Miscellaneous fixes for issues detected by "make dtbs_check".
* tag 'renesas-arm-dt-for-v5.6-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: sh73a0: Add missing clock-frequency for fixed clocks
ARM: dts: r8a7778: Add missing clock-frequency for fixed clocks
ARM: dts: rcar-gen2: Add missing mmio-sram bus properties
ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-mask
ARM: dts: renesas: Group tuples in pci ranges and dma-ranges properties
ARM: dts: renesas: Group tuples in interrupt properties
ARM: dts: renesas: Group tuples in regulator-gpio states properties
ARM: dts: r8a7779: Add device node for ARM global timer
ARM: dts: sh73a0: Add device node for ARM global timer
ARM: dts: sh73a0: Rename twd clock to periph clock
ARM: dts: iwg20d-q7-common: Add LCD support
Link: https://lore.kernel.org/r/20200106104857.8361-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
- Proper include file for the AB8505 PMIC variant.
- Add a DTS file for the GT-I8190/Golden
- Extend the IMU, touch screen, WiFi and Bluetooth
as separate patches.
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Merge tag 'ux500-armsoc-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Support the Samsung GT-I8190/Golden phone:
- Proper include file for the AB8505 PMIC variant.
- Add a DTS file for the GT-I8190/Golden
- Extend the IMU, touch screen, WiFi and Bluetooth
as separate patches.
* tag 'ux500-armsoc-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: samsung-golden: Add Bluetooth
ARM: dts: ux500: samsung-golden: Add WiFi
ARM: dts: ux500: samsung-golden: Add touch screen
ARM: dts: ux500: samsung-golden: Add IMU (accelerometer + gyroscope)
ARM: dts: ux500: Add device tree for Samsung Galaxy S III mini (GT-I8190)
dt-bindings: arm: ux500: Document samsung,golden compatible
ARM: dts: ux500: Add device tree include for AB8505
ARM: dts: ux500: Remove unused ste-href-ab8505.dtsi
Link: https://lore.kernel.org/r/CACRpkdaN2Lv_rBEYNiyAarA81yea6Eky8w_htqZqdRng8S-DcA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
The register blocks don't occupy 4K. In fact, some blocks are packed
close to others and assuming they're 4K causes overlaps:
pxa2xx-i2c d4033800.i2c: can't request region for resource
[mem 0xd4033800-0xd40347ff]
Link: https://lore.kernel.org/r/20191220071443.247183-1-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Olof Johansson <olof@lixom.net>
The CSI0 and CSI1 blocks are the same as found on the A20. However only
CSI0 is supported upstream right now.
Add a device node for CSI0 using the A20 compatible as a fallback, and
the standard pinctrl options. Also add the MBUS interconnect.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The CSI controller driver now supports the second CSI controller, CSI1.
Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The CSI controller driver now supports the second CSI controller, CSI1.
Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Some old SoCs, while supporting LVDS, don't list the LVDS clocks and reset
lines. Let's add them when relevant.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
tcon_tv0, tcon_tv1 nodes have a clock names of tcon-ch0,
tcon-ch1 which are referring tcon_top clocks via index
numbers like 0, 1 with CLK_TCON_TV0 and CLK_TCON_TV1
respectively.
Use the macro in place of index numbers, for more code
readability.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The ARM Cortex-A7 cores used in the Allwinner R40 SoC have their usual
Performance Monitoring Unit (PMU), which allows perf to use hardware
events.
The SoC integrator just needs to connect each per-core interrupt line
to the GIC. The R40 manual does not really mention those IRQ lines, but
experimentation in U-Boot shows that interrupts 152-155 are connected to
the four cores (similar to the A20).
Tested on a Bananapi M2 Berry, with perf and taskset to confirm the
association between cores and interrupts.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The GIC used in the R40 SoC is an ARM GIC-400 with virtualization support,
so let's advertise the full 8K region of the GICC MMIO frame to enable
KVM's usage of the GIC (as we do already for all other SoCs).
Tested by running KVM on a Bananapi M2 Berry.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
"clock-frequency" is a required property for devices nodes compatible
with "fixed-clock", leading to warnings when running
$ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/fixed-clock.yaml
arch/arm/boot/dts/sh73a0-kzm9g.dt.yaml: extcki: 'clock-frequency' is a required property
Fix this by adding the missing "clock-frequency" properties to the various
clocks, to be overridden by the board DTS files when populated.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162736.2160-1-geert+renesas@glider.be
"clock-frequency" is a required property for devices nodes compatible
with "fixed-clock", leading to warnings when running
$ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/fixed-clock.yaml
arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_a: 'clock-frequency' is a required property
arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_b: 'clock-frequency' is a required property
arch/arm/boot/dts/r8a7778-bockw.dt.yaml: audio_clk_c: 'clock-frequency' is a required property
Fix this by adding the missing "clock-frequency" properties to the audio
clocks, to be overridden by board DTS files when populated.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162712.2056-1-geert+renesas@glider.be
"#address-cells", "#size-cells", and "ranges" are required properties
for devices nodes compatible with "mmio-sram", leading to warnings when
running "make dtbs_check":
$ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property
...
Fix this by adding the missing properties to the mmio-sram device nodes
in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
"make dtbs_check" emits warnings like:
pci@ee090000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
pci@ee0b0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
pci@ee0d0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488
According to dt-schemas/schemas/pci/pci-bus.yaml, the PCI high address
cell value in the "interrupt-map-mask" property must lie in the range
0..0xf800.
Fix this by correcting the values from 0xff00 to 0xf800 in all affected
R-Car Gen2 and RZ/G1 DTS files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162459.1731-1-geert+renesas@glider.be
Current USB3503 driver ignores GPIO polarity and always operates as if the
GPIO lines were flagged as ACTIVE_HIGH. Fix the polarity for the existing
USB3503 chip applications to match the chip specification and common
convention for naming the pins. The only pin, which has to be ACTIVE_LOW
is the reset pin. The remaining are ACTIVE_HIGH. This change allows later
to fix the USB3503 driver to properly use generic GPIO bindings and read
polarity from DT.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191211145208.24976-1-m.szyprowski@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Vinod Koul <vkoul@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch removes all instances of IRQ_TYPE_NONE, which fixes warning
messages during boot. It also changes interrupt types to their
corresponding macros, as defined in arm-gic.h.
Signed-off by: Victhor Foster <victhor.foster@ufpe.br>
Link: https://lore.kernel.org/r/1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch changes the tsens peripheral definition to the new style,
which fixes a kernel panic caused by a change in the tsens driver,
introduced by commit 37624b5854. There
was a patch submitted recently to this list that should fix this problem
with old device trees and the new driver, so it may be redundant at this
point, in terms of fixing the kernel panic, but this should align the
APQ8084 device tree with the others.
Signed-off by: Victhor Foster <victhor.foster@ufpe.br>
Link: https://lore.kernel.org/r/108381142.9510389.1577057823350.JavaMail.zimbra@ufpe.br
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The Libre Computer ALL-H3-IT board is a small single board computer that
is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
than a credit card.
The board features:
- H2, H3, or H5 SoC from Allwinner
- 2 DDR3 DRAM chips
- Realtek RTL8821CU based WiFi module
- 128 Mbit SPI-NOR flash
- micro-SD card slot
- micro HDMI video output
- FPC connector for camera sensor module
- generic Raspberri-Pi style 40 pin GPIO header
- additional pin headers for extra USB host ports, ananlog audio and
IR receiver
Only H5 variant test samples were made available, but the vendor does
have plans to include at least an H3 variant. Thus the device tree is
split much like the ALL-H3-CC, with a common dtsi file for the board
design, and separate dts files including the common board file and the
SoC dtsi file. The other variants will be added as they are made
available.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
There is just one sensor for the CPU.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
There are three sensors, two for each CPU cluster, one for GPU.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
samsung-golden uses a BCM4334 WiFi+BT combo chip.
The BT part is connected via UART and supported by the hci_bcm
driver in mainline.
Add the necessary device tree changes to make it load correctly.
It requires (seemingly) device-specific firmware that can be
extracted from the stock Android system used on samsung-golden:
- /system/bin/bcm4334.hcd -> /lib/firmware/brcm/BCM4334B0.hcd
On my device, scanning for other Bluetooth devices works just fine,
but for some reason it keeps disconnecting immediately
when attempting to connect to an other device.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-9-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
samsung-golden uses a BCM4334 WiFi+BT combo chip, connected to SDIO.
It is supported by the brcmfmac driver in mainline,
so we only need to set up the device tree to make it work correctly.
Note: brcmfmac requires (proprietary) firmware + a device-specific
NVRAM file. Both can be extracted from the stock Android system
used on samsung-golden:
- /system/etc/wifi/bcmdhd_sta.bin_b2 -> /lib/firmware/brcm/brcmfmac4334-sdio.bin
- /system/etc/wifi/nvram_net.txt_GPIO4 -> /lib/firmware/brcm/brcmfmac4334-sdio.samsung,golden.txt
brcmfmac4334-sdio.bin from linux-firmware also seems to work,
but results in occasional errors for some reason.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-8-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
samsung-golden has an Atmel mXT224S touch controller connected to I2C.
It is supported by the existing driver for atmel,maxtouch, so all we
need to do to make it work is to define the necessary device tree nodes.
The atmel_mxt_ts driver does not support controlling regulators yet,
so add regulator-always-on for now to turn on the necessary regulators.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-7-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
samsung-golden has a InvenSense MPU-6051M IMU that provides an
accelerometer and gyroscope. It seems to be functionally compatible
with MPU-6050 so we can easily enable it by adding the necessary
device tree nodes.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-6-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Samsung Galaxy S III mini (GT-I8190) is a smartphone with Ux500 SoC
released in 2012. Thanks to the great mainline support for Ux500,
it can actually run mainline Linux quite well.
Add a new device tree for it with support for:
- Internal Storage (eMMC)
- External Storage (Micro SD card)
- UART
- GPIO Buttons
- Vibrator
Note that the device tree cannot be booted directly with
the original (Samsung) bootloader. It keeps the L2 cache turned on,
which causes the kernel to hang shortly after decompression.
As a workaround I have created a port of (mainline) U-Boot,
which locks the L2 cache before booting Linux. At the moment it does not
replace the Samsung bootloader, instead we let the original bootloader
load U-Boot as an another (intermediate) bootloader.
Another advantage of this is that U-Boot has proper device tree support,
so we do not need to hardcode the kernel command line in the device tree.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-5-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
AB8505 is a slightly newer version of AB8500.
Overall it is quite similar, but there are some differences like
the number of GPIOs and regulators. Therefore we need a separate
device tree definition for devices making use of AB8505.
The AB8500-specific nodes were moved out of ste-dbx5x0.dtsi in
commit a46f7c6762 ("ARM: dts: ux500: Move ab8500 nodes to ste-ab8500.dtsi").
Add a new "ste-ab8505.dtsi" device tree include in a similar way.
Keep the battery/charging related sub-devices disabled by default
since they require additional configuration to work correctly.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-3-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pin configuration for HREF boards with AB8505 was added in
commit 77ad9dfc2c ("ARM: ux500: move last AB8505 set-up to DT").
As the commit message notes, it was unused back then and it has
remained so even today, especially considering AB8505 did not have
proper device tree support until recently.
We are now preparing to add support for some Samsung smartphones
that are using AB8505. However, they use different pin configs
because using ste-href-ab8505.dtsi is known to break UART.
There were not many HREFs with AB8505, so at this point it seems
unlikely that we will ever make use of this include. Remove it.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191219202052.19039-2-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The SGTL5000 VDDIO is connected to the PMIC SW2 output, not to
a fixed 3V3 rail. Describe this correctly in the DT.
Fixes: 52c7a088ba ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to arm cpus binding doc,
"
On 32-bit ARM v7 or later systems this property is
required and matches the CPU MPIDR[23:0] register
bits.
Bits [23:0] in the reg cell must be set to
bits [23:0] in MPIDR.
All other bits in the reg cell must be set to 0.
"
In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it.
Otherwise there will be warning:
"DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map"
Fixes: 20434dc92c ("ARM: dts: imx: add common imx7ulp dtsi support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-babbage has a TFP410 chip that receives 24-bit RGB parallel
input and convert it to DVI.
Fix the device tree description to reflect the real hardware.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Mux the HDMI CEC pin to make HDMI CEC working. With this change HDMI CEC
seems to work fine on a Apalis iMX6 on Ixora using cec-ctl.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The only correct and documented compatible string for the rv3029 is
microcrystal,rv3029. Fix it up.
Fixes: 52c7a088ba ("ARM: dts: imx6q: Add support for the DHCOM iMX6 SoM and PDK2")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
While the EPDC is optional, both consumer and industrial editions
have the PXP module, so adding it to the corresponding .dtsi
Information taken from freescale kernel, compared with the
reference manual and tested by a separate program.
Since it does not depend on external wiring, the
status = "disabled" is left out here.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Carrier board often referred as baseboard. For making
complete SBC or any other industrial boards, these
carrier boards will be used with associated SOMs.
Radxa has Dalang carrier board which supports on-board
peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI,
eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc.
Right now Dalang carrier board is used with two SBC-variants:
Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board
Rock Pi N8 => VMARC RK3288 SOM + Dalang carrier board(+codec)
So add this carrier board dtsi as a separate file in
ARM directory, so-that the same can reuse it in both
rk3288, rk3399pro variants of Rockchip SOMs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20191216174711.17856-4-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Split the existing Kizbox Mini boards into three board configuration,
the base board, the mother board and the RailDIN board.
Add a new dts file for the SmartKiz board support.
Signed-off-by: Kévin RAYMOND <k.raymond@overkiz.com>
Signed-off-by: Mickael GARDET <m.gardet@overkiz.com>
Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com>
Link: https://lore.kernel.org/r/20191220103835.160154-2-kamel.bouhara@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI devices nodes should
be grouped. Not doing so causes "make dtbs_check" to emit warnings
like:
pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not valid under any of the given schemas (Possible causes of the failure):
pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not of type 'boolean'
pcie@fe000000: dma-ranges:0: [1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0] is too long
Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-5-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped. While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property, leading
to warnings like:
pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long
pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long
Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
To improve human readability and enable automatic validation, the tuples
in the "states" properties of device nodes compatible with
"regulator-gpio" should be grouped, as reported by "make dtbs_check":
$ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi0: states:0: Additional items are not allowed (1800000, 0 were unexpected)
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi0: states:0: [3300000, 1, 1800000, 0] is too long
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi1: states:0: Additional items are not allowed (1800000, 0 were unexpected)
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi1: states:0: [3300000, 1, 1800000, 0] is too long
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi2: states:0: Additional items are not allowed (1800000, 0 were unexpected)
arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: regulator-vccq-sdhi2: states:0: [3300000, 1, 1800000, 0] is too long
...
Fix this by grouping the tuples using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-2-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.
The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-4-geert+renesas@glider.be
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.
The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-3-geert+renesas@glider.be
The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.
Hence rename it from "twd" to "periph".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191211135222.26770-2-geert+renesas@glider.be
The MMC configuration clock controller in the A80 definition has a
clock-names and reset-names property, even though the binding for that
controller doesn't declare it.
Remove it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.
Let's fix this.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The TCON binding mandates a dmas phandle to the DMAengine channel used for
that controller. However, since it's not used in the driver, some device
trees have been missing it. Let's add it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
The V3s mixer node has an assigned clocks property, while the driver also
enforces it.
Since assigned-clocks is pretty fragile anyway, let's just remove it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
While this is functional, it's a best practice to always have the clocks
and reset lines in order, in case we ever need to have compatibility code.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Hardkernel's Odroid XU3/XU4/HC1 boards use bootloader, which configures
top PLLs to the following values: MPLL: 532MHz, CPLL: 666MHz and DPLL:
600MHz.
Adjust all bus related OPPs to the values that are possible to derive
from the top PLL configured by the bootloader. Also add a comment for
each bus describing which PLL is used for it.
The most significant change is the highest rate for wcore bus. It has
been increased to 532MHz as this is the value configured initially by
the bootloader. Also the voltage for this OPP is changed to match the
value set by the bootloader.
This patch finally allows the buses to operate on the rates matching the
values set for each OPP and fixes the following warnings observed on
boot:
exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
...
exynos-bus soc:bus_wcore: dev_pm_opp_set_rate: failed to find current OPP for freq 532000000 (-34)
exynos-bus soc:bus_noc: dev_pm_opp_set_rate: failed to find current OPP for freq 111000000 (-34)
exynos-bus soc:bus_fsys_apb: dev_pm_opp_set_rate: failed to find current OPP for freq 222000000 (-34)
The problem with setting incorrect (in some cases much lower) clock rate
for the defined OPP were there from the beginning, but went unnoticed
because the only way to observe it was to manually check the rate of the
respective clocks. The commit 4294a779bd ("PM / devfreq: exynos-bus:
Convert to use dev_pm_opp_set_rate()") finally revealed it, because it
enabled use of the generic code from the OPP framework, which issues the
above mentioned warnings.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Currently the only Exynos5422-based boards that support bus frequency
scaling are Hardkernel's Odroid XU3/XU4/HC1. Move the bus related OPPs
to the boards DTS, because those OPPs heavily depend on the clock
topology and top PLL rates, which are being configured by the board's
bootloader.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.
Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On am57xx-beagle-x15, 5V0 is connected to P16, P17, P18 and P19
connectors. On am57xx-evm, 5V0 regulator is used to get 3V6 regulator
which is connected to the COMQ port. Model 5V0 regulator here in order
for it to be used in am57xx-evm to model 3V6 regulator.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit d23f3839fe ("ARM: dts: DRA7: Add pcie1 dt node for
EP mode") while adding the dt node for EP mode for DRA7 platform,
added rc node for am571x-idk and populated gpios property with
"gpio3 23". However the GPIO_PCIE_SWRST line is actually connected
to "gpio5 18". Fix it here. (The patch adding "gpio3 23" was tested
with another am57x board in EP mode which doesn't rely on reset from
host).
Cc: stable <stable@vger.kernel.org> # 4.14+
Fixes: d23f3839fe ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
PERST# line in the PCIE connector is driven by the host mode and not
EP mode. The gpios property here is used for driving the PERST# line.
Remove gpios property from all endpoint device tree nodes.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert omap5 IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Convert omap4 IOMMUs to use ti-sysc instead of legacy omap-hwmod based
implementation. Enable the IOMMUs also while doing this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Olof Johansson