Both the PAL and NTSC standards are interlaced where a
frame consist of two fields. Total number of lines in a frame in both systems
are an odd number so the two fields will have different length.
In the 625 line standard ("PAL") the odd field of the frame is transmitted first,
while in the 525 standard ("NTSC") the even field is transmitted first.
This adds the possibility to change output config between the fields and standards.
This setting will reduce the "format-jitter" on the signal sent by the pixelport
moving the difference between the fields to vertical front/back-porch only.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
For edid with no Source Physical Address (spa), set
spa-location to default and use correct values from edid.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Added support for YCrCb analog input.
If input is ADV7842_MODE_RGB and RGB quantization range is set to
V4L2_DV_RGB_RANGE_AUTO, then video with CEA timings will be received
as RGB. For ADV7842_MODE_COMP, automatic CSC mode will be selected.
See table 48 on page 281 in "ADV7842 Hardware Manual, Rev. 0, January 2011"
for details.
Make sure that when switching inputs the RGB quantization range is
updated as well.
Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The method of disabling the irq-output pin caused many "empty"
interrupts. Instead, actually disable/enable the interrupts by
changing the interrupt masks.
Also enable STORE_MASKED_IRQ in INT1 configuration, otherwise when HDMI
events happen while the interrupt is masked those events will be ignored
when the interrupt is unmasked.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Bit 6 of register 0x8f was cleared incorrectly (must be 1), and bit 4
of register 0x91 was set incorrectly (must be 0).
These bits are undocumented, so we shouldn't modify them to values different
from what the datasheet specifies.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This simplified the code quite a bit.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Fix various spelling errors in strings and comments throughout the media
tree. The majority of these were found using Lucas De Marchi's codespell
tool.
[m.chehab@samsung.com: discard hunks with conflicts]
Signed-off-by: Jonathan McCrohan <jmccrohan@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This is a Analog Devices Component/Graphics/SD Digitizer with 2:1
Multiplexed HDMI Receiver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Martin Bugge