Interrupt lines from on-board devices are connected to the GPIO
controller. Add GPIO hogging so that the corresponding GPIO line
is automatically requested.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Interrupt lines from on-board devices are connected to the GPIO
controller. Handle this correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The GPIO controller also acts as an interrupt controller and the
interrupt lines are connected to the AIDET block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fix warnings like follows:
Warning (node_name_chars_strict): Character '_' not recommended in ...
Commit 8654cb8d03 ("dtc: update warning settings for new bus and
node/property name checks") says these checks are a bit subjective,
but Rob also says to not add new W=2 warnings.
The exising warnings should be fixed in order to catch new ones
easily.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add efuse node for UniPhier LD11, LD20, and PXs3.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
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Merge tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Pull "Allwinner fixes for 4.14" from Maxime Ripard:
Two fixes, one for the A31 DRM binding, and one for a missing regulator on
the pine MMC controller.
* tag 'sunxi-fixes-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun6i: Fix endpoint IDs in second display pipeline
arm64: allwinner: a64: pine64: Use dcdc1 regulator for mmc0
Without the STDMAC clock enabled, the USB 2.0 hosts do not work.
This clock must be explicitly listed in the "clocks" property because
it is independent of the other clocks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since Salvator-X[S] have a USB2.0 dual-role channel (CN9), this patch
adds dr_mode property for USB2.0 channel 0 (EHCI/OHCI and HS-USB)
as "otg".
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull "Rockchip dts64 updates for 4.15 part1" from Heiko Stübner:
The biggest step forward is probably the enablement of display support
on the rk3399-firefly, which got its default serial set as well and
got cec support as well.
Gru boards got their touchpad support refined to actually mark the button
correctly and also git their rt5514 dsp added.
And finally the rk3328 eval board got its cpu regulator and mmc nodes.
* tag 'v4.15-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: enable cec pin for rk3399 firefly
arm64: dts: rockchip: add the cec clk for dw-mipi-hdmi on rk3399
arm64: dts: rockchip: default serial for Firefly-RK3399
arm64: dts: rockchip: enable touchpad button for rk3399-gru-kevin
arm64: dts: rockchip: enable display subsystem on rk3399-firefly
arm64: dts: rockchip: Add rt5514 dsp for rk3399 gru
arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board
arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
Pull "Qualcomm ARM64 Updates for v4.15" from Andy Gross:
* Add PCIE support to relevant MSM8996 based boards
* Add RPM clock controller node on MSM8996
* Add dload address on MSM8916 and MSM8996
* Add MBHC button support on APQ8016 SBC
* Add RTMFS specific compatible for rmtfs memory node
* Fixups for MSM8916 GPIO line names and MDP address length
* tag 'qcom-arm64-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: msm8916: Mark rmtfs node as qcom, rmtfs-mem compatible
arm64: dts: msm8996: Add the rpm clock controller node
arm64: dts: qcom: sbc: Name GPIO lines
arm64: dts: qcom: msm8916: Shrink mdp address length for msm8916
arm64: dts: apq8016-sbc: add mbhc buttons support
arm64: dts: qcom: Specify dload address for msm8916 and msm8996
arm64: dts: apq8096-db820c: never disable regulator on LS expansion
arm64: dts: apq8096-db820c: Enable on board 3 pcie root complex
arm64: dts: qcom: msm8996: add support to pcie
ARM64: DT: Hisilicon SoC DT updates for 4.15
- Add CoreSight related nodes for hi6220
- Add GPIO line names for hikey960
- Rectify the GPIO line names of the Poplar board to keep consistency
- Add thermal sensor binding doc and dt nodes for hi3660
* tag 'hisi-arm64-dt-for-4.15' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Register Hi3660's thermal sensor
dt-bindings: Document the hi3660 thermal sensor binding
arm64: dts: hisilicon: Standardize Poplar GPIO line names
arm64: dts: hikey960: Update HiKey960 with GPIO line names
arm64: dts: hi6220: add coresight dt nodes
Pull "ARMv8 Vexpress/Juno DT update for v4.15" from Sudeep Holla:
Just single update to enable PSCI support on Foundation models
* tag 'juno-updates-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: foundation-v8: Enable PSCI mode
Pull "SoCFPGA DTS updates for v4.15" from Dinh Nguyen:
- Stratix10 platform updates
- Fix up gic register entry
- Enable ethernet/SDMMC
- Update reset manager properties
* tag 'socfpga_dts_for_v4.15_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: stratix10: add reset property for various peripherals
arm64: dts: stratix10: add the 'altr,modrst-off' property
arm64: dts: stratix10: include the reset manager bindings
arm64: dts: stratix10: add ethernet/sdmmc support to the S10 devkit
arm64: dts: stratix10: fix up the gic register for the Stratix10 platform
Pull "Renesas ARM64 Based SoC DT Updates for v4.15" from Simon Horman:
* r8a7795 (H3)
- Use r8a7795-cpg-mssr and r8a7795-sysc bindings
Hardcoded indicies are replaced with symbols now that they are available
- Drop bogus HDMI node name suffixes
Laurent Pinchart says: Node names should not use numerical suffixes if
the nodes can be distinguished by unit-address
- Update PFC node name to pin-controller
Shimoda-san says the PFC node name is changed "from e6060000.pfc and
pfc@e6060000 to e6060000.pin-controller and pin-controller@e6060000
like other Renesas SoCs."
* r8a7795 (H3) ES1.0
- Drop extra zero from XHCI unit address
This corrects a typo were ee0400000 rather than ee040000 was used
as the unit address.
* r8a7796 (M3-W)
- Add FDP1 instance
Laurent Pinchart says: The r8a7796 has a single FDP1 instance.
* r8a7795 (H3) and r8a7796 (M3-W) SoCs
- Add USB3.0 peripheral device nodes
Shimoda-san says that this is not enabled on the Salvator-X/XS boards
for now as:
+ we need a special cable (USB type-A to A cross cable).
+ we can swap the role by renesas_usb3 driver even if we use a normal
cable and after usb3.0 host is running, but I think it's a special
use case.
* r8a7795 (H3) and r8a7796 (M3-W) ULCB boards
- Enable display output
Laurent Pinchart says: The DU is already wired up to the HDMI encoder,
all we need to do is enable it.
* r8a77995 (D3) Draak board
- Enable EthernetAVB and , USB2.0 Host and PHY
- Add serial console pins.
This is safe to do now that r8a77995 PFC driver support is present
* r8a77970 (V3M)
- Add basic support for SoC and EtherAVB, [H]SCIF and SYS-DMAC nodes
This is a step towards enabling EtherAVB and [H]SCIF with SYS-DMAC
in the Eagle board support for which is under review
* tag 'renesas-arm64-dt-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node
arm64: dts: renesas: r8a7795: add USB3.0 peripheral device node
arm64: dts: renesas: r8a77995: draak: enable EthernetAVB
arm64: dts: renesas: r8a77995: draak: enable USB2.0 Host (EHCI/OHCI)
arm64: dts: renesas: r8a77995: draak: enable USB2.0 PHY
arm64: dts: renesas: r8a77995: add USB2.0 Host (EHCI/OHCI) device node
arm64: dts: renesas: r8a77995: Add USB2.0 PHY device node
arm64: dts: draak: Add serial console pins
arm64: dts: renesas: r8a77970: add EtherAVB support
arm64: dts: renesas: r8a77970: add [H]SCIF support
arm64: dts: renesas: r8a77970: add SYS-DMAC support
arm64: dts: renesas: initial R8A77970 SoC device tree
arm64: dts: renesas: r8a77995: Add EthernetAVB device node
arm64: dts: renesas: r8a77995: add GPIO device nodes
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions
arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
arm64: renesas: Add Renesas R8A77970 Kconfig support
arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes
arm64: dts: renesas: ulcb: Enable display output
arm64: dts: renesas: r8a77995: update PFC node name to pin-controller
...
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*'
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add 12V regulator to backlight allowing the power supply
for the backlight to be found.
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Merge tag 'renesas-fixes-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Renesas ARM Based SoC Fixes for v4.14" from Simon Horman:
Add 12V regulator to backlight allowing the power supply
for the backlight to be found.
* tag 'renesas-fixes-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: salvator-common: add 12V regulator to backlight
exceed 3.0V, so they got fixed to not be at 3.3V
And Arnd found a typo in the recently added iommu nodes.
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Merge tag 'v4.14-rockchip-dts64fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Pull "Rockchip dts64 Fixes for 4.14 part 2" from Heiko Stübner:
The vqmmc voltages on rk3399 pose a risk for the chip if they
exceed 3.0V, so they got fixed to not be at 3.3V
And Arnd found a typo in the recently added iommu nodes.
* tag 'v4.14-rockchip-dts64fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: fix typo in iommu nodes
arm64: dts: rockchip: correct vqmmc voltage for rk3399 platforms
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
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Merge tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fixes for 4.14 (part 2)" from Gregory CLEMENT
Two device tree related fixes:
- One on Armada 38x using a other compatible string for I2C in order
to cover an errata.
- One for Armada 7K/8K fixing a typo on interrupt-map property for
PCIe leading to fail PME and AER root port service initialization
And the last one for the mbus fixing the window size calculation when
it exceed 32bits
* tag 'mvebu-fixes-4.14-2' of git://git.infradead.org/linux-mvebu:
bus: mbus: fix window size calculation for 4GB windows
ARM: dts: Fix I2C repeated start issue on Armada-38x
arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller
This adds the thermal sensor device provided by the BPMP, and the
relevant thermal sensors to the Tegra186 device tree.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra186 has three PCIe controllers, which can be operated
in 401, 211 or 111 lane combinations. Add DT support for
PCIe controllers.
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a node for the Video Image Compositor on the Tegra186.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the node for Host1x on the Tegra186, without any subdevices
for now.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add #power-domain-cells for the BPMP node on Tegra186 so that the power
domain provider may be used.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC,
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The latest dtc warns about an extraneous cell in the interrupt
property of two of the iommu device nodes:
Warning (interrupts_property): interrupts size is (16), expected multiple of 12 in /iommu@ff373f00
Warning (interrupts_property): interrupts size is (16), expected multiple of 12 in /iommu@ff900800
This removes the typo.
Fixes: cede4c79de ("arm64: dts: rockchip: add rk3368 iommu nodes")
Fixes: 49c82f2b7c ("arm64: dts: rockchip: add rk3328 iommu nodes")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The vcc_sd or vcc_sdio used for IO voltage for sdmmc and sdio
interface on rk3399 platform have a limitation that it can't be
larger than 3.0v, otherwise it has a potential risk for the chip.
Correct all of them.
Fixes: 171582e00d ("arm64: dts: rockchip: add support for firefly-rk3399 board")
Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Fixes: 8164a84cca ("arm64: dts: rockchip: Add support for rk3399 sapphire SOM")
Cc: stable@vger.kernel.org
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use newly added R-Car GPIO Gen3 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7796 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Use newly added R-Car GPIO Gen3 fallback compat string
in place of now deprecated non-generation specific
R-Car GPIO fallback compat string in the DT of the r8a7795 SoC.
This should have no run-time effect as the driver matches against
the per-SoC compat string before considering the fallback compat string.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
should be same value.
On commit 2752660a37 ("arm64: dts: renesas: ulcb: sound
clock-frequency needs descending order") exchanged <&rcar_sound 0>,
but it didn't modify "audio_clkout".
This patch fixup it.
Fixes: 2752660a37 ("arm64: dts: renesas: ulcb: sound clock-frequency needs descending order")
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"audio_clkout" is dummy clock of <&rcar_sound 0> to avoid clock loop
which invites probe conflict. Thus <&rcar_sound 0> and "audio_clkout"
should be same value.
On commit 5e2feac330 ("arm64: renesas: salvator-common: sound
clock-frequency needs descending order") exchanged <&rcar_sound 0>,
but it didn't modify "audio_clkout".
This patch fixup it.
Fixes: 5e2feac330 ("arm64: renesas: salvator-common: sound clock-frequency needs descending order")
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a Device Tree for the PROBOX2 AVA TV Box.
Move common memory reservations into rtd1295.dtsi.
Cc: support@probox2.com
Signed-off-by: Andreas Färber <afaerber@suse.de>
Add a pinctrl setting to configure the cec pin to the correct function.
Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the HDMI CEC controller main clock coming from the CRU.
Signed-off-by: Pierre-Hugues Husson <phh@phh.me>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add nodes of thermal monitor and thermal zone for UniPhier LD20 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for LD20.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Firefly-RK3399 uses serial2 with 1,500,000 baud by default
for communication in U-Boot and in the vendor provided distros.
So let us set the same default in the Linux kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Adding the linux,gpio-keymap entry also has
the side-effect of making the driver register
the touchpad as a touchpad rather than another
touchscreen.
The index for BTN_LEFT was found by trial and error.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The SD card slot connected to the SD controller of the CP part has a
carrier detect pin connected the gpio expander. This patch enables it
allowing supporting the hotplug event for the SD card.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Now that we have a binding defined for the shared file system memory use
this to describe the rmtfs memory region.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This names the GPIO lines on the APQ8016 "SBC" also known
as the DragonBoard 410c, according to the schematic. This
is necessary for a conforming userspace looking across
all GPIO chips for the GPIO lines named "GPIO-A" thru
"GPIO-L".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This shrinks the address size down to 89000 from its previous 90000
which was mistakenly pulled from downstream.
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
On msm8916 and msm8996 boards a secure io-write is used to write the
magic for selecting "download mode", specify this address in the
DeviceTree.
Note that qcom_scm.download_mode=1 must be specified on the kernel
command line for the kernel to attempt selecting download mode.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
1.8v regulator on LS expansion should not be disabled anytime to comply
with 96boards spec. So make this explicit with always-on flag.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since the switch to documented uart bindings, the old undocumented
compatible binding was left for simplicity.
This patch removes these unneeded compatible strings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Since the switch to documented uart bindings, the clocks are
redefined in the SoC family dtsi file.
This patch removes these unneeded properties.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This year, Amlogic updated the ARM Trusted Firmware reserved memory mapping
for Meson GXL SoCs and products sold since May 2017 uses this alternate
reserved memory mapping.
But products had been sold using the previous mapping.
This issue has been explained in [1] and a dynamic solution is yet to be
found to avoid loosing another 3Mbytes of reservable memory.
In the meantime, this patch adds this alternate memory zone only for
the GXL and GXM SoCs since GXBB based new products stopped earlier.
[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
Fixes: bba8e3f427 ("ARM64: dts: meson-gx: Add firmware reserved memory zones")
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable HS400 high speed eMMC mode on the khadas vim2
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable both gxbb USB controllers and add a 5V regulator for the OTG port
VBUS, similar to p20x.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Tronsmart Vega S96 is a TV box derived from Amlogic q200 reference design.
Cc: support@tronsmart.com
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Oleg Ivanov <balbes-150@yandex.ru>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Khadas VIM2 is a Single Board Computer, respin of the origin
Khadas VIM board, using an Amlogic S912 SoC and more server oriented.
It provides the same external connectors and header pinout, plus a SPI
NOR Flash, a reprogrammable STM8S003 MCU, FPC Connector, Cooling FAN header
and Pogo Pads Arrays.
Cc: Gouwa <gouwa@szwesion.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Since the Data Strobe pin is optional, take it out of the default
eMMC pins and add a separate entry.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
TEST_N gpio has been moved so the gpio-line-names of the cc
must be adjusted accordingly
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
TEST_N gpio has been moved so the gpio-line-names of the kvim
must be adjusted accordingly
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
GPIOX22 is now declared properly and TEST_N has been moved so
the gpio-line-names of the odroid-c2 must be adjusted accordingly
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
GPIOX22 is now declared properly and TEST_N has been moved so
the gpio-line-names of the nanopi-k2 must be adjusted accordingly
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
TEST_N has moved from the EE controller to the AO controller so
the gpio-ranges need to adjusted for it
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove pin offset on the EE controller. Meson pinctrl no longer has
this quirk
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the internal phy ACT and LINK leds pinmux
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable saradc and add the reference 1.8v regulator required.
The libretech-cc has saradc channel 0 and 2 available on the 2 first
pins of 2J3 header
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds enables 3 instances of root complexes which are
exposed on DB820c board. 3 Instances are terminted as below
PCIE0 => QCA6174
PCIE1 => MINI PCIE CARD
PCIE2 => GBE ETHERNET
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to 3 pcie root complexes found on MSM8996.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add binding for tsensor on H3660, this tsensor is used for
SoC thermal control, it supports alarm interrupt.
Signed-off-by: Kevin Wangtao <kevin.wangtao@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add CPU idle state nodes to enable C1/C2 idle states.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The hi6220-HiKey board started to name GPIO lines for
96boards, using just the plain names "GPIO-A" etc from the
96boards specification.
Poplar started to use an arbitrary "LS-GPIO-A" (etc) prefix
that is not part of the 96boards specification.
As the former notation arrived first, and we need
consistency among 96board, rectify the Poplar board to use
this too. This is important for userspace that wants to
look up GPIO names from these strings.
Cc: Jiancheng Xue <xuejiancheng@hisilicon.com>
Cc: Alex Elder <elder@linaro.org>
Cc: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This adds line names for all the GPIOs I could identify on the HiKey960
schematic.
"GPIO-A" through "GPIO-L" are the most important since they give users
a handle to look up the standard 96boards GPIOs from the GPIO character
device.
The rest of the names are more informational, nice debug information
for "lsgpio" so you can see that the right line is taken for the right
function in the kernel for example.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Zhangfei Gao <zhangfei.gao@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
For detailed coresight topology, Hi6220 has 8xCA53 CPUs and each CPU
has one Embedded Trace Macrocell (ETM); the CPU trace data is output
to the cluster funnel. Due system has another CPU and one MCU, all of
them transfer the trace data through trace bus (ATB) to SoC funnel;
the SoC funnel is connected to Embedded Trace FIFO (ETF) with 8KB
buffer; an non-configurable replicator is used to output trace data
for two sinks, one is Embedded Trace Route (ETR) so trace data can be
saved into DRAM, another is Trace Port Interface Unit (TPIU) for
capturing trace data by external debugger.
According to the Hi6220 coresight topology, this patch is to add
coresight dt nodes.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Signed-off-by: Li Zhong <lizhong11@hisilicon.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Define the Eagle board dependent part of the EtherAVB device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Interrupt Controller for External Devices
(INTC-EX) on R-Car D3, which serves external IRQ pins IRQ[0-5].
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Interrupt Controller for External Devices
(INTC-EX) on R-Car V3M, which serves external IRQ pins IRQ[0-5].
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Interrupt Controller for External Devices
(INTC-EX) on R-Car M3-W, which serves external IRQ pins IRQ[0-5].
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds gpio hogs for USB3 hub on ULCB Kingfisher board to power up and
remove from reset the hub
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports PCA9548 I2C switch on I2C4 bus on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports PCA9548 I2C switch on I2C2 bus on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports TCA9539 gpio expanders on I2C4 bus on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports TCA9539 gpio expanders on I2C2 bus on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports USB3.0 Host on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports PCIE0/1 on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports HSUSB on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports CAN0/1 on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SCIF1 on ULCB Kingfisher board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the H3ULCB ES2.0+ SoC with Kingfisher
extension infotainment board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the H3ULCB ES1.x SoC with Kingfisher
extension infotainment board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the M3ULCB with Kingfisher extension
infotainment board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial common dtsi file for Kingfisher infotainment board (R-Car
Starter Kit extension)
This commit supports the following peripherals:
- HSCIF0
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables PWM channel 0 and 1 on the draak. Each channel
connects to LTC2644 for brightness control.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Masahiro Yamada