Rename efx_nic::rss_queues to the more obvious n_rx_queues
Remove efx_rx_queue::used and other stuff that's redundant with it.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
efx_channel::has_interrupt is redundant with efx_channel::used_flags.
Remove efx_test_eventq() because it is now obviously unreachable.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Extend the SPI device setup code to support this.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Replace (cond ? 1 : 0) with cond or !!cond as appropriate, and
(cond ? 0 : 1) with !cond.
Remove some redundant boolean temporaries.
Rename one field that looks like a flag but isn't.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Remove unmap_addr since it can be calculated from dma_addr, len and
unmap_len. This saves 4-16 bytes.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Checksum generation is an attribute of our hardware TX queues, not TX
descriptors. We previously used a single queue and turned checksum
generation on or off as requested through ethtool. However, this can
result in regenerating checksums in raw packets that should not be
modified. We now create 2 hardware TX queues with checksum generation
on or off. They are presented to the net core as one queue since it
does not know how to select between them.
The self-test verifies that a bad checksum is unaltered on the queue
with checksum generation off.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This means the compiler doesn't need to use real division instructions.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This avoids deadlock in case a reset is triggered during self-test.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Remove our own implementation of I2C bit-banging.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This driver has diverged from the out-of-tree driver to which the version
number originally applied. It should be identified primarily by kernel
version.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Also change type of efx_nic_type::max_dma_mask to u64, matching
pci_dma_supported() parameter type.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This should make the driver work on 32-bit systems with 64-bit PCI support.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Add a set of self-tests accessible thorugh ethtool.
Add hardware loopback and TX disable control code to support them.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
The SFC4000 controller does not have hardware support for TSO, and the
core GSO code incurs a high cost in allocating and freeing skbs. This
TSO implementation uses lightweight packet header structures and is
substantially faster.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
The driver supports the 10Xpress PHY and XFP modules on our reference
designs SFE4001 and SFE4002 and the SMC models SMC10GPCIe-XFP and
SMC10GPCIe-10BT.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Ben Hutchings