Commit Graph

5 Commits

Author SHA1 Message Date
Linus Walleij 27e7c033d3 ARM: dts: ux500: Drop pulls on I2C buses
The I2C block in the Ux500 uses internal pull-ups on the
SoC, in fact it has to: in HS mode, the I2C block will need
to autonomously take control over the pull-up line to do
its job. This can be clearly seen from the SoC manual which
states that the silicon has a line named "en_cspu_hs" which
enables current source pull-up for high speed mode. Another
hint is that the vendor code tree never enabled the pull
up on these lines, despite being deployed on boards that
lack external pull-up resistors.

Tested on the Ux500 reference designs without any problems.

Cc: Stephan Gerhold <stephan@gerhold.net>
Reported-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126123116.56244-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold 99e1df6136 ARM: dts: ux500: Add pin configs for UART1 CTS/RTS pins
UART1 can optionally be used with additional CTS/RTS pins.
The pinctrl driver has an extra "u1ctsrts_a_1" pin group for them.

Add a new pin configuration to configure them correctly if needed.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-4-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold 4dbeac7364 ARM: dts: ux500: Add alternative SDI pin configs
SDI0/SDI1 can be used in configurations where some of the pins
(e.g. direction control) are not used. The pinctrl driver has
separate pin groups for them.

Add new pin configurations for:
  - mc0_a_2: like mc0_a_1, but without CMDDIR/DAT0DIR/DAT2DIR
  - mc1_a_2: like mc1_a_1, but without FBCLK

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-3-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold 7fee202265 ARM: dts: ux500: Rename generic pin configs according to pin group
Some components (e.g. SDI, I2C) can be used with different pin assignments.
Before we can add the alternative configurations, we need to rename the
current configurations to more generic names.

Each pin configuration usually configures one specific pin group.
Therefore we rename the configurations to use the pin group as name.
Make up for the slightly longer names by removing the "_mode" suffix.

Rename all existing uses to use the new labels.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-2-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00
Stephan Gerhold 0f8e741404 ARM: dts: ux500: Move generic pin configs out of ste-href-family-pinctrl.dtsi
All existing Ux500 boards make use of ste-href-family-pinctrl.dtsi,
which contains shared pin configurations for UART, I2C and SDI.
Most of these can be also used for devices not based on HREF.

Move the generic pin configs into a new device tree include
"ste-dbx5x0-pinctrl.dtsi". There is no functional change (yet),
as a next step we will rename the pin configs to use more generic
names.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191125122256.53482-1-stephan@gerhold.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:01 +01:00