Make the module alias match the platform device name, so gpio-kempld module
should now autoload correctly.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The memory for ts is allocated by devm_kzalloc now, so the kfree is not
required.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch converts GE I/O FPGA GPIO driver to platform driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As demonstrated by commit
390d82e312
"gpiolib: ACPI: remove gpio_to_desc() usage"
gpio_to_desc() must die. Replace one of its usage by the
newly-introduced gpiochip_get_desc() function.
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Read gpio output value from ZEVIO_GPIO_OUTPUT.
The spin_lock is required to ensure the direction is not changed before reading
input/ouput value.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Another feature that is duplicated in a number of GPIO irqchips
is that these cascades IRQs are assigned their own lock class
so as to avoid warnings about lockdep recursions. Do this also
in the generic GPIO irqchip helpers for smooth transition to
this core infrastructure.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
According to the datasheet, writing to the level register has no effect
when GPIO is programmed as input. Actually the the level register is
read-only when configured as input. Thus presetting the output level
before switching to output is _NOT_ possible. Any writes are lost!
Hence we set the level after configuring the GPIO as output.
But we cannot prevent a short low pulse if direction is set to high and
an external pull-up is connected.
Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is a DT-only driver and it will be built only when CONFIG_OF is set.
So it's pointless to use of_match_ptr.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver calls irq_alloc_domain_generic_chips() which creates a gc and
adds it to gc_list. The driver later then calls irq_setup_generic_chip()
which also initializes the gc and adds it to the gc_list() and this
corrupts the list. Enable LIST_DEBUG and you see the kernel complain.
This isn't required, irq_alloc_domain_generic_chips() did the init.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Alan Tull <delicious.quinoa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Converts the GPIO OMAP driver to register its chained irq
handler and irqchip using the helpers in the gpiolib core.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ARCH_OMAP config option was used to built the GPIO OMAP
driver but this is not consistent with the rest of the GPIO
drivers that have their own Kconfig option.
Also, this make it harder to add dependencies or reverse
dependencies (i.e: select) since that would mean touching the
sub-arch config option.
So is better to add a boolean Kconfig option for this driver
that defaults to true if ARCH_OMAP is enabled.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The gpiochip_add() function can fail if the chip cannot
be registered so the return value has to be checked and
the error propagated in case it happens.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIO OMAP driver supports different OMAP SoC families and
not all of them have the needed support to use the linear IRQ
domain mapping like OMAP1 that use the legacy domain mapping.
But this special check is not necessary since the simple IRQ
domain mapping is able to handle both cases. Having a zero
IRQ offset will be interpreted as a linear domain case while
a non-zero value will be interpreted as a legacy domain case.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
GPIO_TIMBERDALE doesn't need an explicit dependency on HAS_IOMEM,
because it depends on MFD_TIMBERDALE which itself depends on
HAS_IOMEM already.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that the gpiolib irqchip helpers can support nested, threaded
IRQ handlers, switch the TC3589x driver over to using this new
infrastructure. Tested on the Ux500.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The static IRQ base is not used on any platforms with this chip
(only Ux500). Get rid of it forever, and rely on dynamic IRQ
descriptor allocation.
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Grab state container and irq using the devm_* functions and save
some lines of hairy clean-up code.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some off-chip GPIO expanders need to be communicated by I2C or
SPI traffic, but may still support IRQs. By the sleeping nature
of such buses, such IRQ handlers need to be threaded. Support
such handlers in the gpiochip irqchip helpers by flagging IRQs
as threaded if the .can_sleep property of the gpiochip is
true.
Helpfully deny registration of chained IRQ handlers if the
.can_sleep property is set, as such chips will invariably need
a nested handler rather than a chained handler.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Change a crucial semantic ordering in the GPIO irqchip
helpers.
- Fix two nasty regressions in the ACPI gpiolib extensions.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTUQ+6AAoJEEEQszewGV1zue0P/iXpOgzTffwqS67ZtRCjHk2C
nQ5plRWLgPXJndMuuGKu38kf1HkwKbdTUAZ+tqtVe/m1kGPcv+V5XkMiPCB+nzYw
eOyMTJCPLVv485BmSlKdHLrZW8wLvq03Hs+EsKJ90YxHUYFhJNnqUkuiHqidL+eg
b/Z8Nzq2x4VSji0n4vzJKdhiSwJt4uTo9hzkC+UHylL7mM3x5/+pfRPRpbToEBCH
zitDXgcCyXLCucHeEc10e7uHXwYxdiLC8WwxK+ztnEFCK0EWWRdlSg+C0PJEnnD9
4/kEZXn69dDTSpOxgNKjGm8NLrA5FOzN7YqMuznz88RWNvtTmd3NKm7tYTlS1T4D
8BO9TJkyY8bis49Q6pwgr5J9MNdEBZimUZUjHzJYdekKxY1WBT7xPKM7CvtH2d/3
gq0qBd8HGG5fmxs6cKxgOehyOnBBMVpxTSiQmNQxPqIcz4jrtnIqVTj3zkxcb7Kf
MttAGKNf2MqIFZmRXg3TXu+KhNZsQD8oL61xNknog3TosWoLC5yQTF7HCCU+8hIz
EdOmaMoAV+K8v7mY0/KWJiKros6RNHhRUdXK/jGpNl2U5yy+Rfp9SU7jzwmv8J+O
khDKGOb2KHbc9ydzW9Ut/65Ys6oMkIbiTnwZqsdTZ/Pv2nYDOyP9L1M6ng0k1tNj
lZ34WI4WAafxZwglhLdy
=Tc0Z
-----END PGP SIGNATURE-----
Merge tag 'gpio-v3.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull gpio fixes from Linus Walleij:
"A small batch of GPIO fixes for the v3.15 series. I expect more to
come in but I'm a bit behind on mail, might as well get these to you
right now:
- Change a crucial semantic ordering in the GPIO irqchip helpers
- Fix two nasty regressions in the ACPI gpiolib extensions"
* tag 'gpio-v3.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
gpio / ACPI: Prevent potential wrap of GPIO value on OpRegion read
gpio / ACPI: Don't crash on NULL chip->dev
gpio: set data first, then chip and handler
shiraz.hashim@st.com email-id doesn't exist anymore as he has left the
company. Replace ST's id with shiraz.linux.kernel@gmail.com.
It also updates .mailmap file to fix address for 'git shortlog'.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Dan Carpenter's static code checker reports:
The patch 473ed7be0da0: "gpio / ACPI: Add support for ACPI GPIO
operation regions" from Mar 14, 2014, leads to the following static
checker warning:
drivers/gpio/gpiolib-acpi.c:454 acpi_gpio_adr_space_handler()
warn: should 'gpiod_get_raw_value(desc) << i' be a 64 bit type?
This is due the fact that *value is of type u64 and gpiod_get_raw_value()
returns int. Since i can be larger than 31, it is possible that the value
returned gets wrapped.
Fix this by casting the return of gpiod_get_raw_value() to u64 first before
shift.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
During irq mapping, in irq_set_chip_and_handler() the process
of setting this up may incur calls to lock the irqchip, which
in turn may need to dereference and use the chip data. So set
the data first, then set the chip and handler.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These changes are mostly for ARM specific device drivers that either
don't have an upstream maintainer, or that had the maintainer ask
us to pick up the changes to avoid conflicts. A large chunk of this
are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from
that, reset controllers for STi as well as a large rework of the
Marvell Orion/EBU watchdog driver are notable.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUz/1+GCrR//JCVInAQJmfg/9GyqHatDjjUPUBjUQRIEtKgGdmQwdbDqF
x+OrS/q5B5zYbpIWkbkt1IUYJfU+89Z5ev9jxI4rV824Nu9Y92mHPDnv+N/ptkIh
q2OVP3bQDpWs3aEVV2B1HBNcWrNUuwco9BJu05eegEePii/cto0/wKwWIgUmrmjy
xOLthsnp2YmeplGs7ctC6Dz8XbmELebpawejTGylARXei/SwmzB/YYDgJbYjRL2I
WSCVa8Vo+MZaGC/yxdKVTtvsKVQenxGoMO3ojikJeRdvuVRJds48Cw+UBdzWYNeJ
3Ssvbdx6Xltf9jy/7H0btOUgxPetZuUV+2XpbWfGu0Zr9FcGDv3q9hrxA+UYKnkY
GIGU0otSsmpHnX5Ms3E2xnHiV/fihxA3qohqts5kYRBDr5uc+IpW6SbDymQliCGG
OO4XmIVM3pmsqAqP3Zuseemt9CeSW2yC0XlfXkzjO74yY39c+WLBbtGI40Z5W6i0
mM1C8RD3QSNijYCEC8eqz06BQfRImsPs+jllsnJTZaHfbOsib718uvandjfG26lN
616YMcqq0Sp51HIQ4qW7f2dQr7vOyNqbukdkrwF5JgkY/nVki5kdciRg/yeipRy6
Ey80a+OTq0GQljM0F2dcH/A1eHH9KsuI1L6NdSMJsl0h6guIBORPTwTw3qJ13OkR
wpJyM+Gm+Fk=
=u/FI
-----END PGP SIGNATURE-----
Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Arnd Bergmann:
"These changes are mostly for ARM specific device drivers that either
don't have an upstream maintainer, or that had the maintainer ask us
to pick up the changes to avoid conflicts.
A large chunk of this are clock drivers (bcm281xx, exynos, versatile,
shmobile), aside from that, reset controllers for STi as well as a
large rework of the Marvell Orion/EBU watchdog driver are notable"
* tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits)
Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
Revert "net: stmmac: Add SOCFPGA glue driver"
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
ARM: STi: Add reset controller support to mach-sti Kconfig
drivers: reset: stih416: add softreset controller
drivers: reset: stih415: add softreset controller
drivers: reset: Reset controller driver for STiH416
drivers: reset: Reset controller driver for STiH415
drivers: reset: STi SoC system configuration reset controller support
dts: socfpga: Add sysmgr node so the gmac can use to reference
dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
reset: Add optional resets and stubs
ARM: shmobile: r7s72100: fix bus clock calculation
Power: Reset: Generalize qnap-poweroff to work on Synology devices.
dts: socfpga: Update clock entry to support multiple parents
ARM: socfpga: Update socfpga_defconfig
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
net: stmmac: Add SOCFPGA glue driver
watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
drivers: cci: Export CCI PMU revision
...
- Merged in a branch of irqchip changes from Thomas
Gleixner: we need to have new callbacks from the
irqchip to determine if the GPIO line will be eligible
for IRQs, and this callback must be able to say "no".
After some thinking I got the branch from tglx and
have switched all current users over to use this.
- Based on tglx patches, we have added some generic
irqchip helpers in the gpiolib core. These will
help centralize code when GPIO drivers have simple
chained/cascaded IRQs. Drivers will still define
their irqchip vtables, but the gpiolib core will
take care of irqdomain set-up, mapping from local
offsets to Linux irqs, and reserve resources by
marking the GPIO lines for IRQs.
- Initially the PL061 and Nomadik GPIO/pin control
drivers have been switched over to use the new
gpiochip-to-irqchip infrastructure with more
drivers expected for the next kernel cycle. The
factoring of just two drivers still makes it worth
it so it is already a win.
- A new driver for the Synopsys DesignWare APB GPIO
block.
- Modify the DaVinci GPIO driver to be reusable also
for the new TI Keystone architecture.
- A new driver for the LSI ZEVIO SoCs.
- Delete the obsolte tnetv107x driver.
- Some incremental work on GPIO descriptors: have
gpiod_direction_output() use a logical level,
respecting assertion polarity through ACTIVE_LOW
flags, adding gpiod_direction_output_raw() for the
case where you want to set that very value. Add
gpiochip_get_desc() to fetch a GPIO descriptor from
a specific offset on a certain chip inside driver
code.
- Switch ACPI GPIO code over to using
gpiochip_get_desc() and get rid of gpio_to_desc().
- The ACPI GPIO event handling code has been reworked
after encountering an actual real life implementation.
- Support for ACPI GPIO operation regions.
- Generic GPIO chips can now be assigned labels/names
from platform data.
- We now clamp values returned from GPIO drivers to
the boolean [0,1] range.
- Some improved documentation on how to use the polarity
flag was added.
- The a large slew of incremental driver updates and
non-critical fixes. Some targeted for stable.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTPQnkAAoJEEEQszewGV1zyf4P/AmXV0O/FoyeQnXDxDsp7V/t
JpfD0Gy8FlFmRxjG+UYutRCWUHxFQJU+j0ToVC4/N8clNS1LwA+ZwhNgB8dqRokz
JVeeqUPn95z2kGe3j9DgVXWMRAytq7y8fXFuNUN36losceuxyOj4mYKLP9Yjnp9l
4pS1TtQHF95a7qmnyYjGZy8VNcUz1gJ7wJrGxKI+Kl/8pcdA6rPqom6ozCXpZjaD
5GGQoSvXKIn44+8qZeJsebd1YEso/8K66e9JomcGEsuZl78ArDOzoSllpYF2h/RM
bo4BFUmoOL3/jVp7FFVbybfolwuRmQesY4NFqx03e+y++hxHFHl90FT+mnednS2Q
k4lB0o1YRjf2tfMmm4cJ3tVBnFRhssTVb9ynDbzUw61mNVEuxP90f/njrHlObnPT
1uVVWUE+4ojral213S2IYGHkg1OlWSn0DP6tEaswjOsGJrMdXpdxS5RPwcRtcByT
HufZRNbUbLzXBzf4WeV2foSS3XqbXYcuMfdRBSWrbuJqW56robbdKKyvrMRPvh7j
FV7SEK0yFPRe3nuzKM+t9TDGdUt4qivv/YfVeGfCnTVgFOac6cKrHG9gzM58mVcb
4czG3B1TbqgfGVeZuew4qUdlHSmnSsS+pf/h9Yh9QCHqaKGh3R17cSDxIKAIVTIW
pH6nuShTXsbrmRMeMhux
=8Qqf
-----END PGP SIGNATURE-----
Merge tag 'gpio-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull bulk of gpio updates from Linus Walleij:
"A pretty big chunk of changes this time, but it has all been on
rotation in linux-next and had some testing. Of course there will be
some amount of fixes on top...
- Merged in a branch of irqchip changes from Thomas Gleixner: we need
to have new callbacks from the irqchip to determine if the GPIO
line will be eligible for IRQs, and this callback must be able to
say "no". After some thinking I got the branch from tglx and have
switched all current users over to use this.
- Based on tglx patches, we have added some generic irqchip helpers
in the gpiolib core. These will help centralize code when GPIO
drivers have simple chained/cascaded IRQs. Drivers will still
define their irqchip vtables, but the gpiolib core will take care
of irqdomain set-up, mapping from local offsets to Linux irqs, and
reserve resources by marking the GPIO lines for IRQs.
- Initially the PL061 and Nomadik GPIO/pin control drivers have been
switched over to use the new gpiochip-to-irqchip infrastructure
with more drivers expected for the next kernel cycle. The
factoring of just two drivers still makes it worth it so it is
already a win.
- A new driver for the Synopsys DesignWare APB GPIO block.
- Modify the DaVinci GPIO driver to be reusable also for the new TI
Keystone architecture.
- A new driver for the LSI ZEVIO SoCs.
- Delete the obsolte tnetv107x driver.
- Some incremental work on GPIO descriptors: have
gpiod_direction_output() use a logical level, respecting assertion
polarity through ACTIVE_LOW flags, adding gpiod_direction_output_raw()
for the case where you want to set that very value. Add
gpiochip_get_desc() to fetch a GPIO descriptor from a specific
offset on a certain chip inside driver code.
- Switch ACPI GPIO code over to using gpiochip_get_desc() and get rid
of gpio_to_desc().
- The ACPI GPIO event handling code has been reworked after
encountering an actual real life implementation.
- Support for ACPI GPIO operation regions.
- Generic GPIO chips can now be assigned labels/names from platform
data.
- We now clamp values returned from GPIO drivers to the boolean [0,1]
range.
- Some improved documentation on how to use the polarity flag was
added.
- a large slew of incremental driver updates and non-critical fixes.
Some targeted for stable"
* tag 'gpio-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (80 commits)
gpio: rcar: Add helper variable dev = &pdev->dev
gpio-lynxpoint: force gpio_get() to return "1" and "0" only
gpio: unmap gpio irqs properly
pch_gpio: set value before enabling output direction
gpio: moxart: Actually set output state in moxart_gpio_direction_output()
gpio: moxart: Avoid forward declaration
gpio: mxs: Allow for recursive enable_irq_wake() call
gpio: samsung: Add missing "break" statement
gpio: twl4030: Remove redundant assignment
gpio: dwapb: correct gpio-cells in binding document
gpio: iop: fix devm_ioremap_resource() return value checking
pinctrl: coh901: convert driver to use gpiolib irqchip
pinctrl: nomadik: convert driver to use gpiolib irqchip
gpio: pl061: convert driver to use gpiolib irqchip
gpio: add IRQ chip helpers in gpiolib
pinctrl: nomadik: factor in platform data container
pinctrl: nomadik: rename secondary to latent
gpio: Driver for SYSCON-based GPIOs
gpio: generic: Use platform_device_id->driver_data field for driver flags
pinctrl: coh901: move irq line locking to resource callbacks
...
When an IRQ is started on a GPIO line, mark this GPIO as IRQ in
the gpiolib so we can keep track of the usage centrally.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-gpio@vger.kernel.org
Cc: Alexandre Courbot <acourbot@nvidia.com>
Patchwork: https://patchwork.linux-mips.org/patch/6417/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Don't return the IN_LVL_BIT directly, a high gpio line returned
value "1073741824" intestead of "1" because IN_LVL_BIT is BIT(30)
Tested-by: Jerome Blin <jerome.blin@intel.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When using the irqchip helper inside the gpiolib, make sure
the IRQs are unmapped/disposed before the irqdomain is removed
as part of removing the gpiochip.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This ensures that the output signal does not toggle if set to high.
Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
moxart_gpio_direction_output() ignored the state passed into it. Fix it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Slightly adjust the code to avoid forward declaration as we need to call
moxart_gpio_set() in moxart_gpio_direction_output() to properly set the
output state.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The scenario here is that someone calls enable_irq_wake() from somewhere
in the code. This will result in the lockdep producing a backtrace as can
be seen below. In my case, this problem is triggered when using the wl1271
(TI WlCore) driver found in drivers/net/wireless/ti/ .
The problem cause is rather obvious from the backtrace, but let's outline
the dependency. enable_irq_wake() grabs the IRQ buslock in irq_set_irq_wake(),
which in turns calls mxs_gpio_set_wake_irq() . But mxs_gpio_set_wake_irq()
calls enable_irq_wake() again on the one-level-higher IRQ , thus it tries to
grab the IRQ buslock again in irq_set_irq_wake() . Because the spinlock in
irq_set_irq_wake()->irq_get_desc_buslock()->__irq_get_desc_lock() is not
marked as recursive, lockdep will spew the stuff below.
We know we can safely re-enter the lock, so use IRQ_GC_INIT_NESTED_LOCK to
fix the spew.
=============================================
[ INFO: possible recursive locking detected ]
3.10.33-00012-gf06b763-dirty #61 Not tainted
---------------------------------------------
kworker/0:1/18 is trying to acquire lock:
(&irq_desc_lock_class){-.-...}, at: [<c00685f0>] __irq_get_desc_lock+0x48/0x88
but task is already holding lock:
(&irq_desc_lock_class){-.-...}, at: [<c00685f0>] __irq_get_desc_lock+0x48/0x88
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&irq_desc_lock_class);
lock(&irq_desc_lock_class);
*** DEADLOCK ***
May be due to missing lock nesting notation
3 locks held by kworker/0:1/18:
#0: (events){.+.+.+}, at: [<c0036308>] process_one_work+0x134/0x4a4
#1: ((&fw_work->work)){+.+.+.}, at: [<c0036308>] process_one_work+0x134/0x4a4
#2: (&irq_desc_lock_class){-.-...}, at: [<c00685f0>] __irq_get_desc_lock+0x48/0x88
stack backtrace:
CPU: 0 PID: 18 Comm: kworker/0:1 Not tainted 3.10.33-00012-gf06b763-dirty #61
Workqueue: events request_firmware_work_func
[<c0013eb4>] (unwind_backtrace+0x0/0xf0) from [<c0011c74>] (show_stack+0x10/0x14)
[<c0011c74>] (show_stack+0x10/0x14) from [<c005bb08>] (__lock_acquire+0x140c/0x1a64)
[<c005bb08>] (__lock_acquire+0x140c/0x1a64) from [<c005c6a8>] (lock_acquire+0x9c/0x104)
[<c005c6a8>] (lock_acquire+0x9c/0x104) from [<c051d5a4>] (_raw_spin_lock_irqsave+0x44/0x58)
[<c051d5a4>] (_raw_spin_lock_irqsave+0x44/0x58) from [<c00685f0>] (__irq_get_desc_lock+0x48/0x88)
[<c00685f0>] (__irq_get_desc_lock+0x48/0x88) from [<c0068e78>] (irq_set_irq_wake+0x20/0xf4)
[<c0068e78>] (irq_set_irq_wake+0x20/0xf4) from [<c027260c>] (mxs_gpio_set_wake_irq+0x1c/0x24)
[<c027260c>] (mxs_gpio_set_wake_irq+0x1c/0x24) from [<c0068cf4>] (set_irq_wake_real+0x30/0x44)
[<c0068cf4>] (set_irq_wake_real+0x30/0x44) from [<c0068ee4>] (irq_set_irq_wake+0x8c/0xf4)
[<c0068ee4>] (irq_set_irq_wake+0x8c/0xf4) from [<c0310748>] (wlcore_nvs_cb+0x10c/0x97c)
[<c0310748>] (wlcore_nvs_cb+0x10c/0x97c) from [<c02be5e8>] (request_firmware_work_func+0x38/0x58)
[<c02be5e8>] (request_firmware_work_func+0x38/0x58) from [<c0036394>] (process_one_work+0x1c0/0x4a4)
[<c0036394>] (process_one_work+0x1c0/0x4a4) from [<c0036a4c>] (worker_thread+0x138/0x394)
[<c0036a4c>] (worker_thread+0x138/0x394) from [<c003cb74>] (kthread+0xa4/0xb0)
[<c003cb74>] (kthread+0xa4/0xb0) from [<c000ee00>] (ret_from_fork+0x14/0x34)
wlcore: loaded
Cc: stable@vger.kernel.org
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Variable "status" is never used, so remove it and add warning if
any error happen.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
devm_ioremap_resource() returns a pointer to the remapped memory or
an ERR_PTR() encoded error code on failure. Fix the check inside
iop3xx_gpio_probe() accordingly.
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Mikael Pettersson <mikpe@it.uu.se>
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the PL061 driver to register its chained irq
handler and irqchip using the helpers in the gpiolib core.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This provides a function gpiochip_irqchip_add() to set
up an irqchip for a GPIO controller, and a function
gpiochip_set_chained_irqchip() to chain it to a parent
irqchip.
Most GPIOs are of the type where a number of lines form
a cascaded interrupt controller chained onto
the primary system interrupt controller (or further down the
chain) so let's add this helper and factor the code to
request the lines to be used as IRQs, the .to_irq() function
and the irqdomain into the core as well.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds support for Atom C2000 series (Avoton and Rangeley). And has
the following options:
- New addresses register.
- Caching output levels (see Intel external design spec, table 48-29)
- No hardware blink.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.
Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
SYSCON driver was designed for using memory areas (registers)
that are used in several subsystems. There are systems (CPUs)
which use bits in one register for various purposes and thus
should be handled by various kernel subsystems. This driver
allows you to use the individual SYSCON bits as GPIOs.
ARM CLPS711X SYSFLG1 input lines has been added as first user
of this driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This switches all GPIO and pin control drivers with irqchips
that were using .startup() and .shutdown() callbacks to lock
GPIO lines for IRQ usage over to using the .request_resources()
and .release_resources() callbacks just introduced into the
irqchip vtable.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
GPIO operation regions is a new feature introduced in ACPI 5.0
specification. This feature adds a way for platform ASL code to call back
to OS GPIO driver and toggle GPIO pins.
An example ASL code from Lenovo Miix 2 tablet with only relevant part
listed:
Device (\_SB.GPO0)
{
Name (AVBL, Zero)
Method (_REG, 2, NotSerialized)
{
If (LEqual (Arg0, 0x08))
{
// Marks the region available
Store (Arg1, AVBL)
}
}
OperationRegion (GPOP, GeneralPurposeIo, Zero, 0x0C)
Field (GPOP, ByteAcc, NoLock, Preserve)
{
Connection (
GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
"\\_SB.GPO0", 0x00, ResourceConsumer,,)
{
0x003B
}
),
SHD3, 1,
}
}
Device (SHUB)
{
Method (_PS0, 0, Serialized)
{
If (LEqual (\_SB.GPO0.AVBL, One))
{
Store (One, \_SB.GPO0.SHD3)
Sleep (0x32)
}
}
Method (_PS3, 0, Serialized)
{
If (LEqual (\_SB.GPO0.AVBL, One))
{
Store (Zero, \_SB.GPO0.SHD3)
}
}
}
How this works is that whenever _PS0 or _PS3 method is run (typically when
SHUB device is transitioned to D0 or D3 respectively), ASL code checks if
the GPIO operation region is available (\_SB.GPO0.AVBL). If it is we go and
store either 0 or 1 to \_SB.GPO0.SHD3.
Now, when ACPICA notices ACPI GPIO operation region access (the store
above) it will call acpi_gpio_adr_space_handler() that then toggles the
GPIO accordingly using standard gpiolib interfaces.
Implement the support by registering GPIO operation region handlers for all
GPIO devices that have an ACPI handle. First time the GPIO is used by the
ASL code we make sure that the GPIO stays requested until the GPIO chip
driver itself is unloaded. If we find out that the GPIO is already
requested we just toggle it according to the value got from ASL code.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Axel Lin