Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The LS1021A SoC is a dual-core Cortex-A7 based processor,
this adds the initial support for it.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instanciate device for the generic cpufreq-dt driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The ARM clock is a virtual clock feeding the ARM partition of
the SoC. It controls multiple other clocks to ensure the right
sequencing when cpufreq changes the CPU clock rate.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This implements a virtual clock used to abstract away
all the steps needed in order to change the ARM clock,
so we don't have to push all this clock handling into
the cpufreq driver.
While it will be used for i.MX53 at first it is generic
enough to be used on i.MX6 later on.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is the bypass clock used to feed the ARM partition
while we reprogram PLL1 to another rate.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add the ARM Global Timer as clocksource/scheduler clock option and
use it as default scheduler clock. This leaves the PIT timer for
other users e.g. the secondary Cortex-M4 core. Also, the Global Timer
has double the precission (running at pheripheral clock compared to
IPG clock) and a 64-bit incrementing counter register. We still keep
the PIT timer as an secondary option in case the ARM Global Timer is
not available.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
For LPDDR2 platform, no need to enable weak2P5 in DSM mode,
it can be pulled down to save power(~0.65mW).
And per design team's recommendation, we should disconnect
VDDHIGH and SNVS in DSM mode on i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is NOT flexible, take i.MX6SL for example, although
it has LPDDR2 on EVK board, but users can also use DDR3 on other
boards, so it is better to read the DDR type from MMDC then decide
how to do related settings.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
If machine_desc.map_io is not set, devicemaps_init() in the common ARM
code will call debug_ll_io_init().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Refactor mxc_iomux_mode():
- since it always returns 0 make it to return void
- remove unnecessary ret variable
- declare variables according to the kernel coding style
Signed-off-by: Dmitry Voytik <voytikd@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ret variable is redundant. Call clk_pllv3_wait_lock() in the end
return.
Signed-off-by: Dmitry Voytik <voytikd@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
System restart mechanism has been changed with the introduction
of "kernel restart handler call chain support". The imx2 watchdog
based restart handler has been moved to the driver, and these
restart can be removed from the machine layer.
This patch cleans up the device tree version machine reset init with
mxc_arch_reset_init_dt and removes corresponding .restart handler,
for the .init_machine that can be handled by system default after
removing the mxc_arch_reset_init_dt, the .init_machine is also removed.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The only place where the time is invalid is when the ACPI_CSTATE_FFH entry
method is not set. Otherwise for all the drivers, the time can be correctly
measured.
Instead of duplicating the CPUIDLE_FLAG_TIME_VALID flag in all the drivers
for all the states, just invert the logic by replacing it by the flag
CPUIDLE_FLAG_TIME_INVALID, hence we can set this flag only for the acpi idle
driver, remove the former flag from all the drivers and invert the logic with
this flag in the different governor.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized
by boot loader and the kernel code defined fixed rates according
to those default configurations. Beginning with the USB PLL7 the
code started to initialize the PLL's itself (using imx_clk_pllv3).
However, since commit dc4805c2e7
(ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver)
imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits,
hence the USB PLL were not configured correctly anymore.
This patch not only fixes those USB PLL's, but also makes use of
the imx_clk_pllv3 for all PLL's and alignes the code with the PLL
support of the i.MX6 series.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Fix a typo error, the "emi" names refer to the eim clocks.
The change fixes typo in EIM and EIM_SLOW pre-output dividers and
selectors clock names. Notably EIM_SLOW clock itself is named correctly.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
[vladimir_zapolskiy@mentor.com: ported to v3.17]
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- Rework the handling of wakeup IRQs by the IRQ core such that
all of them will be switched over to "wakeup" mode in
suspend_device_irqs() and in that mode the first interrupt
will abort system suspend in progress or wake up the system
if already in suspend-to-idle (or equivalent) without executing
any interrupt handlers. Among other things that eliminates the
wakeup-related motivation to use the IRQF_NO_SUSPEND interrupt
flag with interrupts which don't really need it and should not
use it (Thomas Gleixner and Rafael J Wysocki).
- Switch over ACPI to handling wakeup interrupts with the help
of the new mechanism introduced by the above IRQ core rework
(Rafael J Wysocki).
- Rework the core generic PM domains code to eliminate code that's
not used, add DT support and add a generic mechanism by which
devices can be added to PM domains automatically during
enumeration (Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).
- Add debugfs-based mechanics for debugging generic PM domains
(Maciej Matraszek).
- ACPICA update to upstream version 20140828. Included are updates
related to the SRAT and GTDT tables and the _PSx methods are in
the METHOD_NAME list now (Bob Moore and Hanjun Guo).
- Add _OSI("Darwin") support to the ACPI core (unfortunately, that
can't really be done in a straightforward way) to prevent
Thunderbolt from being turned off on Apple systems after boot
(or after resume from system suspend) and rework the ACPI Smart
Battery Subsystem (SBS) driver to work correctly with Apple
platforms (Matthew Garrett and Andreas Noever).
- ACPI LPSS (Low-Power Subsystem) driver update cleaning up the
code, adding support for 133MHz I2C source clock on Intel Baytrail
to it and making it avoid using UART RTS override with Auto Flow
Control (Heikki Krogerus).
- ACPI backlight updates removing the video_set_use_native_backlight
quirk which is not necessary any more, making the code check the
list of output devices returned by the _DOD method to avoid
creating acpi_video interfaces that won't work and adding a quirk
for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak).
- New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin).
- Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
Sudip Mukherjee, Yijing Wang, and Zhang Rui).
- cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
Rasmus Villemoes).
- cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name
change among other things), ppc-corenet, powernv (Viresh Kumar,
Preeti U Murthy, Shilpasri G Bhat, Lucas Stach).
- cpuidle support for DT-based idle states infrastructure, new
ARM64 cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi,
Rasmus Villemoes).
- ARM big.LITTLE cpuidle driver updates: support for DT-based
initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
Kevin Hilman).
- Rework of the test_suspend kernel command line argument and
a new trace event for console resume (Srinivas Pandruvada,
Todd E Brandt).
- Second attempt to optimize swsusp_free() (hibernation core) to
make it avoid going through all PFNs which may be way too slow on
some systems (Joerg Roedel).
- devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).
- rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS
entry update in MAINTAINERS (Heiko Stübner, Kevin Hilman).
- PM core fix related to clock management (Geert Uytterhoeven).
- PM core's sysfs code cleanup (Johannes Berg).
/
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Merge tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"Features-wise, to me the most important this time is a rework of
wakeup interrupts handling in the core that makes them work
consistently across all of the available sleep states, including
suspend-to-idle. Many thanks to Thomas Gleixner for his help with
this work.
Second is an update of the generic PM domains code that has been in
need of some care for quite a while. Unused code is being removed, DT
support is being added and domains are now going to be attached to
devices in bus type code in analogy with the ACPI PM domain. The
majority of work here was done by Ulf Hansson who also has been the
most active developer this time.
Apart from this we have a traditional ACPICA update, this time to
upstream version 20140828 and a few ACPI wakeup interrupts handling
patches on top of the general rework mentioned above. There also are
several cpufreq commits including renaming the cpufreq-cpu0 driver to
cpufreq-dt, as this is what implements generic DT-based cpufreq
support, and a new DT-based idle states infrastructure for cpuidle.
In addition to that, the ACPI LPSS driver is updated, ACPI support for
Apple machines is improved, a few bugs are fixed and a few cleanups
are made all over.
Finally, the Adaptive Voltage Scaling (AVS) subsystem now has a tree
maintained by Kevin Hilman that will be merged through the PM tree.
Numbers-wise, the generic PM domains update takes the lead this time
with 32 non-merge commits, second is cpufreq (15 commits) and the 3rd
place goes to the wakeup interrupts handling rework (13 commits).
Specifics:
- Rework the handling of wakeup IRQs by the IRQ core such that all of
them will be switched over to "wakeup" mode in suspend_device_irqs()
and in that mode the first interrupt will abort system suspend in
progress or wake up the system if already in suspend-to-idle (or
equivalent) without executing any interrupt handlers. Among other
things that eliminates the wakeup-related motivation to use the
IRQF_NO_SUSPEND interrupt flag with interrupts which don't really
need it and should not use it (Thomas Gleixner and Rafael Wysocki)
- Switch over ACPI to handling wakeup interrupts with the help of the
new mechanism introduced by the above IRQ core rework (Rafael Wysocki)
- Rework the core generic PM domains code to eliminate code that's
not used, add DT support and add a generic mechanism by which
devices can be added to PM domains automatically during enumeration
(Ulf Hansson, Geert Uytterhoeven and Tomasz Figa).
- Add debugfs-based mechanics for debugging generic PM domains
(Maciej Matraszek).
- ACPICA update to upstream version 20140828. Included are updates
related to the SRAT and GTDT tables and the _PSx methods are in the
METHOD_NAME list now (Bob Moore and Hanjun Guo).
- Add _OSI("Darwin") support to the ACPI core (unfortunately, that
can't really be done in a straightforward way) to prevent
Thunderbolt from being turned off on Apple systems after boot (or
after resume from system suspend) and rework the ACPI Smart Battery
Subsystem (SBS) driver to work correctly with Apple platforms
(Matthew Garrett and Andreas Noever).
- ACPI LPSS (Low-Power Subsystem) driver update cleaning up the code,
adding support for 133MHz I2C source clock on Intel Baytrail to it
and making it avoid using UART RTS override with Auto Flow Control
(Heikki Krogerus).
- ACPI backlight updates removing the video_set_use_native_backlight
quirk which is not necessary any more, making the code check the
list of output devices returned by the _DOD method to avoid
creating acpi_video interfaces that won't work and adding a quirk
for Lenovo Ideapad Z570 (Hans de Goede, Aaron Lu and Stepan Bujnak)
- New Win8 ACPI OSI quirks for some Dell laptops (Edward Lin)
- Assorted ACPI code cleanups (Fabian Frederick, Rasmus Villemoes,
Sudip Mukherjee, Yijing Wang, and Zhang Rui)
- cpufreq core updates and cleanups (Viresh Kumar, Preeti U Murthy,
Rasmus Villemoes)
- cpufreq driver updates: cpufreq-cpu0/cpufreq-dt (driver name change
among other things), ppc-corenet, powernv (Viresh Kumar, Preeti U
Murthy, Shilpasri G Bhat, Lucas Stach)
- cpuidle support for DT-based idle states infrastructure, new ARM64
cpuidle driver, cpuidle core cleanups (Lorenzo Pieralisi, Rasmus
Villemoes)
- ARM big.LITTLE cpuidle driver updates: support for DT-based
initialization and Exynos5800 compatible string (Lorenzo Pieralisi,
Kevin Hilman)
- Rework of the test_suspend kernel command line argument and a new
trace event for console resume (Srinivas Pandruvada, Todd E Brandt)
- Second attempt to optimize swsusp_free() (hibernation core) to make
it avoid going through all PFNs which may be way too slow on some
systems (Joerg Roedel)
- devfreq updates (Paul Bolle, Punit Agrawal, Ãrjan Eide).
- rockchip-io Adaptive Voltage Scaling (AVS) driver and AVS entry
update in MAINTAINERS (Heiko Stübner, Kevin Hilman)
- PM core fix related to clock management (Geert Uytterhoeven)
- PM core's sysfs code cleanup (Johannes Berg)"
* tag 'pm+acpi-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (105 commits)
ACPI / fan: printk replacement
PM / clk: Fix crash in clocks management code if !CONFIG_PM_RUNTIME
PM / Domains: Rename cpu_data to cpuidle_data
cpufreq: cpufreq-dt: fix potential double put of cpu OF node
cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'
PM / hibernate: Iterate over set bits instead of PFNs in swsusp_free()
cpufreq: ppc-corenet: remove duplicate update of cpu_data
ACPI / sleep: Rework the handling of ACPI GPE wakeup from suspend-to-idle
PM / sleep: Rename platform suspend/resume functions in suspend.c
PM / sleep: Export dpm_suspend_late/noirq() and dpm_resume_early/noirq()
ACPICA: Introduce acpi_enable_all_wakeup_gpes()
ACPICA: Clear all non-wakeup GPEs in acpi_hw_enable_wakeup_gpe_block()
ACPI / video: check _DOD list when creating backlight devices
PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.h
cpufreq: Replace strnicmp with strncasecmp
cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexec
cpufreq: powernv: Set the pstate of the last hotplugged out cpu in policy->cpus to minimum
cpufreq: Allow stop CPU callback to be used by all cpufreq drivers
PM / devfreq: exynos: Enable building exynos PPMU as module
PM / devfreq: Export helper functions for drivers
...
Pull irq updates from Thomas Gleixner:
"The irq departement delivers:
- a cleanup series to get rid of mindlessly copied code.
- another bunch of new pointlessly different interrupt chip drivers.
Adding homebrewn irq chips (and timers) to SoCs must provide a
value add which is beyond the imagination of mere mortals.
- the usual SoC irq controller updates, IOW my second cat herding
project"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
irqchip: gic-v3: Implement CPU PM notifier
irqchip: gic-v3: Refactor gic_enable_redist to support both enabling and disabling
irqchip: renesas-intc-irqpin: Add minimal runtime PM support
irqchip: renesas-intc-irqpin: Add helper variable dev = &pdev->dev
irqchip: atmel-aic5: Add sama5d4 support
irqchip: atmel-aic5: The sama5d3 has 48 IRQs
Documentation: bcm7120-l2: Add Broadcom BCM7120-style L2 binding
irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller
irqchip: renesas-irqc: Add binding docs for new R-Car Gen2 SoCs
irqchip: renesas-irqc: Add DT binding documentation
irqchip: renesas-intc-irqpin: Document SoC-specific bindings
openrisc: Get rid of handle_IRQ
arm64: Get rid of handle_IRQ
ARM: omap2: irq: Convert to handle_domain_irq
ARM: imx: tzic: Convert to handle_domain_irq
ARM: imx: avic: Convert to handle_domain_irq
irqchip: or1k-pic: Convert to handle_domain_irq
irqchip: atmel-aic5: Convert to handle_domain_irq
irqchip: atmel-aic: Convert to handle_domain_irq
irqchip: gic-v3: Convert to handle_domain_irq
...
New and updated SoC support. Among the things new for this release are:
- at91: Added support for the new SAMA5D4 SoC, following the earlier SAMA5D3
- bcm: Added support for BCM63XX family of DSL SoCs
- hisi: Added support for HiP04 server-class SoC
- meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
- shmobile: added support for new r8a7794 (R-Car E2) automotive SoC
Noteworthy changes to existing SoC support are:
- imx: convert i.MX1 to device tree
- omap: lots of power management work
- omap: base support to enable moving to standard UART driver
- shmobile: lots of progress for multiplatform support, still ongoing
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support. Among the things new for this release
are:
- at91: Added support for the new SAMA5D4 SoC, following the earlier
SAMA5D3
- bcm: Added support for BCM63XX family of DSL SoCs
- hisi: Added support for HiP04 server-class SoC
- meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
- shmobile: added support for new r8a7794 (R-Car E2) automotive SoC
Noteworthy changes to existing SoC support are:
- imx: convert i.MX1 to device tree
- omap: lots of power management work
- omap: base support to enable moving to standard UART driver
- shmobile: lots of progress for multiplatform support, still
ongoing"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits)
ARM: hisi: depend on ARCH_MULTI_V7
CNS3xxx: Fix debug UART.
ARM: at91: fix nommu build regression
ARM: meson: add basic support for MesonX SoCs
ARM: meson: debug: add debug UART for earlyprintk support
irq: Export handle_fasteoi_irq
ARM: mediatek: Add earlyprintk support for mt6589
ARM: hisi: Fix platmcpm compilation when ARMv6 is selected
ARM: debug: fix alphanumerical order on debug uarts
ARM: at91: document Atmel SMART compatibles
ARM: at91: add sama5d4 support to sama5_defconfig
ARM: at91: dt: add device tree file for SAMA5D4ek board
ARM: at91: dt: add device tree file for SAMA5D4 SoC
ARM: at91: SAMA5D4 SoC detection code and low level routines
ARM: at91: introduce basic SAMA5D4 support
clk: at91: add a driver for the h32mx clock
ARM: pxa3xx: provide specific platform_devices for all ssp ports
ARM: pxa: ssp: provide platform_device_id for PXA3xx
ARM: OMAP4+: Remove static iotable mappings for SRAM
ARM: OMAP4+: Move SRAM data to DT
...
This time around, the cleanup branch contains mostly code removal. A number
of board files for at91, imx and msm have become obsolete because of the
DT conversion and are now ready to be removed. The OMAP platform has
traditionally had its own DMA engine abstraction and as this is being
phased out, a lot of the original code is now unused and can be removed
as well.
S3C24xx can be simplified now that the restart code is a proper device
driver.
Finally, a number of cleanups in shmobile are done to prepare for
the addition of new code in other branches.
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann:
"This time around, the cleanup branch contains mostly code removal. A
number of board files for at91, imx and msm have become obsolete
because of the DT conversion and are now ready to be removed. The
OMAP platform has traditionally had its own DMA engine abstraction and
as this is being phased out, a lot of the original code is now unused
and can be removed as well.
S3C24xx can be simplified now that the restart code is a proper device
driver.
Finally, a number of cleanups in shmobile are done to prepare for the
addition of new code in other branches"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
ARM: at91: Remove the support for the RSI EWS board
arm: mach-omap2: Convert pr_warning to pr_warn
ARM: OMAP: Remove unused pieces of legacy DMA API
ARM: at91: remove board file for Acme Systems Fox G20
ARM: orion5x: Convert pr_warning to pr_warn
ARM: S3C24XX: remove separate restart code
ARM: EXYNOS: Do not calculate boot address twice
ARM: sunxi: Remove sun4i reboot code from mach directory
ARM: imx: Remove mach-mxt_td60 board file
ARM: shmobile: armadillo800eva legacy: Use rmobile_add_devices_to_domains()
ARM: shmobile: r8a7740: Clean up pm domain table
ARM: shmobile: r8a7740: Use rmobile_add_devices_to_domains()
ARM: shmobile: sh7372: Make domain_devices[] static __initdata
ARM: shmobile: mackerel: Make domain_devices[] static __initdata
clocksource: tcb_clksrc: sanitize IRQ request
ARM: at91/tclib: mask interruptions at shutdown and probe
ARM: at91/tclib: move initialization from alloc to probe
ARM: at91/tclib: prefer using of devm_* functions
ARM: clps711x: Switch CLPS711X subarch to use clk and clocksource driver
ARM: shmobile: r8a7791 is now called "R-Car M2-W"
...
The naming convention of this driver was always under the scanner, people
complained that it should have a more generic name than cpu0, as it manages all
CPUs that are sharing clock lines.
Also, in future it will be modified to support any number of clusters with
separate clock/voltage lines.
Lets rename it to 'cpufreq_dt' from 'cpufreq_cpu0'.
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Commit 63288b721a ("ARM: imx: fix shared gate clock") attempted to fix
an issue with particular enable/disable sequence from two shared gate
clocks. But unfortunately, while it partially fixed the issue, it also
did something wrong in .is_enabled() function hook. In case of shared
gate, the function shouldn't really query the hardware state via
share_count, because the function is trying to query the enabling state
of the clock in question, not the hardware state which is shared by
multiple clocks.
Fix the issue by returning the enable_count of the clock itself which is
maintained by clock core, in case it's a clock sharing hardware gate
with others. As the result, the initialization of share_count per
hardware state is not needed now. So remove it.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: 63288b721a ("ARM: imx: fix shared gate clock")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock
can be from OSC instead of ipg_per, as ipg_per's rate
may be scaled when system enter low bus mode, to keep
system timer NOT drift, better to make gpt per clock
at fixed rate, here add support for gpt per clock to
be from OSC which is at fixed rate always.
There are some difference on this implementation of
gpt per clock source, see below for details:
i.MX6Q TO > 1.0: GPT_CR_CLKSRC, b'101 selects fix clock
of OSC / 8 for gpt per clk;
i.MX6DL and i.MX6SX: GPT_CR_CLKSRC, b'101 selects OSC
for gpt per clk, and we must enable GPT_CR_24MEM to
enable OSC clk source for gpt per, GPT_PR_PRESCALER24M
is for pre-scaling of this OSC clk, here set it to 8
to make gpt per clk is 3MHz;
i.MX6SL: ipg_per can be from OSC directly, so no need to
implement this new clk source for gpt per.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m.
i.MX6Q TO1.0 has no gpt_3m option, so force it to be
from ipg_per.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
There is a copy&paste error on register offset of pll7_usb_host gate
clock introduced by i.MX6 PLL bypass support patches. The error breaks
the ENET function, because it overwrites the pll6_enet gate bit.
Correct the offset for all i.MX6 clock drivers.
Thanks to Fugang Duan <B38611@freescale.com> for spotting the error.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since ENABLE and BYPASS bits of PLLs are now implemented as separate
gate and mux clocks by clock drivers, the code handling these two bits
can be removed from clk-pllv3 driver.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sx.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q. The difference is that only anaclk1
is available on imx6sl.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx6q clock driver currently hard-codes all PLL clocks to source
from OSC24M without BYPASS support. The patch adds the missing lvds_in
clock which is mutually exclusive with lvds_gate, and implements BYPASS
and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary
Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits
are implemented as mux clocks, and ENABLE bit of PLL clocks is
implemented as a gate clock after BYPASS mux.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
There are a couple of gate clocks are mutually exclusive on i.MX6, i.e.
LVDSCLK1_IBEN and LVDSCLK1_OBEN. They cannot be enabled simultaneously.
This patches adds an exclusive gate clock type specifically for such
case. The clock driver will need to call imx_clk_gate_exclusive() to
register a gate clock with parameter exclusive_mask indicating the mask
of gate bits which are mutually exclusive to this gate clock.
Right now, it only handles the exclusive gate clocks which are defined
in a single hardware register, which is the case we're running into
today. But it can be extended to handle exclusive gate clocks defined
in different registers later if needed.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
ASRC has "asrc", "asrc_ipg", "asrc_mem" clocks, and they share
the same gate bits.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The parent clocks of IMX6SL_CLK_PXP_AXI_SEL and IMX6SL_CLK_EPDC_AXI_SEL
clocks are not the same. So split the epdc_pxp_sels into two different
clock selections 'pxp_axi_sels' and 'epdc_axi_sels'.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename
'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'.
Make the clock for ESAI more clear and align them with imx6sx.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
PLL5 is well suited for being the parent of IMX6SL_CLK_LCDIF_PIX_SEL and
PLL2_PFD for IMX6SL_CLK_LCDIF_AXI_SEL.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Currently csi_lcdif_sels[] is a shared array for the providing the possible
clock parents for csi and lcdif blocks.
This is not correct, as csi and lcdif do not share the same clock parents.
Introduce csi_sels[] for the csi and lcdif_axi_sels[] for the lcdif clocks in
order to describe the parents correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit adds PLL7 which is required for USBPHY1. It also adds
the USB PHY and USB Controller clocks and the gates to enable them.
Acked-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add cpufreq support for i.MX6SX, using common
i.MX6Q cpufreq driver.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
At the end of the boot process, the clock framework might disable
required main PLL's. So far, this was no issue since drivers
requested clocks, which are descended of the main PLL's (e.g.
pll1_pfd1, which provides the system clock).
To archive the full 500MHz system clock, DDR clock need to be a
descendant of PLL2 rather than PLL1 (DDRC_CLK_SEL set to 0). The
bootloader sets up the clocks accordingly before making use of
DDR at all. However, in Linux, there is no driver using PLL2,
which lead to PLL2 being disabled by the clock framework.
With this patch, we make sure that the main system clock and the
DDR clock are initially enabled and are kept enabled.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds basic devicetree support for i.MX1 based SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add more revision support for the new i.MX6DQ tape-out (TO1.5). This
TO1.5 is the Rev 1.3 as documented in i.MX6DQ data sheet, because TO1.3
and TO1.4 are never revealed.
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
All the current support of mach-mxt_td60 board can be converted to devicetree.
Remove the board file.
Cc: Alan Carvalho de Assis <acassis@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
mx1ads.c can be replaced with devicetree equivalent: imx1-ads.dts,
so remove the board file.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
With commit c716483c3d ("ARM: 8122/1: smp_scu: enable SCU standby
support"), the STANDBY bit of SCU is handled by core function
scu_enable(). So imx_scu_standby_enable() can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
pcm970-baseboard.c and mach-pcm038.c can be replaced with their
devicetree equivalents: imx27-phytec-phycore-rdk.dts and
imx27-phytec-phycore-som.dtsi respectively, so remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
eukrea_mbimx27-baseboard.c and mach-cpuimx27.c can be replaced with their
devicetree equivalents: imx27-eukrea-mbimxsd27-baseboard.dts and
imx27-eukrea-cpuimx27.dtsi respectively, so remove the board files.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The iomux function declarations are in headers only accessible in this
directory. Thus those can't be used in any module. None of the
objects in this directory is tristate. Neither can the header be included
in out-of-tree modules.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
On i.MX6Q, gpu2d_axi and gpu3d_axi are either from AXI or
AHB clock, but on i.MX6DL, gpu2d_axi and gpu3d_axi are
from mmdc_ch0_axi_podf, and they can NOT be gated by mmdc_ch0_axi
's clock gate, the mux option register field(CCM_CBCMR)
is marked as "Reserved" now on i.MX6DL RM, so correct these
two clks setting.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since ARCH_MXC already selects ARCH_HAS_OPP, it's really unnecessary for
SOC_IMX27 and SOC_IMX5 to select it again.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
After the suspend routine running in OCRAM puts DDR into self-refresh,
it will access IOMUXC block to float DDR IO for power saving. A TLB
missing of IOMUXC base address may happen in this case, and triggers an
access to DDR, and thus hangs the system.
The failure is discovered by running suspend/resume on a Cubox-i board.
Though the issue is not Cubox-i specific, it can be hit the on the board
quite easily with the 3.15 or 3.16 kernel.
Fix the issue with a dummy access to IOMUXC block at the beginning of
suspend routine, so that the address translation can be filled into TLB
before DDR is put into self-refresh.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Cc: <stable@vger.kernel.org>
Acked-by: Anson Huang <Anson.Huang@freescale.com>
My earlier patch 1fc593feaf ("ARM: imx: build i.MX6 functions
only when needed") fixed a problem with building an i.MX5 kernel,
but now the problem has returned for the case where we allow
ARMv6K SMP builds in multiplatform. With CONFIG_CPU_V7 disabled,
but i.MX3 and SMP enabled, we get this build error:
arch/arm/mach-imx/built-in.o: In function `v7_secondary_startup':
:(.text+0x5124): undefined reference to `v7_invalidate_l1'
This puts the code inside of an "ifdef CONFIG_SOC_IMX6" to hopefully
do the right thing in all configurations.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is the bulk of new SoC enablement and other platform changes for 3.17:
* Samsung S5PV210 has been converted to DT and multiplatform
* Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms
* Kirkwood, one of the popular Marvell platforms, is folded into the
mvebu platform code, removing mach-kirkwood.
* Hwmod data for TI AM43xx and DRA7 platforms.
* More additions of Renesas shmobile platform support
* Removal of plat-samsung contents that can be removed with S5PV210 being
multiplatform/DT-enabled and the other two old platforms being removed.
New platforms (most with only basic support right now):
* Hisilicon X5HD2 settop box chipset is introduced
* Mediatek MT6589 (mobile chipset) is introduced
* Broadcom BCM7xxx settop box chipset is introduced
+ as usual a lot other pieces all over the platform code.
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Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson:
"This is the bulk of new SoC enablement and other platform changes for
3.17:
- Samsung S5PV210 has been converted to DT and multiplatform
- Clock drivers and bindings for some of the lower-end i.MX 1/2
platforms
- Kirkwood, one of the popular Marvell platforms, is folded into the
mvebu platform code, removing mach-kirkwood
- Hwmod data for TI AM43xx and DRA7 platforms
- More additions of Renesas shmobile platform support
- Removal of plat-samsung contents that can be removed with S5PV210
being multiplatform/DT-enabled and the other two old platforms
being removed
New platforms (most with only basic support right now):
- Hisilicon X5HD2 settop box chipset is introduced
- Mediatek MT6589 (mobile chipset) is introduced
- Broadcom BCM7xxx settop box chipset is introduced
+ as usual a lot other pieces all over the platform code"
* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
ARM: hisi: remove smp from machine descriptor
power: reset: move hisilicon reboot code
ARM: dts: Add hix5hd2-dkb dts file.
ARM: debug: Rename Hi3716 to HIX5HD2
ARM: hisi: enable hix5hd2 SoC
ARM: hisi: add ARCH_HISI
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
...
- ACPICA update to upstream version 20140724. That includes
ACPI 5.1 material (support for the _CCA and _DSD predefined names,
changes related to the DMAR and PCCT tables and ARM support among
other things) and cleanups related to using ACPICA's header files.
A major part of it is related to acpidump and the core code used
by that utility. Changes from Bob Moore, David E Box, Lv Zheng,
Sascha Wildner, Tomasz Nowicki, Hanjun Guo.
- Radix trees for memory bitmaps used by the hibernation core from
Joerg Roedel.
- Support for waking up the system from suspend-to-idle (also known
as the "freeze" sleep state) using ACPI-based PCI wakeup signaling
(Rafael J Wysocki).
- Fixes for issues related to ACPI button events (Rafael J Wysocki).
- New device ID for an ACPI-enumerated device included into the
Wildcat Point PCH from Jie Yang.
- ACPI video updates related to backlight handling from Hans de Goede
and Linus Torvalds.
- Preliminary changes needed to support ACPI on ARM from Hanjun Guo
and Graeme Gregory.
- ACPI PNP core cleanups from Arjun Sreedharan and Zhang Rui.
- Cleanups related to ACPI_COMPANION() and ACPI_HANDLE() macros
(Rafael J Wysocki).
- ACPI-based device hotplug cleanups from Wei Yongjun and
Rafael J Wysocki.
- Cleanups and improvements related to system suspend from
Lan Tianyu, Randy Dunlap and Rafael J Wysocki.
- ACPI battery cleanup from Wei Yongjun.
- cpufreq core fixes from Viresh Kumar.
- Elimination of a deadband effect from the cpufreq ondemand
governor and intel_pstate driver cleanups from Stratos Karafotis.
- 350MHz CPU support for the powernow-k6 cpufreq driver from
Mikulas Patocka.
- Fix for the imx6 cpufreq driver from Anson Huang.
- cpuidle core and governor cleanups from Daniel Lezcano,
Sandeep Tripathy and Mohammad Merajul Islam Molla.
- Build fix for the big_little cpuidle driver from Sachin Kamat.
- Configuration fix for the Operation Performance Points (OPP)
framework from Mark Brown.
- APM cleanup from Jean Delvare.
- cpupower utility fixes and cleanups from Peter Senna Tschudin,
Andrey Utkin, Himangi Saraogi, Rickard Strandqvist, Thomas Renninger.
/
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Merge tag 'pm+acpi-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"Again, ACPICA leads the pack (47 commits), followed by cpufreq (18
commits) and system suspend/hibernation (9 commits).
From the new code perspective, the ACPICA update brings ACPI 5.1 to
the table, including a new device configuration object called _DSD
(Device Specific Data) that will hopefully help us to operate device
properties like Device Trees do (at least to some extent) and changes
related to supporting ACPI on ARM.
Apart from that we have hibernation changes making it use radix trees
to store memory bitmaps which should speed up some operations carried
out by it quite significantly. We also have some power management
changes related to suspend-to-idle (the "freeze" sleep state) support
and more preliminary changes needed to support ACPI on ARM (outside of
ACPICA).
The rest is fixes and cleanups pretty much everywhere.
Specifics:
- ACPICA update to upstream version 20140724. That includes ACPI 5.1
material (support for the _CCA and _DSD predefined names, changes
related to the DMAR and PCCT tables and ARM support among other
things) and cleanups related to using ACPICA's header files. A
major part of it is related to acpidump and the core code used by
that utility. Changes from Bob Moore, David E Box, Lv Zheng,
Sascha Wildner, Tomasz Nowicki, Hanjun Guo.
- Radix trees for memory bitmaps used by the hibernation core from
Joerg Roedel.
- Support for waking up the system from suspend-to-idle (also known
as the "freeze" sleep state) using ACPI-based PCI wakeup signaling
(Rafael J Wysocki).
- Fixes for issues related to ACPI button events (Rafael J Wysocki).
- New device ID for an ACPI-enumerated device included into the
Wildcat Point PCH from Jie Yang.
- ACPI video updates related to backlight handling from Hans de Goede
and Linus Torvalds.
- Preliminary changes needed to support ACPI on ARM from Hanjun Guo
and Graeme Gregory.
- ACPI PNP core cleanups from Arjun Sreedharan and Zhang Rui.
- Cleanups related to ACPI_COMPANION() and ACPI_HANDLE() macros
(Rafael J Wysocki).
- ACPI-based device hotplug cleanups from Wei Yongjun and Rafael J
Wysocki.
- Cleanups and improvements related to system suspend from Lan
Tianyu, Randy Dunlap and Rafael J Wysocki.
- ACPI battery cleanup from Wei Yongjun.
- cpufreq core fixes from Viresh Kumar.
- Elimination of a deadband effect from the cpufreq ondemand governor
and intel_pstate driver cleanups from Stratos Karafotis.
- 350MHz CPU support for the powernow-k6 cpufreq driver from Mikulas
Patocka.
- Fix for the imx6 cpufreq driver from Anson Huang.
- cpuidle core and governor cleanups from Daniel Lezcano, Sandeep
Tripathy and Mohammad Merajul Islam Molla.
- Build fix for the big_little cpuidle driver from Sachin Kamat.
- Configuration fix for the Operation Performance Points (OPP)
framework from Mark Brown.
- APM cleanup from Jean Delvare.
- cpupower utility fixes and cleanups from Peter Senna Tschudin,
Andrey Utkin, Himangi Saraogi, Rickard Strandqvist, Thomas
Renninger"
* tag 'pm+acpi-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (118 commits)
ACPI / LPSS: add LPSS device for Wildcat Point PCH
ACPI / PNP: Replace faulty is_hex_digit() by isxdigit()
ACPICA: Update version to 20140724.
ACPICA: ACPI 5.1: Update for PCCT table changes.
ACPICA/ARM: ACPI 5.1: Update for GTDT table changes.
ACPICA/ARM: ACPI 5.1: Update for MADT changes.
ACPICA/ARM: ACPI 5.1: Update for FADT changes.
ACPICA: ACPI 5.1: Support for the _CCA predifined name.
ACPICA: ACPI 5.1: New notify value for System Affinity Update.
ACPICA: ACPI 5.1: Support for the _DSD predefined name.
ACPICA: Debug object: Add current value of Timer() to debug line prefix.
ACPICA: acpihelp: Add UUID support, restructure some existing files.
ACPICA: Utilities: Fix local printf issue.
ACPICA: Tables: Update for DMAR table changes.
ACPICA: Remove some extraneous printf arguments.
ACPICA: Update for comments/formatting. No functional changes.
ACPICA: Disassembler: Add support for the ToUUID opererator (macro).
ACPICA: Remove a redundant cast to acpi_size for ACPI_OFFSET() macro.
ACPICA: Work around an ancient GCC bug.
ACPI / processor: Make it possible to get local x2apic id via _MAT
...
Pull ARM updates from Russell King:
"Included in this update:
- perf updates from Will Deacon:
The main changes are callchain stability fixes from Jean Pihet and
event mapping and PMU name rework from Mark Rutland
The latter is preparatory work for enabling some code re-use with
arm64 in the future.
- updates for nommu from Uwe Kleine-König:
Two different fixes for the same problem making some ARM nommu
configurations not boot since 3.6-rc1. The problem is that
user_addr_max returned the biggest available RAM address which
makes some copy_from_user variants fail to read from XIP memory.
- deprecate legacy OMAP DMA API, in preparation for it's removal.
The popular drivers have been converted over, leaving a very small
number of rarely used drivers, which hopefully can be converted
during the next cycle with a bit more visibility (and hopefully
people popping out of the woodwork to help test)
- more tweaks for BE systems, particularly with the kernel image
format. In connection with this, I've cleaned up the way we
generate the linker script for the decompressor.
- removal of hard-coded assumptions of the kernel stack size, making
everywhere depend on the value of THREAD_SIZE_ORDER.
- MCPM updates from Nicolas Pitre.
- Make it easier for proper CPU part number checks (which should
always include the vendor field).
- Assembly code optimisation - use the "bx" instruction when
returning from a function on ARMv6+ rather than "mov pc, reg".
- Save the last kernel misaligned fault location and report it via
the procfs alignment file.
- Clean up the way we create the initial stack frame, which is a
repeated pattern in several different locations.
- Support for 8-byte get_user(), needed for some DRM implementations.
- mcs locking from Will Deacon.
- Save and restore a few more Cortex-A9 registers (for errata
workarounds)
- Fix various aspects of the SWP emulation, and the ELF hwcap for the
SWP instruction.
- Update LPAE logic for pte_write and pmd_write to make it more
correct.
- Support for Broadcom Brahma15 CPU cores.
- ARM assembly crypto updates from Ard Biesheuvel"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (53 commits)
ARM: add comments to the early page table remap code
ARM: 8122/1: smp_scu: enable SCU standby support
ARM: 8121/1: smp_scu: use macro for SCU enable bit
ARM: 8120/1: crypto: sha512: add ARM NEON implementation
ARM: 8119/1: crypto: sha1: add ARM NEON implementation
ARM: 8118/1: crypto: sha1/make use of common SHA-1 structures
ARM: 8113/1: remove remaining definitions of PLAT_PHYS_OFFSET from <mach/memory.h>
ARM: 8111/1: Enable erratum 798181 for Broadcom Brahma-B15
ARM: 8110/1: do CPU-specific init for Broadcom Brahma15 cores
ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE
ARM: 8108/1: mm: Introduce {pte,pmd}_isset and {pte,pmd}_isclear
ARM: hwcap: disable HWCAP_SWP if the CPU advertises it has exclusives
ARM: SWP emulation: only initialise on ARMv7 CPUs
ARM: SWP emulation: always enable when SMP is enabled
ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resume
ARM: 8098/1: mcs lock: implement wfe-based polling for MCS locking
ARM: 8091/2: add get_user() support for 8 byte types
ARM: 8097/1: unistd.h: relocate comments back to place
ARM: 8096/1: Describe required sort order for textofs-y (TEXT_OFFSET)
ARM: 8090/1: add revision info for PL310 errata 588369 and 727915
...
The bus devices created to be parents for other peripherals
were using platform_bus as a parent, not being platform
devices themselves. Remove the references, making them
virtual devices instead.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
A number of board files in arch/arm and arch/unicore32
explicitly reference platform_bus device as a parent
for new platform devices.
This is unnecessary, as platform device API guarantees
that devices with NULL parent are going to by adopted
by the mentioned "root" device.
This patch removes or replaces with NULL such references.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Since the OPP layer is a kernel library which has been converted to be
directly selectable by its callers rather than user selectable and
requiring architectures to enable it explicitly the ARCH_HAS_OPP symbol
has become redundant and can be removed. Do so.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
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Merge tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim:
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
* tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm
ARM: EXYNOS: do not allow cpuidle registration for exynos5420
cpuidle: big.LITTLE: init driver for exynos5420
cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config
ARM: EXYNOS: add generic function to calculate cpu number
cpuidle: big.LITTLE: add of_device_id structure
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
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Merge tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.16, 2nd take" from Shawn Guo:
The i.MX fixes for 3.16, 2nd take:
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
* tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: parent lvds_sel input from upstream clock gates
Signed-off-by: Olof Johansson <olof@lixom.net>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Extend the clock control for FlexCAN with the second gate which
enable the clocks in the Clock Divider (CCM_CSCDR2) register too.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Most peripherals on the i.MX53 have an
Off-Platform Peripheral Access Control Register (OPACR)
in which the access rights (together with the MPROT registers) can be declared.
However, this does not seem to work for example for SSI1+SDMA, because the
supervisor bit is not set for the SDMA unit.
It does work for SSI2, the QSB for example uses SSI2 for its audio. But SSI2 only
works because it does NOT have an OPACR.
The right solution would be to fix the access rights for the SDMA, but the unit
responsible for this is the Central Security Unit (CSU), which of course is NOT
documented. So, until documentation for this is openly available, turn off the
supervisor protection because it cripples the hardware.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The i.MX SoCs allow to setup fine grained access rights to peripherals on the
AIPS bus.
This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21
or in later SoC versions the Off-Platform Peripheral Access Control Register
(OPACR), e.g. i.MX53.
Under certain circumstances this leads to problems in which bus masters are
not granted their access rights to peripherals.
To be able to disable these restrictions on DT platforms, add a helper function
that looks for AIPS nodes in the DT and disables them for every compatible node
it finds.
The compatible has to be declared in the mach-specific entry file, where this
helper function should then be called.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes definitions which not used anywhere in the driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use clock defines in order to make devicetrees more human readable.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The board has no insufficient support to be fully functional and seems
has no users. This patch removes support for this board.
However, the support may be added in the future by using the devicetree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27.
Instead we use SOC_IMX*.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
i.MX1 camera driver has been removed by the commit 90b055898e.
This patch removes remaining support files for this camera.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl
based machine. However if support for imx6sl is not enabled
at compile time, this prevents us from building the kernel and
we get this link error instead:
arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
:(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk'
This makes the cpu_is_imx6sl function conditionally return false
if imx6sl is disabled at compile-time, which matches what the
older cpu_is_mx* macros did. We have similar inline functions for
the other imx6 variants, but so far I have not run into a case
where the extra #ifdef is necessary.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Building a kernel for imx6sx but without imx6q support results in
this link error because of the missing cpuidle driver:
arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228):
undefined reference to `imx6q_cpuidle_init'
This patch adds a Makefile entry so we always build support for
the imx6q_cpuidle code when at least one of the 6sx or 6q variants
are enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and
later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and
727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So
let's drop them.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI and SSI_IPG are clocks controlled by the same clock gating field, so
register them with imx_clk_gate2_shared.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Otherwise GCC will mark the .init.rodata section R/W, which causes
a compile error once we add other real R/O data.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
It is only the mx6quad variant that can run up to 1.2GHz, so add the check
accordingly.
This avoids getting the following warning on a mx6solo:
failed to disable 1.2 GHz OPP
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Replace .init_time() hook with of_clk_init() for DT targets.
Based on:
d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The gpt0 timer clock has been wrong since:
6bbaec5 ARM i.MX25: implement clocks using common clock framework
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX21 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is a cleanup for i.MX21 clk driver. This change includes:
- Reduce license text.
- Remove unused definitions.
- Remove unused #include and sort the rest.
- Remove useless comment.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes clk_register_clkdev() for the clocks that do not
have any users for boards and drivers.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch perform rework i.MX21 clock initialization. This includes
adding missing clocks and sort clocks by register address.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
mx51 and mx53 are device tree only platforms, so we no longer need all these
calls to clk_register_clkdev().
Only keep cpu0 and gpc_dvfs clk_register_clkdev() calls.
Tested on imx51-babbage and imx53-qsb boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add standby mode support for suspend, to enter standby mode:
echo standby > /sys/power/state;
Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
According to hardware design, mem bit must be clear before
entering DSM mode, as ARM core will be power gated in DSM mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of using enum for clock ID, let's switch imx6qdl clock driver to
use macro. In this case, device tree can reuse these macros to improve
readability.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add suspend support for i.MX6SX.
To enter suspend, echo mem > /sys/power/state.
To exit suspend, using RTC alarm or enable debug UART wakeup.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The board has no insufficient support to be fully functional and seems
has no users. This patch removes support for this board. However, the
support may be added in the future by using the devicetree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds a reset fallback if base address of watchdog is not set.
This is intended for a targets not compatible with imx-21 watchdog,
i.MX1 for example.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch simplifies handling watchdog clock a bit.
As an additional change, now we properly check WDT clock in a reset
function.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch moves clock check function in common i.MX location
and switch i.MX clk drivers to use this new function.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch separates DT and non-DT clock initialization procedure,
so we can avoid a lot of unneeded clk_register_clkdev() for DT case.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Base address for driver is global, there are no need to use
intermediate variable for it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use of_clk_get_by_name() for timer clocks for DT case.
This patch eliminates a lot of unneeded clk_register_clkdev()
calls for GPT.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The mx51_display_revision() is a dead declaration. Remove it. Also,
move mx51_revision() into common.h.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The only code left in mm-imx5.c is to create static mapping. While all
IMX platform code are moved to use dynamic mapping, the file can just be
removed now.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
These imx5 init_early[late] hooks are called only from mach-imx5x.c.
Let's move them into mach-imx5x.c.
While at it, replace the static mapping in imx51_ipu_mipi_setup() with
dynamic mapping. Also this function and imx_src_init() do not
necessarily to be called at .init_early hook, so move them into
.init_machine.
The mxc_iomux_v3_init() is dropped from imx51_init_early() in the
moving, since it's only needed by non-DT boot.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx5 pm code uses static mapping to access Cortex and GPC registers.
The patch create struct imx5_pm_data to encode physical address of
Cortex and GPC block, and create dynamic mapping for them at run-time.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx5 pm code needs to access CCM registers. Let's remove the use
of CCM static mapping in pm code by reusing the dynamic mapping created
in clock code.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Replace the static mapping of DPLL block with dynamic mapping by
calling ioremap(). Ideally, this should be done by calling of_iomap(),
so that the physical address of DPLL can also be retrieved from device
tree. But unfortunately, DPLL blocks are not defined in DT in the first
place. So to maintain the compatibility of existing DTB, we use
ioremap() with physical address defines in the code.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Replace the static mapping of CCM block with dynamic mapping and
retrieve CCM base address from device tree. Though it's not nice to
encode the variable ccm_base in macros, it helps to avoid a massive
churn on the code.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the
needed ones into the C files, and remove the header.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of using static define and mapping, the patch changes imx5 code
that reads chip revision from IIM to retrieve base address from device
tree and use dynamic mapping.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since i.MX51 supports DT only, it's more appropriate to call
mxc_timer_init_dt() than mxc_timer_init() to initialize timer.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The function imx51_soc_init() was used by non-DT boot only. Since
i.MX51 supports DT only, the function can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
After i.MX51 supports DT only, tzic_init_irq() can figure out the
tzic_base on its own. Thus, it can directly be .init_irq hook, and
mx51[53]_init_irq() can be saved.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The function mx5_clocks_common_init() was created with a number of
arguments to pass oscillator clock rate in non-DT boot. Since i.MX5
is DT only platform, the arguments can be dropped, and the clock rate
can just be retrieved from device tree.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init()
a DT call and save function mx51_clocks_init_dt() now.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
i.MX5 is DT only platforms, so these non-DT device registration helpers
is used nowhere. Remove them.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and
just use SOC_IMX51 instead. While at it, rename imx51-dt.c to
mach-imx51.c to align with the name schema of other IMX DT only
platforms.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
After moving SOC_IMX51 support over to device tree, all i.MX5 support
becomes device tree only now. So options SOC_IMX5 and SOC_IMX51 can
just be under 'Device tree only'.
While at it, 'select ARCH_MXC_IOMUX_V3' is dropped, since it's only
needed by non-DT build before.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The platform_data header usb-ehci-mxc.h has a lot of stuff used by only
IMX platform code. They shouldn't be really in this header but a IMX
platform local header. Create ehci.h and move these stuff into it.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
imx_udc driver was removed from the kernel of about 10 months ago.
This patch removes a registration helper for this driver and
orphaned driver header.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
None of the defines "for modules using static and dynamic DMA channels"
are used. Remove these.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
No reason to choose a symbol HAVE_IMX_SRC separately for each supported
i.MX5 CPU, this patch selects this symbol globally for i.MX5.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The i.MX6 reference manual doesn't make a clear distinction
between the fixed clock divider and the enable gate for the
pcie and sata reference clocks. This lead to the lvds mux
inputs in the imx6q clk driver to be parented from the
ref clock (which is the divider) instead of the actual gate,
which in turn prevents the upstream clock to actually be
enabled when lvds clk out is active.
This fixes a hard machine hang regression in kernel 3.16 for
boards where only pcie is active but no sata, as with this
kernel version the imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
Reported-by: Arne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Arne Ruhnau <arne.ruhnau@target-sg.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Let's say clock A and B are two gate clocks that share the same register
bit in hardware. Therefore they are registered as shared gate clocks
with imx_clk_gate2_shared().
In a scenario that only clock A is enabled by clk_enable(A) while B is
not used, the shared gate will be unexpectedly disabled in hardware.
It happens because clk_enable(A) increments the share_count from 0 to 1,
while clock B is unused to clock core, and therefore the core function
will just disable B by calling clk->ops->disable() directly. The
consequence of that call is share_count is decremented to 0 and the gate
is disabled in hardware, even though clock A is still in use.
The patch fixes the issue by initializing the share_count per hardware
state and returns enable state per share_count from .is_enabled() hook,
in case it's a shared gate.
While at it, add a check in clk_gate2_disable() to ensure it's never
called with a zero share_count.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: f9f28cdf21 ("ARM: imx: add shared gate clock support")
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
A new set of bug fixes for 3.16, containing patches for seven platforms:
at91:
- drivers/misc fix for Kconfig PWM symbol
- correction of several values in DT after conversion to CCF
- fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc
imx:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
integrator:
- fix an OF-related regression against 3.15
mvebu:
- mvebu (v7)
- Fix broken SoC ID detection
- Select ARM_CPU_SUSPEND for v7
- Remove armada38x compatible string (no users yet)
- Enable Dove SoC in mvebu_v7_defconfig
- kirkwood
- Fix phy-connection-type on GuruPlug board
qcom:
- enable gsbi driver in defconfig
- fix section mismatch warning in serial driver
samsung:
- use WFI macro in platform_do_lowpower because exynos cpuhotplug
includes a hardcoded WFI instruction and it causes compile error
in Thumb-2 mode.
- fix GIC reg sizes for exynos4 SoCs
- remove reset timer counter value during boot and resume for mct
to fix a big jump in printk timestamps
- fix pm code to check cortex-A9 for another exynos SoCs
- don't rely on firmware's secondary_cpu_start for mcpm
sti:
- Ethernet clocks were wrongly defined for STiH415/416 platforms
- STiH416 B2020 revision E DTS file name contained uppercase, change to
lowercase.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"A new set of bug fixes for 3.16, containing patches for seven
platforms:
at91:
- drivers/misc fix for Kconfig PWM symbol
- correction of several values in DT after conversion to CCF
- fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc
imx:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
integrator:
- fix an OF-related regression against 3.15
mvebu:
- mvebu (v7)
- Fix broken SoC ID detection
- Select ARM_CPU_SUSPEND for v7
- Remove armada38x compatible string (no users yet)
- Enable Dove SoC in mvebu_v7_defconfig
- kirkwood
- Fix phy-connection-type on GuruPlug board
qcom:
- enable gsbi driver in defconfig
- fix section mismatch warning in serial driver
samsung:
- use WFI macro in platform_do_lowpower because exynos cpuhotplug
includes a hardcoded WFI instruction and it causes compile error
in Thumb-2 mode.
- fix GIC reg sizes for exynos4 SoCs
- remove reset timer counter value during boot and resume for mct
to fix a big jump in printk timestamps
- fix pm code to check cortex-A9 for another exynos SoCs
- don't rely on firmware's secondary_cpu_start for mcpm
sti:
- Ethernet clocks were wrongly defined for STiH415/416 platforms
- STiH416 B2020 revision E DTS file name contained uppercase, change to
lowercase"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (33 commits)
ARM: at91/dt: sam9261: remove slow RC osc
ARM: at91/dt: define sam9261ek slow crystal frequency
ARM: at91/dt: sam9261: correctly define mainck
ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
misc: atmel_pwm: fix Kconfig symbols
ARM: integrator: fix OF-related regression
ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
ARM: dts: kirkwood: fix phy-connection-type for Guruplug
ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm
ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
ARM: dts: imx51-babbage: Fix esdhc setup
ARM: dts: mx5: Move the display out of soc {} node
ARM: dts: mx5: Fix IPU port node placement
ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms
ARM: mvebu: Fix broken SoC ID detection
ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
ARM: multi_v7_defconfig: Add QCOM GSBI driver
ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
tty: serial: msm: Fix section mismatch warning
...
Pull ARM fixes from Russell King:
"A number of low impact fixes, the most noticable one is the thumb2
frame pointer fix. We also fix a regression caused during this merge
window with ARM925 CPUs running with caches disabled, and fix a number
of warnings"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: arm925: ensure assembly sets up writethrough mapping
ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
ARM: l2c: fix dependencies on PL310 errata symbols
ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode
ARM: 8068/1: scoop: Remove unused variable
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
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Merge tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "i.MX fixes for 3.16" from Shawn Guo:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
because controller base CD/WP is not working in esdhc driver due to
runtime PM support
- A couple of random ventana gw5xxx board fixes
- Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
IPUv3 driver out of staging tree
- Fix enet/fec clock selection on imx6sl
- Fix display node on imx53-m53evk board
- A couple of Cubox-i updates from Russell, which were omitted from
the merge window due to dependency
* tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
ARM: dts: imx51-babbage: Fix esdhc setup
ARM: dts: mx5: Move the display out of soc {} node
ARM: dts: mx5: Fix IPU port node placement
ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
ARM: dts: cubox-i: add support for PWM-driven front panel LED
ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
ARM: dts: imx6: ventana: fix include typo
ARM: dts: imx6sl: correct the fec ipg clock source
ARM: imx6sl: add missing enet clock for imx6sl
A number of configurations spit out warnings similar to:
warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0)
warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0)
Clean up the dependencies here:
* PL310 symbols should only be selected when CACHE_L2X0 is enabled.
* Since the cache-l2x0 code detects PL310 presence at runtime, and we will
eventually get rid of CACHE_PL310, surround these errata options with an
if CACHE_L2X0 conditional rather than repeating the dependency against
each.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.
[arnd: change OMAP part according to suggestion from
Tony Lindgren <tony@atomide.com>]
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This config exists entirely to hide the cpufreq menu from the
kernel configuration unless a platform has selected it. Nothing
is actually built if this config is 'Y' and it just leads to more
patches that add a select under a platform Kconfig so that some
other CPUfreq option can be chosen. Let's remove the option so
that we can always enable CPUfreq drivers on ARM platforms.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull ARM updates from Russell King:
- Major clean-up of the L2 cache support code. The existing mess was
becoming rather unmaintainable through all the additions that others
have done over time. This turns it into a much nicer structure, and
implements a few performance improvements as well.
- Clean up some of the CP15 control register tweaks for alignment
support, moving some code and data into alignment.c
- DMA properties for ARM, from Santosh and reviewed by DT people. This
adds DT properties to specify bus translations we can't discover
automatically, and to indicate whether devices are coherent.
- Hibernation support for ARM
- Make ftrace work with read-only text in modules
- add suspend support for PJ4B CPUs
- rework interrupt masking for undefined instruction handling, which
allows us to enable interrupts earlier in the handling of these
exceptions.
- support for big endian page tables
- fix stacktrace support to exclude stacktrace functions from the
trace, and add save_stack_trace_regs() implementation so that kprobes
can record stack traces.
- Add support for the Cortex-A17 CPU.
- Remove last vestiges of ARM710 support.
- Removal of ARM "meminfo" structure, finally converting us solely to
memblock to handle the early memory initialisation.
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
ARM: ensure C page table setup code follows assembly code (part II)
ARM: ensure C page table setup code follows assembly code
ARM: consolidate last remaining open-coded alignment trap enable
ARM: remove global cr_no_alignment
ARM: remove CPU_CP15 conditional from alignment.c
ARM: remove unused adjust_cr() function
ARM: move "noalign" command line option to alignment.c
ARM: provide common method to clear bits in CPU control register
ARM: 8025/1: Get rid of meminfo
ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
ARM: 8066/1: correction for ARM patch 8031/2
ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
ARM: 8047/1: rwsem: use asm-generic rwsem implementation
ARM: l2c: trial at enabling some Cortex-A9 optimisations
ARM: l2c: add warnings for stuff modifying aux_ctrl register values
ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
ARM: l2c: remove old .set_debug method
ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
...
- Another round of clean-up of FDT related code in architecture code.
This removes knowledge of internal FDT details from most architectures
except powerpc.
- Conversion of kernel's custom FDT parsing code to use libfdt.
- DT based initialization for generic serial earlycon. The introduction
of generic serial earlycon support went in thru tty tree.
- Improve the platform device naming for DT probed devices to ensure
unique naming and use parent names instead of a global index.
- Fix a race condition in of_update_property.
- Unify the various linker section OF match tables and fix several
function prototype errors.
- Update platform_get_irq_byname to work in deferred probe cases.
- 2 binding doc updates
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Merge tag 'devicetree-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into next
Pull DeviceTree updates from Rob Herring:
- Another round of clean-up of FDT related code in architecture code.
This removes knowledge of internal FDT details from most
architectures except powerpc.
- Conversion of kernel's custom FDT parsing code to use libfdt.
- DT based initialization for generic serial earlycon. The
introduction of generic serial earlycon support went in through the
tty tree.
- Improve the platform device naming for DT probed devices to ensure
unique naming and use parent names instead of a global index.
- Fix a race condition in of_update_property.
- Unify the various linker section OF match tables and fix several
function prototype errors.
- Update platform_get_irq_byname to work in deferred probe cases.
- 2 binding doc updates
* tag 'devicetree-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (58 commits)
of: handle NULL node in next_child iterators
of/irq: provide more wrappers for !CONFIG_OF
devicetree: bindings: Document micrel vendor prefix
dt: bindings: dwc2: fix required value for the phy-names property
of_pci_irq: kill useless variable in of_irq_parse_pci()
of/irq: do irq resolution in platform_get_irq_byname()
of: Add a testcase for of_find_node_by_path()
of: Make of_find_node_by_path() handle /aliases
of: Create unlocked version of for_each_child_of_node()
lib: add glibc style strchrnul() variant
of: Handle memory@0 node on PPC32 only
pci/of: Remove dead code
of: fix race between search and remove in of_update_property()
of: Use NULL for pointers
of: Stop naming platform_device using dcr address
of: Ensure unique names without sacrificing determinism
tty/serial: pl011: add DT based earlycon support
of/fdt: add FDT serial scanning for earlycon
of/fdt: add FDT address translation support
serial: earlycon: add DT support
...
A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support for
big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation and
moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as most
of the other v7 platforms in the tree. \o/ The work isn't quite complete,
there's some driver fixes still needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
Plus a large set of various smaller updates for different platforms. I'm
probably missing some important one here.
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Merge tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull part one of ARM SoC updates from Olof Johansson:
"A quite large set of SoC updates this cycle. In no particular order:
- Multi-cluster power management for Samsung Exynos, adding support
for big.LITTLE CPU switching on EXYNOS5
- SMP support for Marvell Armada 375 and 38x
- SMP rework on Allwinner A31
- Xilinx Zynq support for SOC_BUS, big endian
- Marvell orion5x platform cleanup, modernizing the implementation
and moving to DT.
- _Finally_ moving Samsung Exynos over to support MULTIPLATFORM, so
that their platform can be enabled in the same kernel binary as
most of the other v7 platforms in the tree. \o/
The work isn't quite complete, there's some driver fixes still
needed, but the basics now work.
New SoC support added:
- Freescale i.MX6SX
- LSI Axxia AXM55xx SoCs
- Samsung EXYNOS 3250, 5260, 5410, 5420 and 5800
- STi STIH407
plus a large set of various smaller updates for different platforms.
I'm probably missing some important one here"
* tag 'soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (281 commits)
ARM: exynos: don't run exynos4 l2x0 setup on other platforms
ARM: exynos: Fix "allmodconfig" build errors in mcpm and hotplug
ARM: EXYNOS: mcpm rename the power_down_finish
ARM: EXYNOS: Enable mcpm for dual-cluster exynos5800 SoC
ARM: EXYNOS: Enable multi-platform build support
ARM: EXYNOS: Consolidate Kconfig entries
ARM: EXYNOS: Add support for EXYNOS5410 SoC
ARM: EXYNOS: Support secondary CPU boot of Exynos3250
ARM: EXYNOS: Add Exynos3250 SoC ID
ARM: EXYNOS: Add 5800 SoC support
ARM: EXYNOS: initial board support for exynos5260 SoC
clk: exynos5410: register clocks using common clock framework
ARM: debug: qcom: add UART addresses to Kconfig help for APQ8084
ARM: sunxi: allow building without reset controller
Documentation: devicetree: arm: sort enable-method entries
ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocks
ARM: dts: axxia: Add reset controller
power: reset: Add Axxia system reset driver
ARM: axxia: Adding defconfig for AXM55xx
...
Cleanups for 3.16. Among these are:
- A bunch of misc cleanups for Broadcom platforms, mostly housekeeping
- Enabling Common Clock Framework on the older s3c24xx Samsung chipsets
- Cleanup of the Versatile Express system controller code, moving it to syscon
- Power management cleanups for OMAP platforms
+ a handful of other cleanups across the place
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Merge tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC cleanups from Olof Johansson:
"Cleanups for 3.16. Among these are:
- a bunch of misc cleanups for Broadcom platforms, mostly
housekeeping
- enabling Common Clock Framework on the older s3c24xx Samsung
chipsets
- cleanup of the Versatile Express system controller code, moving it
to syscon
- power management cleanups for OMAP platforms
plus a handful of other cleanups across the place"
* tag 'cleanup-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
ARM: kconfig: allow PCI support to be selected with ARCH_MULTIPLATFORM
clk: samsung: fix build error
ARM: vexpress: refine dependencies for new code
clk: samsung: clk-s3c2410-dlck: do not use PNAME macro as it declares __initdata
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
...
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. Since the .init_irq method only calls
irqchip_init(), we can remove that too as the generic code will take
care of that.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that we handle this in core code, we don't need platforms enabling
the low power modes directly.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full auxiliary control register definitions.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with
PCI-capable devices (e.g. mach-virt with virtio-pci).
This patch allows PCI support to be selected for these SoCs by selecting
CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the
individual selections from multi-platform enabled SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
They're u32, they're not unsigned long. The UL suffix is not required
here.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If we fail to allocate struct platform_device pdev we
dereference it after the goto label err.
This bug was found using coccinelle.
Fixes: afa77ef (ARM: mx3: dynamically allocate "ipu-core" devices)
Signed-off-by: Emil Goode <emilgoode@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Adding function type checking to CLK_OF_DECLARE found a type mismatch with
mx35_clocks_init_dt. The function should return void.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
CLKO support is a clock output on mx25 which can output many of the internal
clock sources. It is useful for debugging purpose or also for driving the
audio codec for example.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes clk_register_clkdev() for the clocks that do not
have any users from boards and drivers.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate,
ssi2_gate and brom_gate. As an additional this fixes incorrect bit
position for dma_gate clock.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their
devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and
imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files.
This allows the conversion of mx51 to a devicetree-only platform.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch moves IRQ handler setup to the its corresponded IRQ
driver (AVIC, TZIC).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Last address for eMMa PrP is 0x80...0x83, so increase resource size
for eMMa to 256.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes clk_register_clkdev() for the clocks that do not
have any users for non-DT boards and drivers.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The esai_ahb clock is derived from ahb and used to provide ESAI the
capability of register accessing and FSYS clock source for I2S clocks
dividing. The gate bits of this esai_ahb clock are shared with the
esai clock -- the baud clock, so we need to call imx_clk_gate2_shared()
for these two clocks.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
It's quite common on i.MX that one gate bit controls the gating of
multiple clocks, i.e. this is a shared gate. The patch adds the
function imx_clk_gate2_shared() for such case. The clocks controlled
by the same gate bits should call this function with a pointer to a
single share count variable, so that the gate bits will only be
operated on the first enabling and the last disabling of these shared
gate clocks.
Thanks to Gerhard Sittig <gsi@denx.de> for this idea.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx specific clk_gate2 always has a valid lock with the clock. So
the validation on gate->lock is not really needed. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx clk-gate2 driver implements an i.MX specific gate clock, which
has two bits controlling the gate states. While this is a completely
separate gate driver from the common clk-gate one, it reuses the common
clk_gate structure. Such reusing makes the extending of clk_gate2
clumsy. Let's define struct clk_gate2 on our own to make the driver
independent of the common clk-gate one, and ease the clk_gate2 extending
at a later time.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
replaces the ecspi5 clock with the i2c4 clock.
Handle this difference using cpu_is_imx6dl().
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The device tree version for the babbage board (imx51-babbage.dtb) has a more
complete support than the board file version, so remove the board file source
code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
CODA7 clock lookups are now defined in the device tree.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
- Remove unused <asm/mach/time.h> inclusion.
- Use predefined constant for CS8900A base address.
- Use DEFINE_RES_MEM() macro for NOR flash resource.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of using init() and exit() hooks from framebuffer driver
to control power of LCD, introduce fixed voltage regulator for
this purpose.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch replaces direct handling of peripheral bits with GPIOs by
using basic-mmio-gpio driver. As a result this change eliminate some
low-level code and removes custom io_map() from the board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To obtain exact pixel clocks, allow the DI clock selectors to influence
the PLLs that they are derived from.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Route the video PLL to the display interface clocks via the di_pre_sel
and di_sel muxes by default.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Allows fror proper refcounting of the parent clocks
when enabling the clock output on CLK1/2 pads.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Lots of changes specific to one of the SoC families. Some that
stick out are:
* mach-qcom gains new features, most importantly SMP support for
the newer chips (Stephen Boyd, Rohit Vaswani)
* mvebu gains support for three new SoCs: Armada 375, 380 and 385
(Thomas Petazzoni and Free-electrons team)
* SMP support for Rockchips (Heiko Stübner)
* Lots of i.MX changes (Shawn Guo)
* Added support for BCM5301x SoC (Hauke Mehrtens)
* Multiplatform support for Marvell Kirkwood and Dove
(Andrew Lunn and Sebastian Hesselbarth doing the final part
of a long journey)
* Unify davinci platforms and remove obsolete ones (Sekhar Nori,
Arnd Bergmann)
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Merge tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC specific changes from Arnd Bergmann:
"Lots of changes specific to one of the SoC families. Some that stick
out are:
- mach-qcom gains new features, most importantly SMP support for the
newer chips (Stephen Boyd, Rohit Vaswani)
- mvebu gains support for three new SoCs: Armada 375, 380 and 385
(Thomas Petazzoni and Free-electrons team)
- SMP support for Rockchips (Heiko Stübner)
- Lots of i.MX changes (Shawn Guo)
- Added support for BCM5301x SoC (Hauke Mehrtens)
- Multiplatform support for Marvell Kirkwood and Dove (Andrew Lunn
and Sebastian Hesselbarth doing the final part of a long journey)
- Unify davinci platforms and remove obsolete ones (Sekhar Nori, Arnd
Bergmann)"
* tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (126 commits)
ARM: sunxi: Select HAVE_ARM_ARCH_TIMER
ARM: cache-tauros2: remove ARMv6 code
ARM: mvebu: don't select CONFIG_NEON
ARM: davinci: fix DT booting with default defconfig
ARM: configs: bcm_defconfig: enable bcm590xx regulator support
ARM: davinci: remove tnetv107x support
MAINTAINERS: Update ARM STi maintainers
ARM: restrict BCM_KONA_UART to ARCH_BCM_MOBILE
ARM: bcm21664: Add board support.
ARM: sunxi: Add the new watchog compatibles to the reboot code
ARM: enable ARM_HAS_SG_CHAIN for multiplatform
ARM: davinci: remove da8xx_omapl_defconfig
ARM: davinci: da8xx: fix multiple watchdog device registration
ARM: davinci: add da8xx specific configs to davinci_all_defconfig
ARM: davinci: enable da8xx build concurrently with older devices
ARM: BCM5301X: workaround suppress fault
ARM: BCM5301X: add early debugging support
ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU
ARM: mach-bcm: Remove GENERIC_TIME
ARM: shmobile: APMU: Fix warnings due to improper printk formats
...
These cleanup patches are mainly move stuff around and should all
be harmless. They are mainly split out so that other branches can
be based on top to avoid conflicts.
Notable changes are:
* We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no
longer used. (Uwe Kleine-König)
* The Qualcomm MSM platform is split out into legacy mach-msm and
new-style mach-qcom, to allow easier maintainance of the new
hardware support without regressions. (Kumar Gala)
* A rework of some of the Kconfig logic to simplify multiplatform
support (Rob Herring)
* Samsung Exynos gets closer to supporting multiplatform (Sachin
Kamat and others)
* mach-bcm3528 gets merged into mach-bcm (Stephen Warren)
* at91 gains some common clock framework support (Alexandre Belloni,
Jean-Jacques Hiblot and other French people).
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Merge tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann:
"These cleanup patches are mainly move stuff around and should all be
harmless. They are mainly split out so that other branches can be
based on top to avoid conflicts.
Notable changes are:
- We finally remove all mach/timex.h, after CLOCK_TICK_RATE is no
longer used (Uwe Kleine-König)
- The Qualcomm MSM platform is split out into legacy mach-msm and
new-style mach-qcom, to allow easier maintainance of the new
hardware support without regressions (Kumar Gala)
- A rework of some of the Kconfig logic to simplify multiplatform
support (Rob Herring)
- Samsung Exynos gets closer to supporting multiplatform (Sachin
Kamat and others)
- mach-bcm3528 gets merged into mach-bcm (Stephen Warren)
- at91 gains some common clock framework support (Alexandre Belloni,
Jean-Jacques Hiblot and other French people)"
* tag 'cleanup-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (89 commits)
ARM: hisi: select HAVE_ARM_SCU only for SMP
ARM: efm32: allow uncompress debug output
ARM: prima2: build reset code standalone
ARM: at91: add PWM clock
ARM: at91: move sam9261 SoC to common clk
ARM: at91: prepare common clk transition for sam9261 SoC
ARM: at91: updated the at91_dt_defconfig with support for the ADS7846
ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek
ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs
ARM: at91: dt: Add at91sam9261 dt SoC support
ARM: at91: switch sam9rl to common clock framework
ARM: at91/dt: define main clk frequency of at91sam9rlek
ARM: at91/dt: define at91sam9rl clocks
ARM: at91: prepare common clk transition for sam9rl SoCs
ARM: at91: prepare sam9 dt boards transition to common clk
ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek
ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs
ARM: at91: Add at91sam9rl DT SoC support
ARM: at91: prepare at91sam9rl DT transition
ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig
...
Various fbdev fixes and improvements, but nothing big.
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Merge tag 'fbdev-main-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux
Pull fbdev changes from Tomi Valkeinen:
"Various fbdev fixes and improvements, but nothing big"
* tag 'fbdev-main-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (38 commits)
fbdev: Make the switch from generic to native driver less alarming
Video: atmel: avoid the id of fix screen info is overwritten
video: imxfb: Add DT default contrast control register property.
video: atmel_lcdfb: ensure the hardware is initialized with the correct mode
fbdev: vesafb: add dev->remove() callback
fbdev: efifb: add dev->remove() callback
video: pxa3xx-gcu: switch to devres functions
video: pxa3xx-gcu: provide an empty .open call
video: pxa3xx-gcu: pass around struct device *
video: pxa3xx-gcu: rename some symbols
sisfb: fix 1280x720 resolution support
video: fbdev: uvesafb: Remove impossible code path in uvesafb_init_info
video: fbdev: uvesafb: Remove redundant NULL check in uvesafb_remove
fbdev: FB_OPENCORES should depend on HAS_DMA
OMAPDSS: convert pixel clock to common videomode style
OMAPDSS: Remove unused get_context_loss_count support
OMAPDSS: use DISPC register to detect context loss
video: da8xx-fb: Use "SIMPLE_DEV_PM_OPS" macro
video: imxfb: Convert to SIMPLE_DEV_PM_OPS
video: imxfb: Resolve mismatch between backlight/contrast
...
Here's the big tty/serial driver update for 3.15-rc1.
Nothing major, a number of serial driver updates and a few tty core
fixes as well.
All have been in linux-next for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver update from Greg KH:
"Here's the big tty/serial driver update for 3.15-rc1.
Nothing major, a number of serial driver updates and a few tty core
fixes as well.
All have been in linux-next for a while"
* tag 'tty-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (71 commits)
tty/serial: omap: empty the RX FIFO at the end of half-duplex TX
tty/serial: omap: fix RX interrupt enable/disable in half-duplex TX
serial: sh-sci: Neaten dev_<level> uses
serial: sh-sci: Replace hardcoded 3 by UART_PM_STATE_OFF
serial: sh-sci: Add more register documentation
serial: sh-sci: Remove useless casts
serial: sh-sci: Replace printk() by pr_*()
serial_core: Avoid NULL pointer dereference in uart_close()
serial_core: Get a reference for port->tty in uart_remove_one_port()
serial: clps711x: Give a chance to perform useful tasks during wait loop
serial_core: Grammar s/ports/port's/
serial_core: Spelling s/contro/control/
serial: efm32: properly namespace location property
serial: max310x: Add missing #include <linux/uaccess.h>
synclink: fix info leak in ioctl
serial: 8250: Clean up the locking for -rt
serial: 8250_pci: change BayTrail default uartclk
serial: 8250_pci: more BayTrail error-free bauds
serial: sh-sci: Add missing call to uart_remove_one_port() in failure path
serial_core: Unregister console in uart_remove_one_port()
...
Merge the request/release callbacks which are in a separate branch for
consumption by the gpio folks.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The function v7_secondary_startup() works just fine in .text section, so
there is no need to have .text.head section annotation at all. Drop it.
Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Even when CONFIG_SUSPEND is enabled, it makes no sense to build
suspend-imx6.o if none of i.MX6 support is built in. Let's build
suspend-imx6.o only when both CONFIG_SUSPEND and CONFIG_SOC_IMX6 are
enabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The pm-imx6q.c works for all i.MX6 SoCs, so let's rename it to pm-imx6.c
and have the build controlled by option CONFIG_SOC_IMX6.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Rename function imx6q_ocram_suspend_init() to imx6q_suspend_init() and
call suspend_set_ops() from there. Now we get a centralized function
for suspend initialization.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With v7_cpu_resume() being moved out of headsmp.S, all the remaining
code in the file is only needed by CONFIG_SMP build. So we can control
the build of headsmp.o with only obj-$(CONFIG_SMP) now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The suspend-imx6.S is introduced recently for suspend low-level assembly
code. Since function v7_cpu_resume() is only used by suspend support,
it makes sense to move the function into suspend-imx6.S, and control the
build of the file with CONFIG_SUSPEND option.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
SOC_IMX53 is a device-tree only platform, so we don't need
IMX_HAVE_PLATFORM_IMX2_WDT at all because this symbol only provides some code
to help register imx2-wdt platform devices.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Booting a mx6q system built with multi_v7_defconfig leads to the following
error messages on boot:
[ 0.037758] imx6q_ocram_suspend_init: ocram pool unavailable!
[ 0.037768] imx6_pm_common_init: failed to initialize ocram suspend -19!
This happens because CONFIG_SRAM is not selected by default in
multi_v7_defconfig.
Fix this by selecting CONFIG_SRAM at ARCH_MXC level, so that other SoCs could
use the SRAM driver as well.
As SRAM automatically selects GENERIC_ALLOCATOR, just drop it from the Kconfig
entry.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The fuse map of speed_grading[1:0] defines the max speed
of ARM, see below the definition:
2b'11: 1200000000Hz;
2b'10: 996000000Hz;
2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
2b'00: 792000000Hz;
Need to remove all illegal setpoints according to fuse
map.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As clk_pllv3_wait_lock will call usleep_range, and the clk APIs
mutex lock may be held when CPU entering idle, so calling clk
APIs must be avoided in cpu idle thread, this is to avoid reschedule
warning in cpu idle, just access register directly to achieve that.
bad: scheduling from the idle thread!
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.14.0-rc1+ #657
Backtrace:
[<80012188>] (dump_backtrace) from [<8001246c>] (show_stack+0x18/0x1c)
r6:808c0038 r5:00000000 r4:808e5a1c r3:00000000
[<80012454>] (show_stack) from [<8064b2ec>] (dump_stack+0x84/0x9c)
[<8064b268>] (dump_stack) from [<80055ee0>] (dequeue_task_idle+0x20/0x30)
r5:808bef40 r4:bf7dff40
[<80055ec0>] (dequeue_task_idle) from [<8004f028>] (dequeue_task+0x30/0x50)
r4:bf7dff40 r3:80055ec0
[<8004eff8>] (dequeue_task) from [<800503c0>] (deactivate_task+0x30/0x34)
r4:bf7dff40
[<80050390>] (deactivate_task) from [<8064d8e4>] (__schedule+0x2c8/0x5c0)
[<8064d61c>] (__schedule) from [<8064dc14>] (schedule+0x38/0x88)
r10:80912964 r9:808c1e50 r8:808c0038 r7:808cbf30 r6:80e128ec r5:60000093
r4:80912968
[<8064dbdc>] (schedule) from [<8064dfec>] (schedule_preempt_disabled+0x10/0x14)
[<8064dfdc>] (schedule_preempt_disabled) from [<8064ebc0>] (mutex_lock_nested+0x1c0/0x3c0)
[<8064ea00>] (mutex_lock_nested) from [<804ae71c>] (clk_prepare_lock+0x44/0xe4)
r10:806554cc r9:bf7df1bc r8:808cf4f8 r7:808cf544 r6:bf7df1b8 r5:808c0010
r4:80e69750
[<804ae6d8>] (clk_prepare_lock) from [<804af214>] (clk_get_rate+0x14/0x64)
r6:bf7df1b8 r5:00000002 r4:bf017000 r3:80922ad0
[<804af200>] (clk_get_rate) from [<80025d30>] (imx6sl_set_wait_clk+0x18/0x20)
r5:00000002 r4:00000001
[<80025d18>] (imx6sl_set_wait_clk) from [<80023454>] (imx6sl_enter_wait+0x20/0x48)
[<80023434>] (imx6sl_enter_wait) from [<80477c24>] (cpuidle_enter_state+0x44/0xfc)
r4:3c386e48 r3:80023434
[<80477be0>] (cpuidle_enter_state) from [<80477dd8>] (cpuidle_idle_call+0xfc/0x160)
r8:808cf4f8 r7:00000001 r6:80e69534 r5:00000000 r4:bf7df1b8
[<80477cdc>] (cpuidle_idle_call) from [<8000f61c>] (arch_cpu_idle+0x10/0x50)
r9:808c0000 r8:00000000 r7:80921a89 r6:808c8938 r5:808c899c r4:808c0000
[<8000f60c>] (arch_cpu_idle) from [<8006fa94>] (cpu_startup_entry+0x108/0x160)
[<8006f98c>] (cpu_startup_entry) from [<806452ac>] (rest_init+0xb4/0xdc)
r7:808afae0
[<806451f8>] (rest_init) from [<8086fb58>] (start_kernel+0x328/0x38c)
r6:ffffffff r5:808c8880 r4:808c8a30
[<8086f830>] (start_kernel) from [<80008074>] (0x80008074)
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On imx6qdl, the ENET RMII and PTP clock can come from either internal
ANATOP/CCM or external clock source through pad GPIO_16. But in case
of the external clock source, bit IOMUXC_GPR1[21] needs to be cleared.
The patch adds the support for systems that use an external clock source
and distinguishes above two cases by checking if the PTP clock specified
in device tree is the one coming from the internal ANATOP/CCM.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Since commit (a94f8ec ARM: imx6q: remove board specific CLKO setup),
a number of clk lookups in imx6q clock driver is no longer needed.
Let's remove them.
The cpu0 lookup is also removed since we are now running imx6 cpufreq
driver and looking up clocks from device tree.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The imx can support timer-based delays, so implement this.
Skips past jiffy calibration.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
IPG, ARM and MMDC's clock should be enabled during kernel boot up,
so we need to maintain their usecount, otherwise, they may be
disabled unexpectedly if their children's clock are turned off, and
caused their parent PLLs also get disabled, which is incorrect.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
i.MX6SL's suspend in ocram function is derived from i.MX6Q,
it can lower the DDR IO power from ~10mA@1.2V to ~1mA@1.2V,
measured on i.MX6SL EVK board, SH5.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
i.MX6DL's suspend in ocram function is derived from i.MX6Q,
it can lower the DDR IO power from ~26mA@1.5V to ~15mA@1.5V,
measured on i.MX6DL SabreSD board, R25.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
When system enter suspend, we can set the DDR IO to
high-Z state to save DDR IOs' power consumption, this
operation can save many power(from ~26mA@1.5V to ~15mA@1.5V,
measured on i.MX6Q SabreSD board, R25) of DDR IOs. To
achieve that, we need to copy the suspend code to ocram
and run the low level hardware related code(set DDR IOs
to high-Z state) in ocram.
If there is no ocram space available, then system will
still do suspend in external DDR, hence no DDR IOs will
be set to high-Z.
The OCRAM usage layout is as below,
ocram suspend region(4K currently):
======================== high address ======================
.
.
.
^
^
^
imx6_suspend code
PM_INFO structure(imx6_cpu_pm_info)
======================== low address =======================
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As the i.MX pwm driver is devicetree only, remove the platform
support for this device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
There should be no duplicate const specifiers for those static
constant character string arrays defined for clock mux options.
Also, the arrays are only taken as the 5th argument for the
imx_clk_mux() function, which is in the type of 'const char
**parents'. So, let's remove the 2nd const specifier right
after 'char'.
This patch fixes these sparse warnings:
arch/arm/mach-imx/clk-vf610.c:66:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:67:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:68:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:69:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:70:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:71:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:72:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:73:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:74:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:75:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:76:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:77:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:78:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:79:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:80:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:81:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:83:25: warning: duplicate const
arch/arm/mach-imx/clk-vf610.c:84:25: warning: duplicate const
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
There should be no duplicate const specifiers for those static
constant character string arrays defined for clock mux options.
Also, the arrays are only taken as the 5th argument for the
imx_clk_mux() function, which is in the type of 'const char
**parents'. So, let's remove the 2nd const specifier right
after 'char'.
This patch fixes these sparse warnings:
arch/arm/mach-imx/clk-imx6sl.c:21:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:22:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:23:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:24:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:25:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:26:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:27:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:28:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:29:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:30:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:31:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:32:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:33:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:34:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:35:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:36:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:37:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:38:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:39:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:40:25: warning: duplicate const
arch/arm/mach-imx/clk-imx6sl.c:41:25: warning: duplicate const
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Move ARCH_HAS_CPUFREQ, ARCH_HAS_OPP and PM_OPP on ARCH_MXC so that
the user can enable the cpufreq support for iMX6Q and/or iMX6SL.
Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
shawn.guo: While at it, we drop 'select PINCTRL' from SOC_IMX35, since
it's been covered by ARCH_MXC.
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Eric Bénard <eric@eukrea.com>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add cpuidle support for i.MX6SL, currently only support
two cpuidle levels(ARM wfi and WAIT mode), and add software
workaround for WAIT mode errata as below:
ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken
during WAIT mode entry process could cause cache memory
corruption.
Software workaround:
To prevent this issue from occurring, software should ensure that
the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before
entering WAIT mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The reset value of AHB divider is 3, so current AHB rate
is 99MHz which is not correct for kernel, need to ensure
AHB rate is 132MHz in clk driver, as ipg is sourcing from
AHB, and it should be 66MHz by default.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Bit 17 of register CCM_CGPR is called INT_MEM_CLK_LPM as per the mx6
reference manual, so use this name instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
of individual platforms as they are redundant.
- Make SMP, CACHE_L2X0 and GPIO config options user visible on
multi-platform builds as most platforms enable these options and all
platforms can run with them enabled.
- Make multi-platform v6 default to more optimal v6k rather than v6
- Remove the last bit of mach-virt and convert it to just a kconfig
option.
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Merge tag 'kconfig-cleanup-for-3.15' into imx/soc
- Remove common kconfig options required by multi-platform builds out
of individual platforms as they are redundant.
- Make SMP, CACHE_L2X0 and GPIO config options user visible on
multi-platform builds as most platforms enable these options and all
platforms can run with them enabled.
- Make multi-platform v6 default to more optimal v6k rather than v6
- Remove the last bit of mach-virt and convert it to just a kconfig
option.
Conflicts:
arch/arm/mach-omap2/Kconfig
Use the proper functions. There is no need to fiddle with irq_desc.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>C
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: arm <linux-arm-kernel@lists.infradead.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20140223212737.099151500@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
MULTI_V6 should default to V6K as it is more optimal than V6. Any
platform which is not V6K should select CPU_V6 which will enable the
less optimal code paths.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Anton Vorontsov <anton@enomsg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Many V6 and V7 platforms have an L2x0 cache, so make
CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform
builds.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7
multi-platform builds.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Multi-platform requires various kconfig options to be selected, so
platforms don't need to select them individually.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
When building a kernel image with only CONFIG_CPU_IDLE but no CONFIG_PM,
we will get the following link error.
LD init/built-in.o
arch/arm/mach-imx/built-in.o: In function `imx6q_enter_wait':
platform-spi_imx.c:(.text+0x25c0): undefined reference to `imx6q_set_lpm'
platform-spi_imx.c:(.text+0x25d4): undefined reference to `imx6q_set_lpm'
arch/arm/mach-imx/built-in.o: In function `imx6q_cpuidle_init':
platform-spi_imx.c:(.init.text+0x75d4): undefined reference to `imx6q_set_chicken_bit'
make[1]: *** [vmlinux] Error 1
Since pm-imx6q.c has been a collection of library functions that access
CCM low-power registers used by not only suspend but also cpuidle and
other drivers, let's build pm-imx6q.c independently of CONFIG_PM to fix
above error.
Reported-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: stable@vger.kernel.org
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch replaces custom lcd_power() callback with
regulator API over LCD class.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Since commit 9e8147bb5e
"ARM: imx6q: move low-power code out of clock driver"
the kernel fails to boot on i.MX6Q/D if preemption is
enabled (CONFIG_PREEMPT=y). The kernel just hangs
before the console comes up.
The above commit moved the initalization of the low-power
mode setting (enabling clocked WAIT states), which was
introduced in commit 83ae20981a
"ARM: imx: correct low-power mode setting", from
imx6q_clks_init to imx6q_pm_init. Now it is called
much later, after all cores are enabled.
This patch moves the low-power mode initialization back
to imx6q_clks_init again (and to imx6sl_clks_init).
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Pull more ARM updates from Russell King:
"Some further changes for this merge window:
- fix bug building with gcc 4.6.4 and EABI.
- fix pgtbl macro with some LPAE configurations
- fix initrd override - FDT was overriding the command line, and it
should be the other way around.
- fix byteswap of instructions in undefined instruction handler
- add basic support for SolidRun Hummingboard and Cubox-i boards"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: fix building with gcc 4.6.4
ARM: 7941/2: Fix incorrect FDT initrd parameter override
ARM: 7947/1: Make pgtbl macro more robust
ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case
ARM: 7930/1: Introduce atomic MMIO modify
ARM: imx: initial SolidRun Cubox-i support
ARM: imx: initial SolidRun HummingBoard support
Pull LED subsystem update from Bryan Wu:
"Basically this cycle is mostly cleanup for LED subsystem"
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds:
leds: s3c24xx: Remove hardware.h inclusion
leds: replace list_for_each with list_for_each_entry
leds: kirkwood: Cleanup in header files
leds: pwm: Remove a warning on non-DT platforms
leds: leds-pwm: fix duty time overflow.
leds: leds-mc13783: Remove unneeded mc13xxx_{un}lock
leds: leds-mc13783: Remove duplicate field in platform data
drivers: leds: leds-tca6507: check CONFIG_GPIOLIB whether defined for 'gpio_base'
leds: lp5523: Support LED MUX configuration on running a pattern
leds: lp5521/5523: Fix multiple engine usage bug
LEDS: tca6507 - fix up some comments.
LEDS: tca6507: add device-tree support for GPIO configuration.
LEDS: tca6507 - fix bugs in parsing of device-tree configuration.
LED platform data are overwhelmed by excessive field "max_cur"
which just replicates few bits of "led_control" field.
This patch removes this field and adds a definition for the
current settings in the header.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
Add support for the SolidRun HummingBoard. This commit adds support for
the following interfaces on this board:
- Consumer Ir receiver
- S/PDIF output
- Both USB interfaces
- Gigabit Ethernet using AR8035
- UART port
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pull input subsystem updates from Dmitry Torokhov:
"Just a swath of driver fixes and cleanups, no new drivers this time
(although ALPS now supports one of the newer protocols, more to come)"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (57 commits)
Input: wacom - add support for DTU-1031
Input: wacom - fix wacom->shared guards for dual input devices
Input: edt_ft5x06 - use devm_* functions where appropriate
Input: hyperv-keyboard - pass through 0xE1 prefix
Input: logips2pp - fix spelling s/reciver/receiver/
Input: delete non-required instances of include <linux/init.h>
Input: twl4030-keypad - convert to using managed resources
Input: twl6040-vibra - remove unneeded check for CONFIG_OF
Input: twl4030-keypad - add device tree support
Input: twl6040-vibra - add missing of_node_put
Input: twl4030-vibra - add missing of_node_put
Input: i8042 - cleanup SERIO_I8042 dependencies
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on x86
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on unicore32
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on sparc
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO for SH_CAYMAN
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on powerpc
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on mips
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on IA64
Input: i8042 - select ARCH_MIGHT_HAVE_PC_SERIO on ARM/Footbridge
...
New core SoC-specific changes.
New platforms:
* Introduction of a vendor, Hisilicon, and one of their SoCs with some
random numerical product name.
* Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m, i.e. !MMU).
* Marvell Berlin series of SoCs, which include the one in Chromecast.
* MOXA platform support, ARM9-based platform used mostly in industrial products
* Support for Freescale's i.MX50 SoC.
Other work:
* Renesas work for new platforms and drivers, and conversion over to
more multiplatform-friendly device registration schemes.
* SMP support for Allwinner sunxi platforms.
* ... plus a bunch of other stuff across various platforms.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson:
"New core SoC-specific changes.
New platforms:
* Introduction of a vendor, Hisilicon, and one of their SoCs with
some random numerical product name.
* Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m,
i.e. !MMU).
* Marvell Berlin series of SoCs, which include the one in Chromecast.
* MOXA platform support, ARM9-based platform used mostly in
industrial products
* Support for Freescale's i.MX50 SoC.
Other work:
* Renesas work for new platforms and drivers, and conversion over to
more multiplatform-friendly device registration schemes.
* SMP support for Allwinner sunxi platforms.
* ... plus a bunch of other stuff across various platforms"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (201 commits)
ARM: tegra: fix tegra_powergate_sequence_power_up() inline
ARM: msm_defconfig: Update for multi-platform
ARM: msm: Move MSM's DT based hardware to multi-platform support
ARM: msm: Only build timer.c if required
ARM: msm: Only build clock.c on proc_comm based platforms
ARM: ux500: Enable system suspend with WFI support
ARM: ux500: turn on PRINTK_TIME in u8500_defconfig
ARM: shmobile: r8a7790: Fix I2C controller names
ARM: msm: Simplify ARCH_MSM_DT config
ARM: msm: Add support for MSM8974 SoC
ARM: sunxi: select ARM_PSCI
MAINTAINERS: Update Allwinner sunXi maintainer files
ARM: sunxi: Select RESET_CONTROLLER
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
...
This is the branch where we usually queue up cleanup efforts, moving
drivers out of the architecture directory, header file restructuring,
etc. Sometimes they tangle with new development so it's hard to keep it
strictly to cleanups.
Some of the things included in this branch are:
* Atmel SAMA5 conversion to common clock
* Reset framework conversion for tegra platforms
- Some of this depends on tegra clock driver reworks that are shared with Mike
Turquette's clk tree.
* Tegra DMA refactoring, which are shared branches with the DMA tree.
* Removal of some header files on exynos to prepare for multiplatform
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"This is the branch where we usually queue up cleanup efforts, moving
drivers out of the architecture directory, header file restructuring,
etc. Sometimes they tangle with new development so it's hard to keep
it strictly to cleanups.
Some of the things included in this branch are:
* Atmel SAMA5 conversion to common clock
* Reset framework conversion for tegra platforms
- Some of this depends on tegra clock driver reworks that are shared
with Mike Turquette's clk tree.
* Tegra DMA refactoring, which are shared branches with the DMA tree.
* Removal of some header files on exynos to prepare for
multiplatform"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
ARM: mvebu: move Armada 370/XP specific definitions to armada-370-xp.h
ARM: mvebu: remove prototypes of non-existing functions from common.h
ARM: mvebu: move ARMADA_XP_MAX_CPUS to armada-370-xp.h
serial: sh-sci: Rework baud rate calculation
serial: sh-sci: Compute overrun_bit without using baud rate algo
serial: sh-sci: Remove unused GPIO request code
serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
serial: sh-sci: Support resources passed through platform resources
serial: sh-sci: Don't check IRQ in verify port operation
serial: sh-sci: Set the UPF_FIXED_PORT flag
serial: sh-sci: Remove duplicate interrupt check in verify port op
serial: sh-sci: Simplify baud rate calculation algorithms
serial: sh-sci: Remove baud rate calculation algorithm 5
serial: sh-sci: Sort headers alphabetically
ARM: EXYNOS: Kill exynos_pm_late_initcall()
ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4
ARM: at91: switch Calao QIL-A9260 board to DT
clk: at91: fix pmc_clk_ids data type attriubte
PM / devfreq: use inclusion <mach/map.h> instead of <plat/map-s5p.h>
ARM: EXYNOS: remove <mach/regs-clock.h> for exynos
...
Pull ARM updates from Russell King:
"In this set, we have:
- Refactoring of some of the old StrongARM-1100 GPIO code to make
things simpler by Dmitry Eremin-Solenikov
- Read-only and non-executable support for modules on ARM from Laura
Abbot
- Removal of unnecessary set_drvdata() calls in AMBA code
- Some non-executable support for kernel lowmem mappings at the 1MB
section granularity, and dumping of kernel page tables via debugfs
- Some improvements for the timer/clock code on Footbridge platforms,
and cleanup some of the LED code there
- Fix fls/ffs() signatures to match x86 to prevent build warnings,
particularly where these are used with min/max() macros
- Avoid using the bootmem allocator on ARM (patches from Santosh
Shilimkar)
- Various asid/unaligned access updates from Will Deacon"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (51 commits)
ARM: SMP implementations are not supposed to return from smp_ops.cpu_die()
ARM: ignore memory below PHYS_OFFSET
Fix select-induced Kconfig warning for ZBOOT_ROM
ARM: fix ffs/fls implementations to match x86
ARM: 7935/1: sa1100: collie: add gpio-keys configuration
ARM: 7932/1: bcm: Add DEBUG_LL console support
ARM: 7929/1: Remove duplicate SCHED_HRTICK config option
ARM: 7928/1: kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS for CPUv6+ && MMU
ARM: 7927/1: dcache: select DCACHE_WORD_ACCESS for big-endian CPUs
ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator
ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching
ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE
ARM: PCI: add legacy IDE IRQ implementation
ARM: footbridge: cleanup LEDs code
ARM: pgd allocation: retry on failure
ARM: footbridge: add one-shot mode for DC21285 timer
ARM: footbridge: add sched_clock implementation
ARM: 7922/1: l2x0: add Marvell Tauros3 support
ARM: 7877/1: use built-in byte swap function
ARM: 7921/1: mcpm: remove redundant dsb instructions prior to sev
...
warning: (ARCH_MULTIPLATFORM && ARCH_CLPS711X && ARCH_PXA &&
SOC_EXYNOS5440 && ARCH_EMEV2) selects AUTO_ZRELADDR which
has unmet direct dependencies (!ZBOOT_ROM)
This is because it's possible to have ZBOOT_ROM enabled, but at the
same time have another option enabled which selects AUTO_ZRELADDR
overriding the !ZBOOT_ROM dependency. Fix this by reversing the
dependencies between ZBOOT_ROM and the options which depend on
!ZBOOT_ROM.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
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Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
i.MX SoC changes for 3.14:
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
* tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits)
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
ARM: imx: update imx_v6_v7_defconfig
ARM: imx6sl: Add missing spba clock to clock tree
ARM: imx6sl: Add missing pll4_audio_div to the clock tree
ARM: imx6: Derive spdif clock from pll3_pfd3_454m
ARM: imx: use __initconst for const init definition
ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
ARM i.MX5: set CAN peripheral clock to 24 MHz parent
ARM: imx: pllv1: Fix PLL calculation for i.MX27
ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
ARM: imx: imx53: Add SATA PHY clock
ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
ARM: imx: select PINCTRL at sub-architecure level
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Improve the comment of SW workaround for CCM lpm issue using
hardware errata description to avoid confusion.
ERR007265: CCM: When improper low-power sequence is used, the SoC
enters low power mode before the ARM core executes WFI.
Software workaround:
1) Software should trigger IRQ #32 (IOMUX) to be always pending
by setting IOMUX_GPR1_GINT.
2) Software should then unmask IRQ #32 in GPC before setting CCM
Low-Power mode.
3) Software should mask IRQ #32 right after CCM Low-Power mode is
set (set bits 0-1 of CCM_CLPCR).
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
For ccm clock gate, both 2b'11 and 2b'01 should be treated
as clock enabled, see below description in CCM, whenver CPU
trys to check clock gate's status, system will be in run mode.
2b'00: clock is off during all modes;
2b'01: clock is on in run mode, but off in wait and stop mode;
2b'10: Not applicable;
2b'11: clock is on during all modes, except stop mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Common clk framework will disable unused clks in late init only if
they are enabled by default and no one is using it, so we need to
add is_enabled callback for clk framework to get clks' status.
PFD clocks are enabled by hardware reset, so we need to add
interface for common clk framework to disable those unused ones for
saving power.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
We are missing spba clock in imx6sl's clock tree, thus add it.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
SPDIF can derive a TX clock for playback from one of its clock sources --
spdif root clock to match its supporting sample rates. So this patch set
the spdif root clock's parent to pll3_pfd3_454m since the pll3_pfd3_454m
can approximately meet its sample rate requirement.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
0-DAY kernel build testing backend reports the following.
scripts/checkpatch.pl 0001-ARM-imx-add-support-code-for-IMX50-based-machines.patch
# many are suggestions rather than must-fix
ERROR: Use of const init definition must use __initconst
#80: arch/arm/mach-imx/mach-imx50.c:26:
+static const char *imx50_dt_board_compat[] __initdata = {
While at it, fix the error globally for IMX platform.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ldb_di0_gate is registerd with the clk index of IMX5_CLK_LDB_DI1_GATE,
thus the DI0 interface will be turned off inadvertently during boot.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch sets the parent of CAN peripheral clock (a.k.a. CPI clock) to the
lp_apm clock, which has a rate of 24 MHz.
In the CAN world a base clock with multiple of 8 MHz is suited best for all CIA
recommented bit rates. Without this patch the CAN peripheral clock on i.MX53
has a rate of 66.666 MHz which produces quite large bit rate errors.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
MFN bit 9 on i.MX27 has a different meaning than in other SOCs. This
is a just sign bit. This patch makes different calculation for i.MX27.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to the i.MX50 Rev. 1 and i.MX53 Rev. 2.1 datasheet the lp_apm_sel is
bit 10 in the CCM_CCSR register not bit 9. On the i.MX51 it's bit 9.
This patch fixes this issue.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add SATA PHY clock which are derived from the USB PHY1 clock. Note that this
patch derives the SATA PHY clock from USB PHY1 clock gate so that the SATA
driver can ungate both the SATA PHY clock and USB PHY1 clock for the SATA to
work correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Linux-IDE <linux-ide@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of selecting PINCTRL on individual SoC, let's select it at IMX
sub-architecure level.
While at it, it also adds the missing PINCTRL_IMX50 selection for
SOC_IMX50.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM clock is sourcing from pll1_sw, and pll1_sw can be either from
pll1_sys or step, so we should enable arm clock during clock
initialization instead of pll1_sys, otherwise, arm clock's usecount
would be incorrect and PLL1 will never be disabled even it is not
used.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use clock defines in order to make devicetrees more
human readable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Correct spelling typo in various part of kernel
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Jingchang Lu