Commit Graph

95 Commits

Author SHA1 Message Date
Daniel Vetter 2454fcea33 drm-misc-next for v5.3:
UAPI Changes:
 
 Cross-subsystem Changes:
 - Add code to signal all dma-fences when freed with pending signals.
 - Annotate reservation object access in CONFIG_DEBUG_MUTEXES
 
 Core Changes:
 - Assorted documentation fixes.
 - Use irqsave/restore spinlock to add crc entry.
 - Move code around to drm_client, for internal modeset clients.
 - Make drm_crtc.h and drm_debugfs.h self-contained.
 - Remove drm_fb_helper_connector.
 - Add bootsplash to todo.
 - Fix lock ordering in pan_display_legacy.
 - Support pinning buffers to current location in gem-vram.
 - Remove the now unused locking functions from gem-vram.
 - Remove the now unused kmap-object argument from vram helpers.
 - Stop checking return value of debugfs_create.
 - Add atomic encoder enable/disable helpers.
 - pass drm_atomic_state to atomic connector check.
 - Add atomic support for bridge enable/disable.
 - Add self refresh helpers to core.
 
 Driver Changes:
 - Add extra delay to make MTP SDM845 work.
 - Small fixes to virtio, vkms, sii902x, sii9234, ast, mcde, analogix, rockchip.
 - Add zpos and ?BGR8888 support to meson.
 - More removals of drm_os_linux and drmP headers for amd, radeon, sti, r128, r128, savage, sis.
 - Allow synopsis to unwedge the i2c hdmi bus.
 - Add orientation quirks for GPD panels.
 - Edid cleanups and fixing handling for edid < 1.2.
 - Add runtime pm to stm.
 - Handle s/r in dw-hdmi.
 - Add hooks for power on/off to dsi for stm.
 - Remove virtio dirty tracking code, done in drm core.
 - Rework BO handling in ast and mgag200.
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Merge tag 'drm-misc-next-2019-06-14' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v5.3:

UAPI Changes:

Cross-subsystem Changes:
- Add code to signal all dma-fences when freed with pending signals.
- Annotate reservation object access in CONFIG_DEBUG_MUTEXES

Core Changes:
- Assorted documentation fixes.
- Use irqsave/restore spinlock to add crc entry.
- Move code around to drm_client, for internal modeset clients.
- Make drm_crtc.h and drm_debugfs.h self-contained.
- Remove drm_fb_helper_connector.
- Add bootsplash to todo.
- Fix lock ordering in pan_display_legacy.
- Support pinning buffers to current location in gem-vram.
- Remove the now unused locking functions from gem-vram.
- Remove the now unused kmap-object argument from vram helpers.
- Stop checking return value of debugfs_create.
- Add atomic encoder enable/disable helpers.
- pass drm_atomic_state to atomic connector check.
- Add atomic support for bridge enable/disable.
- Add self refresh helpers to core.

Driver Changes:
- Add extra delay to make MTP SDM845 work.
- Small fixes to virtio, vkms, sii902x, sii9234, ast, mcde, analogix, rockchip.
- Add zpos and ?BGR8888 support to meson.
- More removals of drm_os_linux and drmP headers for amd, radeon, sti, r128, r128, savage, sis.
- Allow synopsis to unwedge the i2c hdmi bus.
- Add orientation quirks for GPD panels.
- Edid cleanups and fixing handling for edid < 1.2.
- Add runtime pm to stm.
- Handle s/r in dw-hdmi.
- Add hooks for power on/off to dsi for stm.
- Remove virtio dirty tracking code, done in drm core.
- Rework BO handling in ast and mgag200.

Tiny conflict in drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c,
needed #include <linux/slab.h> to make it compile.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0e01de30-9797-853c-732f-4a5bd6e61445@linux.intel.com
2019-06-14 11:44:24 +02:00
Sam Ravnborg 47b757fba2 drm/amd: drop use of drmP.h in remaining files
With this commit drm/amd/ has no longer any uses of
the deprecated drmP.h header file.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-11-sam@ravnborg.org
2019-06-10 23:04:34 +02:00
Leo Liu f61334b556 drm/amdgpu/VCE: set no_user_fence flag to true
There is no user fence support for VCE

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-05-24 12:20:51 -05:00
Jack Xiao c4c905ec7b drm/amdgpu: add flags to emit_ib interface v2
Replace the last bool type parameter with a general flags parameter,
to make the last parameter be able to contain more information.

v2: drop setting need_ctx_switch = false

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-25 16:15:35 -05:00
Brajeswar Ghosh 0a46fc2eee drm/amd/amdgpu/vce_v3_0.c: Remove duplicate header
Remove gca/gfx_8_0_d.h which is included more than once

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-21 15:32:19 -05:00
Rex Zhu 34955e038a drm/amdgpu: Modify the argument of emit_ib interface
use the point of struct amdgpu_job as the function
argument instand of vmid, so the other members of
struct amdgpu_job can be visit in emit_ib function.

v2: add a wrapper for getting the VMID
    add the job before the ib on the parameter list.
v3: refine the wrapper name

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:50 -05:00
Andrey Grodzovsky c66ed765a0 drm/amdgpu: Retire amdgpu_ring.ready flag v4
Start using drm_gpu_scheduler.ready isntead.

v3:
Add helper function to run ring test and set
sched.ready flag status accordingly, clean explicit
sched.ready sets from the IP specific files.

v4: Add kerneldoc and rebase.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-05 14:21:23 -05:00
Christian König 1ffdeca648 drm/amdgpu: move more defines into amdgpu_irq.h
Everything that isn't related to the IH ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:22 -05:00
Emily Deng 20acbed47d drm/amdgpu/vce: VCE entity initialization relies on ring initializtion
Entity init should after ring init, as the entity's sched_rq's initialization
is in ring init.

SWDEV-161495

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-13 17:21:29 -05:00
Andrey Grodzovsky 091aec0b4e drm/amd: Use newly added interrupt source defs for VI v3.
v2: Rebase
v3: Use defines for CP_SQ and CP_ECC_ERROR interrupts.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-13 14:45:30 -05:00
Alex Deucher 5d4af988f3 drm/amdgpu/vce: simplify vce instance setup
Set the me instance in early init and use that rather than
calculating the instance based on the ring pointer.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05 16:39:53 -05:00
Alex Deucher 3413accb3e drm/amdgpu: fix swapped emit_ib_size in vce3
The phys and vm versions had the values swapped.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-05 16:39:50 -05:00
Leo Liu a771289786 drm/amdgpu: add VEGAM to VCE harvest config
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:00 -05:00
Rex Zhu 08ebb6e9f4 drm/amdgpu: Add APU support in vi_set_vce_clocks
1. fix set vce clocks failed on Cz/St
   which lead 1s delay when boot up.
2. remove the workaround in vce_v3_0.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-05-15 13:43:08 -05:00
Christian König c633c00bf0 drm/amdgpu: separate PASID mapping from VM flush v2
Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:20:18 -05:00
Christian König 5a4633c4b8 drm/amdgpu: forward pasid to backend flush implementations
rd the pasid from the VM code to the emit_vm_flush function and update
all implementations with the new parameter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19 14:17:47 -05:00
Christian König c4f46f22c4 drm/amdgpu: rename vm_id to vmid
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27 11:34:02 -05:00
Leo Liu 32bec2afa5 drm/amdgpu: allow harvesting check for Polaris VCE
Fixes init failures on Polaris cards with harvested
VCE blocks.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2017-11-01 23:37:16 -04:00
Leo Liu 45cc6586b7 drm/amdgpu: Program ring for vce instance 1 at its register space
We need program ring buffer on instance 1 register space domain,
when only if instance 1 available, with two instances or instance 0,
and we need only program instance 0 regsiter space domain for ring.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-31 13:09:15 -04:00
Rex Zhu 502372878a drm/amdgpu: various cleanups for uvd/vce.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-04 13:40:33 -04:00
Rex Zhu 1c622002b1 drm/amd/powerplay: add a new register define for APU in VI.
the ixcurrent_pg_status addr is different between APU and DGPU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:06 -04:00
Rex Zhu 2667989927 drm/amdgpu: refine vce_3.0 code.
fix logic error in hw_fini and
set_clockgating_state functions.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:51 -04:00
Alex Deucher 7ccf5aa8ba drm/amdgpu/ih: store the full context id
The contextID field (formerly known as src_data) of the IH
vector stores client specific information about an interrupt.
It was expanded from 32 bits to 128 on newer asics.  Expand the
src_id field to handle this.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:37 -04:00
Alex Deucher d766e6a393 drm/amdgpu: switch ih handling to two levels (v3)
Newer asics have a two levels of irq ids now:
client id - the IP
src id - the interrupt src within the IP

v2: integrated Christian's comments.
v3: fix rebase fail in SI and CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:37 -04:00
Ken Wang 536fbf946c drm/amdgpu: change wptr to 64 bits (v2)
Newer asics need 64 bit wptrs.  If the wptr is now
smaller than the rptr that doesn't indicate a wrap-around
anymore.

v2: integrate Christian's comments.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:53:35 -04:00
Rex Zhu 254cd2e08d drm/amdgpu: read hw register to check pg status.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-13 12:43:04 -05:00
Alan Harrison d50e5c2448 drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
Add a bit needed during initialization into the driver, where it is supposed
to be.  Currently, this is happening in the VCE firmware, and although
functional, this is the correct place to perform this initialization.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alan Harrison <Alan.Harrison@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-13 12:41:07 -05:00
Rex Zhu 6fc11b0ed3 drm/amdgpu: refine vce3.0 code and related powerplay pg code.
1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-08 17:23:19 -05:00
Rex Zhu 714b1f5371 drm/amdgpu: refine vce3.0 initialize.
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
   so no need to set bypass clock to vce.

Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:15 -05:00
Huang Rui c79b55618a drm/amdgpu: add get clockgating_state method for vce v3
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:13:11 -05:00
Rex Zhu 50a1ebc70a drm/amdgpu: fix program vce instance logic error.
need to clear bit31-29 in GRBM_GFX_INDEX,
then the program can be valid.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-17 15:25:04 -05:00
Rex Zhu e05208ded1 drm/amdgpu: fix bug set incorrect value to vce register
Set the proper bits for clockgating setup.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-17 15:24:55 -05:00
Junwei Zhang c4642a479f drm/amd/amdgpu: add Polaris12 support (v3)
v2: agd: squash in various fixes
v3: agd: squash in:
drm/amdgpu: remove unnecessary smc sk firmware for polaris12

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-06 17:07:54 -05:00
Maruthi Srinivas Bayyavarapu ecc2cf7cc8 drm/amdgpu: enable VCE clockgating in Polaris-10/11
VCE clocks are set to be disabled, when not in use.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:26 -05:00
Dave Airlie 7b624ad8fe Linux 4.9-rc4
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Backmerge tag 'v4.9-rc4' into drm-next

Linux 4.9-rc4

This is needed for nouveau development.
2016-11-07 09:37:09 +10:00
Christian König 9861470181 drm/amdgpu: add VCE VM session tracking
Fix the problems with killing VCE sessions in VM mode.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:55 -04:00
Alex Deucher a125510721 drm/amdgpu: rework IP block registration (v2)
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:45 -04:00
Christian König 7988714237 drm/amdgpu: move align_mask and nop into ring funcs as well (v2)
They are constant as well.

v2: update uvd and vce phys ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König 21cd942e5c drm/amdgpu: move the ring type into the funcs structure (v2)
It's constant, so it doesn't make to much sense to keep it
with the variable data.

v2: update vce and uvd phys mode ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:37 -04:00
Christian König e12f3d7a23 drm/amdgpu: move IB and frame size directly into the engine description
I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Christian König 7bc6be825a drm/amdgpu: remove explicit NULL init for parse_cs
sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Alex Deucher ef6239e0cf drm/amdgpu/vce3: only enable 3 rings on new enough firmware (v2)
Older firmware versions don't support 3 rings.

fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=98016

v2: use define for fw version

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 13:57:11 -04:00
Alex Deucher da146d3b52 drm/amdgpu: fix amdgpu_need_full_reset (v2)
IP types are not an index.  Each asic may have number and
type of IPs.  Properly check the the type rather than
using the type id as an index.

v2: fix all the IPs to not use IP type as an idx as well.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-10-14 11:51:04 -04:00
Rex Zhu 3374dcebb8 drm/amdgpu: bypass vce clock if vce is idle on Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-27 13:00:48 -04:00
Alex Deucher 58fafbaf16 drm/amdgpu/vce3: add ring callbacks for ib and dma frame size
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-16 15:53:02 -04:00
Maruthi Srinivas Bayyavarapu ea4a8c1d94 drm/amdgpu: add VCE VM mode support
This adds VCE VM mode support from Stoney onwards. Session tracking
is an open issue, yet to be supported.

v2: Fixed warnings from checkpatch.pl

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-12 18:12:16 -04:00
Rex Zhu c04399f194 drm/amdgpu: add vce bypass mode for tonga.
fix issue that encode test failed on the second time when
vce dpm enabled on tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:40 -04:00
Rex Zhu 0174df4e66 drm/amdgpu: refine function name for consistency
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 12:22:09 -04:00
Alex Deucher 6f0359ff73 drm/amdgpu/vce3: add support for third vce ring
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:51 -04:00
Alex Deucher 75c65480ba drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value.  This allows
different versions to expose more or less rings.

No functional change.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:43 -04:00