Commit Graph

191 Commits

Author SHA1 Message Date
Greg Kroah-Hartman f1faf88c13 phy: for 4.16
*) Fix in exynos5-usbdrd to enumerate SuperSpeed devices on Odroid XU3
  *) Fix in Broadcom USB PHY to get Dell Low Speed keyboards working
  *) Fix in Broadcom USB PHY to power down the PHY when XHCI disabled
     to save power
  *) Fix in Broadcom USB PHY to prevent abort in DRD mode
  *) Fix in Broadcom USB PHY to use the correct dt properties
  *) Fix in Mediatek PHY to detect device connection
  *) Make getting resource optional for Mediatek V1 TPHY
  *) Cleanup in Mediatek PHY
 
 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Merge tag 'phy-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next

Kishon writes:

phy: for 4.16

 *) Fix in exynos5-usbdrd to enumerate SuperSpeed devices on Odroid XU3
 *) Fix in Broadcom USB PHY to get Dell Low Speed keyboards working
 *) Fix in Broadcom USB PHY to power down the PHY when XHCI disabled
    to save power
 *) Fix in Broadcom USB PHY to prevent abort in DRD mode
 *) Fix in Broadcom USB PHY to use the correct dt properties
 *) Fix in Mediatek PHY to detect device connection
 *) Make getting resource optional for Mediatek V1 TPHY
 *) Cleanup in Mediatek PHY

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-01-08 14:17:59 +01:00
Vivek Gautam d8c80bb3b5 phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800
Adding phy calibration sequence for USB 3.0 DRD PHY present on
Exynos5420/5800 systems.
This calibration facilitates setting certain PHY parameters viz.
the Loss-of-Signal (LOS) Detector Threshold Level, as well as
Tx-Vboost-Level for Super-Speed operations.
Additionally we also set proper time to wait for RxDetect measurement,
for desired PHY reference clock, so as to solve issue with enumeration
of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive
on the controller.

We are using CR_port for this purpose to send required data
to override the LOS values.

On testing with USB 3.0 devices on USB 3.0 port present on
SMDK5420, and peach-pit boards should see following message:
usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd

and without this patch, should see below shown message:
usb 1-1: new high-speed USB device number 2 using xhci-hcd

[Also removed unnecessary extra lines in the register macro definitions]

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
[adapted to use phy_calibrate as entry point]
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-12-29 13:00:35 +05:30
Roger Quadros 42bf02ec6e usb: dwc3: Allow disabling of metastability workaround
Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
with the metastability workaround as it supports only
a High-Speed PHY and the PHY can enter into an Erratic state [1]
when the controller is set in SuperSpeed mode as part of
the metastability workaround.

This causes upto 2 seconds delay in enumeration on DRA7's USB2
instance in gadget mode.

If these platforms can be better off without the workaround,
provide a device tree property to suggest that so the workaround
is avoided.

[1] Device mode enumeration trace showing PHY Erratic Error.
     irq/90-dwc3-969   [000] d...    52.323145: dwc3_event: event (00000901): Erratic Error [U0]
     irq/90-dwc3-969   [000] d...    52.560646: dwc3_event: event (00000901): Erratic Error [U0]
     irq/90-dwc3-969   [000] d...    52.798144: dwc3_event: event (00000901): Erratic Error [U0]

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-12-11 12:36:53 +02:00
Greg Kroah-Hartman b5ea47570b USB: dwc3: Remove redundant license text
Now that the SPDX tag is in all USB files, that identifies the license
in a specific and legally-defined manner.  So the extra GPL text wording
can be removed as it is no longer needed at all.

This is done on a quest to remove the 700+ different ways that files in
the kernel describe the GPL license text.  And there's unneeded stuff
like the address (sometimes incorrect) for the FSF which is never
needed.

No copyright headers or other non-license-description text was removed.

Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-07 15:45:01 +01:00
Greg Kroah-Hartman 5fd54ace47 USB: add SPDX identifiers to all remaining files in drivers/usb/
It's good to have SPDX identifiers in all files to make it easier to
audit the kernel tree for correct licenses.

Update the drivers/usb/ and include/linux/usb* files with the correct
SPDX license identifier based on the license text in the file itself.
The SPDX identifier is a legally binding shorthand, which can be used
instead of the full boiler plate text.

This work is based on a script and data from Thomas Gleixner, Philippe
Ombredanne, and Kate Stewart.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Acked-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-04 11:48:02 +01:00
Manu Gautam 644cbbc3ab usb: dwc3: core: Notify current USB mode to USB3 PHY as well
Driver currently notifies only USB2 PHY on USB mode change.
Extend this to USB3 PHY so that PHY drivers based on the
mode can release system resources - clocks, regulators etc.
Additionally Qualcomm QMP and QUSB2 PHY drivers need to
override VBUS signal in PHY wrapper in device mode as USB
VBUS line is not connected to PHYs. Also, remove NULL checks
for PHY when calling phy_set_mode as PHY ops already check this.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24 12:51:20 +03:00
Manu Gautam 8eed00b237 usb: dwc3: pci: Runtime resume child device from wq
Driver currently resumes and increments pm usage_count
of its child device (dwc3 main) from its runtime_resume
handler. This requires dwc3 runtime_resume to perform
pm_runtime_put to decrement the pm usage_count. However
runtime_put from dwc3 happens for non pci drivers
(e.g. dwc3-if-simple.c) as well which results in dwc3
pm usage_count becoming negative after couple of
runtime suspend resume iterations. Fix this by
performing runtime_get/put from dwc3-pci driver only
using workqueue.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24 12:51:19 +03:00
Manu Gautam 689bf72c6e usb: dwc3: Don't reinitialize core during host bus-suspend/resume
Driver powers-off PHYs and reinitializes DWC3 core and gadget on
resume. While this works fine for gadget mode but in host
mode there is not re-initialization of host stack. Also, resetting
bus as part of bus_suspend/resume is not correct which could affect
(or disconnect) connected devices.
Fix this by not reinitializing core on suspend/resume in host mode
for HOST only and OTG/drd configurations.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-10-24 12:51:19 +03:00
Vignesh R 541768b08a usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys
commit f54edb539c ("usb: dwc3: core: initialize ULPI before trying to
get the PHY") moved call to dwc3_core_get_phy() from dwc3_probe() to
dwc3_core_init() after dwc3_core_soft_reset(). But
dwc3_core_soft_reset() calls phy_init(), therefore dwc3_core_get_phy()
needs to be called before dwc3_core_soft_reset().

Fix this by moving call to dwc3_core_get_phy() before
dwc3_core_soft_reset().

This fixes the following abort seen on DRA7xx platforms
[   24.769118] usb usb2: SerialNumber: xhci-hcd.1.auto
[   24.781144] hub 2-0:1.0: USB hub found
[   24.787836] hub 2-0:1.0: 1 port detected
[   24.809939] Unhandled fault: imprecise external abort (0x1406) at 0x00000000

Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 10:58:56 +03:00
Felipe Balbi 958d1a4c40 usb: dwc3: core: program PHY for proper DRD modes
If PHY is entering Host mode, we need to enable VBUS.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-06-13 13:21:06 +03:00
Felipe Balbi f54edb539c usb: dwc3: core: initialize ULPI before trying to get the PHY
If don't reorder initialization like this, we will never be able to
get a reference to ULPI PHYs.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-06-13 13:21:06 +03:00
William Wu 65db7a0c98 usb: dwc3: add disable u2mac linestate check quirk
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.

When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).

On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-05-17 14:16:57 +03:00
Roger Quadros 9840354ff4 usb: dwc3: Add dual-role support
If dr_mode is "otg" then support dual role mode of operation.
Currently this mode is only supported when an extcon handle is
present in the dwc3 device tree node. This is needed to
get the ID status events of the port.

We're using a workqueue to manage the dual-role state transitions
as the extcon notifier (dwc3_drd_notifier) is called in an atomic
context by extcon_sync() and this doesn't go well with
usb_del_gadget_udc() causing a lockdep and softirq warning.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:31 +03:00
Roger Quadros 41ce1456e1 usb: dwc3: core: make dwc3_set_mode() work properly
We can't have both Host and Peripheral roles active at the same time
because of one detail on DWC3: it shares the same memory area for both
Host and Peripheral registers.

When swapping roles we must reinitialize the new role every
time. Let's make sure this works for our debugfs interface.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:30 +03:00
Roger Quadros 6b3261a274 usb: dwc3: core: add current_dr_role member
We're going to use this member to track which role we're currently
playing, that way we can more easily implement dual-role swap in
upcoming patches.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:30 +03:00
Bryan O'Donoghue 47d3946ea2 usb: dwc3: refactor gadget endpoint count calculation
- DWC_USB3_NUM indicates the number of Device mode single directional
  endpoints, including OUT and IN endpoint 0.

- DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
  endpoints active at any time, including control endpoint 0.

It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
DWC_USB3_NUM_IN_EPS.

dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
endpoints as zero.

For example a from dwc3_core_num_eps() shows:
[    1.565000]  /usb0@f01d0000: found 8 IN and 0 OUT endpoints

This patch refactors the endpoint calculation down to one variable
dwc->num_eps taking care to maintain the current mapping of endpoints for
fixed FPGA configurations as described in Table 4-7 of version 2.60a of the
DWC USB3 databook.

The endpoint mapping will then be EP-OUT, EP-IN etc, up to DWC_USB3_NUM.
If DWC_USB3_NUM is odd then OUT will take the extra endpoint.

Suggested-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-04-11 10:58:18 +03:00
Felipe Balbi 1966b8657d usb: dwc3: make sure UX_EXIT_PX is cleared
This bit is only supposed to be used with known
buggy PHYs, however some platforms might erroneously
set it. In order to avoid it, let's make sure this
bit is always cleared. If some PHY needs this, we
will need to add a quirk flag.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-03-27 10:46:33 +03:00
Greg Kroah-Hartman ae4d814bf1 usb: patches for v4.10 merge window
One big merge this time with a total of 166 non-merge commits.
 
 Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
 second (22.5%). The remaining 9.3% are scattered on gadget drivers.
 
 The most important changes for dwc2 are the peripheral side DMA support
 implemented by Synopsys folks and support for the new IOT dwc2
 compatible core from Synopsys.
 
 In dwc3 land we have support for high-bandwidth, high-speed isochronous
 endpoints and some non-critical fixes for large scatter lists.
 
 Apart from these, we have our usual set of cleanups, non-critical fixes,
 etc.
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Merge tag 'usb-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

usb: patches for v4.10 merge window

One big merge this time with a total of 166 non-merge commits.

Most of the work, by far, is on dwc2 this time (68.2%) with dwc3 a far
second (22.5%). The remaining 9.3% are scattered on gadget drivers.

The most important changes for dwc2 are the peripheral side DMA support
implemented by Synopsys folks and support for the new IOT dwc2
compatible core from Synopsys.

In dwc3 land we have support for high-bandwidth, high-speed isochronous
endpoints and some non-critical fixes for large scatter lists.

Apart from these, we have our usual set of cleanups, non-critical fixes,
etc.
2016-11-18 16:02:15 +01:00
Arnd Bergmann d64ff406e5 usb: dwc3: use bus->sysdev for DMA configuration
The dma ops for dwc3 devices are not set properly. So, use a
physical device sysdev, which will be inherited from parent,
to set the hardware / firmware parameters like dma.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:54 +02:00
John Youn 28632b44d1 usb: dwc3: Workaround for irq mask issue
This is a workaround for STAR 9000961433 which affects only version
3.00a of the DWC_usb3 core. This prevents the controller interrupt from
being masked while handling events. Enabling interrupt moderation allows
us to work around this issue because once the GEVNTCOUNT.count is
written the IRQ is immediately deasserted and won't be asserted again
until GEVNTCOUNT.EHB is cleared.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:51 +02:00
John Youn cf40b86b6e usb: dwc3: Implement interrupt moderation
Implement interrupt moderation which allows the interrupt rate to be
throttled. To enable this feature the dwc->imod_interval must be set to
1 or greater. This value specifies the minimum inter-interrupt interval,
in 250 ns increments. A value of 0 disables interrupt moderation.

This applies for DWC_usb3 version 3.00a and higher and for DWC_usb31
version 1.20a and higher.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:51 +02:00
John Youn d9fa4c63f7 usb: dwc3: core: add a event buffer cache
This extra buffer will be used so we can copy
triggered events from our event buffer to this cache
and process all of them later in bottom half
handler.

We need this in order to implement a workaround for
a known erratum in recent DWC3 release.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:42 +02:00
Felipe Balbi a22f884b26 usb: dwc3: core: remove dwc3_soft_reset()
dwc3_soft_reset() is doing the same thing as
dwc3_core_soft_reset(). Let's remove
dwc3_soft_reset() since that's not needed anymore.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:42 +02:00
John Youn 7ac51a12ea usb: dwc3: Add a function to check properties
Add a function to check properties and call it from probe. This will
allow us to add check code without bloating the probe function. This
needs to be done after dwc3_get_properties() and dwc3_core_init() so
that all the properties and hardware configs are available.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-18 13:54:33 +02:00
Felipe Balbi 5eb30cedce usb: dwc3: trace: purge dwc3_trace()
Finally get rid of dwc3_trace() hack. If any other
message is truly needed, we should add proper
tracepoints for them instead of hacking around with
dwc3_trace() or similar.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-08 12:52:13 +02:00
Felipe Balbi c5ac6116db usb: dwc3: core: add dwc3_get_properties()
This helper will be responsible for reading and
parsing our properties. No functional changes in
this patch, cleanup only.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:35 +02:00
Felipe Balbi 3b2733227f usb: dwc3: core: remove unnecessary alignment
Kernel will give us page aligned memory anyway.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:34 +02:00
Felipe Balbi 941f918ecf usb: dwc3: core: introduce dwc3_core_setup_global_control()
This little helper will be used to setup anything
related to GCTL register. There are no functional
changes, this is a cleanup only patch.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:34 +02:00
Felipe Balbi 0759956f8a usb: dwc3: core: introduce dwc3_core_is_valid()
This little helper will be used to make sure we're
dealing with a valid Synopsys DWC3 or DWC3.1 core.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:34 +02:00
John Youn 0bb39ca1ad usb: dwc3: Add support for device L1 exit
For the usb31 IP and from version 2.90a of the usb3 IP, the core
supports HW exit from L1 in HS. Enable it, otherwise the controller may
never exit from LPM to do a transfer.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:33 +02:00
Lu Baolu f9d2f9228c usb: dwc3: remove unused struct member dwc3->mem
Member @mem in struct dwc3 is not used in any places. Clean up it.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-03 10:38:33 +02:00
Vivek Gautam 9b9d7cdd0a usb: dwc3: Fix error handling for core init
Fixing the sequence of events in dwc3_core_init() error exit path.
dwc3_core_exit() call is also removed from the error path since,
whatever it's doing is already done.

Fixes: c499ff7 usb: dwc3: core: re-factor init and exit paths

Cc: Felipe Balbi <felipe.balbi@linux.intel.com>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: Stable <stable@vger.kernel.org> # 4.8+
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-10-31 11:14:27 +02:00
Greg Kroah-Hartman 8152263748 usb: patches for v4.9 merge window
This time around we have 92 non-merge commits. Most
 of the changes are in drivers/usb/gadget (40.3%)
 with drivers/usb/gadget/function being the most
 active directory (27.2%).
 
 As for UDC drivers, only dwc3 (26.5%) and dwc2
 (12.7%) have really been active.
 
 The most important changes for dwc3 are better
 support for scatterlist and, again, throughput
 improvements. While on dwc2 got some minor stability
 fixes related to soft reset and FIFO usage.
 
 Felipe Tonello has done some good work fixing up our
 f_midi gadget and Tal Shorer has implemented a nice
 API change for our ULPI bus.
 
 Apart from these, we have our usual set of
 non-critical fixes, spelling fixes, build warning
 fixes, etc.
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Merge tag 'usb-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

usb: patches for v4.9 merge window

This time around we have 92 non-merge commits. Most
of the changes are in drivers/usb/gadget (40.3%)
with drivers/usb/gadget/function being the most
active directory (27.2%).

As for UDC drivers, only dwc3 (26.5%) and dwc2
(12.7%) have really been active.

The most important changes for dwc3 are better
support for scatterlist and, again, throughput
improvements. While on dwc2 got some minor stability
fixes related to soft reset and FIFO usage.

Felipe Tonello has done some good work fixing up our
f_midi gadget and Tal Shorer has implemented a nice
API change for our ULPI bus.

Apart from these, we have our usual set of
non-critical fixes, spelling fixes, build warning
fixes, etc.
2016-09-14 20:37:50 +02:00
Thinh Nguyen 9d6173e125 usb: dwc3: Fix dr_mode validation
This patch follows the similar fix in dwc2. See
commit 5268ed9d2e ("usb: dwc2: Fix dr_mode validation")

Currently, the dr_mode is only checked against the module configuration.
It also needs to be checked against the hardware capablities.

The driver now checks if both the module configuration and hardware are
capable of the dr_mode value. If not, then it will issue a warning and
fall back to a supported value. If it is unable to fall back to a
suitable value, then the probe will fail.

Behavior summary:

      module          :  actual
 HW   config  dr_mode :  dr_mode
---------------------------------
 host  host   any     :  host
 host  dev    any     :  INVALID
 host  otg    any     :  host

 dev   host   any     :  INVALID
 dev   dev    any     :  dev
 dev   otg    any     :  dev

 otg   host   any     :  host
 otg   dev    any     :  dev
 otg   otg    any     :  dr_mode

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-09-07 13:29:20 +03:00
John Youn 06281d460f usb: dwc3: Add ENDXFER command polling
ENDXFER polling is available on version 3.10a and later of the
DWC_usb3 (USB 3.0) controller. With this feature, the software can poll
the CMDACT bit in the DEPCMD register after issuing an ENDXFER command.
This feature is enabled by writing GUCTL2[14].

This feature is NOT available on the DWC_usb31 (USB 3.1) IP.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:19 +03:00
Baolin Wang 00af62330c usb: dwc3: core: Move the mode setting to the right place
When dwc3 core enters into suspend mode, the system (especially for mobile
device) may power off the dwc3 controller for power saving, that will cause
dwc3 controller lost the mode operation when resuming dwc3 core.

Thus we can move the mode setting into dwc3_core_init() function to avoid this
issue.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:16 +03:00
William Wu 00fe081dc3 usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
William Wu 32f2ed864d usb: dwc3: make usb2 phy utmi interface configurable
Support to configure the UTMI+ PHY with an 8- or 16-bit
interface via DT. The UTMI+ PHY interface is a hardware
capability, and it's platform dependent. Normally, the
PHYIF can be configured during coreconsultant.

But for some specific USB cores(e.g. rk3399 SoC DWC3),
the default PHYIF configuration value is false, so we
need to reconfigure it by software.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
William Wu 16199f3389 usb: dwc3: add dis_u2_freeclk_exists_quirk
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-25 12:13:11 +03:00
Felipe Balbi b74c2d875b usb: dwc3: core: allow device to runtime_suspend several times
After going through runtime_suspend/runtime_resume
cycle once we would be left with an unbalanced
pm_runtime_get() call. Fix that by making sure that
we try to suspend right after resuming so things are
balanced and device can runtime_suspend again.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-08-22 10:45:11 +03:00
Roger Quadros 9522def400 usb: dwc3: core: cleanup IRQ resources
Implementations might use different IRQs for
host, gadget so use named interrupt resources
to allow device tree to specify the interrupts.

Following are the interrupt names

Peripheral Interrupt - peripheral
HOST Interrupt - host

Maintain backward compatibility for a single named
interrupt ("dwc3_usb3") for all interrupts as well as
unnamed interrupt at index 0 for all interrupts.

As platform_get_irq() variants are used, tackle
the -EPROBE_DEFER case as well.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-21 10:53:22 +03:00
Roger Quadros 328082376a usb: dwc3: fix runtime PM in error path
If there is a failure after pm_runtime_enable/get_sync()
we need to call pm_runtime_disable/put_sync().

Otherwise it will lead to an unbalanced pm_runtime_enable() on the
subsequent probe if the earlier probe bailed out due to -EPROBE_DEFER.

pm_runtime_get_sync() can fail as well so deal with that case too.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-21 10:38:43 +03:00
Felipe Balbi 5f82279a0c usb: dwc3: core: fixup dr_mode fallback selection
We shouldn't change a host-only dwc3 to gadget-only
if driver is built as gadget-only. Fix that up here.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-21 10:38:42 +03:00
Heikki Krogerus d18e65470a usb: dwc3: remove handling of platform data
No more users for it.

Tested-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:48 +03:00
Felipe Balbi fc8bb91bc8 usb: dwc3: implement runtime PM
this patch implements the most basic pm_runtime
support for dwc3. Whenever USB cable is dettached,
then we will allow core to runtime_suspend.

Runtime suspending will involve completely tearing
down event buffers and require a full soft-reset of
the IP.

Note that a further optimization could be
implemented once we decide to support hibernation,
which is to allow runtime_suspend with cable
connected when bus is in U3. That's subject to a
separate patch, however.

Tested-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:38 +03:00
Felipe Balbi 51f5d49ad6 usb: dwc3: core: simplify suspend/resume operations
now that we have re-factored dwc3_core_init() and
dwc3_core_exit() we can use them for suspend/resume
operations.

This will help us avoid some common mistakes when
patching code when we have duplicated pieces of code
doing the same thing.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:36 +03:00
Felipe Balbi c499ff71ff usb: dwc3: core: re-factor init and exit paths
The idea of this patch is for dwc3_core_init() to
abstract all the details about how to initialize
dwc3 and dwc3_core_exit() to do the same for
teardown.

With this, we can simplify suspend/resume operations
by a large margin and always know that we're going
to start dwc3 from a known starting point.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:36 +03:00
Felipe Balbi bcdb3272e8 usb: dwc3: core: move fladj to dwc3 structure
this patch is in preparation for some further
re-factoring in dwc3 initialization. No functional
changes.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:32:35 +03:00
Felipe Balbi 7f370ed0cf usb: dwc3: core: get rid of DWC3_PM_OPS macro
that macro is unnecessary and just adds pointless
obfuscation. Let's remove it.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-06-20 12:30:04 +03:00
Greg Kroah-Hartman ce15bda101 usb: changes for v4.7 merge window
Here's the big USB Gadget pull request. This time
 not as large as usual with only 57 non-merge
 commits.
 
 The most important part here is, again, all the work
 on dwc3. This time around we're treating all
 endpoints (except for control endpoint) exactly the
 same. They all have the same amount of TRBs on the
 ring, they all treat the ring as an actual ring with
 a link TRB pointing to the head, etc.
 
 We're also helping the host side burst (on
 SuperSpeed GEN1 or GEN2 at least) for as long as
 possible until the endpoint returns NRDY.
 
 Other than this big TRB ring rework on dwc3, we also
 have a dwc3-omap DMA initialization fix, some extra
 debugfs files to aid in some odd debug sessions and
 a complete removal of our FIFO resizing logic.
 
 We have a new quirk for some dwc3 P3 quirk in some
 implementations.
 
 The rest is basically non-critical fixes and the
 usual cleanups.
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Merge tag 'usb-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

usb: changes for v4.7 merge window

Here's the big USB Gadget pull request. This time
not as large as usual with only 57 non-merge
commits.

The most important part here is, again, all the work
on dwc3. This time around we're treating all
endpoints (except for control endpoint) exactly the
same. They all have the same amount of TRBs on the
ring, they all treat the ring as an actual ring with
a link TRB pointing to the head, etc.

We're also helping the host side burst (on
SuperSpeed GEN1 or GEN2 at least) for as long as
possible until the endpoint returns NRDY.

Other than this big TRB ring rework on dwc3, we also
have a dwc3-omap DMA initialization fix, some extra
debugfs files to aid in some odd debug sessions and
a complete removal of our FIFO resizing logic.

We have a new quirk for some dwc3 P3 quirk in some
implementations.

The rest is basically non-critical fixes and the
usual cleanups.
2016-04-28 09:32:39 -07:00